* [PATCH v2] target/mips: fetch code with translator_ld
@ 2021-01-25 10:58 Philippe Mathieu-Daudé
2021-01-25 18:37 ` Richard Henderson
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-25 10:58 UTC (permalink / raw)
To: qemu-devel
Cc: Aleksandar Rikalo, Richard Henderson, Philippe Mathieu-Daudé,
Emilio G . Cota, Alex Bennée, Aurelien Jarno
Similarly to commits ae82adc8e29..7f93879e444, use the
translator_ld*() API introduced in commit 409c1a0bf0f
to fetch the code on the MIPS target.
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
v2: Restrict to translator path =)
---
target/mips/translate.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index a5cf1742a8b..a6e835809aa 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -26,7 +26,7 @@
#include "cpu.h"
#include "internal.h"
#include "tcg/tcg-op.h"
-#include "exec/cpu_ldst.h"
+#include "exec/translator.h"
#include "exec/helper-proto.h"
#include "exec/helper-gen.h"
#include "hw/semihosting/semihost.h"
@@ -13911,7 +13911,7 @@ static void decode_i64_mips16(DisasContext *ctx,
static int decode_extended_mips16_opc(CPUMIPSState *env, DisasContext *ctx)
{
- int extend = cpu_lduw_code(env, ctx->base.pc_next + 2);
+ int extend = translator_lduw(env, ctx->base.pc_next + 2);
int op, rx, ry, funct, sa;
int16_t imm, offset;
@@ -14161,7 +14161,7 @@ static int decode_mips16_opc(CPUMIPSState *env, DisasContext *ctx)
/* No delay slot, so just process as a normal instruction */
break;
case M16_OPC_JAL:
- offset = cpu_lduw_code(env, ctx->base.pc_next + 2);
+ offset = translator_lduw(env, ctx->base.pc_next + 2);
offset = (((ctx->opcode & 0x1f) << 21)
| ((ctx->opcode >> 5) & 0x1f) << 16
| offset) << 2;
@@ -16295,7 +16295,7 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
uint32_t op, minor, minor2, mips32_op;
uint32_t cond, fmt, cc;
- insn = cpu_lduw_code(env, ctx->base.pc_next + 2);
+ insn = translator_lduw(env, ctx->base.pc_next + 2);
ctx->opcode = (ctx->opcode << 16) | insn;
rt = (ctx->opcode >> 21) & 0x1f;
@@ -21350,7 +21350,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
int offset;
int imm;
- insn = cpu_lduw_code(env, ctx->base.pc_next + 2);
+ insn = translator_lduw(env, ctx->base.pc_next + 2);
ctx->opcode = (ctx->opcode << 16) | insn;
rt = extract32(ctx->opcode, 21, 5);
@@ -21469,7 +21469,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
break;
case NM_P48I:
{
- insn = cpu_lduw_code(env, ctx->base.pc_next + 4);
+ insn = translator_lduw(env, ctx->base.pc_next + 4);
target_long addr_off = extract32(ctx->opcode, 0, 16) | insn << 16;
switch (extract32(ctx->opcode, 16, 5)) {
case NM_LI48:
@@ -29087,17 +29087,17 @@ static void mips_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
is_slot = ctx->hflags & MIPS_HFLAG_BMASK;
if (ctx->insn_flags & ISA_NANOMIPS32) {
- ctx->opcode = cpu_lduw_code(env, ctx->base.pc_next);
+ ctx->opcode = translator_lduw(env, ctx->base.pc_next);
insn_bytes = decode_nanomips_opc(env, ctx);
} else if (!(ctx->hflags & MIPS_HFLAG_M16)) {
- ctx->opcode = cpu_ldl_code(env, ctx->base.pc_next);
+ ctx->opcode = translator_ldl(env, ctx->base.pc_next);
insn_bytes = 4;
decode_opc(env, ctx);
} else if (ctx->insn_flags & ASE_MICROMIPS) {
- ctx->opcode = cpu_lduw_code(env, ctx->base.pc_next);
+ ctx->opcode = translator_lduw(env, ctx->base.pc_next);
insn_bytes = decode_micromips_opc(env, ctx);
} else if (ctx->insn_flags & ASE_MIPS16) {
- ctx->opcode = cpu_lduw_code(env, ctx->base.pc_next);
+ ctx->opcode = translator_lduw(env, ctx->base.pc_next);
insn_bytes = decode_mips16_opc(env, ctx);
} else {
gen_reserved_instruction(ctx);
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2] target/mips: fetch code with translator_ld
2021-01-25 10:58 [PATCH v2] target/mips: fetch code with translator_ld Philippe Mathieu-Daudé
@ 2021-01-25 18:37 ` Richard Henderson
2021-01-26 10:17 ` Alex Bennée
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Richard Henderson @ 2021-01-25 18:37 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Aleksandar Rikalo, Emilio G . Cota, Alex Bennée, Aurelien Jarno
On 1/25/21 12:58 AM, Philippe Mathieu-Daudé wrote:
> Similarly to commits ae82adc8e29..7f93879e444, use the
> translator_ld*() API introduced in commit 409c1a0bf0f
> to fetch the code on the MIPS target.
>
> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2: Restrict to translator path =)
> ---
> target/mips/translate.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] target/mips: fetch code with translator_ld
2021-01-25 10:58 [PATCH v2] target/mips: fetch code with translator_ld Philippe Mathieu-Daudé
2021-01-25 18:37 ` Richard Henderson
@ 2021-01-26 10:17 ` Alex Bennée
2021-01-28 17:09 ` Philippe Mathieu-Daudé
2021-02-16 11:14 ` Alex Bennée
3 siblings, 0 replies; 5+ messages in thread
From: Alex Bennée @ 2021-01-26 10:17 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Aleksandar Rikalo, Richard Henderson, qemu-devel,
Emilio G . Cota, Aurelien Jarno
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Similarly to commits ae82adc8e29..7f93879e444, use the
> translator_ld*() API introduced in commit 409c1a0bf0f
> to fetch the code on the MIPS target.
>
> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] target/mips: fetch code with translator_ld
2021-01-25 10:58 [PATCH v2] target/mips: fetch code with translator_ld Philippe Mathieu-Daudé
2021-01-25 18:37 ` Richard Henderson
2021-01-26 10:17 ` Alex Bennée
@ 2021-01-28 17:09 ` Philippe Mathieu-Daudé
2021-02-16 11:14 ` Alex Bennée
3 siblings, 0 replies; 5+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-01-28 17:09 UTC (permalink / raw)
To: qemu-devel
Cc: Alex Bennée, Aleksandar Rikalo, Emilio G . Cota,
Richard Henderson, Aurelien Jarno
On 1/25/21 11:58 AM, Philippe Mathieu-Daudé wrote:
> Similarly to commits ae82adc8e29..7f93879e444, use the
> translator_ld*() API introduced in commit 409c1a0bf0f
> to fetch the code on the MIPS target.
>
> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> v2: Restrict to translator path =)
> ---
> target/mips/translate.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
Thanks, applied to mips-next.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] target/mips: fetch code with translator_ld
2021-01-25 10:58 [PATCH v2] target/mips: fetch code with translator_ld Philippe Mathieu-Daudé
` (2 preceding siblings ...)
2021-01-28 17:09 ` Philippe Mathieu-Daudé
@ 2021-02-16 11:14 ` Alex Bennée
3 siblings, 0 replies; 5+ messages in thread
From: Alex Bennée @ 2021-02-16 11:14 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Aleksandar Rikalo, Richard Henderson, qemu-devel,
Emilio G . Cota, Aurelien Jarno
Philippe Mathieu-Daudé <f4bug@amsat.org> writes:
> Similarly to commits ae82adc8e29..7f93879e444, use the
> translator_ld*() API introduced in commit 409c1a0bf0f
> to fetch the code on the MIPS target.
>
> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
--
Alex Bennée
^ permalink raw reply [flat|nested] 5+ messages in thread
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2021-01-25 10:58 [PATCH v2] target/mips: fetch code with translator_ld Philippe Mathieu-Daudé
2021-01-25 18:37 ` Richard Henderson
2021-01-26 10:17 ` Alex Bennée
2021-01-28 17:09 ` Philippe Mathieu-Daudé
2021-02-16 11:14 ` Alex Bennée
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