* [PATCH V2] cpufreq: Add Zhaoxin/Centaur turbo boost control interface support
@ 2022-06-23 1:21 Tony W Wang-oc
2022-06-29 18:16 ` Rafael J. Wysocki
0 siblings, 1 reply; 3+ messages in thread
From: Tony W Wang-oc @ 2022-06-23 1:21 UTC (permalink / raw)
To: Rafael J. Wysocki, Viresh Kumar, Linux PM,
Linux Kernel Mailing List, CobeChen, TimGuo, LindaChai, LeoLiu,
ACPI Devel Maling List
Recent Zhaoxin/Centaur CPUs support X86_FEATURE_IDA and the turbo boost
can be dynamically enabled or disabled through MSR 0x1a0[38] in the same
way as Intel. So add turbo boost control support for these CPUs too.
Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
---
drivers/cpufreq/acpi-cpufreq.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
index 3d514b8..1bb2b90 100644
--- a/drivers/cpufreq/acpi-cpufreq.c
+++ b/drivers/cpufreq/acpi-cpufreq.c
@@ -78,6 +78,8 @@ static bool boost_state(unsigned int cpu)
switch (boot_cpu_data.x86_vendor) {
case X86_VENDOR_INTEL:
+ case X86_VENDOR_CENTAUR:
+ case X86_VENDOR_ZHAOXIN:
rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
msr = lo | ((u64)hi << 32);
return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
@@ -97,6 +99,8 @@ static int boost_set_msr(bool enable)
switch (boot_cpu_data.x86_vendor) {
case X86_VENDOR_INTEL:
+ case X86_VENDOR_CENTAUR:
+ case X86_VENDOR_ZHAOXIN:
msr_addr = MSR_IA32_MISC_ENABLE;
msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
break;
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH V2] cpufreq: Add Zhaoxin/Centaur turbo boost control interface support
2022-06-23 1:21 [PATCH V2] cpufreq: Add Zhaoxin/Centaur turbo boost control interface support Tony W Wang-oc
@ 2022-06-29 18:16 ` Rafael J. Wysocki
2022-06-30 1:58 ` Tony W Wang-oc
0 siblings, 1 reply; 3+ messages in thread
From: Rafael J. Wysocki @ 2022-06-29 18:16 UTC (permalink / raw)
To: Tony W Wang-oc
Cc: Rafael J. Wysocki, Viresh Kumar, Linux PM,
Linux Kernel Mailing List, CobeChen, TimGuo, LindaChai, LeoLiu,
ACPI Devel Maling List
On Thu, Jun 23, 2022 at 3:21 AM Tony W Wang-oc <TonyWWang-oc@zhaoxin.com> wrote:
>
> Recent Zhaoxin/Centaur CPUs support X86_FEATURE_IDA and the turbo boost
> can be dynamically enabled or disabled through MSR 0x1a0[38] in the same
> way as Intel. So add turbo boost control support for these CPUs too.
>
> Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
> ---
> drivers/cpufreq/acpi-cpufreq.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
> index 3d514b8..1bb2b90 100644
> --- a/drivers/cpufreq/acpi-cpufreq.c
> +++ b/drivers/cpufreq/acpi-cpufreq.c
> @@ -78,6 +78,8 @@ static bool boost_state(unsigned int cpu)
>
> switch (boot_cpu_data.x86_vendor) {
> case X86_VENDOR_INTEL:
> + case X86_VENDOR_CENTAUR:
> + case X86_VENDOR_ZHAOXIN:
> rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
> msr = lo | ((u64)hi << 32);
> return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
> @@ -97,6 +99,8 @@ static int boost_set_msr(bool enable)
>
> switch (boot_cpu_data.x86_vendor) {
> case X86_VENDOR_INTEL:
> + case X86_VENDOR_CENTAUR:
> + case X86_VENDOR_ZHAOXIN:
> msr_addr = MSR_IA32_MISC_ENABLE;
> msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
> break;
> --
Applied as 5.20 material.
However, I had to manually fix up the formatting of the patch.
Can you please configure your e-mail client so that this is not
necessary in the future?
Thanks!
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V2] cpufreq: Add Zhaoxin/Centaur turbo boost control interface support
2022-06-29 18:16 ` Rafael J. Wysocki
@ 2022-06-30 1:58 ` Tony W Wang-oc
0 siblings, 0 replies; 3+ messages in thread
From: Tony W Wang-oc @ 2022-06-30 1:58 UTC (permalink / raw)
To: Rafael J. Wysocki
Cc: Viresh Kumar, Linux PM, Linux Kernel Mailing List, CobeChen,
TimGuo, LindaChai, LeoLiu, ACPI Devel Maling List
On 30/6/2022 02:16, Rafael J. Wysocki wrote:
> On Thu, Jun 23, 2022 at 3:21 AM Tony W Wang-oc <TonyWWang-oc@zhaoxin.com> wrote:
>>
>> Recent Zhaoxin/Centaur CPUs support X86_FEATURE_IDA and the turbo boost
>> can be dynamically enabled or disabled through MSR 0x1a0[38] in the same
>> way as Intel. So add turbo boost control support for these CPUs too.
>>
>> Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
>> ---
>> drivers/cpufreq/acpi-cpufreq.c | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
>> index 3d514b8..1bb2b90 100644
>> --- a/drivers/cpufreq/acpi-cpufreq.c
>> +++ b/drivers/cpufreq/acpi-cpufreq.c
>> @@ -78,6 +78,8 @@ static bool boost_state(unsigned int cpu)
>>
>> switch (boot_cpu_data.x86_vendor) {
>> case X86_VENDOR_INTEL:
>> + case X86_VENDOR_CENTAUR:
>> + case X86_VENDOR_ZHAOXIN:
>> rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
>> msr = lo | ((u64)hi << 32);
>> return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
>> @@ -97,6 +99,8 @@ static int boost_set_msr(bool enable)
>>
>> switch (boot_cpu_data.x86_vendor) {
>> case X86_VENDOR_INTEL:
>> + case X86_VENDOR_CENTAUR:
>> + case X86_VENDOR_ZHAOXIN:
>> msr_addr = MSR_IA32_MISC_ENABLE;
>> msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
>> break;
>> --
>
> Applied as 5.20 material.
>
Thanks a lot.
> However, I had to manually fix up the formatting of the patch.
>
Sorry for inconvenient.
> Can you please configure your e-mail client so that this is not
> necessary in the future?
>
Was using the Thunderbird client to send patch, and will use git
send-email in the future.
> Thanks!
> .
>
--
Sincerely
TonyWWang-oc
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-06-30 1:58 UTC | newest]
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2022-06-23 1:21 [PATCH V2] cpufreq: Add Zhaoxin/Centaur turbo boost control interface support Tony W Wang-oc
2022-06-29 18:16 ` Rafael J. Wysocki
2022-06-30 1:58 ` Tony W Wang-oc
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