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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 17/20] arm: socfpga: Convert Altera ddr driver to use Kconfig
Date: Fri, 10 Mar 2017 02:53:53 +0100	[thread overview]
Message-ID: <2db7d5e9-8c53-e8b4-db81-77940057e49f@denx.de> (raw)
In-Reply-To: <1489019218-4071-18-git-send-email-ley.foon.tan@intel.com>

On 03/09/2017 01:26 AM, Ley Foon Tan wrote:
> Convert Altera ddr driver to use Kconfig method. Enable ALTERA_SDRAM
> by default if it is on Gen5 target. Arria 10 will have different driver.
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> ---
>  drivers/Kconfig                  | 2 ++
>  drivers/ddr/Kconfig              | 1 +
>  drivers/ddr/altera/Kconfig       | 6 ++++++
>  include/configs/socfpga_common.h | 5 -----
>  4 files changed, 9 insertions(+), 5 deletions(-)
>  create mode 100644 drivers/ddr/Kconfig
>  create mode 100644 drivers/ddr/altera/Kconfig
> 
> diff --git a/drivers/Kconfig b/drivers/Kconfig
> index 0e5d97d..3e6bbac 100644
> --- a/drivers/Kconfig
> +++ b/drivers/Kconfig
> @@ -14,6 +14,8 @@ source "drivers/cpu/Kconfig"
>  
>  source "drivers/crypto/Kconfig"
>  
> +source "drivers/ddr/Kconfig"
> +
>  source "drivers/demo/Kconfig"
>  
>  source "drivers/ddr/fsl/Kconfig"
> diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
> new file mode 100644
> index 0000000..b764add
> --- /dev/null
> +++ b/drivers/ddr/Kconfig
> @@ -0,0 +1 @@
> +source "drivers/ddr/altera/Kconfig"
> diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
> new file mode 100644
> index 0000000..9554da7
> --- /dev/null
> +++ b/drivers/ddr/altera/Kconfig
> @@ -0,0 +1,6 @@
> +config ALTERA_SDRAM
> +	bool "SoCFPGA SDRAM for Arria5/Cyclone5 devices"

Does this controller even support SDRAM ? :)

> +	default y if TARGET_SOCFPGA_GEN5
> +	help
> +	  This is for building the SDRAM controller for the Arria5/Cyclone5
> +	  devices.
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index 55e0bf9..bc92a2c 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -77,11 +77,6 @@
>  #define CONFIG_SYS_PL310_BASE		SOCFPGA_MPUL2_ADDRESS
>  
>  /*
> - * SDRAM controller
> - */
> -#define CONFIG_ALTERA_SDRAM
> -
> -/*
>   * EPCS/EPCQx1 Serial Flash Controller
>   */
>  #ifdef CONFIG_ALTERA_SPI
> 


-- 
Best regards,
Marek Vasut

  reply	other threads:[~2017-03-10  1:53 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-09  0:26 [U-Boot] [PATCH v2 00/20] Add Intel Arria 10 SoC support Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 01/20] arm: socfpga: Restructure clock manager driver Ley Foon Tan
2017-03-09 16:29   ` Dinh Nguyen
2017-03-21  7:26     ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 02/20] arm: socfpga: Update clock for Gen5 Ley Foon Tan
2017-03-09 16:39   ` Dinh Nguyen
2017-03-09  0:26 ` [U-Boot] [PATCH v2 03/20] arm: socfpga: Restructure reset manager driver Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 04/20] arm: socfpga: Restructure misc driver Ley Foon Tan
2017-03-10  1:36   ` Marek Vasut
2017-03-21  7:44     ` Ley Foon Tan
2017-03-21  8:25       ` Marek Vasut
2017-03-22  8:16         ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 05/20] arm: socfpga: Restructure system manager Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 06/20] arm: socfpga: Add A10 defines Ley Foon Tan
2017-03-10  1:38   ` Marek Vasut
2017-03-21  8:05     ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 07/20] arm: socfpga: Add reset driver support for Arria 10 Ley Foon Tan
2017-03-10  1:40   ` Marek Vasut
2017-03-23  5:55     ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 08/20] arm: socfpga: Add clock driver " Ley Foon Tan
2017-03-10  1:47   ` Marek Vasut
2017-03-22  6:14     ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 09/20] arm: socfpga: Add system manager " Ley Foon Tan
2017-03-10  1:47   ` Marek Vasut
2017-03-09  0:26 ` [U-Boot] [PATCH v2 10/20] arm: socfpga: Add sdram header file " Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 11/20] arm: socfpga: Add misc support " Ley Foon Tan
2017-03-10  1:49   ` Marek Vasut
2017-03-09  0:26 ` [U-Boot] [PATCH v2 12/20] arm: socfpga: Add pinmux " Ley Foon Tan
2017-03-10  1:50   ` Marek Vasut
2017-03-22  6:26     ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 13/20] fdt: Add compatible strings " Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 14/20] arm: dts: Add dts and dtsi " Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 15/20] arm: socfpga: Add SPL support " Ley Foon Tan
2017-03-10  1:52   ` Marek Vasut
2017-03-22  8:28     ` Ley Foon Tan
2017-03-22  8:41       ` Marek Vasut
2017-03-22  9:21         ` Ley Foon Tan
2017-03-22 14:46           ` Marek Vasut
2017-03-09  0:26 ` [U-Boot] [PATCH v2 16/20] drivers: fpga: Add compile switch for Gen5 only registers Ley Foon Tan
2017-03-10  1:53   ` Marek Vasut
2017-03-22  8:30     ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 17/20] arm: socfpga: Convert Altera ddr driver to use Kconfig Ley Foon Tan
2017-03-10  1:53   ` Marek Vasut [this message]
2017-03-22  9:45     ` Ley Foon Tan
2017-03-22 14:26       ` Marek Vasut
2017-03-23  5:36         ` Ley Foon Tan
2017-03-23  7:39           ` Marek Vasut
2017-03-23  9:54             ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 18/20] arm: socfpga: Add config and defconfig for Arria 10 Ley Foon Tan
2017-03-10  1:55   ` Marek Vasut
2017-03-22  8:39     ` Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 19/20] arm: socfpga: Add board files for the Arria10 Ley Foon Tan
2017-03-09  0:26 ` [U-Boot] [PATCH v2 20/20] arm: socfpga: Enable build for Arria 10 Ley Foon Tan
2017-03-09 21:32 ` [U-Boot] [PATCH v2 00/20] Add Intel Arria 10 SoC support Dinh Nguyen
2017-03-10  1:51   ` Marek Vasut
2017-03-16 21:56 ` Marek Vasut
2017-03-17 12:25   ` Ley Foon Tan
2017-03-17 12:28     ` Marek Vasut
2017-03-20  7:33       ` Ley Foon Tan
2017-03-21  8:26         ` Marek Vasut

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