* [PATCH 0/4] drm/v3d: Minor improvements
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: Stefan Wahren, devicetree, linux-arm-kernel, dri-devel
This small series of v3d patches is a preparation for the upcoming bcm2711
support. The bcm2711 support will be send separate, because it involves
bigger changes.
I'm not sure that the schema conversion patch is sufficient.
Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
Nicolas Saenz Julienne (1):
drm/v3d: Use platform_get_irq_optional() to get optional IRQs
Phil Elwell (2):
drm/v3d: Set dma_mask as well as coherent_dma_mask
drm/v3d: Don't clear MMU control bits on exception
Stefan Wahren (1):
dt-bindings: gpu: Convert v3d to json-schema
.../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 ----------
.../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 76 ++++++++++++++++++++++
drivers/gpu/drm/v3d/v3d_drv.c | 4 +-
drivers/gpu/drm/v3d/v3d_irq.c | 7 +-
4 files changed, 80 insertions(+), 40 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
--
2.7.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 0/4] drm/v3d: Minor improvements
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: Stefan Wahren, devicetree, linux-arm-kernel, dri-devel
This small series of v3d patches is a preparation for the upcoming bcm2711
support. The bcm2711 support will be send separate, because it involves
bigger changes.
I'm not sure that the schema conversion patch is sufficient.
Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
Nicolas Saenz Julienne (1):
drm/v3d: Use platform_get_irq_optional() to get optional IRQs
Phil Elwell (2):
drm/v3d: Set dma_mask as well as coherent_dma_mask
drm/v3d: Don't clear MMU control bits on exception
Stefan Wahren (1):
dt-bindings: gpu: Convert v3d to json-schema
.../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 ----------
.../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 76 ++++++++++++++++++++++
drivers/gpu/drm/v3d/v3d_drv.c | 4 +-
drivers/gpu/drm/v3d/v3d_irq.c | 7 +-
4 files changed, 80 insertions(+), 40 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH 1/4] drm/v3d: Use platform_get_irq_optional() to get optional IRQs
2020-12-23 20:27 ` Stefan Wahren
(?)
@ 2020-12-23 20:27 ` Stefan Wahren
-1 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: dri-devel, devicetree, linux-arm-kernel
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Aside from being more correct, the non optional version of the function
prints an error when failing to find the IRQ.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
drivers/gpu/drm/v3d/v3d_irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c
index c886864..0be2eb7 100644
--- a/drivers/gpu/drm/v3d/v3d_irq.c
+++ b/drivers/gpu/drm/v3d/v3d_irq.c
@@ -217,7 +217,7 @@ v3d_irq_init(struct v3d_dev *v3d)
V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS);
V3D_WRITE(V3D_HUB_INT_CLR, V3D_HUB_IRQS);
- irq1 = platform_get_irq(v3d_to_pdev(v3d), 1);
+ irq1 = platform_get_irq_optional(v3d_to_pdev(v3d), 1);
if (irq1 == -EPROBE_DEFER)
return irq1;
if (irq1 > 0) {
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 1/4] drm/v3d: Use platform_get_irq_optional() to get optional IRQs
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, linux-arm-kernel, dri-devel
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Aside from being more correct, the non optional version of the function
prints an error when failing to find the IRQ.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
drivers/gpu/drm/v3d/v3d_irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c
index c886864..0be2eb7 100644
--- a/drivers/gpu/drm/v3d/v3d_irq.c
+++ b/drivers/gpu/drm/v3d/v3d_irq.c
@@ -217,7 +217,7 @@ v3d_irq_init(struct v3d_dev *v3d)
V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS);
V3D_WRITE(V3D_HUB_INT_CLR, V3D_HUB_IRQS);
- irq1 = platform_get_irq(v3d_to_pdev(v3d), 1);
+ irq1 = platform_get_irq_optional(v3d_to_pdev(v3d), 1);
if (irq1 == -EPROBE_DEFER)
return irq1;
if (irq1 > 0) {
--
2.7.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 1/4] drm/v3d: Use platform_get_irq_optional() to get optional IRQs
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, linux-arm-kernel, dri-devel
From: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Aside from being more correct, the non optional version of the function
prints an error when failing to find the IRQ.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
---
drivers/gpu/drm/v3d/v3d_irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c
index c886864..0be2eb7 100644
--- a/drivers/gpu/drm/v3d/v3d_irq.c
+++ b/drivers/gpu/drm/v3d/v3d_irq.c
@@ -217,7 +217,7 @@ v3d_irq_init(struct v3d_dev *v3d)
V3D_CORE_WRITE(core, V3D_CTL_INT_CLR, V3D_CORE_IRQS);
V3D_WRITE(V3D_HUB_INT_CLR, V3D_HUB_IRQS);
- irq1 = platform_get_irq(v3d_to_pdev(v3d), 1);
+ irq1 = platform_get_irq_optional(v3d_to_pdev(v3d), 1);
if (irq1 == -EPROBE_DEFER)
return irq1;
if (irq1 > 0) {
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/4] drm/v3d: Set dma_mask as well as coherent_dma_mask
2020-12-23 20:27 ` Stefan Wahren
(?)
@ 2020-12-23 20:27 ` Stefan Wahren
-1 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: dri-devel, devicetree, linux-arm-kernel, Phil Elwell
From: Phil Elwell <phil@raspberrypi.org>
Both coherent_dma_mask and dma_mask act as constraints on allocations
and bounce buffer usage, so be sure to set dma_mask to the appropriate
value otherwise the effective mask could be incorrect.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/gpu/drm/v3d/v3d_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_drv.c b/drivers/gpu/drm/v3d/v3d_drv.c
index 42d401f..99e22be 100644
--- a/drivers/gpu/drm/v3d/v3d_drv.c
+++ b/drivers/gpu/drm/v3d/v3d_drv.c
@@ -232,8 +232,8 @@ static int v3d_platform_drm_probe(struct platform_device *pdev)
return ret;
mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
- dev->coherent_dma_mask =
- DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
+ dma_set_mask_and_coherent(dev,
+ DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)));
v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
ident1 = V3D_READ(V3D_HUB_IDENT1);
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/4] drm/v3d: Set dma_mask as well as coherent_dma_mask
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, Phil Elwell, linux-arm-kernel, dri-devel
From: Phil Elwell <phil@raspberrypi.org>
Both coherent_dma_mask and dma_mask act as constraints on allocations
and bounce buffer usage, so be sure to set dma_mask to the appropriate
value otherwise the effective mask could be incorrect.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/gpu/drm/v3d/v3d_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_drv.c b/drivers/gpu/drm/v3d/v3d_drv.c
index 42d401f..99e22be 100644
--- a/drivers/gpu/drm/v3d/v3d_drv.c
+++ b/drivers/gpu/drm/v3d/v3d_drv.c
@@ -232,8 +232,8 @@ static int v3d_platform_drm_probe(struct platform_device *pdev)
return ret;
mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
- dev->coherent_dma_mask =
- DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
+ dma_set_mask_and_coherent(dev,
+ DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)));
v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
ident1 = V3D_READ(V3D_HUB_IDENT1);
--
2.7.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 2/4] drm/v3d: Set dma_mask as well as coherent_dma_mask
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, Phil Elwell, linux-arm-kernel, dri-devel
From: Phil Elwell <phil@raspberrypi.org>
Both coherent_dma_mask and dma_mask act as constraints on allocations
and bounce buffer usage, so be sure to set dma_mask to the appropriate
value otherwise the effective mask could be incorrect.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/gpu/drm/v3d/v3d_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_drv.c b/drivers/gpu/drm/v3d/v3d_drv.c
index 42d401f..99e22be 100644
--- a/drivers/gpu/drm/v3d/v3d_drv.c
+++ b/drivers/gpu/drm/v3d/v3d_drv.c
@@ -232,8 +232,8 @@ static int v3d_platform_drm_probe(struct platform_device *pdev)
return ret;
mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
- dev->coherent_dma_mask =
- DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
+ dma_set_mask_and_coherent(dev,
+ DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)));
v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
ident1 = V3D_READ(V3D_HUB_IDENT1);
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 3/4] drm/v3d: Don't clear MMU control bits on exception
2020-12-23 20:27 ` Stefan Wahren
(?)
@ 2020-12-23 20:27 ` Stefan Wahren
-1 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: dri-devel, devicetree, linux-arm-kernel, Phil Elwell
From: Phil Elwell <phil@raspberrypi.org>
MMU exception conditions are reported in the V3D_MMU_CTRL register as
write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any
exceptions, but does so by masking out any other bits and writing the
result back. There are some important control bits in that register,
including MMU_ENABLE, so a safer approach is to simply write back the
value just read unaltered.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/gpu/drm/v3d/v3d_irq.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c
index 0be2eb7..e714d53 100644
--- a/drivers/gpu/drm/v3d/v3d_irq.c
+++ b/drivers/gpu/drm/v3d/v3d_irq.c
@@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg)
};
const char *client = "?";
- V3D_WRITE(V3D_MMU_CTL,
- V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED |
- V3D_MMU_CTL_PT_INVALID |
- V3D_MMU_CTL_WRITE_VIOLATION));
+ V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL));
if (v3d->ver >= 41) {
axi_id = axi_id >> 5;
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 3/4] drm/v3d: Don't clear MMU control bits on exception
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, Phil Elwell, linux-arm-kernel, dri-devel
From: Phil Elwell <phil@raspberrypi.org>
MMU exception conditions are reported in the V3D_MMU_CTRL register as
write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any
exceptions, but does so by masking out any other bits and writing the
result back. There are some important control bits in that register,
including MMU_ENABLE, so a safer approach is to simply write back the
value just read unaltered.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/gpu/drm/v3d/v3d_irq.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c
index 0be2eb7..e714d53 100644
--- a/drivers/gpu/drm/v3d/v3d_irq.c
+++ b/drivers/gpu/drm/v3d/v3d_irq.c
@@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg)
};
const char *client = "?";
- V3D_WRITE(V3D_MMU_CTL,
- V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED |
- V3D_MMU_CTL_PT_INVALID |
- V3D_MMU_CTL_WRITE_VIOLATION));
+ V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL));
if (v3d->ver >= 41) {
axi_id = axi_id >> 5;
--
2.7.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 3/4] drm/v3d: Don't clear MMU control bits on exception
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, Phil Elwell, linux-arm-kernel, dri-devel
From: Phil Elwell <phil@raspberrypi.org>
MMU exception conditions are reported in the V3D_MMU_CTRL register as
write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any
exceptions, but does so by masking out any other bits and writing the
result back. There are some important control bits in that register,
including MMU_ENABLE, so a safer approach is to simply write back the
value just read unaltered.
Signed-off-by: Phil Elwell <phil@raspberrypi.org>
---
drivers/gpu/drm/v3d/v3d_irq.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c
index 0be2eb7..e714d53 100644
--- a/drivers/gpu/drm/v3d/v3d_irq.c
+++ b/drivers/gpu/drm/v3d/v3d_irq.c
@@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg)
};
const char *client = "?";
- V3D_WRITE(V3D_MMU_CTL,
- V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED |
- V3D_MMU_CTL_PT_INVALID |
- V3D_MMU_CTL_WRITE_VIOLATION));
+ V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL));
if (v3d->ver >= 41) {
axi_id = axi_id >> 5;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH 4/4] dt-bindings: gpu: Convert v3d to json-schema
2020-12-23 20:27 ` Stefan Wahren
(?)
@ 2020-12-23 20:27 ` Stefan Wahren
-1 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: dri-devel, devicetree, linux-arm-kernel, Stefan Wahren
This converts the v3d bindings to yaml format.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
.../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 ----------
.../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 76 ++++++++++++++++++++++
2 files changed, 76 insertions(+), 33 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
deleted file mode 100644
index b2df82b..0000000
--- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-Broadcom V3D GPU
-
-Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
-For V3D 2.x, see brcm,bcm-vc4.txt.
-
-Required properties:
-- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
-- reg: Physical base addresses and lengths of the register areas
-- reg-names: Names for the register areas. The "hub" and "core0"
- register areas are always required. The "gca" register area
- is required if the GCA cache controller is present. The
- "bridge" register area is required if an external reset
- controller is not present.
-- interrupts: The interrupt numbers. The first interrupt is for the hub,
- while the following interrupts are separate interrupt lines
- for the cores (if they don't share the hub's interrupt).
- See bindings/interrupt-controller/interrupts.txt
-
-Optional properties:
-- clocks: The core clock the unit runs on
-- resets: The reset line for v3d, if not using a mapping of the bridge
- See bindings/reset/reset.txt
-
-v3d {
- compatible = "brcm,7268-v3d";
- reg = <0xf1204000 0x100>,
- <0xf1200000 0x4000>,
- <0xf1208000 0x4000>,
- <0xf1204100 0x100>;
- reg-names = "bridge", "hub", "core0", "gca";
- interrupts = <0 78 4>,
- <0 77 4>;
-};
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
new file mode 100644
index 0000000..a2b06d42
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom V3D GPU Bindings
+
+maintainers:
+ - Eric Anholt <eric@anholt.net>
+ - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+
+properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+
+ compatible:
+ enum:
+ - brcm,7268-v3d
+ - brcm,7278-v3d
+
+ reg:
+ items:
+ - description: hub register
+ - description: core0 register
+ - description: GCA cache controller register (if GCA controller)
+ - description: bridge register (if no external reset controller)
+ minItems: 2
+ maxItems: 4
+
+ reg-names:
+ items:
+ enum: [ bridge, core0, gca, hub ]
+ minItems: 2
+ maxItems: 4
+
+ interrupts:
+ items:
+ - description: hub interrupt
+ - description: core interrupt (if it doesn't share the hub's interrupt)
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ gpu@f1200000 {
+ compatible = "brcm,7268-v3d";
+ reg = <0xf1204000 0x100>,
+ <0xf1200000 0x4000>,
+ <0xf1208000 0x4000>,
+ <0xf1204100 0x100>;
+ reg-names = "bridge", "hub", "core0", "gca";
+ interrupts = <0 78 4>,
+ <0 77 4>;
+ };
+
+...
--
2.7.4
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 4/4] dt-bindings: gpu: Convert v3d to json-schema
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: Stefan Wahren, devicetree, linux-arm-kernel, dri-devel
This converts the v3d bindings to yaml format.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
.../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 ----------
.../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 76 ++++++++++++++++++++++
2 files changed, 76 insertions(+), 33 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
deleted file mode 100644
index b2df82b..0000000
--- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-Broadcom V3D GPU
-
-Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
-For V3D 2.x, see brcm,bcm-vc4.txt.
-
-Required properties:
-- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
-- reg: Physical base addresses and lengths of the register areas
-- reg-names: Names for the register areas. The "hub" and "core0"
- register areas are always required. The "gca" register area
- is required if the GCA cache controller is present. The
- "bridge" register area is required if an external reset
- controller is not present.
-- interrupts: The interrupt numbers. The first interrupt is for the hub,
- while the following interrupts are separate interrupt lines
- for the cores (if they don't share the hub's interrupt).
- See bindings/interrupt-controller/interrupts.txt
-
-Optional properties:
-- clocks: The core clock the unit runs on
-- resets: The reset line for v3d, if not using a mapping of the bridge
- See bindings/reset/reset.txt
-
-v3d {
- compatible = "brcm,7268-v3d";
- reg = <0xf1204000 0x100>,
- <0xf1200000 0x4000>,
- <0xf1208000 0x4000>,
- <0xf1204100 0x100>;
- reg-names = "bridge", "hub", "core0", "gca";
- interrupts = <0 78 4>,
- <0 77 4>;
-};
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
new file mode 100644
index 0000000..a2b06d42
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom V3D GPU Bindings
+
+maintainers:
+ - Eric Anholt <eric@anholt.net>
+ - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+
+properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+
+ compatible:
+ enum:
+ - brcm,7268-v3d
+ - brcm,7278-v3d
+
+ reg:
+ items:
+ - description: hub register
+ - description: core0 register
+ - description: GCA cache controller register (if GCA controller)
+ - description: bridge register (if no external reset controller)
+ minItems: 2
+ maxItems: 4
+
+ reg-names:
+ items:
+ enum: [ bridge, core0, gca, hub ]
+ minItems: 2
+ maxItems: 4
+
+ interrupts:
+ items:
+ - description: hub interrupt
+ - description: core interrupt (if it doesn't share the hub's interrupt)
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ gpu@f1200000 {
+ compatible = "brcm,7268-v3d";
+ reg = <0xf1204000 0x100>,
+ <0xf1200000 0x4000>,
+ <0xf1208000 0x4000>,
+ <0xf1204100 0x100>;
+ reg-names = "bridge", "hub", "core0", "gca";
+ interrupts = <0 78 4>,
+ <0 77 4>;
+ };
+
+...
--
2.7.4
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 4/4] dt-bindings: gpu: Convert v3d to json-schema
@ 2020-12-23 20:27 ` Stefan Wahren
0 siblings, 0 replies; 21+ messages in thread
From: Stefan Wahren @ 2020-12-23 20:27 UTC (permalink / raw)
To: Eric Anholt, Maxime Ripard, David Airlie, Daniel Vetter,
Rob Herring, Nicolas Saenz Julienne
Cc: Stefan Wahren, devicetree, linux-arm-kernel, dri-devel
This converts the v3d bindings to yaml format.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
.../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 33 ----------
.../devicetree/bindings/gpu/brcm,bcm-v3d.yaml | 76 ++++++++++++++++++++++
2 files changed, 76 insertions(+), 33 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
create mode 100644 Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
deleted file mode 100644
index b2df82b..0000000
--- a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
+++ /dev/null
@@ -1,33 +0,0 @@
-Broadcom V3D GPU
-
-Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
-For V3D 2.x, see brcm,bcm-vc4.txt.
-
-Required properties:
-- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
-- reg: Physical base addresses and lengths of the register areas
-- reg-names: Names for the register areas. The "hub" and "core0"
- register areas are always required. The "gca" register area
- is required if the GCA cache controller is present. The
- "bridge" register area is required if an external reset
- controller is not present.
-- interrupts: The interrupt numbers. The first interrupt is for the hub,
- while the following interrupts are separate interrupt lines
- for the cores (if they don't share the hub's interrupt).
- See bindings/interrupt-controller/interrupts.txt
-
-Optional properties:
-- clocks: The core clock the unit runs on
-- resets: The reset line for v3d, if not using a mapping of the bridge
- See bindings/reset/reset.txt
-
-v3d {
- compatible = "brcm,7268-v3d";
- reg = <0xf1204000 0x100>,
- <0xf1200000 0x4000>,
- <0xf1208000 0x4000>,
- <0xf1204100 0x100>;
- reg-names = "bridge", "hub", "core0", "gca";
- interrupts = <0 78 4>,
- <0 77 4>;
-};
diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
new file mode 100644
index 0000000..a2b06d42
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom V3D GPU Bindings
+
+maintainers:
+ - Eric Anholt <eric@anholt.net>
+ - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
+
+properties:
+ $nodename:
+ pattern: '^gpu@[a-f0-9]+$'
+
+ compatible:
+ enum:
+ - brcm,7268-v3d
+ - brcm,7278-v3d
+
+ reg:
+ items:
+ - description: hub register
+ - description: core0 register
+ - description: GCA cache controller register (if GCA controller)
+ - description: bridge register (if no external reset controller)
+ minItems: 2
+ maxItems: 4
+
+ reg-names:
+ items:
+ enum: [ bridge, core0, gca, hub ]
+ minItems: 2
+ maxItems: 4
+
+ interrupts:
+ items:
+ - description: hub interrupt
+ - description: core interrupt (if it doesn't share the hub's interrupt)
+ minItems: 1
+ maxItems: 2
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ gpu@f1200000 {
+ compatible = "brcm,7268-v3d";
+ reg = <0xf1204000 0x100>,
+ <0xf1200000 0x4000>,
+ <0xf1208000 0x4000>,
+ <0xf1204100 0x100>;
+ reg-names = "bridge", "hub", "core0", "gca";
+ interrupts = <0 78 4>,
+ <0 77 4>;
+ };
+
+...
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 21+ messages in thread
* Re: [PATCH 0/4] drm/v3d: Minor improvements
2020-12-23 20:27 ` Stefan Wahren
(?)
@ 2020-12-23 21:39 ` Florian Fainelli
-1 siblings, 0 replies; 21+ messages in thread
From: Florian Fainelli @ 2020-12-23 21:39 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Maxime Ripard, David Airlie,
Daniel Vetter, Rob Herring, Nicolas Saenz Julienne
Cc: dri-devel, devicetree, linux-arm-kernel
On 12/23/2020 12:27 PM, Stefan Wahren wrote:
> This small series of v3d patches is a preparation for the upcoming bcm2711
> support. The bcm2711 support will be send separate, because it involves
> bigger changes.
>
> I'm not sure that the schema conversion patch is sufficient.
>
> Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
>
> Nicolas Saenz Julienne (1):
> drm/v3d: Use platform_get_irq_optional() to get optional IRQs
>
> Phil Elwell (2):
> drm/v3d: Set dma_mask as well as coherent_dma_mask
> drm/v3d: Don't clear MMU control bits on exception
You need to amend your Signed-off-by to all of those 3 patches that you
did not author.
--
Florian
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/4] drm/v3d: Minor improvements
@ 2020-12-23 21:39 ` Florian Fainelli
0 siblings, 0 replies; 21+ messages in thread
From: Florian Fainelli @ 2020-12-23 21:39 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Maxime Ripard, David Airlie,
Daniel Vetter, Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, linux-arm-kernel, dri-devel
On 12/23/2020 12:27 PM, Stefan Wahren wrote:
> This small series of v3d patches is a preparation for the upcoming bcm2711
> support. The bcm2711 support will be send separate, because it involves
> bigger changes.
>
> I'm not sure that the schema conversion patch is sufficient.
>
> Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
>
> Nicolas Saenz Julienne (1):
> drm/v3d: Use platform_get_irq_optional() to get optional IRQs
>
> Phil Elwell (2):
> drm/v3d: Set dma_mask as well as coherent_dma_mask
> drm/v3d: Don't clear MMU control bits on exception
You need to amend your Signed-off-by to all of those 3 patches that you
did not author.
--
Florian
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/4] drm/v3d: Minor improvements
@ 2020-12-23 21:39 ` Florian Fainelli
0 siblings, 0 replies; 21+ messages in thread
From: Florian Fainelli @ 2020-12-23 21:39 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Maxime Ripard, David Airlie,
Daniel Vetter, Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, linux-arm-kernel, dri-devel
On 12/23/2020 12:27 PM, Stefan Wahren wrote:
> This small series of v3d patches is a preparation for the upcoming bcm2711
> support. The bcm2711 support will be send separate, because it involves
> bigger changes.
>
> I'm not sure that the schema conversion patch is sufficient.
>
> Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
>
> Nicolas Saenz Julienne (1):
> drm/v3d: Use platform_get_irq_optional() to get optional IRQs
>
> Phil Elwell (2):
> drm/v3d: Set dma_mask as well as coherent_dma_mask
> drm/v3d: Don't clear MMU control bits on exception
You need to amend your Signed-off-by to all of those 3 patches that you
did not author.
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/4] drm/v3d: Minor improvements
2020-12-23 21:39 ` Florian Fainelli
(?)
@ 2020-12-23 23:37 ` Florian Fainelli
-1 siblings, 0 replies; 21+ messages in thread
From: Florian Fainelli @ 2020-12-23 23:37 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Maxime Ripard, David Airlie,
Daniel Vetter, Rob Herring, Nicolas Saenz Julienne
Cc: dri-devel, devicetree, linux-arm-kernel
On 12/23/2020 1:39 PM, Florian Fainelli wrote:
>
>
> On 12/23/2020 12:27 PM, Stefan Wahren wrote:
>> This small series of v3d patches is a preparation for the upcoming bcm2711
>> support. The bcm2711 support will be send separate, because it involves
>> bigger changes.
>>
>> I'm not sure that the schema conversion patch is sufficient.
>>
>> Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
>>
>> Nicolas Saenz Julienne (1):
>> drm/v3d: Use platform_get_irq_optional() to get optional IRQs
>>
>> Phil Elwell (2):
>> drm/v3d: Set dma_mask as well as coherent_dma_mask
>> drm/v3d: Don't clear MMU control bits on exception
>
> You need to amend your Signed-off-by to all of those 3 patches that you
> did not author.
Looks like you fixed it in v2 about 10 minutes after, sorry for the noise.
--
Florian
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/4] drm/v3d: Minor improvements
@ 2020-12-23 23:37 ` Florian Fainelli
0 siblings, 0 replies; 21+ messages in thread
From: Florian Fainelli @ 2020-12-23 23:37 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Maxime Ripard, David Airlie,
Daniel Vetter, Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, linux-arm-kernel, dri-devel
On 12/23/2020 1:39 PM, Florian Fainelli wrote:
>
>
> On 12/23/2020 12:27 PM, Stefan Wahren wrote:
>> This small series of v3d patches is a preparation for the upcoming bcm2711
>> support. The bcm2711 support will be send separate, because it involves
>> bigger changes.
>>
>> I'm not sure that the schema conversion patch is sufficient.
>>
>> Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
>>
>> Nicolas Saenz Julienne (1):
>> drm/v3d: Use platform_get_irq_optional() to get optional IRQs
>>
>> Phil Elwell (2):
>> drm/v3d: Set dma_mask as well as coherent_dma_mask
>> drm/v3d: Don't clear MMU control bits on exception
>
> You need to amend your Signed-off-by to all of those 3 patches that you
> did not author.
Looks like you fixed it in v2 about 10 minutes after, sorry for the noise.
--
Florian
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH 0/4] drm/v3d: Minor improvements
@ 2020-12-23 23:37 ` Florian Fainelli
0 siblings, 0 replies; 21+ messages in thread
From: Florian Fainelli @ 2020-12-23 23:37 UTC (permalink / raw)
To: Stefan Wahren, Eric Anholt, Maxime Ripard, David Airlie,
Daniel Vetter, Rob Herring, Nicolas Saenz Julienne
Cc: devicetree, linux-arm-kernel, dri-devel
On 12/23/2020 1:39 PM, Florian Fainelli wrote:
>
>
> On 12/23/2020 12:27 PM, Stefan Wahren wrote:
>> This small series of v3d patches is a preparation for the upcoming bcm2711
>> support. The bcm2711 support will be send separate, because it involves
>> bigger changes.
>>
>> I'm not sure that the schema conversion patch is sufficient.
>>
>> Patch 2,3 are directly taken from Raspberry Pi 4 vendor tree.
>>
>> Nicolas Saenz Julienne (1):
>> drm/v3d: Use platform_get_irq_optional() to get optional IRQs
>>
>> Phil Elwell (2):
>> drm/v3d: Set dma_mask as well as coherent_dma_mask
>> drm/v3d: Don't clear MMU control bits on exception
>
> You need to amend your Signed-off-by to all of those 3 patches that you
> did not author.
Looks like you fixed it in v2 about 10 minutes after, sorry for the noise.
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 21+ messages in thread