[Qemu-devel] [PATCH] hw/arm/exynos4210: fix Exynos4210 UART support

[Qemu-devel] [PATCH] hw/arm/exynos4210: fix Exynos4210 UART support

[Bartlomiej Zolnierkiewicz]

commit 97274d0c05d4 ("hw/char/exynos4210_uart.c: Remove unneeded
handling of NULL chardev") broke Exynos4210 support as it removed
NULL 'Chardev *chr' handling from exynos4210_uart_create() and
currently exynos4210_init() always passes NULL as 'Chardev *chr'
argument to exynos4210_uart_create() calls. Fix it by adding
missing serial_hd() calls to exynos4210_init().

Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
---
 hw/arm/exynos4210.c |    8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Index: b/hw/arm/exynos4210.c
===================================================================
--- a/hw/arm/exynos4210.c	2018-08-22 12:21:06.328813907 +0200
+++ b/hw/arm/exynos4210.c	2018-08-22 13:00:54.344771039 +0200
@@ -352,19 +352,19 @@ Exynos4210State *exynos4210_init(MemoryR
 
     /*** UARTs ***/
     exynos4210_uart_create(EXYNOS4210_UART0_BASE_ADDR,
-                           EXYNOS4210_UART0_FIFO_SIZE, 0, NULL,
+                           EXYNOS4210_UART0_FIFO_SIZE, 0, serial_hd(0),
                   s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 0)]);
 
     exynos4210_uart_create(EXYNOS4210_UART1_BASE_ADDR,
-                           EXYNOS4210_UART1_FIFO_SIZE, 1, NULL,
+                           EXYNOS4210_UART1_FIFO_SIZE, 1, serial_hd(1),
                   s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 1)]);
 
     exynos4210_uart_create(EXYNOS4210_UART2_BASE_ADDR,
-                           EXYNOS4210_UART2_FIFO_SIZE, 2, NULL,
+                           EXYNOS4210_UART2_FIFO_SIZE, 2, serial_hd(2),
                   s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 2)]);
 
     exynos4210_uart_create(EXYNOS4210_UART3_BASE_ADDR,
-                           EXYNOS4210_UART3_FIFO_SIZE, 3, NULL,
+                           EXYNOS4210_UART3_FIFO_SIZE, 3, serial_hd(3),
                   s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 3)]);
 
     /*** SD/MMC host controllers ***/

Re: [Qemu-devel] [PATCH] hw/arm/exynos4210: fix Exynos4210 UART support

[Thomas Huth]

On 2018-08-31 12:23, Bartlomiej Zolnierkiewicz wrote:
> commit 97274d0c05d4 ("hw/char/exynos4210_uart.c: Remove unneeded
> handling of NULL chardev") broke Exynos4210 support as it removed
> NULL 'Chardev *chr' handling from exynos4210_uart_create() and
> currently exynos4210_init() always passes NULL as 'Chardev *chr'
> argument to exynos4210_uart_create() calls. Fix it by adding
> missing serial_hd() calls to exynos4210_init().
> 
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> ---
>  hw/arm/exynos4210.c |    8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)

Reviewed-by: Thomas Huth <thuth@redhat.com>

PS: If you've got some spare time, maybe you could consider to also
write a regression test (e.g. for tests/boot-serial-test.c) to avoid
that this happens again?

Re: [Qemu-devel] [PATCH] hw/arm/exynos4210: fix Exynos4210 UART support

[Philippe Mathieu-Daudé]

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On 8/31/18 7:23 AM, Bartlomiej Zolnierkiewicz wrote:
> commit 97274d0c05d4 ("hw/char/exynos4210_uart.c: Remove unneeded
> handling of NULL chardev") broke Exynos4210 support as it removed
> NULL 'Chardev *chr' handling from exynos4210_uart_create() and
> currently exynos4210_init() always passes NULL as 'Chardev *chr'
> argument to exynos4210_uart_create() calls. Fix it by adding
> missing serial_hd() calls to exynos4210_init().
> 
> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
>  hw/arm/exynos4210.c |    8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> Index: b/hw/arm/exynos4210.c
> ===================================================================
> --- a/hw/arm/exynos4210.c	2018-08-22 12:21:06.328813907 +0200
> +++ b/hw/arm/exynos4210.c	2018-08-22 13:00:54.344771039 +0200
> @@ -352,19 +352,19 @@ Exynos4210State *exynos4210_init(MemoryR
>  
>      /*** UARTs ***/
>      exynos4210_uart_create(EXYNOS4210_UART0_BASE_ADDR,
> -                           EXYNOS4210_UART0_FIFO_SIZE, 0, NULL,
> +                           EXYNOS4210_UART0_FIFO_SIZE, 0, serial_hd(0),
>                    s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 0)]);
>  
>      exynos4210_uart_create(EXYNOS4210_UART1_BASE_ADDR,
> -                           EXYNOS4210_UART1_FIFO_SIZE, 1, NULL,
> +                           EXYNOS4210_UART1_FIFO_SIZE, 1, serial_hd(1),
>                    s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 1)]);
>  
>      exynos4210_uart_create(EXYNOS4210_UART2_BASE_ADDR,
> -                           EXYNOS4210_UART2_FIFO_SIZE, 2, NULL,
> +                           EXYNOS4210_UART2_FIFO_SIZE, 2, serial_hd(2),
>                    s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 2)]);
>  
>      exynos4210_uart_create(EXYNOS4210_UART3_BASE_ADDR,
> -                           EXYNOS4210_UART3_FIFO_SIZE, 3, NULL,
> +                           EXYNOS4210_UART3_FIFO_SIZE, 3, serial_hd(3),
>                    s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 3)]);
>  
>      /*** SD/MMC host controllers ***/
> 


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