From: "Michał Mirosław" <mirq-linux@rere.qmqm.pl> To: Ulf Hansson <ulf.hansson@linaro.org>, Kevin Liu <kliu5@marvell.com>, Suneel Garapati <suneel.garapati@xilinx.com> Cc: Adrian Hunter <adrian.hunter@intel.com>, Chris Ball <cjb@laptop.org>, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Michal Simek <michal.simek@xilinx.com> Subject: [PATCH v3 1/5] mmc: sdhci: fix base clock usage in preset value Date: Sun, 25 Jul 2021 06:25:16 +0200 [thread overview] Message-ID: <2fea541c7e679dcda64b5a128bf8ff301fdf1af7.1627186831.git.mirq-linux@rere.qmqm.pl> (raw) In-Reply-To: <cover.1627186831.git.mirq-linux@rere.qmqm.pl> Fixed commit added an unnecessary read of CLOCK_CONTROL. The value read is overwritten for programmable clock preset, but is carried over for divided clock preset. This can confuse sdhci_enable_clk() if the register has enable bits set for some reason at time time of clock calculation. Remove the read. Quoting Al Cooper: sdhci_brcmstb_set_clock() assumed that sdhci_calc_clk() would always return the divider value without the enable set, so this fixes a case for DDR52 where the enable was not being cleared when the divider value was changed. Cc: stable@kernel.vger.org Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function") Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Acked-by: Al Cooper <alcooperx@gmail.com> --- v3: updated commit message v2: removed truncated sentence from commitmsg Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> --- drivers/mmc/host/sdhci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index aba6e10b8605..c7438dd13e3e 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1857,7 +1857,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, if (host->preset_enabled) { u16 pre_val; - clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); pre_val = sdhci_get_preset_value(host); div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val); if (host->clk_mul && -- 2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: "Michał Mirosław" <mirq-linux@rere.qmqm.pl> To: Ulf Hansson <ulf.hansson@linaro.org>, Kevin Liu <kliu5@marvell.com>, Suneel Garapati <suneel.garapati@xilinx.com> Cc: Adrian Hunter <adrian.hunter@intel.com>, Chris Ball <cjb@laptop.org>, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Michal Simek <michal.simek@xilinx.com> Subject: [PATCH v3 1/5] mmc: sdhci: fix base clock usage in preset value Date: Sun, 25 Jul 2021 06:25:16 +0200 [thread overview] Message-ID: <2fea541c7e679dcda64b5a128bf8ff301fdf1af7.1627186831.git.mirq-linux@rere.qmqm.pl> (raw) In-Reply-To: <cover.1627186831.git.mirq-linux@rere.qmqm.pl> Fixed commit added an unnecessary read of CLOCK_CONTROL. The value read is overwritten for programmable clock preset, but is carried over for divided clock preset. This can confuse sdhci_enable_clk() if the register has enable bits set for some reason at time time of clock calculation. Remove the read. Quoting Al Cooper: sdhci_brcmstb_set_clock() assumed that sdhci_calc_clk() would always return the divider value without the enable set, so this fixes a case for DDR52 where the enable was not being cleared when the divider value was changed. Cc: stable@kernel.vger.org Fixes: 52983382c74f ("mmc: sdhci: enhance preset value function") Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Acked-by: Al Cooper <alcooperx@gmail.com> --- v3: updated commit message v2: removed truncated sentence from commitmsg Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> --- drivers/mmc/host/sdhci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index aba6e10b8605..c7438dd13e3e 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1857,7 +1857,6 @@ u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, if (host->preset_enabled) { u16 pre_val; - clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); pre_val = sdhci_get_preset_value(host); div = FIELD_GET(SDHCI_PRESET_SDCLK_FREQ_MASK, pre_val); if (host->clk_mul && -- 2.30.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-07-25 4:25 UTC|newest] Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-25 4:25 [PATCH v3 0/5] SDHCI clock handling fixes and cleanups Michał Mirosław 2021-07-25 4:25 ` [PATCH v3 3/5] mmc: sdhci: fix SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN Michał Mirosław 2021-07-25 4:25 ` Michał Mirosław 2021-07-25 4:25 ` [PATCH v3 2/5] mmc: sdhci: always obey programmable clock config in preset value Michał Mirosław 2021-07-25 4:25 ` Michał Mirosław 2021-07-25 4:25 ` Michał Mirosław [this message] 2021-07-25 4:25 ` [PATCH v3 1/5] mmc: sdhci: fix base clock usage " Michał Mirosław 2021-07-25 4:25 ` [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit Michał Mirosław 2021-07-25 4:25 ` Michał Mirosław 2021-07-25 9:05 ` kernel test robot 2021-07-25 9:05 ` kernel test robot 2021-07-25 9:05 ` kernel test robot 2021-07-25 19:16 ` kernel test robot 2021-07-25 19:16 ` kernel test robot 2021-07-25 19:16 ` kernel test robot 2021-07-25 4:25 ` [PATCH v3 5/5] mmc: sdhci: simplify v2/v3+ clock calculation Michał Mirosław 2021-07-25 4:25 ` Michał Mirosław
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=2fea541c7e679dcda64b5a128bf8ff301fdf1af7.1627186831.git.mirq-linux@rere.qmqm.pl \ --to=mirq-linux@rere.qmqm.pl \ --cc=adrian.hunter@intel.com \ --cc=cjb@laptop.org \ --cc=kliu5@marvell.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mmc@vger.kernel.org \ --cc=michal.simek@xilinx.com \ --cc=suneel.garapati@xilinx.com \ --cc=ulf.hansson@linaro.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.