* [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
@ 2019-02-02 8:07 Rodrigo Vivi
2019-02-04 15:08 ` Lionel Landwerlin
0 siblings, 1 reply; 6+ messages in thread
From: Rodrigo Vivi @ 2019-02-02 8:07 UTC (permalink / raw)
To: mesa-dev
Cc: Anuj Phogat, Kenneth Graunke, José Roberto de Souza,
dri-devel, Rodrigo Vivi
Align with kernel commits:
5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Cc: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/pci_ids/i965_pci_ids.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index 7201562d82..b91abd7a3f 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -171,6 +171,7 @@ CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
+CHIPSET(0x3E9C, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
@@ -203,6 +204,10 @@ CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
CHIPSET(0x8A50, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A51, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
CHIPSET(0x8A52, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
+CHIPSET(0x8A56, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
+CHIPSET(0x8A57, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
+CHIPSET(0x8A58, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
+CHIPSET(0x8A59, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
--
2.20.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
2019-02-02 8:07 [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake Rodrigo Vivi
@ 2019-02-04 15:08 ` Lionel Landwerlin
2019-02-18 5:54 ` Jonathan Gray
0 siblings, 1 reply; 6+ messages in thread
From: Lionel Landwerlin @ 2019-02-04 15:08 UTC (permalink / raw)
To: Rodrigo Vivi, mesa-dev
Cc: Anuj Phogat, Kenneth Graunke, dri-devel, José Roberto de Souza
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
On 02/02/2019 08:07, Rodrigo Vivi wrote:
> Align with kernel commits:
>
> 5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
> 03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Kenneth Graunke <kenneth@whitecape.org>
> Cc: Anuj Phogat <anuj.phogat@gmail.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> include/pci_ids/i965_pci_ids.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
> index 7201562d82..b91abd7a3f 100644
> --- a/include/pci_ids/i965_pci_ids.h
> +++ b/include/pci_ids/i965_pci_ids.h
> @@ -171,6 +171,7 @@ CHIPSET(0x3185, glk_2x6, "Intel(R) UHD Graphics 600 (Geminilake 2x6)")
> CHIPSET(0x3E90, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
> CHIPSET(0x3E93, cfl_gt1, "Intel(R) UHD Graphics 610 (Coffeelake 2x6 GT1)")
> CHIPSET(0x3E99, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
> +CHIPSET(0x3E9C, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
> CHIPSET(0x3E91, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
> CHIPSET(0x3E92, cfl_gt2, "Intel(R) UHD Graphics 630 (Coffeelake 3x8 GT2)")
> CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
> @@ -203,6 +204,10 @@ CHIPSET(0x5A54, cnl_5x8, "Intel(R) HD Graphics (Cannonlake 5x8 GT2)")
> CHIPSET(0x8A50, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
> CHIPSET(0x8A51, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
> CHIPSET(0x8A52, icl_8x8, "Intel(R) HD Graphics (Ice Lake 8x8 GT2)")
> +CHIPSET(0x8A56, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> +CHIPSET(0x8A57, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> +CHIPSET(0x8A58, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> +CHIPSET(0x8A59, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
2019-02-04 15:08 ` Lionel Landwerlin
@ 2019-02-18 5:54 ` Jonathan Gray
2019-02-19 17:36 ` [Mesa-dev] " Rodrigo Vivi
0 siblings, 1 reply; 6+ messages in thread
From: Jonathan Gray @ 2019-02-18 5:54 UTC (permalink / raw)
To: Lionel Landwerlin
Cc: mesa-dev, Kenneth Graunke, Jos?? Roberto de Souza, dri-devel,
Rodrigo Vivi
Compared to linux and libdrm Mesa is missing a VLV and ICL id.
0x0f30
ff049b6ce21d2814451afd4a116d001712e0116b
drm/i915: bind driver to ValleyView chipsets
0x8A70
d55cb4fa2cf0105bfb16b60a2846737b91fdc173
drm/i915/icl: Add the ICL PCI IDs
The Intel Media SDK describes these as
/* VLV */
{ 0x0f30, MFX_HW_VLV, MFX_GT1 }, /* VLV mobile */
/* ICL LP */
{ 0x8A70, MFX_HW_ICL_LP, MFX_GT1 }
and libdrm's intel_chipset.h describes the VLV id as
#define PCI_CHIP_VALLEYVIEW_PO 0x0f30 /* VLV PO board */
It isn't clear what the ICL configuration should be from public
information.
diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index b91abd7a3f9..3568007b1ef 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -86,6 +86,7 @@ CHIPSET(0x0D2B, hsw_gt3, "Intel(R) Haswell")
CHIPSET(0x0D0E, hsw_gt1, "Intel(R) Haswell")
CHIPSET(0x0D1E, hsw_gt2, "Intel(R) Haswell")
CHIPSET(0x0D2E, hsw_gt3, "Intel(R) Haswell")
+CHIPSET(0x0F30, byt, "Intel(R) Bay Trail")
CHIPSET(0x0F31, byt, "Intel(R) Bay Trail")
CHIPSET(0x0F32, byt, "Intel(R) Bay Trail")
CHIPSET(0x0F33, byt, "Intel(R) Bay Trail")
@@ -212,4 +213,5 @@ CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
CHIPSET(0x8A5D, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
+CHIPSET(0x8A70, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
CHIPSET(0x8A71, icl_1x8, "Intel(R) HD Graphics (Ice Lake 1x8 GT0.5)")
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [Mesa-dev] [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
2019-02-18 5:54 ` Jonathan Gray
@ 2019-02-19 17:36 ` Rodrigo Vivi
2019-02-19 18:08 ` Ville Syrjälä
0 siblings, 1 reply; 6+ messages in thread
From: Rodrigo Vivi @ 2019-02-19 17:36 UTC (permalink / raw)
To: Jonathan Gray, Ville Syrjälä
Cc: Jos?? Roberto de Souza, mesa-dev, Kenneth Graunke, dri-devel
On Mon, Feb 18, 2019 at 04:54:34PM +1100, Jonathan Gray wrote:
> Compared to linux and libdrm Mesa is missing a VLV and ICL id.
>
> 0x0f30
> ff049b6ce21d2814451afd4a116d001712e0116b
> drm/i915: bind driver to ValleyView chipsets
>
> 0x8A70
> d55cb4fa2cf0105bfb16b60a2846737b91fdc173
> drm/i915/icl: Add the ICL PCI IDs
>
> The Intel Media SDK describes these as
>
> /* VLV */
> { 0x0f30, MFX_HW_VLV, MFX_GT1 }, /* VLV mobile */
hmmm... no idea about this one...
Ville?
maybe we should just remove from kernel since it was never
missed from Mesa?
>
> /* ICL LP */
> { 0x8A70, MFX_HW_ICL_LP, MFX_GT1 }
This is pure display so no Mesa needed for this ID.
>
> and libdrm's intel_chipset.h describes the VLV id as
>
> #define PCI_CHIP_VALLEYVIEW_PO 0x0f30 /* VLV PO board */
>
> It isn't clear what the ICL configuration should be from public
> information.
>
> diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
> index b91abd7a3f9..3568007b1ef 100644
> --- a/include/pci_ids/i965_pci_ids.h
> +++ b/include/pci_ids/i965_pci_ids.h
> @@ -86,6 +86,7 @@ CHIPSET(0x0D2B, hsw_gt3, "Intel(R) Haswell")
> CHIPSET(0x0D0E, hsw_gt1, "Intel(R) Haswell")
> CHIPSET(0x0D1E, hsw_gt2, "Intel(R) Haswell")
> CHIPSET(0x0D2E, hsw_gt3, "Intel(R) Haswell")
> +CHIPSET(0x0F30, byt, "Intel(R) Bay Trail")
> CHIPSET(0x0F31, byt, "Intel(R) Bay Trail")
> CHIPSET(0x0F32, byt, "Intel(R) Bay Trail")
> CHIPSET(0x0F33, byt, "Intel(R) Bay Trail")
> @@ -212,4 +213,5 @@ CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> CHIPSET(0x8A5D, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> +CHIPSET(0x8A70, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> CHIPSET(0x8A71, icl_1x8, "Intel(R) HD Graphics (Ice Lake 1x8 GT0.5)")
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Mesa-dev] [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
2019-02-19 17:36 ` [Mesa-dev] " Rodrigo Vivi
@ 2019-02-19 18:08 ` Ville Syrjälä
2019-02-19 18:13 ` Kenneth Graunke
0 siblings, 1 reply; 6+ messages in thread
From: Ville Syrjälä @ 2019-02-19 18:08 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: dri-devel, Kenneth Graunke, Jos?? Roberto de Souza, mesa-dev
On Tue, Feb 19, 2019 at 09:36:14AM -0800, Rodrigo Vivi wrote:
> On Mon, Feb 18, 2019 at 04:54:34PM +1100, Jonathan Gray wrote:
> > Compared to linux and libdrm Mesa is missing a VLV and ICL id.
> >
> > 0x0f30
> > ff049b6ce21d2814451afd4a116d001712e0116b
> > drm/i915: bind driver to ValleyView chipsets
> >
> > 0x8A70
> > d55cb4fa2cf0105bfb16b60a2846737b91fdc173
> > drm/i915/icl: Add the ICL PCI IDs
> >
> > The Intel Media SDK describes these as
> >
> > /* VLV */
> > { 0x0f30, MFX_HW_VLV, MFX_GT1 }, /* VLV mobile */
>
> hmmm... no idea about this one...
> Ville?
> maybe we should just remove from kernel since it was never
> missed from Mesa?
Bspec says that is the infamous X0. Assuming it's not
lying to us it should be safe to remove.
>
> >
> > /* ICL LP */
> > { 0x8A70, MFX_HW_ICL_LP, MFX_GT1 }
>
> This is pure display so no Mesa needed for this ID.
>
> >
> > and libdrm's intel_chipset.h describes the VLV id as
> >
> > #define PCI_CHIP_VALLEYVIEW_PO 0x0f30 /* VLV PO board */
> >
> > It isn't clear what the ICL configuration should be from public
> > information.
> >
> > diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
> > index b91abd7a3f9..3568007b1ef 100644
> > --- a/include/pci_ids/i965_pci_ids.h
> > +++ b/include/pci_ids/i965_pci_ids.h
> > @@ -86,6 +86,7 @@ CHIPSET(0x0D2B, hsw_gt3, "Intel(R) Haswell")
> > CHIPSET(0x0D0E, hsw_gt1, "Intel(R) Haswell")
> > CHIPSET(0x0D1E, hsw_gt2, "Intel(R) Haswell")
> > CHIPSET(0x0D2E, hsw_gt3, "Intel(R) Haswell")
> > +CHIPSET(0x0F30, byt, "Intel(R) Bay Trail")
> > CHIPSET(0x0F31, byt, "Intel(R) Bay Trail")
> > CHIPSET(0x0F32, byt, "Intel(R) Bay Trail")
> > CHIPSET(0x0F33, byt, "Intel(R) Bay Trail")
> > @@ -212,4 +213,5 @@ CHIPSET(0x8A5A, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> > CHIPSET(0x8A5B, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> > CHIPSET(0x8A5C, icl_6x8, "Intel(R) HD Graphics (Ice Lake 6x8 GT1.5)")
> > CHIPSET(0x8A5D, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> > +CHIPSET(0x8A70, icl_4x8, "Intel(R) HD Graphics (Ice Lake 4x8 GT1)")
> > CHIPSET(0x8A71, icl_1x8, "Intel(R) HD Graphics (Ice Lake 1x8 GT0.5)")
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
2019-02-19 18:08 ` Ville Syrjälä
@ 2019-02-19 18:13 ` Kenneth Graunke
0 siblings, 0 replies; 6+ messages in thread
From: Kenneth Graunke @ 2019-02-19 18:13 UTC (permalink / raw)
To: Ville Syrjälä
Cc: Lionel Landwerlin, Jos?? Roberto de Souza, dri-devel,
Rodrigo Vivi, mesa-dev
[-- Attachment #1.1: Type: text/plain, Size: 998 bytes --]
On Tuesday, February 19, 2019 10:08:13 AM PST Ville Syrjälä wrote:
> On Tue, Feb 19, 2019 at 09:36:14AM -0800, Rodrigo Vivi wrote:
> > On Mon, Feb 18, 2019 at 04:54:34PM +1100, Jonathan Gray wrote:
> > > Compared to linux and libdrm Mesa is missing a VLV and ICL id.
> > >
> > > 0x0f30
> > > ff049b6ce21d2814451afd4a116d001712e0116b
> > > drm/i915: bind driver to ValleyView chipsets
> > >
> > > 0x8A70
> > > d55cb4fa2cf0105bfb16b60a2846737b91fdc173
> > > drm/i915/icl: Add the ICL PCI IDs
> > >
> > > The Intel Media SDK describes these as
> > >
> > > /* VLV */
> > > { 0x0f30, MFX_HW_VLV, MFX_GT1 }, /* VLV mobile */
> >
> > hmmm... no idea about this one...
> > Ville?
> > maybe we should just remove from kernel since it was never
> > missed from Mesa?
>
> Bspec says that is the infamous X0. Assuming it's not
> lying to us it should be safe to remove.
That fits my memory too, 0f30 was never a PCI ID for a product that
actually shipped.
--Ken
[-- Attachment #1.2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
[-- Attachment #2: Type: text/plain, Size: 156 bytes --]
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-02-19 18:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-02-02 8:07 [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake Rodrigo Vivi
2019-02-04 15:08 ` Lionel Landwerlin
2019-02-18 5:54 ` Jonathan Gray
2019-02-19 17:36 ` [Mesa-dev] " Rodrigo Vivi
2019-02-19 18:08 ` Ville Syrjälä
2019-02-19 18:13 ` Kenneth Graunke
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