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From: Teresa Remmet <T.Remmet@phytec.de>
To: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"krzysztof.kozlowski@linaro.org" <krzysztof.kozlowski@linaro.org>
Cc: "festevam@gmail.com" <festevam@gmail.com>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	"krzysztof.kozlowski+dt@linaro.org" 
	<krzysztof.kozlowski+dt@linaro.org>,
	"upstream@phytec.de" <upstream@phytec.de>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-imx@nxp.com" <linux-imx@nxp.com>
Subject: Re: [PATCH 3/3] arm64: dts: freescale: Add phyBOARD-Polis-i.MX8MM support
Date: Thu, 2 Jun 2022 13:17:14 +0000	[thread overview]
Message-ID: <30872d35ae06591bcab25646f4cb5f6ffc915f4a.camel@phytec.de> (raw)
In-Reply-To: <e27588ff-d30e-c265-285a-9e64f0522245@linaro.org>

Hello Krzysztof,

Am Donnerstag, dem 02.06.2022 um 13:35 +0200 schrieb Krzysztof
Kozlowski:
> On 02/06/2022 12:11, Teresa Remmet wrote:
> > Add initial support for phyBOARD-Polis-i.MX8MM.
> > Main features are:
> > 	* Bluetooth and Wifi
> > 	* CANFD
> > 	* eMMC
> > 	* i2c RTC
> > 	* Ethernet
> > 	* PCIe
> > 	* RS232/RS485
> > 	* SD-Card
> > 	* SPI-NOR flash
> > 	* USB
> 
> Thank you for your patch. There is something to discuss/improve.

thank you very much for your review. I will address all of your
comments in v2.

Regards,
Teresa

> 
> > Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
> > ---
> >  arch/arm64/boot/dts/freescale/Makefile        |   1 +
> >  .../freescale/imx8mm-phyboard-polis-rdk.dts   | 450
> > ++++++++++++++++++
> >  .../dts/freescale/imx8mm-phycore-som.dtsi     | 433
> > +++++++++++++++++
> >  3 files changed, 884 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-phyboard-
> > polis-rdk.dts
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-phycore-
> > som.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > b/arch/arm64/boot/dts/freescale/Makefile
> > index 238a83e5b8c6..1e25dec2109b 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-
> > edimm2.2.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-
> > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-
> > rdk.dts
> > new file mode 100644
> > index 000000000000..532b435b6871
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> > @@ -0,0 +1,450 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2022 PHYTEC Messtechnik GmbH
> > + * Author: Teresa Remmet <t.remmet@phytec.de>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/leds/common.h>
> > +#include <dt-bindings/phy/phy-imx8-pcie.h>
> > +#include "imx8mm-phycore-som.dtsi"
> > +
> > +/ {
> > +	model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
> > +	compatible = "phytec,imx8mm-phyboard-polis-rdk",
> > +		     "phytec,imx8mm-phycore-som","fsl,imx8mm";
> 
> Missing space after comma                      ^^^
> 
> > +
> > +	chosen {
> > +		stdout-path = &uart3;
> > +	};
> > +
> > +	bt_osc_32k: bt_lp-clock {
> 
> No underscores in node names, please.
> 
> > +		compatible = "fixed-clock";
> > +		clock-frequency = <32768>;
> > +		clock-output-names = "bt_osc_32k";
> > +		#clock-cells = <0>;
> > +	};
> > +
> > +	can_osc_40m: can-clock {
> > +		compatible = "fixed-clock";
> > +		clock-frequency = <40000000>;
> > +		clock-output-names = "can_osc_40m";
> > +		#clock-cells = <0>;
> > +	};
> > +
> > +	fan {
> > +		compatible = "gpio-fan";
> > +		gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
> > +		gpio-fan,speed-map = <0     0
> > +				      13000 1>;> +		pinctrl-
> > names = "default";
> > +		pinctrl-0 = <&pinctrl_fan>;
> > +		#cooling-cells = <2>;
> > +	};
> > +
> > +	leds {
> > +		compatible = "gpio-leds";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_leds>;
> > +
> > +		led-0 {
> > +			color = <LED_COLOR_ID_RED>;
> > +			function = LED_FUNCTION_DISK;
> > +			gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
> > +			linux,default-trigger = "mmc2";
> > +		};
> > +
> > +		led-1 {
> > +			color = <LED_COLOR_ID_BLUE>;
> > +			function = LED_FUNCTION_DISK;
> > +			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
> > +			linux,default-trigger = "mmc1";
> > +		};
> > +
> > +		led-2 {
> > +			color = <LED_COLOR_ID_GREEN>;
> > +			function = LED_FUNCTION_CPU;
> > +			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
> > +			linux,default-trigger = "heartbeat";
> > +		};
> > +	};
> > +
> > +	usdhc1_pwrseq: pwr-seq {
> > +		compatible = "mmc-pwrseq-simple";
> > +		post-power-on-delay-ms = <100>;
> > +		power-off-delay-us = <60>;
> > +		reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
> > +	};
> > +
> > +	reg_can_en: regulator-can-en {
> > +		compatible = "regulator-fixed";
> > +		gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_can_en>;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "CAN_EN";
> > +		startup-delay-us = <20>;
> > +	};
> > +
> > +	reg_usb_otg1_vbus: regulator-usb-otg1 {
> > +		compatible = "regulator-fixed";
> > +		enable-active-high;
> > +		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_usbotg1pwrgrp>;
> > +		regulator-name = "usb_otg1_vbus";
> > +		regulator-max-microvolt = <5000000>;
> > +		regulator-min-microvolt = <5000000>;
> > +	};
> > +
> > +       reg_usdhc2_vmmc: regulator-usdhc2 {
> 
> Indentation (here or previous nodes) look odd, probably wrong.
> 
> > +		compatible = "regulator-fixed";
> > +		enable-active-high;
> > +		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > +		off-on-delay-us = <20000>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "VSD_3V3";
> > +	};
> > +
> > +	reg_vcc_3v3: regulator-vcc_3v3 {
> 
> No underscores in node names.
> 
> > +		compatible = "regulator-fixed";
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "VCC_3V3";
> > +	};
> > +};
> > +
> > +/* SPI - CAN MCP251XFD */
> > +&ecspi1 {
> > +	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_ecspi1>;
> > +	status = "okay";
> > +
> > +	can0: can@0 {
> > +		compatible = "microchip,mcp251xfd";
> > +		clocks = <&can_osc_40m>;
> > +		interrupt-parent = <&gpio1>;
> > +		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_can_int>;
> > +		reg = <0>;
> > +		spi-max-frequency = <20000000>;
> > +		xceiver-supply = <&reg_can_en>;
> > +	};
> > +};
> > +
> > +&gpio1 {
> > +	gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT",
> > "X_RTC_INT",
> > +		"", "", "", "RESET_ETHPHY",
> > +		"CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",
> > +		"USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";
> > +};
> > +
> > +&gpio2 {
> > +	gpio-line-names = "", "", "", "",
> > +		"", "", "BT_REG_ON", "WL_REG_ON",
> > +		"BT_DEV_WAKE", "BT_HOST_WAKE", "", "",
> > +		"X_SD2_CD_B", "", "", "",
> > +		"", "", "", "SD2_RESET_B";
> > +};
> > +
> > +&gpio4 {
> > +	gpio-line-names = "", "", "", "",
> > +		"", "", "", "",
> > +		"FAN", "miniPCIe_nPERST", "", "",
> > +		"COEX1", "COEX2";
> > +};
> > +
> > +&gpio5 {
> > +	gpio-line-names = "", "", "", "",
> > +		"", "", "", "",
> > +		"", "ECSPI1_SS0";
> > +};
> > +
> > +/* PCIe */
> > +&pcie0 {
> > +	assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> > +			  <&clk IMX8MM_CLK_PCIE1_CTRL>;
> > +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
> > +				 <&clk IMX8MM_SYS_PLL2_250M>;
> > +	assigned-clock-rates = <10000000>, <250000000>;
> > +	clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> > IMX8MM_CLK_PCIE1_AUX>,
> > +		 <&clk IMX8MM_CLK_PCIE1_PHY>;
> > +	clock-names = "pcie", "pcie_aux", "pcie_bus";
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_pcie>;
> > +	reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>;
> > +	status = "okay";
> > +};
> > +
> > +&pcie_phy {
> > +	clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
> > +	fsl,clkreq-unsupported;
> > +	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
> > +	fsl,tx-deemph-gen1 = <0x2d>;
> > +	fsl,tx-deemph-gen2 = <0xf>;
> > +	status = "okay";
> > +};
> > +
> > +&rv3028 {
> > +	trickle-resistor-ohms = <3000>;
> > +};
> > +
> > +&snvs_pwrkey {
> > +	status = "okay";
> > +};
> > +
> > +/* UART - RS232/RS485 */
> > +&uart1 {
> > +	assigned-clocks = <&clk IMX8MM_CLK_UART1>;
> > +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_uart1>;
> > +	status = "okay";
> > +	uart-has-rtscts;
> > +};
> > +
> > +/* UART - Sterling-LWB Bluetooth */
> > +&uart2 {
> > +	assigned-clocks = <&clk IMX8MM_CLK_UART2>;
> > +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
> > +	fsl,dte-mode;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_uart2_bt>;
> > +	status = "okay";
> 
> Put status as last property, so after uart-has-rtscts. The same in
> other
> places.
> 
> > +	uart-has-rtscts;
> > +
> 
> (...)
> 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> > new file mode 100644
> > index 000000000000..1aa27291c7ff
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> > @@ -0,0 +1,433 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2022 PHYTEC Messtechnik GmbH
> > + * Author: Teresa Remmet <t.remmet@phytec.de>
> > + */
> > +
> > +#include "imx8mm.dtsi"
> > +#include <dt-bindings/net/ti-dp83867.h>
> > +
> > +/ {
> > +	model = "PHYTEC phyCORE-i.MX8MM";
> > +	compatible = "phytec,imx8mm-phycore-som", "fsl,imx8mm";
> > +
> > +	aliases {
> > +		rtc0 = &rv3028;
> > +		rtc1 = &snvs_rtc;
> > +	};
> > +
> > +	memory@40000000 {
> > +		device_type = "memory";
> > +		reg = <0x0 0x40000000 0 0x80000000>;
> > +	};
> > +
> > +	reg_vdd_3v3_s: regulator-vdd_3v3_s {
> 
> Do not use underscores in node names.
> > +		compatible = "regulator-fixed";
> > +		regulator-always-on;
> > +		regulator-boot-on;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "VDD_3V3_S";
> > +	};
> > +};
> > +
> > +&A53_0 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&A53_1 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&A53_2 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&A53_3 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&ddrc {
> > +	operating-points-v2 = <&ddrc_opp_table>;
> > +
> > +	ddrc_opp_table: opp-table {
> > +		compatible = "operating-points-v2";
> > +
> > +		opp-25M {
> > +			opp-hz = /bits/ 64 <25000000>;
> > +		};
> > +
> > +		opp-100M {
> > +			opp-hz = /bits/ 64 <100000000>;
> > +		};
> > +
> > +		opp-750M {
> > +			opp-hz = /bits/ 64 <750000000>;
> > +		};
> > +	};
> > +};
> > +
> > +/* Ethernet */
> > +&fec1 {
> > +	fsl,magic-packet;
> > +	phy-mode = "rgmii-id";
> > +	phy-handle = <&ethphy0>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_fec1>;
> > +	status = "okay";
> > +
> > +	mdio {
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		ethphy0: ethernet-phy@0 {
> > +			compatible = "ethernet-phy-ieee802.3-c22";
> > +			enet-phy-lane-no-swap;
> > +			interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
> > +			interrupt-parent = <&gpio1>;
> > +			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
> > +			ti,fifo-depth =
> > <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> > +			ti,rx-internal-delay =
> > <DP83867_RGMIIDCTL_2_00_NS>;
> > +			ti,tx-internal-delay =
> > <DP83867_RGMIIDCTL_2_00_NS>;
> > +			reg = <0>;
> > +			reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
> > +			reset-assert-us = <1000>;
> > +			reset-deassert-us = <1000>;
> > +		};
> > +	};
> > +};
> > +
> > +/* SPI Flash */
> > +&flexspi {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_flexspi0>;
> > +	status = "okay";
> > +
> > +	som_flash: flash@0 {
> > +		compatible = "jedec,spi-nor";
> > +		reg = <0>;
> > +		spi-max-frequency = <80000000>;
> > +		spi-rx-bus-width = <4>;
> > +		spi-tx-bus-width = <1>;
> > +	};
> > +};
> > +
> > +&gpio1 {
> > +	gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT",
> > +		"", "", "", "RESET_ETHPHY",
> > +		"", "", "nENABLE_FLATLINK";
> > +};
> > +
> > +/* I2C1 */
> > +&i2c1 {
> > +	clock-frequency = <400000>;
> > +	pinctrl-names = "default","gpio";
> > +	pinctrl-0 = <&pinctrl_i2c1>;
> > +	pinctrl-1 = <&pinctrl_i2c1_gpio>;
> > +	scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> > +	sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> > +	status = "okay";
> > +
> > +	pmic@8 {
> > +		compatible = "nxp,pf8121a";
> > +		reg = <0x08>;
> > +
> > +		regulators {
> > +			reg_nvcc_sd1: ldo1 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <3300000>;
> > +				regulator-min-microvolt = <3300000>;
> > +				regulator-name = "NVCC_SD1 (LDO1)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_nvcc_sd2: ldo2 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <3300000>;
> > +				regulator-min-microvolt = <1800000>;
> > +				regulator-name = "NVCC_SD2 (LDO2)";
> > +				vselect-en;
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vcc_enet: ldo3 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <2500000>;
> > +				regulator-min-microvolt = <1500000>;
> > +				regulator-name = "VCC_ENET_2V5 (LDO3)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdda_1v8: ldo4 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1800000>;
> > +				regulator-min-microvolt = <1500000>;
> > +				regulator-name = "VDDA_1V8 (LDO4)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-min-microvolt 
> > = <1500000>;
> > +					regulator-suspend-max-microvolt 
> > = <1500000>;
> > +				};
> > +			};
> > +
> > +			reg_soc_vdda_phy: buck1 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <900000>;
> > +				regulator-min-microvolt = <400000>;
> > +				regulator-name = "VDD_SOC_VDDA_PHY_0P8
> > (BUCK1)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-min-microvolt 
> > = <400000>;
> > +					regulator-suspend-max-microvolt 
> > = <400000>;
> > +				};
> > +			};
> > +
> > +			reg_vdd_gpu_dram: buck2 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1000000>;
> > +				regulator-min-microvolt = <1000000>;
> > +				regulator-name = "VDD_GPU_DRAM
> > (BUCK2)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-max-microvolt 
> > = <1000000>;
> > +					regulator-suspend-min-microvolt 
> > = <1000000>;
> > +				};
> > +			};
> > +
> > +			reg_vdd_gpu: buck3 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1000000>;
> > +				regulator-min-microvolt = <400000>;
> > +				regulator-name = "VDD_VPU (BUCK3)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdd_mipi: buck4 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1050000>;
> > +				regulator-min-microvolt = <900000>;
> > +				regulator-name = "VDD_MIPI_0P9
> > (BUCK4)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdd_arm: buck5 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1050000>;
> > +				regulator-min-microvolt = <400000>;
> > +				regulator-name = "VDD_ARM (BUCK5)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdd_1v8: buck6 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1800000>;
> > +				regulator-min-microvolt = <1800000>;
> > +				regulator-name = "VDD_1V8 (BUCK6)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-max-microvolt 
> > = <1800000>;
> > +					regulator-suspend-min-microvolt 
> > = <1800000>;
> > +				};
> > +			};
> > +
> > +			reg_nvcc_dram: buck7 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1100000>;
> > +				regulator-min-microvolt = <1100000>;
> > +				regulator-name = "NVCC_DRAM_1P1V
> > (BUCK7)";
> > +			};
> > +
> > +			reg_vsnvs: vsnvs {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1800000>;
> > +				regulator-min-microvolt = <1800000>;
> > +				regulator-name = "NVCC_SNVS_1P8
> > (VSNVS)";
> > +			};
> > +		};
> > +	};
> > +
> > +	eeprom@51 {
> > +		compatible = "atmel,24c32";
> > +		pagesize = <32>;
> > +		reg = <0x51>;
> > +		vcc-supply = <&reg_vdd_3v3_s>;
> > +	};
> > +
> > +	sn65dsi83: mipitolvds@2d {
> 
> I think generic node name for this is "bridge"?
> 
> > +		compatible = "ti,sn65dsi83";
> > +		enable-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
> > +		pinctrl-names = "default";
> 
> Best regards,
> Krzysztof
-- 
PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber |
Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE
149059855

WARNING: multiple messages have this Message-ID (diff)
From: Teresa Remmet <T.Remmet@phytec.de>
To: "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"krzysztof.kozlowski@linaro.org" <krzysztof.kozlowski@linaro.org>
Cc: "festevam@gmail.com" <festevam@gmail.com>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>,
	"upstream@phytec.de" <upstream@phytec.de>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-imx@nxp.com" <linux-imx@nxp.com>
Subject: Re: [PATCH 3/3] arm64: dts: freescale: Add phyBOARD-Polis-i.MX8MM support
Date: Thu, 2 Jun 2022 13:17:14 +0000	[thread overview]
Message-ID: <30872d35ae06591bcab25646f4cb5f6ffc915f4a.camel@phytec.de> (raw)
In-Reply-To: <e27588ff-d30e-c265-285a-9e64f0522245@linaro.org>

Hello Krzysztof,

Am Donnerstag, dem 02.06.2022 um 13:35 +0200 schrieb Krzysztof
Kozlowski:
> On 02/06/2022 12:11, Teresa Remmet wrote:
> > Add initial support for phyBOARD-Polis-i.MX8MM.
> > Main features are:
> > 	* Bluetooth and Wifi
> > 	* CANFD
> > 	* eMMC
> > 	* i2c RTC
> > 	* Ethernet
> > 	* PCIe
> > 	* RS232/RS485
> > 	* SD-Card
> > 	* SPI-NOR flash
> > 	* USB
> 
> Thank you for your patch. There is something to discuss/improve.

thank you very much for your review. I will address all of your
comments in v2.

Regards,
Teresa

> 
> > Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
> > ---
> >  arch/arm64/boot/dts/freescale/Makefile        |   1 +
> >  .../freescale/imx8mm-phyboard-polis-rdk.dts   | 450
> > ++++++++++++++++++
> >  .../dts/freescale/imx8mm-phycore-som.dtsi     | 433
> > +++++++++++++++++
> >  3 files changed, 884 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-phyboard-
> > polis-rdk.dts
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-phycore-
> > som.dtsi
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > b/arch/arm64/boot/dts/freescale/Makefile
> > index 238a83e5b8c6..1e25dec2109b 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-
> > edimm2.2.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-n801x-s.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-
> > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-
> > rdk.dts
> > new file mode 100644
> > index 000000000000..532b435b6871
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
> > @@ -0,0 +1,450 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2022 PHYTEC Messtechnik GmbH
> > + * Author: Teresa Remmet <t.remmet@phytec.de>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/leds/common.h>
> > +#include <dt-bindings/phy/phy-imx8-pcie.h>
> > +#include "imx8mm-phycore-som.dtsi"
> > +
> > +/ {
> > +	model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
> > +	compatible = "phytec,imx8mm-phyboard-polis-rdk",
> > +		     "phytec,imx8mm-phycore-som","fsl,imx8mm";
> 
> Missing space after comma                      ^^^
> 
> > +
> > +	chosen {
> > +		stdout-path = &uart3;
> > +	};
> > +
> > +	bt_osc_32k: bt_lp-clock {
> 
> No underscores in node names, please.
> 
> > +		compatible = "fixed-clock";
> > +		clock-frequency = <32768>;
> > +		clock-output-names = "bt_osc_32k";
> > +		#clock-cells = <0>;
> > +	};
> > +
> > +	can_osc_40m: can-clock {
> > +		compatible = "fixed-clock";
> > +		clock-frequency = <40000000>;
> > +		clock-output-names = "can_osc_40m";
> > +		#clock-cells = <0>;
> > +	};
> > +
> > +	fan {
> > +		compatible = "gpio-fan";
> > +		gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
> > +		gpio-fan,speed-map = <0     0
> > +				      13000 1>;> +		pinctrl-
> > names = "default";
> > +		pinctrl-0 = <&pinctrl_fan>;
> > +		#cooling-cells = <2>;
> > +	};
> > +
> > +	leds {
> > +		compatible = "gpio-leds";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_leds>;
> > +
> > +		led-0 {
> > +			color = <LED_COLOR_ID_RED>;
> > +			function = LED_FUNCTION_DISK;
> > +			gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
> > +			linux,default-trigger = "mmc2";
> > +		};
> > +
> > +		led-1 {
> > +			color = <LED_COLOR_ID_BLUE>;
> > +			function = LED_FUNCTION_DISK;
> > +			gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
> > +			linux,default-trigger = "mmc1";
> > +		};
> > +
> > +		led-2 {
> > +			color = <LED_COLOR_ID_GREEN>;
> > +			function = LED_FUNCTION_CPU;
> > +			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
> > +			linux,default-trigger = "heartbeat";
> > +		};
> > +	};
> > +
> > +	usdhc1_pwrseq: pwr-seq {
> > +		compatible = "mmc-pwrseq-simple";
> > +		post-power-on-delay-ms = <100>;
> > +		power-off-delay-us = <60>;
> > +		reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
> > +	};
> > +
> > +	reg_can_en: regulator-can-en {
> > +		compatible = "regulator-fixed";
> > +		gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_can_en>;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "CAN_EN";
> > +		startup-delay-us = <20>;
> > +	};
> > +
> > +	reg_usb_otg1_vbus: regulator-usb-otg1 {
> > +		compatible = "regulator-fixed";
> > +		enable-active-high;
> > +		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_usbotg1pwrgrp>;
> > +		regulator-name = "usb_otg1_vbus";
> > +		regulator-max-microvolt = <5000000>;
> > +		regulator-min-microvolt = <5000000>;
> > +	};
> > +
> > +       reg_usdhc2_vmmc: regulator-usdhc2 {
> 
> Indentation (here or previous nodes) look odd, probably wrong.
> 
> > +		compatible = "regulator-fixed";
> > +		enable-active-high;
> > +		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > +		off-on-delay-us = <20000>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "VSD_3V3";
> > +	};
> > +
> > +	reg_vcc_3v3: regulator-vcc_3v3 {
> 
> No underscores in node names.
> 
> > +		compatible = "regulator-fixed";
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "VCC_3V3";
> > +	};
> > +};
> > +
> > +/* SPI - CAN MCP251XFD */
> > +&ecspi1 {
> > +	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_ecspi1>;
> > +	status = "okay";
> > +
> > +	can0: can@0 {
> > +		compatible = "microchip,mcp251xfd";
> > +		clocks = <&can_osc_40m>;
> > +		interrupt-parent = <&gpio1>;
> > +		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_can_int>;
> > +		reg = <0>;
> > +		spi-max-frequency = <20000000>;
> > +		xceiver-supply = <&reg_can_en>;
> > +	};
> > +};
> > +
> > +&gpio1 {
> > +	gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT",
> > "X_RTC_INT",
> > +		"", "", "", "RESET_ETHPHY",
> > +		"CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",
> > +		"USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";
> > +};
> > +
> > +&gpio2 {
> > +	gpio-line-names = "", "", "", "",
> > +		"", "", "BT_REG_ON", "WL_REG_ON",
> > +		"BT_DEV_WAKE", "BT_HOST_WAKE", "", "",
> > +		"X_SD2_CD_B", "", "", "",
> > +		"", "", "", "SD2_RESET_B";
> > +};
> > +
> > +&gpio4 {
> > +	gpio-line-names = "", "", "", "",
> > +		"", "", "", "",
> > +		"FAN", "miniPCIe_nPERST", "", "",
> > +		"COEX1", "COEX2";
> > +};
> > +
> > +&gpio5 {
> > +	gpio-line-names = "", "", "", "",
> > +		"", "", "", "",
> > +		"", "ECSPI1_SS0";
> > +};
> > +
> > +/* PCIe */
> > +&pcie0 {
> > +	assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
> > +			  <&clk IMX8MM_CLK_PCIE1_CTRL>;
> > +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
> > +				 <&clk IMX8MM_SYS_PLL2_250M>;
> > +	assigned-clock-rates = <10000000>, <250000000>;
> > +	clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk
> > IMX8MM_CLK_PCIE1_AUX>,
> > +		 <&clk IMX8MM_CLK_PCIE1_PHY>;
> > +	clock-names = "pcie", "pcie_aux", "pcie_bus";
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_pcie>;
> > +	reset-gpio = <&gpio4 9 GPIO_ACTIVE_LOW>;
> > +	status = "okay";
> > +};
> > +
> > +&pcie_phy {
> > +	clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
> > +	fsl,clkreq-unsupported;
> > +	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
> > +	fsl,tx-deemph-gen1 = <0x2d>;
> > +	fsl,tx-deemph-gen2 = <0xf>;
> > +	status = "okay";
> > +};
> > +
> > +&rv3028 {
> > +	trickle-resistor-ohms = <3000>;
> > +};
> > +
> > +&snvs_pwrkey {
> > +	status = "okay";
> > +};
> > +
> > +/* UART - RS232/RS485 */
> > +&uart1 {
> > +	assigned-clocks = <&clk IMX8MM_CLK_UART1>;
> > +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_uart1>;
> > +	status = "okay";
> > +	uart-has-rtscts;
> > +};
> > +
> > +/* UART - Sterling-LWB Bluetooth */
> > +&uart2 {
> > +	assigned-clocks = <&clk IMX8MM_CLK_UART2>;
> > +	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
> > +	fsl,dte-mode;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_uart2_bt>;
> > +	status = "okay";
> 
> Put status as last property, so after uart-has-rtscts. The same in
> other
> places.
> 
> > +	uart-has-rtscts;
> > +
> 
> (...)
> 
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> > new file mode 100644
> > index 000000000000..1aa27291c7ff
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> > @@ -0,0 +1,433 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2022 PHYTEC Messtechnik GmbH
> > + * Author: Teresa Remmet <t.remmet@phytec.de>
> > + */
> > +
> > +#include "imx8mm.dtsi"
> > +#include <dt-bindings/net/ti-dp83867.h>
> > +
> > +/ {
> > +	model = "PHYTEC phyCORE-i.MX8MM";
> > +	compatible = "phytec,imx8mm-phycore-som", "fsl,imx8mm";
> > +
> > +	aliases {
> > +		rtc0 = &rv3028;
> > +		rtc1 = &snvs_rtc;
> > +	};
> > +
> > +	memory@40000000 {
> > +		device_type = "memory";
> > +		reg = <0x0 0x40000000 0 0x80000000>;
> > +	};
> > +
> > +	reg_vdd_3v3_s: regulator-vdd_3v3_s {
> 
> Do not use underscores in node names.
> > +		compatible = "regulator-fixed";
> > +		regulator-always-on;
> > +		regulator-boot-on;
> > +		regulator-max-microvolt = <3300000>;
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-name = "VDD_3V3_S";
> > +	};
> > +};
> > +
> > +&A53_0 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&A53_1 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&A53_2 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&A53_3 {
> > +	cpu-supply = <&reg_vdd_arm>;
> > +};
> > +
> > +&ddrc {
> > +	operating-points-v2 = <&ddrc_opp_table>;
> > +
> > +	ddrc_opp_table: opp-table {
> > +		compatible = "operating-points-v2";
> > +
> > +		opp-25M {
> > +			opp-hz = /bits/ 64 <25000000>;
> > +		};
> > +
> > +		opp-100M {
> > +			opp-hz = /bits/ 64 <100000000>;
> > +		};
> > +
> > +		opp-750M {
> > +			opp-hz = /bits/ 64 <750000000>;
> > +		};
> > +	};
> > +};
> > +
> > +/* Ethernet */
> > +&fec1 {
> > +	fsl,magic-packet;
> > +	phy-mode = "rgmii-id";
> > +	phy-handle = <&ethphy0>;
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_fec1>;
> > +	status = "okay";
> > +
> > +	mdio {
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		ethphy0: ethernet-phy@0 {
> > +			compatible = "ethernet-phy-ieee802.3-c22";
> > +			enet-phy-lane-no-swap;
> > +			interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
> > +			interrupt-parent = <&gpio1>;
> > +			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
> > +			ti,fifo-depth =
> > <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> > +			ti,rx-internal-delay =
> > <DP83867_RGMIIDCTL_2_00_NS>;
> > +			ti,tx-internal-delay =
> > <DP83867_RGMIIDCTL_2_00_NS>;
> > +			reg = <0>;
> > +			reset-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
> > +			reset-assert-us = <1000>;
> > +			reset-deassert-us = <1000>;
> > +		};
> > +	};
> > +};
> > +
> > +/* SPI Flash */
> > +&flexspi {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_flexspi0>;
> > +	status = "okay";
> > +
> > +	som_flash: flash@0 {
> > +		compatible = "jedec,spi-nor";
> > +		reg = <0>;
> > +		spi-max-frequency = <80000000>;
> > +		spi-rx-bus-width = <4>;
> > +		spi-tx-bus-width = <1>;
> > +	};
> > +};
> > +
> > +&gpio1 {
> > +	gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT",
> > +		"", "", "", "RESET_ETHPHY",
> > +		"", "", "nENABLE_FLATLINK";
> > +};
> > +
> > +/* I2C1 */
> > +&i2c1 {
> > +	clock-frequency = <400000>;
> > +	pinctrl-names = "default","gpio";
> > +	pinctrl-0 = <&pinctrl_i2c1>;
> > +	pinctrl-1 = <&pinctrl_i2c1_gpio>;
> > +	scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> > +	sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> > +	status = "okay";
> > +
> > +	pmic@8 {
> > +		compatible = "nxp,pf8121a";
> > +		reg = <0x08>;
> > +
> > +		regulators {
> > +			reg_nvcc_sd1: ldo1 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <3300000>;
> > +				regulator-min-microvolt = <3300000>;
> > +				regulator-name = "NVCC_SD1 (LDO1)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_nvcc_sd2: ldo2 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <3300000>;
> > +				regulator-min-microvolt = <1800000>;
> > +				regulator-name = "NVCC_SD2 (LDO2)";
> > +				vselect-en;
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vcc_enet: ldo3 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <2500000>;
> > +				regulator-min-microvolt = <1500000>;
> > +				regulator-name = "VCC_ENET_2V5 (LDO3)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdda_1v8: ldo4 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1800000>;
> > +				regulator-min-microvolt = <1500000>;
> > +				regulator-name = "VDDA_1V8 (LDO4)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-min-microvolt 
> > = <1500000>;
> > +					regulator-suspend-max-microvolt 
> > = <1500000>;
> > +				};
> > +			};
> > +
> > +			reg_soc_vdda_phy: buck1 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <900000>;
> > +				regulator-min-microvolt = <400000>;
> > +				regulator-name = "VDD_SOC_VDDA_PHY_0P8
> > (BUCK1)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-min-microvolt 
> > = <400000>;
> > +					regulator-suspend-max-microvolt 
> > = <400000>;
> > +				};
> > +			};
> > +
> > +			reg_vdd_gpu_dram: buck2 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1000000>;
> > +				regulator-min-microvolt = <1000000>;
> > +				regulator-name = "VDD_GPU_DRAM
> > (BUCK2)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-max-microvolt 
> > = <1000000>;
> > +					regulator-suspend-min-microvolt 
> > = <1000000>;
> > +				};
> > +			};
> > +
> > +			reg_vdd_gpu: buck3 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1000000>;
> > +				regulator-min-microvolt = <400000>;
> > +				regulator-name = "VDD_VPU (BUCK3)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdd_mipi: buck4 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1050000>;
> > +				regulator-min-microvolt = <900000>;
> > +				regulator-name = "VDD_MIPI_0P9
> > (BUCK4)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdd_arm: buck5 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1050000>;
> > +				regulator-min-microvolt = <400000>;
> > +				regulator-name = "VDD_ARM (BUCK5)";
> > +				regulator-state-mem {
> > +					regulator-off-in-suspend;
> > +				};
> > +			};
> > +
> > +			reg_vdd_1v8: buck6 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1800000>;
> > +				regulator-min-microvolt = <1800000>;
> > +				regulator-name = "VDD_1V8 (BUCK6)";
> > +				regulator-state-mem {
> > +					regulator-on-in-suspend;
> > +					regulator-suspend-max-microvolt 
> > = <1800000>;
> > +					regulator-suspend-min-microvolt 
> > = <1800000>;
> > +				};
> > +			};
> > +
> > +			reg_nvcc_dram: buck7 {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1100000>;
> > +				regulator-min-microvolt = <1100000>;
> > +				regulator-name = "NVCC_DRAM_1P1V
> > (BUCK7)";
> > +			};
> > +
> > +			reg_vsnvs: vsnvs {
> > +				regulator-always-on;
> > +				regulator-boot-on;
> > +				regulator-max-microvolt = <1800000>;
> > +				regulator-min-microvolt = <1800000>;
> > +				regulator-name = "NVCC_SNVS_1P8
> > (VSNVS)";
> > +			};
> > +		};
> > +	};
> > +
> > +	eeprom@51 {
> > +		compatible = "atmel,24c32";
> > +		pagesize = <32>;
> > +		reg = <0x51>;
> > +		vcc-supply = <&reg_vdd_3v3_s>;
> > +	};
> > +
> > +	sn65dsi83: mipitolvds@2d {
> 
> I think generic node name for this is "bridge"?
> 
> > +		compatible = "ti,sn65dsi83";
> > +		enable-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
> > +		pinctrl-names = "default";
> 
> Best regards,
> Krzysztof
-- 
PHYTEC Messtechnik GmbH | Robert-Koch-Str. 39 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber |
Handelsregister Mainz HRB 4656 | Finanzamt Mainz | St.Nr. 266500608, DE
149059855
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  reply	other threads:[~2022-06-02 13:17 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-02 10:11 [PATCH 1/3] bindings: arm: fsl: Add PHYTEC i.MX8MM devicetree bindings Teresa Remmet
2022-06-02 10:11 ` Teresa Remmet
2022-06-02 10:11 ` [PATCH 2/3] arm64: defconfig: Enable gpio-fan support Teresa Remmet
2022-06-02 10:11   ` Teresa Remmet
2022-06-02 10:11 ` [PATCH 3/3] arm64: dts: freescale: Add phyBOARD-Polis-i.MX8MM support Teresa Remmet
2022-06-02 10:11   ` Teresa Remmet
2022-06-02 11:35   ` Krzysztof Kozlowski
2022-06-02 11:35     ` Krzysztof Kozlowski
2022-06-02 13:17     ` Teresa Remmet [this message]
2022-06-02 13:17       ` Teresa Remmet
2022-06-02 11:30 ` [PATCH 1/3] bindings: arm: fsl: Add PHYTEC i.MX8MM devicetree bindings Krzysztof Kozlowski
2022-06-02 11:30   ` Krzysztof Kozlowski

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