[U-Boot] [PATCH 1/4] doc: rockchip: Update build instruction for rk3308

[U-Boot] [PATCH 1/4] doc: rockchip: Update build instruction for rk3308

[Andy Yan]

After commit d8765e2422cd ("Enable building of u-boot.itb
on Rockchip platform"), u-boot.itb will automatically
generated by "make all" command, manually command
"make u-boot.itb" is no longer needed.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---

 doc/README.rockchip | 1 -
 1 file changed, 1 deletion(-)

diff --git a/doc/README.rockchip b/doc/README.rockchip
index 67c14006a3..dae4ebc8e4 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -108,7 +108,6 @@ For example:
      => export BL31=/path/to/rkbin/bin/rk33/rk3308_bl31_v2.22.elf
      => make roc-rk3308-cc_defconfig
      => make CROSS_COMPILE=aarch64-linux-gnu- all
-     => make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb
      => ./tools/mkimage -n rk3308 -T rksd -d /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin idbloader.img
      => cat spl/u-boot-spl.bin  >> idbloader.img
 
-- 
2.17.1

[U-Boot] [PATCH 2/4] rockchip: rk3308: enable spl-fifo-mode for emmc

[Andy Yan]

We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

And show my best respect to Heiko's work for this solution.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---

 arch/arm/dts/rk3308-u-boot.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index 1a68decef3..f5a595337e 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -12,6 +12,8 @@
 };
 
 &emmc {
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+	u-boot,spl-fifo-mode;
 	u-boot,dm-pre-reloc;
 };
 
-- 
2.17.1

[U-Boot] [PATCH 3/4] rockchip: px5: enable spl-fifo-mode for emmc for px5-evb

[Andy Yan]

We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---

 arch/arm/dts/rk3368-px5-evb-u-boot.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index 002767a033..936ce55727 100644
--- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
@@ -58,6 +58,8 @@
 };
 
 &emmc {
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+	u-boot,spl-fifo-mode;
 	u-boot,dm-pre-reloc;
 };
 
-- 
2.17.1

[U-Boot] [PATCH 4/4] rockchip: evb-px5: disable NET

[Andy Yan]

PX5 evb has no ETH port, so disable it.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---

 configs/evb-px5_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index f9b17be10e..2d18da6cc8 100644
--- a/configs/evb-px5_defconfig
+++ b/configs/evb-px5_defconfig
@@ -45,7 +45,7 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_NET_RANDOM_ETHADDR=y
+# CONFIG_NET is not set
 CONFIG_TPL_DM=y
 CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
-- 
2.17.1

[U-Boot] [PATCH 3/4] rockchip: px5: enable spl-fifo-mode for emmc for px5-evb

[Philipp Tomsich]

> On 26.11.2019, at 14:15, Andy Yan <andy.yan@rock-chips.com> wrote:
> 
> We need load some parts of ATF to sram, but rockchip
> dwmmc controllers can't do dma to non-ddr addresses
> space, so set the mmc controller into fifo mode in spl.
> 
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

[U-Boot] [PATCH 1/4] doc: rockchip: Update build instruction for rk3308

[Kever Yang]

On 2019/11/26 下午9:15, Andy Yan wrote:
> After commit d8765e2422cd ("Enable building of u-boot.itb
> on Rockchip platform"), u-boot.itb will automatically
> generated by "make all" command, manually command
> "make u-boot.itb" is no longer needed.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>
>   doc/README.rockchip | 1 -
>   1 file changed, 1 deletion(-)
>
> diff --git a/doc/README.rockchip b/doc/README.rockchip
> index 67c14006a3..dae4ebc8e4 100644
> --- a/doc/README.rockchip
> +++ b/doc/README.rockchip
> @@ -108,7 +108,6 @@ For example:
>        => export BL31=/path/to/rkbin/bin/rk33/rk3308_bl31_v2.22.elf
>        => make roc-rk3308-cc_defconfig
>        => make CROSS_COMPILE=aarch64-linux-gnu- all
> -     => make CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb
>        => ./tools/mkimage -n rk3308 -T rksd -d /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin idbloader.img
>        => cat spl/u-boot-spl.bin  >> idbloader.img
>   

[U-Boot] [PATCH 2/4] rockchip: rk3308: enable spl-fifo-mode for emmc

[Kever Yang]

On 2019/11/26 下午9:15, Andy Yan wrote:
> We need load some parts of ATF to sram, but rockchip
> dwmmc controllers can't do dma to non-ddr addresses
> space, so set the mmc controller into fifo mode in spl.
>
> And show my best respect to Heiko's work for this solution.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>
>   arch/arm/dts/rk3308-u-boot.dtsi | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
> index 1a68decef3..f5a595337e 100644
> --- a/arch/arm/dts/rk3308-u-boot.dtsi
> +++ b/arch/arm/dts/rk3308-u-boot.dtsi
> @@ -12,6 +12,8 @@
>   };
>   
>   &emmc {
> +	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
> +	u-boot,spl-fifo-mode;
>   	u-boot,dm-pre-reloc;
>   };
>   

[U-Boot] [PATCH 3/4] rockchip: px5: enable spl-fifo-mode for emmc for px5-evb

[Kever Yang]

On 2019/11/26 下午9:15, Andy Yan wrote:
> We need load some parts of ATF to sram, but rockchip
> dwmmc controllers can't do dma to non-ddr addresses
> space, so set the mmc controller into fifo mode in spl.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>
>   arch/arm/dts/rk3368-px5-evb-u-boot.dtsi | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
> index 002767a033..936ce55727 100644
> --- a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
> +++ b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
> @@ -58,6 +58,8 @@
>   };
>   
>   &emmc {
> +	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
> +	u-boot,spl-fifo-mode;
>   	u-boot,dm-pre-reloc;
>   };
>   

[U-Boot] [PATCH 4/4] rockchip: evb-px5: disable NET

[Kever Yang]

On 2019/11/26 下午9:15, Andy Yan wrote:
> PX5 evb has no ETH port, so disable it.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>
>   configs/evb-px5_defconfig | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
> index f9b17be10e..2d18da6cc8 100644
> --- a/configs/evb-px5_defconfig
> +++ b/configs/evb-px5_defconfig
> @@ -45,7 +45,7 @@ CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
>   CONFIG_TPL_OF_PLATDATA=y
>   CONFIG_ENV_IS_IN_MMC=y
>   CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> -CONFIG_NET_RANDOM_ETHADDR=y
> +# CONFIG_NET is not set
>   CONFIG_TPL_DM=y
>   CONFIG_REGMAP=y
>   CONFIG_SPL_REGMAP=y