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* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-24 18:56 YhLu
  0 siblings, 0 replies; 21+ messages in thread
From: YhLu @ 2005-06-24 18:56 UTC (permalink / raw)
  To: Andi Kleen; +Cc: Peter Buckingham, linux-kernel

Andi,

Thanks for the patch, I tried that with my LinuxBIOS + 8way dual core.

It works well. 

I'm using that with 2.6.12, because 2.6.11 has problem with nvidia
chipset....

~ # cat /proc/interrupts 
           CPU0       CPU1       CPU2       CPU3       CPU4       CPU5
CPU6       CPU7       CPU8       CPU9       CPU10       CPU11       CPU12
CPU13       CPU14       CPU15       
  0:     378977          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0    IO-APIC-edge  timer
  2:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0          XT-PIC  cascade
  4:       1284          0          0          0          0          0
0          0          0          0          0         0          0
0          0          0    IO-APIC-edge  serial
  8:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0    IO-APIC-edge  rtc
 20:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  ehci_hcd:usb1
 21:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  ohci_hcd:usb2
 22:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  libata
 23:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  libata
NMI:        781        661         48         51         51         51
51         51         51         51         53         52         53
53         53         53 
LOC:     378822     378680     379254     379214     379172     379131
379088     379046     379004     378962     378921     378877     378834
378791     378748     378705 
ERR:         55

and all int come to first cpu now.

the problem is the 2.6.12 timing problem with nvidia chipset is still there,
i hope that i have time to dubug it for your next week.

YH

> -----Original Message-----
> From: Andi Kleen [mailto:ak@suse.de] 
> Sent: Wednesday, June 22, 2005 5:13 PM
> To: YhLu
> Cc: Andi Kleen; Peter Buckingham; linux-kernel@vger.kernel.org
> Subject: Re: 2.6.12 with dual way dual core ck804 MB
> 
> On Wed, Jun 22, 2005 at 05:07:44PM -0700, YhLu wrote:
> > actually with LinuxBIOS I can boot into 8 way dual core system.
> > 
> > But it will randomly hang. acutally when using cat /proc/interrupts.
> 
> Because it needs physical addressing, not logical like it is 
> used right now.
> That it works at all is surprising.
> 
> -Andi
> 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-29  1:01 YhLu
  0 siblings, 0 replies; 21+ messages in thread
From: YhLu @ 2005-06-29  1:01 UTC (permalink / raw)
  To: Andi Kleen; +Cc: Peter Buckingham, linux-kernel

andi,

some hints for you.
when using Opteron 875, the problem was more easily catched. 

in smp_callin in smpboot.c
if change
Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
to 
printk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
will have 50% to pass through.

if change
Dprintk("CALLIN, before setup_local_APIC().\n");
to 
printk("CALLIN, before setup_local_APIC().\n");

will pass through every time.

YH



> -----Original Message-----
> From: YhLu 
> Sent: Friday, June 24, 2005 4:44 PM
> To: 'Andi Kleen'
> Cc: Peter Buckingham; linux-kernel@vger.kernel.org
> Subject: RE: 2.6.12 with dual way dual core ck804 MB
> 
> start from 2.6.12.rc5.
> 
> YH 
> 
> > -----Original Message-----
> > From: Andi Kleen [mailto:ak@suse.de]
> > Sent: Friday, June 24, 2005 4:42 PM
> > To: YhLu
> > Cc: Andi Kleen; Peter Buckingham; linux-kernel@vger.kernel.org
> > Subject: Re: 2.6.12 with dual way dual core ck804 MB
> > 
> > On Fri, Jun 24, 2005 at 04:42:58PM -0700, YhLu wrote:
> > > Andi,
> > > 
> > > the timing problem come out from 2.6.12.rc5....
> > 
> > What do you mean? It's gone or it started there?
> > -Andi
> > 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-24 23:47 YhLu
  2005-06-29  2:40 ` Eric W. Biederman
  2005-06-30 18:54 ` Andrew Vasquez
  0 siblings, 2 replies; 21+ messages in thread
From: YhLu @ 2005-06-24 23:47 UTC (permalink / raw)
  To: Andi Kleen; +Cc: Peter Buckingham, linux-kernel

start from 2.6.12.rc5.

YH 

> -----Original Message-----
> From: Andi Kleen [mailto:ak@suse.de] 
> Sent: Friday, June 24, 2005 4:42 PM
> To: YhLu
> Cc: Andi Kleen; Peter Buckingham; linux-kernel@vger.kernel.org
> Subject: Re: 2.6.12 with dual way dual core ck804 MB
> 
> On Fri, Jun 24, 2005 at 04:42:58PM -0700, YhLu wrote:
> > Andi,
> > 
> > the timing problem come out from 2.6.12.rc5....
> 
> What do you mean? It's gone or it started there?
> -Andi
> 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-24 23:42 YhLu
  2005-06-24 23:42 ` Andi Kleen
  0 siblings, 1 reply; 21+ messages in thread
From: YhLu @ 2005-06-24 23:42 UTC (permalink / raw)
  To: Andi Kleen; +Cc: Peter Buckingham, linux-kernel

Andi,

the timing problem come out from 2.6.12.rc5....

YH 

> -----Original Message-----
> From: YhLu 
> Sent: Friday, June 24, 2005 11:56 AM
> To: Andi Kleen
> Cc: Peter Buckingham; linux-kernel@vger.kernel.org
> Subject: RE: 2.6.12 with dual way dual core ck804 MB
> 
> Andi,
> 
> Thanks for the patch, I tried that with my LinuxBIOS + 8way dual core.
> 
> It works well. 
> 
> I'm using that with 2.6.12, because 2.6.11 has problem with 
> nvidia chipset....
> 
> ~ # cat /proc/interrupts 
>            CPU0       CPU1       CPU2       CPU3       CPU4       CPU5
> CPU6       CPU7       CPU8       CPU9       CPU10       CPU11 
>       CPU12
> CPU13       CPU14       CPU15       
>   0:     378977          0          0          0          0          0
> 0          0          0          0          0          0          0
> 0          0          0    IO-APIC-edge  timer
>   2:          0          0          0          0          0          0
> 0          0          0          0          0          0          0
> 0          0          0          XT-PIC  cascade
>   4:       1284          0          0          0          0          0
> 0          0          0          0          0         0          0
> 0          0          0    IO-APIC-edge  serial
>   8:          0          0          0          0          0          0
> 0          0          0          0          0          0          0
> 0          0          0    IO-APIC-edge  rtc
>  20:          0          0          0          0          0          0
> 0          0          0          0          0          0          0
> 0          0          0   IO-APIC-level  ehci_hcd:usb1
>  21:          0          0          0          0          0          0
> 0          0          0          0          0          0          0
> 0          0          0   IO-APIC-level  ohci_hcd:usb2
>  22:          0          0          0          0          0          0
> 0          0          0          0          0          0          0
> 0          0          0   IO-APIC-level  libata
>  23:          0          0          0          0          0          0
> 0          0          0          0          0          0          0
> 0          0          0   IO-APIC-level  libata
> NMI:        781        661         48         51         51         51
> 51         51         51         51         53         52         53
> 53         53         53 
> LOC:     378822     378680     379254     379214     379172     379131
> 379088     379046     379004     378962     378921     378877 
>     378834
> 378791     378748     378705 
> ERR:         55
> 
> and all int come to first cpu now.
> 
> the problem is the 2.6.12 timing problem with nvidia chipset 
> is still there, i hope that i have time to dubug it for your 
> next week.
> 
> YH
> 
> > -----Original Message-----
> > From: Andi Kleen [mailto:ak@suse.de]
> > Sent: Wednesday, June 22, 2005 5:13 PM
> > To: YhLu
> > Cc: Andi Kleen; Peter Buckingham; linux-kernel@vger.kernel.org
> > Subject: Re: 2.6.12 with dual way dual core ck804 MB
> > 
> > On Wed, Jun 22, 2005 at 05:07:44PM -0700, YhLu wrote:
> > > actually with LinuxBIOS I can boot into 8 way dual core system.
> > > 
> > > But it will randomly hang. acutally when using cat 
> /proc/interrupts.
> > 
> > Because it needs physical addressing, not logical like it is used 
> > right now.
> > That it works at all is surprising.
> > 
> > -Andi
> > 
> -
> To unsubscribe from this list: send the line "unsubscribe 
> linux-kernel" in the body of a message to 
> majordomo@vger.kernel.org More majordomo info at  
> http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/
> 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-23  0:07 YhLu
  2005-06-23  0:12 ` Andi Kleen
  0 siblings, 1 reply; 21+ messages in thread
From: YhLu @ 2005-06-23  0:07 UTC (permalink / raw)
  To: Andi Kleen; +Cc: Peter Buckingham, linux-kernel

actually with LinuxBIOS I can boot into 8 way dual core system.

But it will randomly hang. acutally when using 
cat /proc/interrupts.

           CPU0       CPU1       CPU2       CPU3       CPU4       CPU5
CPU6       CPU7       CPU8       CPU9       CPU10       CPU11       CPU12
CPU13       CPU14       CPU15       
  0:        409          0          0          0          0          0
0          0          0          0        229      37399          0
0          0          0    IO-APIC-edge  timer
  2:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0          XT-PIC  cascade
  4:          0          0          0          0          0          0
0          0          0          0          0       4915          0
0          0          0    IO-APIC-edge  serial
  8:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0    IO-APIC-edge  rtc
 14:          0          0          0          0          0          0
0          0          0          0          0         10          0
0          0          0    IO-APIC-edge  ide0
 19:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  ohci1394
 20:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  libata
 21:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  libata
 22:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  ohci_hcd
 23:          0          0          0          0          0          0
0          0          0          0          0          0          0
0          0          0   IO-APIC-level  ehci_hcd
NMI:          1          0          0          0          0          0
0          0          0          0          0          1          0
0          0          0 
LOC:      37688      37965      37965      37965      37965      37965
37965      37965      37965      37965      37965      37446      37965
37965      37965      37966 
ERR:        447
MIS:          0

I wonder why all int is direct to cpu8.

YH
 

> -----Original Message-----
> From: Andi Kleen [mailto:ak@suse.de] 
> Sent: Wednesday, June 22, 2005 4:37 PM
> To: YhLu
> Cc: Peter Buckingham; Andi Kleen; linux-kernel@vger.kernel.org
> Subject: Re: 2.6.12 with dual way dual core ck804 MB
> 
> On Wed, Jun 22, 2005 at 04:37:37PM -0700, YhLu wrote:
> > andi,
> > 
> > do you mean the apic id lifting for opteron?
> 
> Yes, with local APIC numbers > 8 physical mode needs to be 
> used because logical mode only supports 8.
> 
> -Andi
> 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-22 23:37 YhLu
  2005-06-22 23:37 ` Andi Kleen
  0 siblings, 1 reply; 21+ messages in thread
From: YhLu @ 2005-06-22 23:37 UTC (permalink / raw)
  To: Peter Buckingham, Andi Kleen; +Cc: linux-kernel

andi,

do you mean the apic id lifting for opteron?

YH 

> -----Original Message-----
> From: Peter Buckingham [mailto:peter@pantasys.com] 
> Sent: Wednesday, June 22, 2005 4:32 PM
> To: Andi Kleen
> Cc: YhLu; linux-kernel@vger.kernel.org
> Subject: Re: 2.6.12 with dual way dual core ck804 MB
> 
> Andi Kleen wrote:
> > There are two problems on AMD >8P. First the APIC 
> addressing doesn't 
> > work and needs to be done differently (I have a patch for 
> that in the 
> > final stages of testing). And then there is a mysterious scheduler 
> > deadlock problem in 2.6.12 that I haven't tracked down yet.
> > 2.6.11+patch works though.
> 
> okay, feel free to toss me the patch when your comfortable with it.
> 
> thanks,
> 
> peter
> 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-21 22:50 YhLu
  2005-06-21 23:55 ` Andi Kleen
  0 siblings, 1 reply; 21+ messages in thread
From: YhLu @ 2005-06-21 22:50 UTC (permalink / raw)
  To: Andi Kleen; +Cc: linux-kernel

I would like to help. Can you say more detail ? I don't know how to souce
code tracing statement....

Do you mean setup one global buffer, and in the setup.c compare the node id
or node id to decide to write sth to the buffer, and print out when the cpu0
get the control again?

YH 

> -----Original Message-----
> From: Andi Kleen [mailto:ak@suse.de] 
> Sent: Tuesday, June 21, 2005 3:36 PM
> To: YhLu
> Cc: Andi Kleen; linux-kernel@vger.kernel.org
> Subject: Re: 2.6.12 with dual way dual core ck804 MB
> 
> On Tue, Jun 21, 2005 at 02:41:52PM -0700, YhLu wrote:
> > andi,
> > 
> > for the dual way dual core Opteron ck804 MB, the 2.6.12 
> still has the 
> > timing problem, I  still need to add one printk in 
> amd_detec_cmp after 
> > the phys_proc_id is setup.
> 
> Can you perhaps do some debugging to find out where it hangs? 
> 
> e.g. you could let CPU #1 write into a buffer from source 
> code tracing statement and then read that in CPU #0 after 
> some time out. That should not disturb timing.
> 
> -Andi
> 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* RE: 2.6.12 with dual way dual core ck804 MB
@ 2005-06-21 22:17 YhLu
  0 siblings, 0 replies; 21+ messages in thread
From: YhLu @ 2005-06-21 22:17 UTC (permalink / raw)
  To: Andi Kleen; +Cc: linux-kernel

just  after starting core0 of node 1.

YH

Using local APIC timer interrupts.
Detected 12.564 MHz APIC timer.
Booting processor 1/1 rip 6000 rsp ffff81013ff89f58
Initializing CPU#1
masked ExtINT on CPU#1
CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
CPU: L2 Cache: 1024K (64 bytes/line)
CPU 1(2) -> Node 0 -> Core 1
 stepping 00
CPU 1: Syncing TSC to CPU 0.
Booting processor 2/2 rip 6000 rsp ffff81023ff11f58
Initializing CPU#2
masked ExtINT on CPU#2 --------------------------------------------here

> -----Original Message-----
> From: Andi Kleen [mailto:ak@suse.de] 
> Sent: Tuesday, June 21, 2005 3:12 PM
> To: YhLu
> Cc: Andi Kleen; linux-kernel@vger.kernel.org
> Subject: Re: 2.6.12 with dual way dual core ck804 MB
> 
> On Tue, Jun 21, 2005 at 02:41:52PM -0700, YhLu wrote:
> > andi,
> > 
> > for the dual way dual core Opteron ck804 MB, the 2.6.12 
> still has the 
> > timing problem, I  still need to add one printk in 
> amd_detec_cmp after 
> > the phys_proc_id is setup.
> 
> It works for me on several dual core systems, except on a 
> very big one that seems to run into a scheduler problem.
> 
> Where exactly does yours lock up? 
> 
> -Andi
> 

^ permalink raw reply	[flat|nested] 21+ messages in thread
* 2.6.12 with dual way dual core ck804 MB
@ 2005-06-21 21:41 YhLu
  2005-06-21 22:12 ` Andi Kleen
  2005-06-21 22:36 ` Andi Kleen
  0 siblings, 2 replies; 21+ messages in thread
From: YhLu @ 2005-06-21 21:41 UTC (permalink / raw)
  To: Andi Kleen; +Cc: linux-kernel

andi,

for the dual way dual core Opteron ck804 MB, the 2.6.12 still has the timing
problem, I  still need to add one printk in amd_detec_cmp after the
phys_proc_id is setup.

Regards

YH

static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
        int cpu = smp_processor_id();
        int node = 0;
        unsigned bits;
        if (c->x86_num_cores == 1)
                return;

        bits = 0;
        while ((1 << bits) < c->x86_num_cores)
                bits++;

        /* Low order bits define the core id (index of core in socket) */
        cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
        /* Convert the APIC ID into the socket ID */
        phys_proc_id[cpu] >>= bits;
+        printk(KERN_INFO "  CPU %d(%d)  phys_proc_id %d  Core %d\n",
+                        cpu, c->x86_num_cores, phys_proc_id[cpu],
cpu_core_id[cpu]);

^ permalink raw reply	[flat|nested] 21+ messages in thread
end of thread, other threads:[~2005-06-30 20:56 UTC | newest]

Thread overview: 21+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2005-06-24 18:56 2.6.12 with dual way dual core ck804 MB YhLu
  -- strict thread matches above, loose matches on Subject: below --
2005-06-29  1:01 YhLu
2005-06-24 23:47 YhLu
2005-06-29  2:40 ` Eric W. Biederman
2005-06-30 18:54 ` Andrew Vasquez
2005-06-30 20:54   ` Eric W. Biederman
2005-06-24 23:42 YhLu
2005-06-24 23:42 ` Andi Kleen
2005-06-23  0:07 YhLu
2005-06-23  0:12 ` Andi Kleen
2005-06-22 23:37 YhLu
2005-06-22 23:37 ` Andi Kleen
2005-06-21 22:50 YhLu
2005-06-21 23:55 ` Andi Kleen
2005-06-21 22:17 YhLu
2005-06-21 21:41 YhLu
2005-06-21 22:12 ` Andi Kleen
2005-06-22 22:26   ` Peter Buckingham
2005-06-22 23:10     ` Andi Kleen
2005-06-22 23:31       ` Peter Buckingham
2005-06-21 22:36 ` Andi Kleen

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