From: Jonathan Marek <jonathan@marek.ca>
To: Akhil P Oommen <akhilpo@codeaurora.org>, freedreno@lists.freedesktop.org
Cc: dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, jcrouse@codeaurora.org,
smasetty@codeaurora.org, devicetree@vger.kernel.org,
mka@chromium.org, saravanak@google.com, sibis@codeaurora.org,
viresh.kumar@linaro.org
Subject: Re: [PATCH v4 3/7] drm: msm: a6xx: set gpu freq through hfi
Date: Thu, 9 Jul 2020 16:04:31 -0400 [thread overview]
Message-ID: <322c921f-7c8f-7052-b191-44f0dade742e@marek.ca> (raw)
In-Reply-To: <1594324828-9571-4-git-send-email-akhilpo@codeaurora.org>
On 7/9/20 4:00 PM, Akhil P Oommen wrote:
> Newer targets support changing gpu frequency through HFI. So
> use that wherever supported instead of the legacy method.
>
It was already using HFI on newer targets. Don't break it in one commit
then fix it in the next.
> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> index 233afea..b547339 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> @@ -121,6 +121,12 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
> if (gpu_freq == gmu->gpu_freqs[perf_index])
> break;
>
> + if (!gmu->legacy) {
> + a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
> + icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
> + return;
> + }
> +
> gmu->current_perf_index = perf_index;
> gmu->freq = gmu->gpu_freqs[perf_index];
>
> @@ -893,10 +899,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
> enable_irq(gmu->hfi_irq);
>
> /* Set the GPU to the current freq */
> - if (gmu->legacy)
> - a6xx_gmu_set_initial_freq(gpu, gmu);
> - else
> - a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
> + a6xx_gmu_set_initial_freq(gpu, gmu);
>
> /*
> * "enable" the GX power domain which won't actually do anything but it
>
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Marek <jonathan@marek.ca>
To: Akhil P Oommen <akhilpo@codeaurora.org>, freedreno@lists.freedesktop.org
Cc: devicetree@vger.kernel.org, saravanak@google.com,
linux-arm-msm@vger.kernel.org, smasetty@codeaurora.org,
linux-kernel@vger.kernel.org, mka@chromium.org,
dri-devel@freedesktop.org, viresh.kumar@linaro.org,
sibis@codeaurora.org
Subject: Re: [PATCH v4 3/7] drm: msm: a6xx: set gpu freq through hfi
Date: Thu, 9 Jul 2020 16:04:31 -0400 [thread overview]
Message-ID: <322c921f-7c8f-7052-b191-44f0dade742e@marek.ca> (raw)
In-Reply-To: <1594324828-9571-4-git-send-email-akhilpo@codeaurora.org>
On 7/9/20 4:00 PM, Akhil P Oommen wrote:
> Newer targets support changing gpu frequency through HFI. So
> use that wherever supported instead of the legacy method.
>
It was already using HFI on newer targets. Don't break it in one commit
then fix it in the next.
> Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> index 233afea..b547339 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> @@ -121,6 +121,12 @@ void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp)
> if (gpu_freq == gmu->gpu_freqs[perf_index])
> break;
>
> + if (!gmu->legacy) {
> + a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
> + icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
> + return;
> + }
> +
> gmu->current_perf_index = perf_index;
> gmu->freq = gmu->gpu_freqs[perf_index];
>
> @@ -893,10 +899,7 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
> enable_irq(gmu->hfi_irq);
>
> /* Set the GPU to the current freq */
> - if (gmu->legacy)
> - a6xx_gmu_set_initial_freq(gpu, gmu);
> - else
> - a6xx_hfi_set_freq(gmu, gmu->current_perf_index);
> + a6xx_gmu_set_initial_freq(gpu, gmu);
>
> /*
> * "enable" the GX power domain which won't actually do anything but it
>
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next prev parent reply other threads:[~2020-07-09 20:05 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-09 20:00 [PATCH v4 0/7] Add support for GPU DDR BW scaling Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
2020-07-09 20:00 ` [PATCH v4 1/7] dt-bindings: drm/msm/gpu: Document gpu opp table Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
2020-07-09 20:00 ` [PATCH v4 2/7] drm: msm: a6xx: send opp instead of a frequency Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
2020-07-09 20:00 ` [PATCH v4 3/7] drm: msm: a6xx: set gpu freq through hfi Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
2020-07-09 20:04 ` Jonathan Marek [this message]
2020-07-09 20:04 ` Jonathan Marek
2020-07-10 21:13 ` Akhil P Oommen
2020-07-10 21:13 ` Akhil P Oommen
2020-07-10 22:36 ` Akhil P Oommen
2020-07-10 22:36 ` Akhil P Oommen
2020-07-09 20:00 ` [PATCH v4 4/7] drm: msm: a6xx: use dev_pm_opp_set_bw to scale DDR Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
2020-07-10 19:41 ` [Freedreno] " Rob Clark
2020-07-10 19:41 ` Rob Clark
2020-07-10 21:03 ` Akhil P Oommen
2020-07-10 21:03 ` Akhil P Oommen
2020-07-10 22:32 ` Rob Clark
2020-07-10 22:32 ` Rob Clark
2020-07-09 20:00 ` [PATCH v4 5/7] arm64: dts: qcom: SDM845: Enable GPU DDR bw scaling Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
2020-07-09 20:00 ` [PATCH v4 6/7] arm64: dts: qcom: sc7180: Add interconnects property for GPU Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
2020-07-09 20:00 ` [PATCH v4 7/7] arm64: dts: qcom: sc7180: Add opp-peak-kBps to GPU opp Akhil P Oommen
2020-07-09 20:00 ` Akhil P Oommen
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