From: "Guido Günther" <agx@sigxcpu.org> To: Maxime Ripard <maxime.ripard@bootlin.com>, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, Robert Chiras <robert.chiras@nxp.com>, Sam Ravnborg <sam@ravnborg.org>, Fabio Estevam <festevam@gmail.com> Subject: [PATCH v4 2/3] dt-bindings: phy: Add documentation for mixel dphy Date: Thu, 7 Mar 2019 11:05:31 +0100 [thread overview] Message-ID: <3319783f60fedd7f0029dd60a51c76a75003fe05.1551952749.git.agx@sigxcpu.org> (raw) In-Reply-To: <cover.1551952749.git.agx@sigxcpu.org> Add support for the MIXEL DPHY IP as found in the NXP's i.MX8MQ. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> --- .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt new file mode 100644 index 000000000000..d3646580412a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt @@ -0,0 +1,29 @@ +Mixel DSI PHY for i.MX8 + +The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the +MIPI-DSI IP from Northwest Logic). It represents the physical layer for the +electrical signals for DSI. + +Required properties: +- compatible: Must be: + - "mixel,imx8mq-mipi-dphy" +- clocks: Must contain an entry for each entry in clock-names. +- clock-names: Must contain the following entries: + - "phy_ref": phandle and specifier referring to the DPHY ref clock +- reg: the register range of the PHY controller +- #phy-cells: number of cells in PHY, as defined in + Documentation/devicetree/bindings/phy/phy-bindings.txt + this must be <0> + +Optional properties: +- power-domains: phandle to power domain + +Example: + mipi_dphy: mipi_dphy@30A0030 { + compatible = "mixel,imx8mq-mipi-dphy"; + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + clock-names = "phy_ref"; + reg = <0x30A00300 0x100>; + power-domains = <&pd_mipi0>; + #phy-cells = <0>; + }; -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: "Guido Günther" <agx@sigxcpu.org> To: Maxime Ripard <maxime.ripard@bootlin.com>, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, Robert Chiras <robert.chiras@nxp.com>, Sam Ravnborg <sam@ravnborg.org>, Fabio Estevam <festevam@gmail.com> Subject: [PATCH v4 2/3] dt-bindings: phy: Add documentation for mixel dphy Date: Thu, 7 Mar 2019 11:05:31 +0100 [thread overview] Message-ID: <3319783f60fedd7f0029dd60a51c76a75003fe05.1551952749.git.agx@sigxcpu.org> (raw) In-Reply-To: <cover.1551952749.git.agx@sigxcpu.org> Add support for the MIXEL DPHY IP as found in the NXP's i.MX8MQ. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> --- .../bindings/phy/mixel,mipi-dsi-phy.txt | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt new file mode 100644 index 000000000000..d3646580412a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt @@ -0,0 +1,29 @@ +Mixel DSI PHY for i.MX8 + +The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the +MIPI-DSI IP from Northwest Logic). It represents the physical layer for the +electrical signals for DSI. + +Required properties: +- compatible: Must be: + - "mixel,imx8mq-mipi-dphy" +- clocks: Must contain an entry for each entry in clock-names. +- clock-names: Must contain the following entries: + - "phy_ref": phandle and specifier referring to the DPHY ref clock +- reg: the register range of the PHY controller +- #phy-cells: number of cells in PHY, as defined in + Documentation/devicetree/bindings/phy/phy-bindings.txt + this must be <0> + +Optional properties: +- power-domains: phandle to power domain + +Example: + mipi_dphy: mipi_dphy@30A0030 { + compatible = "mixel,imx8mq-mipi-dphy"; + clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>; + clock-names = "phy_ref"; + reg = <0x30A00300 0x100>; + power-domains = <&pd_mipi0>; + #phy-cells = <0>; + }; -- 2.20.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2019-03-07 10:05 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-03-07 10:05 [PATCH v4 0/3] Mixel DPHY support for i.MX8 Guido Günther 2019-03-07 10:05 ` Guido Günther 2019-03-07 10:05 ` [PATCH v4 1/3] dt-bindings: Add vendor prefix for Mixel Inc Guido Günther 2019-03-07 10:05 ` Guido Günther 2019-03-07 10:05 ` Guido Günther [this message] 2019-03-07 10:05 ` [PATCH v4 2/3] dt-bindings: phy: Add documentation for mixel dphy Guido Günther 2019-03-07 10:05 ` [PATCH v4 3/3] phy: Add driver for mixel dphy found on imx8 Guido Günther 2019-03-07 10:05 ` Guido Günther 2019-03-07 21:04 ` kbuild test robot 2019-03-07 21:04 ` kbuild test robot
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