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From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "Kulkarni, Vandita" <vandita.kulkarni@intel.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"Sharma,  Swati2" <swati2.sharma@intel.com>
Subject: RE: [PATCH v2 10/13] drm/i915: Add support for enabling link status and recovery
Date: Thu, 19 Nov 2020 11:22:36 +0000	[thread overview]
Message-ID: <33bee5c0316a4a299451ae4ab76cea5e@intel.com> (raw)
In-Reply-To: <20201101100657.12087-11-ankit.k.nautiyal@intel.com>



> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Sunday, November 1, 2020 3:37 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
> Kulkarni, Vandita <vandita.kulkarni@intel.com>; ville.syrjala@linux.intel.com;
> Sharma, Swati2 <swati2.sharma@intel.com>
> Subject: [PATCH v2 10/13] drm/i915: Add support for enabling link status and
> recovery
> 
> From: Swati Sharma <swati2.sharma@intel.com>
> 
> In this patch enables support for detecting link failures between PCON and HDMI
> sink in i915 driver. HDMI link loss indication to upstream DP source is indicated
> via IRQ_HPD. This is followed by reading of HDMI link configuration status
> (HDMI_TX_LINK_ACTIVE_STATUS).
> If the PCON → HDMI 2.1 link status is off; reinitiate frl link training to recover.
> Also, report HDMI FRL link error count range for each individual FRL active lane is
> indicated by DOWNSTREAM_HDMI_ERROR_STATUS_LN registers.
> 
> v2: Checked for dpcd read and write failures and added debug message.
> (Uma Shankar)

Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 56 +++++++++++++++++++++++--
>  1 file changed, 53 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9047b620c0d0..6177169c4401 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5932,6 +5932,31 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
>  	return link_ok;
>  }
> 
> +static void
> +intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp) {
> +	bool is_active;
> +	u8 buf = 0;
> +
> +	is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux);
> +	if (intel_dp->frl.is_trained && !is_active) {
> +		if (drm_dp_dpcd_readb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, &buf) < 0)
> +			return;
> +
> +		buf &=  ~DP_PCON_ENABLE_HDMI_LINK;
> +		if (drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0)
> +			return;
> +
> +		drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux,
> +&intel_dp->attached_connector->base);
> +
> +		intel_dp->frl.is_trained = false;
> +		intel_dp->frl.trained_rate_gbps = 0;
> +
> +		/* Restart FRL training or fall back to TMDS mode */
> +		intel_dp_check_frl_training(intel_dp);
> +	}
> +}
> +
>  static bool
>  intel_dp_needs_link_retrain(struct intel_dp *intel_dp)  { @@ -6297,7 +6322,7
> @@ intel_dp_hotplug(struct intel_encoder *encoder,
>  	return state;
>  }
> 
> -static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
> +static void intel_dp_check_device_service_irq(struct intel_dp
> +*intel_dp)
>  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	u8 val;
> @@ -6321,6 +6346,30 @@ static void intel_dp_check_service_irq(struct intel_dp
> *intel_dp)
>  		drm_dbg_kms(&i915->drm, "Sink specific irq unhandled\n");  }
> 
> +static void intel_dp_check_link_service_irq(struct intel_dp *intel_dp)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 val;
> +
> +	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
> +		return;
> +
> +	if (drm_dp_dpcd_readb(&intel_dp->aux,
> +			      DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &val) != 1 ||
> !val) {
> +		drm_dbg_kms(&i915->drm, "Error in reading link service irq
> vector\n");
> +		return;
> +	}
> +
> +	if (drm_dp_dpcd_writeb(&intel_dp->aux,
> +			       DP_LINK_SERVICE_IRQ_VECTOR_ESI0, val) != 1) {
> +		drm_dbg_kms(&i915->drm, "Error in writing link service irq
> vector\n");
> +		return;
> +	}
> +
> +	if (val & HDMI_LINK_STATUS_CHANGED)
> +		intel_dp_handle_hdmi_link_status_change(intel_dp);
> +}
> +
>  /*
>   * According to DP spec
>   * 5.1.2:
> @@ -6360,7 +6409,8 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
>  		return false;
>  	}
> 
> -	intel_dp_check_service_irq(intel_dp);
> +	intel_dp_check_device_service_irq(intel_dp);
> +	intel_dp_check_link_service_irq(intel_dp);
> 
>  	/* Handle CEC interrupts, if any */
>  	drm_dp_cec_irq(&intel_dp->aux);
> @@ -6794,7 +6844,7 @@ intel_dp_detect(struct drm_connector *connector,
>  	    to_intel_connector(connector)->detect_edid)
>  		status = connector_status_connected;
> 
> -	intel_dp_check_service_irq(intel_dp);
> +	intel_dp_check_device_service_irq(intel_dp);
> 
>  out:
>  	if (status != connector_status_connected && !intel_dp->is_mst)
> --
> 2.17.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 10/13] drm/i915: Add support for enabling link status and recovery
Date: Thu, 19 Nov 2020 11:22:36 +0000	[thread overview]
Message-ID: <33bee5c0316a4a299451ae4ab76cea5e@intel.com> (raw)
In-Reply-To: <20201101100657.12087-11-ankit.k.nautiyal@intel.com>



> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Sunday, November 1, 2020 3:37 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
> Kulkarni, Vandita <vandita.kulkarni@intel.com>; ville.syrjala@linux.intel.com;
> Sharma, Swati2 <swati2.sharma@intel.com>
> Subject: [PATCH v2 10/13] drm/i915: Add support for enabling link status and
> recovery
> 
> From: Swati Sharma <swati2.sharma@intel.com>
> 
> In this patch enables support for detecting link failures between PCON and HDMI
> sink in i915 driver. HDMI link loss indication to upstream DP source is indicated
> via IRQ_HPD. This is followed by reading of HDMI link configuration status
> (HDMI_TX_LINK_ACTIVE_STATUS).
> If the PCON → HDMI 2.1 link status is off; reinitiate frl link training to recover.
> Also, report HDMI FRL link error count range for each individual FRL active lane is
> indicated by DOWNSTREAM_HDMI_ERROR_STATUS_LN registers.
> 
> v2: Checked for dpcd read and write failures and added debug message.
> (Uma Shankar)

Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 56 +++++++++++++++++++++++--
>  1 file changed, 53 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9047b620c0d0..6177169c4401 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5932,6 +5932,31 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp)
>  	return link_ok;
>  }
> 
> +static void
> +intel_dp_handle_hdmi_link_status_change(struct intel_dp *intel_dp) {
> +	bool is_active;
> +	u8 buf = 0;
> +
> +	is_active = drm_dp_pcon_hdmi_link_active(&intel_dp->aux);
> +	if (intel_dp->frl.is_trained && !is_active) {
> +		if (drm_dp_dpcd_readb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, &buf) < 0)
> +			return;
> +
> +		buf &=  ~DP_PCON_ENABLE_HDMI_LINK;
> +		if (drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0)
> +			return;
> +
> +		drm_dp_pcon_hdmi_frl_link_error_count(&intel_dp->aux,
> +&intel_dp->attached_connector->base);
> +
> +		intel_dp->frl.is_trained = false;
> +		intel_dp->frl.trained_rate_gbps = 0;
> +
> +		/* Restart FRL training or fall back to TMDS mode */
> +		intel_dp_check_frl_training(intel_dp);
> +	}
> +}
> +
>  static bool
>  intel_dp_needs_link_retrain(struct intel_dp *intel_dp)  { @@ -6297,7 +6322,7
> @@ intel_dp_hotplug(struct intel_encoder *encoder,
>  	return state;
>  }
> 
> -static void intel_dp_check_service_irq(struct intel_dp *intel_dp)
> +static void intel_dp_check_device_service_irq(struct intel_dp
> +*intel_dp)
>  {
>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>  	u8 val;
> @@ -6321,6 +6346,30 @@ static void intel_dp_check_service_irq(struct intel_dp
> *intel_dp)
>  		drm_dbg_kms(&i915->drm, "Sink specific irq unhandled\n");  }
> 
> +static void intel_dp_check_link_service_irq(struct intel_dp *intel_dp)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 val;
> +
> +	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)
> +		return;
> +
> +	if (drm_dp_dpcd_readb(&intel_dp->aux,
> +			      DP_LINK_SERVICE_IRQ_VECTOR_ESI0, &val) != 1 ||
> !val) {
> +		drm_dbg_kms(&i915->drm, "Error in reading link service irq
> vector\n");
> +		return;
> +	}
> +
> +	if (drm_dp_dpcd_writeb(&intel_dp->aux,
> +			       DP_LINK_SERVICE_IRQ_VECTOR_ESI0, val) != 1) {
> +		drm_dbg_kms(&i915->drm, "Error in writing link service irq
> vector\n");
> +		return;
> +	}
> +
> +	if (val & HDMI_LINK_STATUS_CHANGED)
> +		intel_dp_handle_hdmi_link_status_change(intel_dp);
> +}
> +
>  /*
>   * According to DP spec
>   * 5.1.2:
> @@ -6360,7 +6409,8 @@ intel_dp_short_pulse(struct intel_dp *intel_dp)
>  		return false;
>  	}
> 
> -	intel_dp_check_service_irq(intel_dp);
> +	intel_dp_check_device_service_irq(intel_dp);
> +	intel_dp_check_link_service_irq(intel_dp);
> 
>  	/* Handle CEC interrupts, if any */
>  	drm_dp_cec_irq(&intel_dp->aux);
> @@ -6794,7 +6844,7 @@ intel_dp_detect(struct drm_connector *connector,
>  	    to_intel_connector(connector)->detect_edid)
>  		status = connector_status_connected;
> 
> -	intel_dp_check_service_irq(intel_dp);
> +	intel_dp_check_device_service_irq(intel_dp);
> 
>  out:
>  	if (status != connector_status_connected && !intel_dp->is_mst)
> --
> 2.17.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-11-19 11:22 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-01 10:06 [PATCH v2 00/13] Add support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-11-01 10:06 ` [Intel-gfx] " Ankit Nautiyal
2020-11-01 10:06 ` [PATCH v2 01/13] drm/edid: Add additional HFVSDB fields for HDMI2.1 Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19  6:12   ` Shankar, Uma
2020-11-19  6:12     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 02/13] drm/edid: Parse MAX_FRL field from HFVSDB block Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19  6:13   ` Shankar, Uma
2020-11-19  6:13     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 03/13] drm/edid: Parse DSC1.2 cap fields " Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19  6:27   ` Shankar, Uma
2020-11-19  6:27     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 04/13] drm/dp_helper: Add Helpers for FRL Link Training support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19  7:47   ` Shankar, Uma
2020-11-19  7:47     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 05/13] drm/dp_helper: Add support for link failure detection Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19  7:52   ` Shankar, Uma
2020-11-19  7:52     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 06/13] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19  8:00   ` Shankar, Uma
2020-11-19  8:00     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 07/13] drm/i915: Capture max frl rate for PCON in dfp cap structure Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19 10:07   ` Shankar, Uma
2020-11-19 10:07     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 08/13] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19 10:23   ` Shankar, Uma
2020-11-19 10:23     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 09/13] drm/i915: Check for FRL training before DP Link training Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19 11:19   ` Shankar, Uma
2020-11-19 11:19     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 10/13] drm/i915: Add support for enabling link status and recovery Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19 11:22   ` Shankar, Uma [this message]
2020-11-19 11:22     ` Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 11/13] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-19 11:29   ` Shankar, Uma
2020-11-19 11:29     ` [Intel-gfx] " Shankar, Uma
2020-11-01 10:06 ` [PATCH v2 12/13] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1 Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-25 20:28   ` Shankar, Uma
2020-11-25 20:28     ` [Intel-gfx] " Shankar, Uma
2020-12-02 14:13     ` Nautiyal, Ankit K
2020-12-02 14:13       ` [Intel-gfx] " Nautiyal, Ankit K
2020-11-01 10:06 ` [PATCH v2 13/13] drm/i915: Configure PCON for DSC1.1 to DSC1.2 encoding Ankit Nautiyal
2020-11-01 10:06   ` [Intel-gfx] " Ankit Nautiyal
2020-11-25 20:45   ` Shankar, Uma
2020-11-25 20:45     ` [Intel-gfx] " Shankar, Uma
2020-12-02 14:19     ` Nautiyal, Ankit K
2020-12-02 14:19       ` [Intel-gfx] " Nautiyal, Ankit K
2020-11-01 10:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for DP-HDMI2.1 PCON (rev4) Patchwork
2020-11-01 10:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-01 11:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-01 12:43 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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