* 答复: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
2022-03-21 5:56 [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost Lu Gao
@ 2022-04-25 1:34 ` Gao, Lu
2022-05-10 2:38 ` Gao, Lu
2022-05-31 10:08 ` Philippe Mathieu-Daudé via
2 siblings, 0 replies; 6+ messages in thread
From: Gao, Lu @ 2022-04-25 1:34 UTC (permalink / raw)
To: Gao, Lu, qemu-devel
Cc: Bin Meng, Wen, Jianxian, Philippe Mathieu-Daudé,
open list:SD (Secure Card)
ping
https://patchew.org/QEMU/20220321055618.4026-1-lu.gao@verisilicon.com/
Please help review the patch.
Thanks.
B.R.
-----邮件原件-----
发件人: Gao, Lu
发送时间: Monday, March 21, 2022 1:56 PM
收件人: qemu-devel@nongnu.org
抄送: Gao, Lu; Wen, Jianxian; Philippe Mathieu-Daudé; Bin Meng; open list:SD (Secure Card)
主题: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
in register write, but it is needed in SDMA transfer. e.g. it will be
used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
Missing this field will cause wrong operation for different SDMA Buffer
Boundary settings.
Signed-off-by: Lu Gao <lu.gao@verisilicon.com>
Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
---
hw/sd/sdhci.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index e0bbc90344..350ceb487d 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -321,6 +321,8 @@ static void sdhci_poweron_reset(DeviceState *dev)
static void sdhci_data_transfer(void *opaque);
+#define BLOCK_SIZE_MASK (4 * KiB - 1)
+
static void sdhci_send_command(SDHCIState *s)
{
SDRequest request;
@@ -371,7 +373,8 @@ static void sdhci_send_command(SDHCIState *s)
sdhci_update_irq(s);
- if (!timeout && s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
+ if (!timeout && (s->blksize & BLOCK_SIZE_MASK) &&
+ (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
s->data_count = 0;
sdhci_data_transfer(s);
}
@@ -406,7 +409,6 @@ static void sdhci_end_transfer(SDHCIState *s)
/*
* Programmed i/o data transfer
*/
-#define BLOCK_SIZE_MASK (4 * KiB - 1)
/* Fill host controller's read buffer with BLKSIZE bytes of data from card */
static void sdhci_read_block_from_card(SDHCIState *s)
@@ -1137,7 +1139,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
s->sdmasysad = (s->sdmasysad & mask) | value;
MASKED_WRITE(s->sdmasysad, mask, value);
/* Writing to last byte of sdmasysad might trigger transfer */
- if (!(mask & 0xFF000000) && s->blkcnt && s->blksize &&
+ if (!(mask & 0xFF000000) && s->blkcnt &&
+ (s->blksize & BLOCK_SIZE_MASK) &&
SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) {
if (s->trnmod & SDHC_TRNS_MULTI) {
sdhci_sdma_transfer_multi_blocks(s);
@@ -1151,7 +1154,11 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
if (!TRANSFERRING_DATA(s->prnsts)) {
uint16_t blksize = s->blksize;
- MASKED_WRITE(s->blksize, mask, extract32(value, 0, 12));
+ /*
+ * [14:12] SDMA Buffer Boundary
+ * [11:00] Transfer Block Size
+ */
+ MASKED_WRITE(s->blksize, mask, extract32(value, 0, 15));
MASKED_WRITE(s->blkcnt, mask >> 16, value >> 16);
/* Limit block size to the maximum buffer size */
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* 答复: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
2022-03-21 5:56 [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost Lu Gao
2022-04-25 1:34 ` 答复: " Gao, Lu
@ 2022-05-10 2:38 ` Gao, Lu
2022-05-31 10:08 ` Philippe Mathieu-Daudé via
2 siblings, 0 replies; 6+ messages in thread
From: Gao, Lu @ 2022-05-10 2:38 UTC (permalink / raw)
To: qemu-devel, Philippe Mathieu-Daudé, Bin Meng
Cc: Wen, Jianxian, open list:SD (Secure Card)
Ping
https://patchew.org/QEMU/20220321055618.4026-1-lu.gao@verisilicon.com/
Please help review the patch.
Thanks.
B.R.
-----邮件原件-----
发件人: Gao, Lu
发送时间: Monday, April 25, 2022 9:35 AM
收件人: Gao, Lu; qemu-devel@nongnu.org
抄送: Wen, Jianxian; Philippe Mathieu-Daudé; Bin Meng; open list:SD (Secure Card)
主题: 答复: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
ping
https://patchew.org/QEMU/20220321055618.4026-1-lu.gao@verisilicon.com/
Please help review the patch.
Thanks.
B.R.
-----邮件原件-----
发件人: Gao, Lu
发送时间: Monday, March 21, 2022 1:56 PM
收件人: qemu-devel@nongnu.org
抄送: Gao, Lu; Wen, Jianxian; Philippe Mathieu-Daudé; Bin Meng; open list:SD (Secure Card)
主题: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
in register write, but it is needed in SDMA transfer. e.g. it will be
used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
Missing this field will cause wrong operation for different SDMA Buffer
Boundary settings.
Signed-off-by: Lu Gao <lu.gao@verisilicon.com>
Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
---
hw/sd/sdhci.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index e0bbc90344..350ceb487d 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -321,6 +321,8 @@ static void sdhci_poweron_reset(DeviceState *dev)
static void sdhci_data_transfer(void *opaque);
+#define BLOCK_SIZE_MASK (4 * KiB - 1)
+
static void sdhci_send_command(SDHCIState *s)
{
SDRequest request;
@@ -371,7 +373,8 @@ static void sdhci_send_command(SDHCIState *s)
sdhci_update_irq(s);
- if (!timeout && s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
+ if (!timeout && (s->blksize & BLOCK_SIZE_MASK) &&
+ (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
s->data_count = 0;
sdhci_data_transfer(s);
}
@@ -406,7 +409,6 @@ static void sdhci_end_transfer(SDHCIState *s)
/*
* Programmed i/o data transfer
*/
-#define BLOCK_SIZE_MASK (4 * KiB - 1)
/* Fill host controller's read buffer with BLKSIZE bytes of data from card */
static void sdhci_read_block_from_card(SDHCIState *s)
@@ -1137,7 +1139,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
s->sdmasysad = (s->sdmasysad & mask) | value;
MASKED_WRITE(s->sdmasysad, mask, value);
/* Writing to last byte of sdmasysad might trigger transfer */
- if (!(mask & 0xFF000000) && s->blkcnt && s->blksize &&
+ if (!(mask & 0xFF000000) && s->blkcnt &&
+ (s->blksize & BLOCK_SIZE_MASK) &&
SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) {
if (s->trnmod & SDHC_TRNS_MULTI) {
sdhci_sdma_transfer_multi_blocks(s);
@@ -1151,7 +1154,11 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
if (!TRANSFERRING_DATA(s->prnsts)) {
uint16_t blksize = s->blksize;
- MASKED_WRITE(s->blksize, mask, extract32(value, 0, 12));
+ /*
+ * [14:12] SDMA Buffer Boundary
+ * [11:00] Transfer Block Size
+ */
+ MASKED_WRITE(s->blksize, mask, extract32(value, 0, 15));
MASKED_WRITE(s->blkcnt, mask >> 16, value >> 16);
/* Limit block size to the maximum buffer size */
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
2022-03-21 5:56 [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost Lu Gao
2022-04-25 1:34 ` 答复: " Gao, Lu
2022-05-10 2:38 ` Gao, Lu
@ 2022-05-31 10:08 ` Philippe Mathieu-Daudé via
2022-12-22 8:54 ` Gao, Lu
2 siblings, 1 reply; 6+ messages in thread
From: Philippe Mathieu-Daudé via @ 2022-05-31 10:08 UTC (permalink / raw)
To: Lu Gao, qemu-devel
Cc: Jianxian Wen, Bin Meng, open list:SD (Secure Card),
Alexander Bulekov, Prasad J Pandit
On 21/3/22 06:56, Lu Gao wrote:
> Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
> in register write, but it is needed in SDMA transfer. e.g. it will be
> used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
>
> Missing this field will cause wrong operation for different SDMA Buffer
> Boundary settings.
Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller")
Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Lu Gao <lu.gao@verisilicon.com>
> Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
> ---
> hw/sd/sdhci.c | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index e0bbc90344..350ceb487d 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -321,6 +321,8 @@ static void sdhci_poweron_reset(DeviceState *dev)
>
> static void sdhci_data_transfer(void *opaque);
>
> +#define BLOCK_SIZE_MASK (4 * KiB - 1)
> +
> static void sdhci_send_command(SDHCIState *s)
> {
> SDRequest request;
> @@ -371,7 +373,8 @@ static void sdhci_send_command(SDHCIState *s)
>
> sdhci_update_irq(s);
>
> - if (!timeout && s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
> + if (!timeout && (s->blksize & BLOCK_SIZE_MASK) &&
> + (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
> s->data_count = 0;
> sdhci_data_transfer(s);
> }
> @@ -406,7 +409,6 @@ static void sdhci_end_transfer(SDHCIState *s)
> /*
> * Programmed i/o data transfer
> */
> -#define BLOCK_SIZE_MASK (4 * KiB - 1)
>
> /* Fill host controller's read buffer with BLKSIZE bytes of data from card */
> static void sdhci_read_block_from_card(SDHCIState *s)
> @@ -1137,7 +1139,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
> s->sdmasysad = (s->sdmasysad & mask) | value;
> MASKED_WRITE(s->sdmasysad, mask, value);
> /* Writing to last byte of sdmasysad might trigger transfer */
> - if (!(mask & 0xFF000000) && s->blkcnt && s->blksize &&
> + if (!(mask & 0xFF000000) && s->blkcnt &&
> + (s->blksize & BLOCK_SIZE_MASK) &&
> SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) {
> if (s->trnmod & SDHC_TRNS_MULTI) {
> sdhci_sdma_transfer_multi_blocks(s);
> @@ -1151,7 +1154,11 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
> if (!TRANSFERRING_DATA(s->prnsts)) {
> uint16_t blksize = s->blksize;
>
> - MASKED_WRITE(s->blksize, mask, extract32(value, 0, 12));
> + /*
> + * [14:12] SDMA Buffer Boundary
> + * [11:00] Transfer Block Size
> + */
> + MASKED_WRITE(s->blksize, mask, extract32(value, 0, 15));
> MASKED_WRITE(s->blkcnt, mask >> 16, value >> 16);
>
> /* Limit block size to the maximum buffer size */
^ permalink raw reply [flat|nested] 6+ messages in thread* RE: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
2022-05-31 10:08 ` Philippe Mathieu-Daudé via
@ 2022-12-22 8:54 ` Gao, Lu
2023-09-22 10:29 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 6+ messages in thread
From: Gao, Lu @ 2022-12-22 8:54 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Wen, Jianxian, Bin Meng, open list:SD (Secure Card),
Alexander Bulekov, Prasad J Pandit
Hello,
Just want to check whether we can have it merged? Any other comments?
Thanks a lot!
B.R.
-----Original Message-----
From: Philippe Mathieu-Daudé [mailto:philippe.mathieu.daude@gmail.com] On Behalf Of Philippe Mathieu-Daudé
Sent: Tuesday, May 31, 2022 6:09 PM
To: Gao, Lu; qemu-devel@nongnu.org
Cc: Wen, Jianxian; Bin Meng; open list:SD (Secure Card); Alexander Bulekov; Prasad J Pandit
Subject: Re: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
On 21/3/22 06:56, Lu Gao wrote:
> Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
> in register write, but it is needed in SDMA transfer. e.g. it will be
> used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
>
> Missing this field will cause wrong operation for different SDMA Buffer
> Boundary settings.
Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller")
Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Lu Gao <lu.gao@verisilicon.com>
> Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
> ---
> hw/sd/sdhci.c | 15 +++++++++++----
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
> index e0bbc90344..350ceb487d 100644
> --- a/hw/sd/sdhci.c
> +++ b/hw/sd/sdhci.c
> @@ -321,6 +321,8 @@ static void sdhci_poweron_reset(DeviceState *dev)
>
> static void sdhci_data_transfer(void *opaque);
>
> +#define BLOCK_SIZE_MASK (4 * KiB - 1)
> +
> static void sdhci_send_command(SDHCIState *s)
> {
> SDRequest request;
> @@ -371,7 +373,8 @@ static void sdhci_send_command(SDHCIState *s)
>
> sdhci_update_irq(s);
>
> - if (!timeout && s->blksize && (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
> + if (!timeout && (s->blksize & BLOCK_SIZE_MASK) &&
> + (s->cmdreg & SDHC_CMD_DATA_PRESENT)) {
> s->data_count = 0;
> sdhci_data_transfer(s);
> }
> @@ -406,7 +409,6 @@ static void sdhci_end_transfer(SDHCIState *s)
> /*
> * Programmed i/o data transfer
> */
> -#define BLOCK_SIZE_MASK (4 * KiB - 1)
>
> /* Fill host controller's read buffer with BLKSIZE bytes of data from card */
> static void sdhci_read_block_from_card(SDHCIState *s)
> @@ -1137,7 +1139,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
> s->sdmasysad = (s->sdmasysad & mask) | value;
> MASKED_WRITE(s->sdmasysad, mask, value);
> /* Writing to last byte of sdmasysad might trigger transfer */
> - if (!(mask & 0xFF000000) && s->blkcnt && s->blksize &&
> + if (!(mask & 0xFF000000) && s->blkcnt &&
> + (s->blksize & BLOCK_SIZE_MASK) &&
> SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) {
> if (s->trnmod & SDHC_TRNS_MULTI) {
> sdhci_sdma_transfer_multi_blocks(s);
> @@ -1151,7 +1154,11 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size)
> if (!TRANSFERRING_DATA(s->prnsts)) {
> uint16_t blksize = s->blksize;
>
> - MASKED_WRITE(s->blksize, mask, extract32(value, 0, 12));
> + /*
> + * [14:12] SDMA Buffer Boundary
> + * [11:00] Transfer Block Size
> + */
> + MASKED_WRITE(s->blksize, mask, extract32(value, 0, 15));
> MASKED_WRITE(s->blkcnt, mask >> 16, value >> 16);
>
> /* Limit block size to the maximum buffer size */
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
2022-12-22 8:54 ` Gao, Lu
@ 2023-09-22 10:29 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-09-22 10:29 UTC (permalink / raw)
To: Gao, Lu, qemu-devel
Cc: Wen, Jianxian, Bin Meng, open list:SD (Secure Card),
Alexander Bulekov, Prasad J Pandit
On 22/12/22 09:54, Gao, Lu wrote:
> Hello,
>
> Just want to check whether we can have it merged? Any other comments?
Oops sorry, I see I had this patch tagged for a merge request
but I lost track of it (likely when switching emails).
Patch queued!
>
> Thanks a lot!
> B.R.
>
> -----Original Message-----
> From: Philippe Mathieu-Daudé [mailto:philippe.mathieu.daude@gmail.com] On Behalf Of Philippe Mathieu-Daudé
> Sent: Tuesday, May 31, 2022 6:09 PM
> To: Gao, Lu; qemu-devel@nongnu.org
> Cc: Wen, Jianxian; Bin Meng; open list:SD (Secure Card); Alexander Bulekov; Prasad J Pandit
> Subject: Re: [PATCH] hw/sd/sdhci: Block Size Register bits [14:12] is lost
>
> On 21/3/22 06:56, Lu Gao wrote:
>> Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
>> in register write, but it is needed in SDMA transfer. e.g. it will be
>> used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
>>
>> Missing this field will cause wrong operation for different SDMA Buffer
>> Boundary settings.
>
> Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller")
> Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field")
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
>> Signed-off-by: Lu Gao <lu.gao@verisilicon.com>
>> Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com>
>> ---
>> hw/sd/sdhci.c | 15 +++++++++++----
>> 1 file changed, 11 insertions(+), 4 deletions(-)
^ permalink raw reply [flat|nested] 6+ messages in thread