* [PATCH 0/3] Add GPADC for Allwinner H616
@ 2024-04-17 17:04 Chris Morgan
2024-04-17 17:04 ` [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC Chris Morgan
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Chris Morgan @ 2024-04-17 17:04 UTC (permalink / raw)
To: linux-sunxi
Cc: linux-clk, devicetree, linux-iio, p.zabel, sboyd, mturquette,
samuel, jernej.skrabec, wens, conor+dt, krzk+dt, robh,
Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add support for the general purpose analog-to-digital converter (GPADC)
for the Allwinner H616 SoC.
Chris Morgan (3):
clk: sunxi-ng: h616: Add clock/reset for GPADC
dt-bindings: iio: adc: Add GPADC for Allwinner H616
arm64: dts: allwinner: h616: Add GPADC device node
.../bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml | 9 +++++++--
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 11 +++++++++++
drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 5 +++++
drivers/clk/sunxi-ng/ccu-sun50i-h616.h | 2 +-
include/dt-bindings/clock/sun50i-h616-ccu.h | 1 +
include/dt-bindings/reset/sun50i-h616-ccu.h | 1 +
6 files changed, 26 insertions(+), 3 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC
2024-04-17 17:04 [PATCH 0/3] Add GPADC for Allwinner H616 Chris Morgan
@ 2024-04-17 17:04 ` Chris Morgan
2024-04-17 20:26 ` Jernej Škrabec
2024-04-17 22:55 ` Andre Przywara
2024-04-17 17:04 ` [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616 Chris Morgan
2024-04-17 17:04 ` [PATCH 3/3] arm64: dts: allwinner: h616: Add GPADC device node Chris Morgan
2 siblings, 2 replies; 12+ messages in thread
From: Chris Morgan @ 2024-04-17 17:04 UTC (permalink / raw)
To: linux-sunxi
Cc: linux-clk, devicetree, linux-iio, p.zabel, sboyd, mturquette,
samuel, jernej.skrabec, wens, conor+dt, krzk+dt, robh,
Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add the GPADC required clock and reset which is used for the onboard
GPADC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 5 +++++
drivers/clk/sunxi-ng/ccu-sun50i-h616.h | 2 +-
include/dt-bindings/clock/sun50i-h616-ccu.h | 1 +
include/dt-bindings/reset/sun50i-h616-ccu.h | 1 +
4 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
index 21e918582aa5..3646be2b88ab 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
@@ -489,6 +489,8 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(ts_clk, "ts", ts_parents, 0x9b0,
static SUNXI_CCU_GATE(bus_ts_clk, "bus-ts", "ahb3", 0x9bc, BIT(0), 0);
+static SUNXI_CCU_GATE(bus_gpadc_clk, "bus-gpadc", "apb1", 0x9ec, BIT(0), 0);
+
static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb1", 0x9fc, BIT(0), 0);
static const char * const audio_parents[] = { "pll-audio-1x", "pll-audio-2x",
@@ -807,6 +809,7 @@ static struct ccu_common *sun50i_h616_ccu_clks[] = {
&bus_emac1_clk.common,
&ts_clk.common,
&bus_ts_clk.common,
+ &bus_gpadc_clk.common,
&bus_ths_clk.common,
&spdif_clk.common,
&bus_spdif_clk.common,
@@ -940,6 +943,7 @@ static struct clk_hw_onecell_data sun50i_h616_hw_clks = {
[CLK_BUS_EMAC1] = &bus_emac1_clk.common.hw,
[CLK_TS] = &ts_clk.common.hw,
[CLK_BUS_TS] = &bus_ts_clk.common.hw,
+ [CLK_BUS_GPADC] = &bus_gpadc_clk.common.hw,
[CLK_BUS_THS] = &bus_ths_clk.common.hw,
[CLK_SPDIF] = &spdif_clk.common.hw,
[CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw,
@@ -1021,6 +1025,7 @@ static struct ccu_reset_map sun50i_h616_ccu_resets[] = {
[RST_BUS_EMAC0] = { 0x97c, BIT(16) },
[RST_BUS_EMAC1] = { 0x97c, BIT(17) },
[RST_BUS_TS] = { 0x9bc, BIT(16) },
+ [RST_BUS_GPADC] = { 0x9ec, BIT(16) },
[RST_BUS_THS] = { 0x9fc, BIT(16) },
[RST_BUS_SPDIF] = { 0xa2c, BIT(16) },
[RST_BUS_DMIC] = { 0xa4c, BIT(16) },
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
index fdd2f4d5103f..a75803b49f6a 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
@@ -51,6 +51,6 @@
#define CLK_BUS_DRAM 56
-#define CLK_NUMBER (CLK_PLL_SYSTEM_32K + 1)
+#define CLK_NUMBER (CLK_BUS_GPADC + 1)
#endif /* _CCU_SUN50I_H616_H_ */
diff --git a/include/dt-bindings/clock/sun50i-h616-ccu.h b/include/dt-bindings/clock/sun50i-h616-ccu.h
index 6f8f01e67628..ebb146ab7f8c 100644
--- a/include/dt-bindings/clock/sun50i-h616-ccu.h
+++ b/include/dt-bindings/clock/sun50i-h616-ccu.h
@@ -112,5 +112,6 @@
#define CLK_HDCP 126
#define CLK_BUS_HDCP 127
#define CLK_PLL_SYSTEM_32K 128
+#define CLK_BUS_GPADC 129
#endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
diff --git a/include/dt-bindings/reset/sun50i-h616-ccu.h b/include/dt-bindings/reset/sun50i-h616-ccu.h
index 1bd8bb0a11be..ed177c04afdd 100644
--- a/include/dt-bindings/reset/sun50i-h616-ccu.h
+++ b/include/dt-bindings/reset/sun50i-h616-ccu.h
@@ -66,5 +66,6 @@
#define RST_BUS_TVE0 57
#define RST_BUS_HDCP 58
#define RST_BUS_KEYADC 59
+#define RST_BUS_GPADC 60
#endif /* _DT_BINDINGS_RESET_SUN50I_H616_H_ */
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616
2024-04-17 17:04 [PATCH 0/3] Add GPADC for Allwinner H616 Chris Morgan
2024-04-17 17:04 ` [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC Chris Morgan
@ 2024-04-17 17:04 ` Chris Morgan
2024-04-17 22:49 ` Andre Przywara
2024-04-18 15:17 ` Rob Herring
2024-04-17 17:04 ` [PATCH 3/3] arm64: dts: allwinner: h616: Add GPADC device node Chris Morgan
2 siblings, 2 replies; 12+ messages in thread
From: Chris Morgan @ 2024-04-17 17:04 UTC (permalink / raw)
To: linux-sunxi
Cc: linux-clk, devicetree, linux-iio, p.zabel, sboyd, mturquette,
samuel, jernej.skrabec, wens, conor+dt, krzk+dt, robh,
Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add support for the GPADC for the Allwinner H616. It is identical to
the existing ADC for the D1/T113s/R329/T507 SoCs.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
.../bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
index 7ef46c90ebc8..da605a051b94 100644
--- a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
@@ -11,8 +11,13 @@ maintainers:
properties:
compatible:
- enum:
- - allwinner,sun20i-d1-gpadc
+ oneOf:
+ - enum:
+ - allwinner,sun20i-d1-gpadc
+ - items:
+ - enum:
+ - allwinner,sun50i-h616-gpadc
+ - const: allwinner,sun20i-d1-gpadc
"#io-channel-cells":
const: 1
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 3/3] arm64: dts: allwinner: h616: Add GPADC device node
2024-04-17 17:04 [PATCH 0/3] Add GPADC for Allwinner H616 Chris Morgan
2024-04-17 17:04 ` [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC Chris Morgan
2024-04-17 17:04 ` [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616 Chris Morgan
@ 2024-04-17 17:04 ` Chris Morgan
2024-04-17 22:58 ` Andre Przywara
2 siblings, 1 reply; 12+ messages in thread
From: Chris Morgan @ 2024-04-17 17:04 UTC (permalink / raw)
To: linux-sunxi
Cc: linux-clk, devicetree, linux-iio, p.zabel, sboyd, mturquette,
samuel, jernej.skrabec, wens, conor+dt, krzk+dt, robh,
Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
The H616 has a GPADC controller which is identical to the one found on
the D1/T113s/R329/T507 SoCs.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index b2e85e52d1a1..3da37948b89f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -581,6 +581,17 @@ spdif: spdif@5093000 {
status = "disabled";
};
+ gpadc: adc@5070000 {
+ compatible = "allwinner,sun50i-h616-gpadc",
+ "allwinner,sun20i-d1-gpadc";
+ reg = <0x05070000 0x400>;
+ clocks = <&ccu CLK_BUS_GPADC>;
+ resets = <&ccu RST_BUS_GPADC>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ #io-channel-cells = <1>;
+ };
+
ths: thermal-sensor@5070400 {
compatible = "allwinner,sun50i-h616-ths";
reg = <0x05070400 0x400>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC
2024-04-17 17:04 ` [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC Chris Morgan
@ 2024-04-17 20:26 ` Jernej Škrabec
2024-04-17 22:55 ` Andre Przywara
1 sibling, 0 replies; 12+ messages in thread
From: Jernej Škrabec @ 2024-04-17 20:26 UTC (permalink / raw)
To: linux-sunxi, Chris Morgan
Cc: linux-clk, devicetree, linux-iio, p.zabel, sboyd, mturquette,
samuel, wens, conor+dt, krzk+dt, robh, Chris Morgan
Dne sreda, 17. april 2024 ob 19:04:21 GMT +2 je Chris Morgan napisal(a):
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add the GPADC required clock and reset which is used for the onboard
> GPADC.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
> ---
> drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 5 +++++
> drivers/clk/sunxi-ng/ccu-sun50i-h616.h | 2 +-
> include/dt-bindings/clock/sun50i-h616-ccu.h | 1 +
> include/dt-bindings/reset/sun50i-h616-ccu.h | 1 +
> 4 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> index 21e918582aa5..3646be2b88ab 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> @@ -489,6 +489,8 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(ts_clk, "ts", ts_parents, 0x9b0,
>
> static SUNXI_CCU_GATE(bus_ts_clk, "bus-ts", "ahb3", 0x9bc, BIT(0), 0);
>
> +static SUNXI_CCU_GATE(bus_gpadc_clk, "bus-gpadc", "apb1", 0x9ec, BIT(0), 0);
> +
> static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb1", 0x9fc, BIT(0), 0);
>
> static const char * const audio_parents[] = { "pll-audio-1x", "pll-audio-2x",
> @@ -807,6 +809,7 @@ static struct ccu_common *sun50i_h616_ccu_clks[] = {
> &bus_emac1_clk.common,
> &ts_clk.common,
> &bus_ts_clk.common,
> + &bus_gpadc_clk.common,
> &bus_ths_clk.common,
> &spdif_clk.common,
> &bus_spdif_clk.common,
> @@ -940,6 +943,7 @@ static struct clk_hw_onecell_data sun50i_h616_hw_clks = {
> [CLK_BUS_EMAC1] = &bus_emac1_clk.common.hw,
> [CLK_TS] = &ts_clk.common.hw,
> [CLK_BUS_TS] = &bus_ts_clk.common.hw,
> + [CLK_BUS_GPADC] = &bus_gpadc_clk.common.hw,
> [CLK_BUS_THS] = &bus_ths_clk.common.hw,
> [CLK_SPDIF] = &spdif_clk.common.hw,
> [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw,
> @@ -1021,6 +1025,7 @@ static struct ccu_reset_map sun50i_h616_ccu_resets[] = {
> [RST_BUS_EMAC0] = { 0x97c, BIT(16) },
> [RST_BUS_EMAC1] = { 0x97c, BIT(17) },
> [RST_BUS_TS] = { 0x9bc, BIT(16) },
> + [RST_BUS_GPADC] = { 0x9ec, BIT(16) },
> [RST_BUS_THS] = { 0x9fc, BIT(16) },
> [RST_BUS_SPDIF] = { 0xa2c, BIT(16) },
> [RST_BUS_DMIC] = { 0xa4c, BIT(16) },
> diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
> index fdd2f4d5103f..a75803b49f6a 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
> +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
> @@ -51,6 +51,6 @@
>
> #define CLK_BUS_DRAM 56
>
> -#define CLK_NUMBER (CLK_PLL_SYSTEM_32K + 1)
> +#define CLK_NUMBER (CLK_BUS_GPADC + 1)
>
> #endif /* _CCU_SUN50I_H616_H_ */
> diff --git a/include/dt-bindings/clock/sun50i-h616-ccu.h b/include/dt-bindings/clock/sun50i-h616-ccu.h
> index 6f8f01e67628..ebb146ab7f8c 100644
> --- a/include/dt-bindings/clock/sun50i-h616-ccu.h
> +++ b/include/dt-bindings/clock/sun50i-h616-ccu.h
> @@ -112,5 +112,6 @@
> #define CLK_HDCP 126
> #define CLK_BUS_HDCP 127
> #define CLK_PLL_SYSTEM_32K 128
> +#define CLK_BUS_GPADC 129
>
> #endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
> diff --git a/include/dt-bindings/reset/sun50i-h616-ccu.h b/include/dt-bindings/reset/sun50i-h616-ccu.h
> index 1bd8bb0a11be..ed177c04afdd 100644
> --- a/include/dt-bindings/reset/sun50i-h616-ccu.h
> +++ b/include/dt-bindings/reset/sun50i-h616-ccu.h
> @@ -66,5 +66,6 @@
> #define RST_BUS_TVE0 57
> #define RST_BUS_HDCP 58
> #define RST_BUS_KEYADC 59
> +#define RST_BUS_GPADC 60
>
> #endif /* _DT_BINDINGS_RESET_SUN50I_H616_H_ */
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616
2024-04-17 17:04 ` [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616 Chris Morgan
@ 2024-04-17 22:49 ` Andre Przywara
2024-04-18 15:16 ` Rob Herring
2024-04-18 15:17 ` Rob Herring
1 sibling, 1 reply; 12+ messages in thread
From: Andre Przywara @ 2024-04-17 22:49 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-sunxi, linux-clk, devicetree, linux-iio, p.zabel, sboyd,
mturquette, samuel, jernej.skrabec, wens, conor+dt, krzk+dt,
robh, Chris Morgan
On Wed, 17 Apr 2024 12:04:22 -0500
Chris Morgan <macroalpha82@gmail.com> wrote:
Hi,
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add support for the GPADC for the Allwinner H616. It is identical to
> the existing ADC for the D1/T113s/R329/T507 SoCs.
The H616 is using the same die as the T507 and the H700, and since the
T507 is already mentioned in the commit message for the original
binding, I wonder if we actually need a new compatible?
I guess we follow the usual approach and provide this new
per-SoC compatible string, since the D1 and H616 SoCs are quite
different? Just wanted to point this out...
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> .../bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
> index 7ef46c90ebc8..da605a051b94 100644
> --- a/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml
> @@ -11,8 +11,13 @@ maintainers:
>
> properties:
> compatible:
> - enum:
> - - allwinner,sun20i-d1-gpadc
> + oneOf:
> + - enum:
> + - allwinner,sun20i-d1-gpadc
> + - items:
> + - enum:
> + - allwinner,sun50i-h616-gpadc
> + - const: allwinner,sun20i-d1-gpadc
I think a more compact way to write this would be:
oneOf:
- const: allwinner,sun20i-d1-gpadc
- items:
- const: allwinner,sun50i-h616-gpadc
- const: allwinner,sun20i-d1-gpadc
In general: the description in the T507 manual looks the same as in the
D1 manual, just with the former having 4, and the latter 2 channels. If
I understand correctly, this difference is not modelled in the binding
(or the Linux driver, fwiw), so using the compatible fallback looks
good.
Cheers,
Andre
>
> "#io-channel-cells":
> const: 1
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC
2024-04-17 17:04 ` [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC Chris Morgan
2024-04-17 20:26 ` Jernej Škrabec
@ 2024-04-17 22:55 ` Andre Przywara
1 sibling, 0 replies; 12+ messages in thread
From: Andre Przywara @ 2024-04-17 22:55 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-sunxi, linux-clk, devicetree, linux-iio, p.zabel, sboyd,
mturquette, samuel, jernej.skrabec, wens, conor+dt, krzk+dt,
robh, Chris Morgan
On Wed, 17 Apr 2024 12:04:21 -0500
Chris Morgan <macroalpha82@gmail.com> wrote:
Hi,
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add the GPADC required clock and reset which is used for the onboard
> GPADC.
Compared the register offsets, bit numbers and parent clock against the
manual: they match. Also the new clock numbers look fine.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> drivers/clk/sunxi-ng/ccu-sun50i-h616.c | 5 +++++
> drivers/clk/sunxi-ng/ccu-sun50i-h616.h | 2 +-
> include/dt-bindings/clock/sun50i-h616-ccu.h | 1 +
> include/dt-bindings/reset/sun50i-h616-ccu.h | 1 +
> 4 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> index 21e918582aa5..3646be2b88ab 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.c
> @@ -489,6 +489,8 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(ts_clk, "ts", ts_parents, 0x9b0,
>
> static SUNXI_CCU_GATE(bus_ts_clk, "bus-ts", "ahb3", 0x9bc, BIT(0), 0);
>
> +static SUNXI_CCU_GATE(bus_gpadc_clk, "bus-gpadc", "apb1", 0x9ec, BIT(0), 0);
> +
> static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb1", 0x9fc, BIT(0), 0);
>
> static const char * const audio_parents[] = { "pll-audio-1x", "pll-audio-2x",
> @@ -807,6 +809,7 @@ static struct ccu_common *sun50i_h616_ccu_clks[] = {
> &bus_emac1_clk.common,
> &ts_clk.common,
> &bus_ts_clk.common,
> + &bus_gpadc_clk.common,
> &bus_ths_clk.common,
> &spdif_clk.common,
> &bus_spdif_clk.common,
> @@ -940,6 +943,7 @@ static struct clk_hw_onecell_data sun50i_h616_hw_clks = {
> [CLK_BUS_EMAC1] = &bus_emac1_clk.common.hw,
> [CLK_TS] = &ts_clk.common.hw,
> [CLK_BUS_TS] = &bus_ts_clk.common.hw,
> + [CLK_BUS_GPADC] = &bus_gpadc_clk.common.hw,
> [CLK_BUS_THS] = &bus_ths_clk.common.hw,
> [CLK_SPDIF] = &spdif_clk.common.hw,
> [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw,
> @@ -1021,6 +1025,7 @@ static struct ccu_reset_map sun50i_h616_ccu_resets[] = {
> [RST_BUS_EMAC0] = { 0x97c, BIT(16) },
> [RST_BUS_EMAC1] = { 0x97c, BIT(17) },
> [RST_BUS_TS] = { 0x9bc, BIT(16) },
> + [RST_BUS_GPADC] = { 0x9ec, BIT(16) },
> [RST_BUS_THS] = { 0x9fc, BIT(16) },
> [RST_BUS_SPDIF] = { 0xa2c, BIT(16) },
> [RST_BUS_DMIC] = { 0xa4c, BIT(16) },
> diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
> index fdd2f4d5103f..a75803b49f6a 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
> +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h616.h
> @@ -51,6 +51,6 @@
>
> #define CLK_BUS_DRAM 56
>
> -#define CLK_NUMBER (CLK_PLL_SYSTEM_32K + 1)
> +#define CLK_NUMBER (CLK_BUS_GPADC + 1)
>
> #endif /* _CCU_SUN50I_H616_H_ */
> diff --git a/include/dt-bindings/clock/sun50i-h616-ccu.h b/include/dt-bindings/clock/sun50i-h616-ccu.h
> index 6f8f01e67628..ebb146ab7f8c 100644
> --- a/include/dt-bindings/clock/sun50i-h616-ccu.h
> +++ b/include/dt-bindings/clock/sun50i-h616-ccu.h
> @@ -112,5 +112,6 @@
> #define CLK_HDCP 126
> #define CLK_BUS_HDCP 127
> #define CLK_PLL_SYSTEM_32K 128
> +#define CLK_BUS_GPADC 129
>
> #endif /* _DT_BINDINGS_CLK_SUN50I_H616_H_ */
> diff --git a/include/dt-bindings/reset/sun50i-h616-ccu.h b/include/dt-bindings/reset/sun50i-h616-ccu.h
> index 1bd8bb0a11be..ed177c04afdd 100644
> --- a/include/dt-bindings/reset/sun50i-h616-ccu.h
> +++ b/include/dt-bindings/reset/sun50i-h616-ccu.h
> @@ -66,5 +66,6 @@
> #define RST_BUS_TVE0 57
> #define RST_BUS_HDCP 58
> #define RST_BUS_KEYADC 59
> +#define RST_BUS_GPADC 60
>
> #endif /* _DT_BINDINGS_RESET_SUN50I_H616_H_ */
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 3/3] arm64: dts: allwinner: h616: Add GPADC device node
2024-04-17 17:04 ` [PATCH 3/3] arm64: dts: allwinner: h616: Add GPADC device node Chris Morgan
@ 2024-04-17 22:58 ` Andre Przywara
0 siblings, 0 replies; 12+ messages in thread
From: Andre Przywara @ 2024-04-17 22:58 UTC (permalink / raw)
To: Chris Morgan
Cc: linux-sunxi, linux-clk, devicetree, linux-iio, p.zabel, sboyd,
mturquette, samuel, jernej.skrabec, wens, conor+dt, krzk+dt,
robh, Chris Morgan
On Wed, 17 Apr 2024 12:04:23 -0500
Chris Morgan <macroalpha82@gmail.com> wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The H616 has a GPADC controller which is identical to the one found on
> the D1/T113s/R329/T507 SoCs.
Compared against the manual:
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cheers,
Andre
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> index b2e85e52d1a1..3da37948b89f 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
> @@ -581,6 +581,17 @@ spdif: spdif@5093000 {
> status = "disabled";
> };
>
> + gpadc: adc@5070000 {
> + compatible = "allwinner,sun50i-h616-gpadc",
> + "allwinner,sun20i-d1-gpadc";
> + reg = <0x05070000 0x400>;
> + clocks = <&ccu CLK_BUS_GPADC>;
> + resets = <&ccu RST_BUS_GPADC>;
> + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + #io-channel-cells = <1>;
> + };
> +
> ths: thermal-sensor@5070400 {
> compatible = "allwinner,sun50i-h616-ths";
> reg = <0x05070400 0x400>;
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616
2024-04-17 22:49 ` Andre Przywara
@ 2024-04-18 15:16 ` Rob Herring
2024-04-18 15:21 ` Chris Morgan
0 siblings, 1 reply; 12+ messages in thread
From: Rob Herring @ 2024-04-18 15:16 UTC (permalink / raw)
To: Andre Przywara
Cc: Chris Morgan, linux-sunxi, linux-clk, devicetree, linux-iio,
p.zabel, sboyd, mturquette, samuel, jernej.skrabec, wens,
conor+dt, krzk+dt, Chris Morgan
On Wed, Apr 17, 2024 at 11:49:57PM +0100, Andre Przywara wrote:
> On Wed, 17 Apr 2024 12:04:22 -0500
> Chris Morgan <macroalpha82@gmail.com> wrote:
>
> Hi,
>
> > From: Chris Morgan <macromorgan@hotmail.com>
> >
> > Add support for the GPADC for the Allwinner H616. It is identical to
> > the existing ADC for the D1/T113s/R329/T507 SoCs.
>
> The H616 is using the same die as the T507 and the H700, and since the
> T507 is already mentioned in the commit message for the original
> binding, I wonder if we actually need a new compatible?
For same die, I would say no you don't. But adding a compatible is fine,
too.
Rob
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616
2024-04-17 17:04 ` [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616 Chris Morgan
2024-04-17 22:49 ` Andre Przywara
@ 2024-04-18 15:17 ` Rob Herring
2024-04-20 10:10 ` Jonathan Cameron
1 sibling, 1 reply; 12+ messages in thread
From: Rob Herring @ 2024-04-18 15:17 UTC (permalink / raw)
To: Chris Morgan
Cc: sboyd, conor+dt, devicetree, linux-clk, linux-iio, Chris Morgan,
wens, mturquette, samuel, linux-sunxi, jernej.skrabec, krzk+dt,
p.zabel
On Wed, 17 Apr 2024 12:04:22 -0500, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add support for the GPADC for the Allwinner H616. It is identical to
> the existing ADC for the D1/T113s/R329/T507 SoCs.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> .../bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml | 9 +++++++--
> 1 file changed, 7 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616
2024-04-18 15:16 ` Rob Herring
@ 2024-04-18 15:21 ` Chris Morgan
0 siblings, 0 replies; 12+ messages in thread
From: Chris Morgan @ 2024-04-18 15:21 UTC (permalink / raw)
To: Rob Herring
Cc: Andre Przywara, Chris Morgan, linux-sunxi, linux-clk, devicetree,
linux-iio, p.zabel, sboyd, mturquette, samuel, jernej.skrabec,
wens, conor+dt, krzk+dt
On Thu, Apr 18, 2024 at 10:16:50AM -0500, Rob Herring wrote:
> On Wed, Apr 17, 2024 at 11:49:57PM +0100, Andre Przywara wrote:
> > On Wed, 17 Apr 2024 12:04:22 -0500
> > Chris Morgan <macroalpha82@gmail.com> wrote:
> >
> > Hi,
> >
> > > From: Chris Morgan <macromorgan@hotmail.com>
> > >
> > > Add support for the GPADC for the Allwinner H616. It is identical to
> > > the existing ADC for the D1/T113s/R329/T507 SoCs.
> >
> > The H616 is using the same die as the T507 and the H700, and since the
> > T507 is already mentioned in the commit message for the original
> > binding, I wonder if we actually need a new compatible?
>
> For same die, I would say no you don't. But adding a compatible is fine,
> too.
>
> Rob
I've been burned before, if it's just the same to you I'd like to do a
compatible. But I will defer to the experts on this matter.
Also if there is a more compact way of expressing this while still
maintaining backwards compatibility please let me know. Otherwise,
I'm okay with this if you all are (it passes dt_binding_check,
yamllint, and checkpatch.pl so I'm okay with it if you are).
Chris
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616
2024-04-18 15:17 ` Rob Herring
@ 2024-04-20 10:10 ` Jonathan Cameron
0 siblings, 0 replies; 12+ messages in thread
From: Jonathan Cameron @ 2024-04-20 10:10 UTC (permalink / raw)
To: Rob Herring
Cc: Chris Morgan, sboyd, conor+dt, devicetree, linux-clk, linux-iio,
Chris Morgan, wens, mturquette, samuel, linux-sunxi,
jernej.skrabec, krzk+dt, p.zabel
On Thu, 18 Apr 2024 10:17:33 -0500
Rob Herring <robh@kernel.org> wrote:
> On Wed, 17 Apr 2024 12:04:22 -0500, Chris Morgan wrote:
> > From: Chris Morgan <macromorgan@hotmail.com>
> >
> > Add support for the GPADC for the Allwinner H616. It is identical to
> > the existing ADC for the D1/T113s/R329/T507 SoCs.
> >
> > Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> > ---
> > .../bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml | 9 +++++++--
> > 1 file changed, 7 insertions(+), 2 deletions(-)
> >
>
> Acked-by: Rob Herring (Arm) <robh@kernel.org>
>
>
Applied this patch to the IIO tree.
Jonathan
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2024-04-20 10:10 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-04-17 17:04 [PATCH 0/3] Add GPADC for Allwinner H616 Chris Morgan
2024-04-17 17:04 ` [PATCH 1/3] clk: sunxi-ng: h616: Add clock/reset for GPADC Chris Morgan
2024-04-17 20:26 ` Jernej Škrabec
2024-04-17 22:55 ` Andre Przywara
2024-04-17 17:04 ` [PATCH 2/3] dt-bindings: iio: adc: Add GPADC for Allwinner H616 Chris Morgan
2024-04-17 22:49 ` Andre Przywara
2024-04-18 15:16 ` Rob Herring
2024-04-18 15:21 ` Chris Morgan
2024-04-18 15:17 ` Rob Herring
2024-04-20 10:10 ` Jonathan Cameron
2024-04-17 17:04 ` [PATCH 3/3] arm64: dts: allwinner: h616: Add GPADC device node Chris Morgan
2024-04-17 22:58 ` Andre Przywara
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