CTU CAN FD IP core SocketCAN driver - success with mainine Linux kernel and mainline QEMU builds

CTU CAN FD IP core SocketCAN driver - success with mainine Linux kernel and mainline QEMU builds

[Pavel Pisa]

Hello everybody,

I want to report successful build and test of the CTU CAN FD driver
from actual Linux kernel mainline GIT on actual QEMU build from
mainline git. Test on HW from net-next has been repeatedly
run by Matej Vasilevski during his timestamping patches work.

Thanks to all who helped, namely Ondrej Ille for his investment
in the project and rewrite of registers generator to provide
headers files acceptable for mainline, Marc Kleine-Budde
for review, integration and cleanup and together with
Pavel Machek to provide valuable feeback what is not acceptable.

I hope that we will be ready with with timestamping patches
cleanup for 5.20 merge windows as well as with support
for HDL sources parameterizable number of Tx buffres.

In the long term, I consider to use mechanism of software
virtual FIFO to implement multiqueue Tx support which
is in the fact needed in all serious CAN applications
to prevent bus level priority inversion.

We plan to visit and present on the Embedded World
in Nuremberg, so I would be happy to meet you there.
I hope that Carsten Emde and OSADL will pass over
information where we are available.

Program for Tuesday afternoon is given already
Talk QtRvSim – RISC-V Simulator for Computer Architectures
Classes, June 21, 2022 Session 10.3 – System-on-Chip (SoC)
Design RISC-V Development (16:00 - 16:30) at Embedded World
Conference. Our toy there https://github.com/cvut/qtrvsim

Best wishes,

                Pavel Pisa
    phone:      +420 603531357
    e-mail:     pisa@cmp.felk.cvut.cz
    Department of Control Engineering FEE CVUT
    Karlovo namesti 13, 121 35, Prague 2
    university: http://control.fel.cvut.cz/
    personal:   http://cmp.felk.cvut.cz/~pisa
    projects:   https://www.openhub.net/accounts/ppisa
    CAN related:http://canbus.pages.fel.cvut.cz/
    Open Technologies Research Education and Exchange Services
    https://gitlab.fel.cvut.cz/otrees/org/-/wikis/home

Re: CTU CAN FD IP core SocketCAN driver - success with mainine Linux kernel and mainline QEMU builds

[Philippe Mathieu-Daudé]

On 27/5/22 21:19, Pavel Pisa wrote:
> Hello everybody,
> 
> I want to report successful build and test of the CTU CAN FD driver
> from actual Linux kernel mainline GIT on actual QEMU build from
> mainline git. Test on HW from net-next has been repeatedly
> run by Matej Vasilevski during his timestamping patches work.
> 
> Thanks to all who helped, namely Ondrej Ille for his investment
> in the project and rewrite of registers generator to provide
> headers files acceptable for mainline, Marc Kleine-Budde
> for review, integration and cleanup and together with
> Pavel Machek to provide valuable feeback what is not acceptable.

Nice team work, congratulation! :)

> I hope that we will be ready with with timestamping patches
> cleanup for 5.20 merge windows as well as with support
> for HDL sources parameterizable number of Tx buffres.
> 
> In the long term, I consider to use mechanism of software
> virtual FIFO to implement multiqueue Tx support which
> is in the fact needed in all serious CAN applications
> to prevent bus level priority inversion.
> 
> We plan to visit and present on the Embedded World
> in Nuremberg, so I would be happy to meet you there.
> I hope that Carsten Emde and OSADL will pass over
> information where we are available.
> 
> Program for Tuesday afternoon is given already
> Talk QtRvSim – RISC-V Simulator for Computer Architectures
> Classes, June 21, 2022 Session 10.3 – System-on-Chip (SoC)
> Design RISC-V Development (16:00 - 16:30) at Embedded World
> Conference. Our toy there https://github.com/cvut/qtrvsim
> 
> Best wishes,
> 
>                  Pavel Pisa
>      phone:      +420 603531357
>      e-mail:     pisa@cmp.felk.cvut.cz
>      Department of Control Engineering FEE CVUT
>      Karlovo namesti 13, 121 35, Prague 2
>      university: http://control.fel.cvut.cz/
>      personal:   http://cmp.felk.cvut.cz/~pisa
>      projects:   https://www.openhub.net/accounts/ppisa
>      CAN related:http://canbus.pages.fel.cvut.cz/
>      Open Technologies Research Education and Exchange Services
>      https://gitlab.fel.cvut.cz/otrees/org/-/wikis/home
> 
> 

Re: CTU CAN FD IP core SocketCAN driver - success with mainine Linux kernel and mainline QEMU builds

[Philippe Mathieu-Daudé via]

On 27/5/22 21:19, Pavel Pisa wrote:
> Hello everybody,
> 
> I want to report successful build and test of the CTU CAN FD driver
> from actual Linux kernel mainline GIT on actual QEMU build from
> mainline git. Test on HW from net-next has been repeatedly
> run by Matej Vasilevski during his timestamping patches work.
> 
> Thanks to all who helped, namely Ondrej Ille for his investment
> in the project and rewrite of registers generator to provide
> headers files acceptable for mainline, Marc Kleine-Budde
> for review, integration and cleanup and together with
> Pavel Machek to provide valuable feeback what is not acceptable.

Nice team work, congratulation! :)

> I hope that we will be ready with with timestamping patches
> cleanup for 5.20 merge windows as well as with support
> for HDL sources parameterizable number of Tx buffres.
> 
> In the long term, I consider to use mechanism of software
> virtual FIFO to implement multiqueue Tx support which
> is in the fact needed in all serious CAN applications
> to prevent bus level priority inversion.
> 
> We plan to visit and present on the Embedded World
> in Nuremberg, so I would be happy to meet you there.
> I hope that Carsten Emde and OSADL will pass over
> information where we are available.
> 
> Program for Tuesday afternoon is given already
> Talk QtRvSim – RISC-V Simulator for Computer Architectures
> Classes, June 21, 2022 Session 10.3 – System-on-Chip (SoC)
> Design RISC-V Development (16:00 - 16:30) at Embedded World
> Conference. Our toy there https://github.com/cvut/qtrvsim
> 
> Best wishes,
> 
>                  Pavel Pisa
>      phone:      +420 603531357
>      e-mail:     pisa@cmp.felk.cvut.cz
>      Department of Control Engineering FEE CVUT
>      Karlovo namesti 13, 121 35, Prague 2
>      university: http://control.fel.cvut.cz/
>      personal:   http://cmp.felk.cvut.cz/~pisa
>      projects:   https://www.openhub.net/accounts/ppisa
>      CAN related:http://canbus.pages.fel.cvut.cz/
>      Open Technologies Research Education and Exchange Services
>      https://gitlab.fel.cvut.cz/otrees/org/-/wikis/home
> 
>