[kvm-unit-tests PATCH v3 0/2] arm: MMU extentions to enable litmus7

[kvm-unit-tests PATCH v3 0/2] arm: MMU extentions to enable litmus7

[Nikos Nikoleris]

Hi all,

litmus7 [1][2], a tool that we develop and use to test the memory
model on hardware, is building on kvm-unit-tests to encapsulate full
system tests and control address translation. This series extends the
kvm-unit-tests arm MMU API and adds two memory attributes to MAIR_EL1
to make them available to the litmus tests.

[1]: http://diy.inria.fr/doc/litmus.html
[2]: https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/expanding-memory-model-tools-system-level-architecture

v1: https://lore.kernel.org/kvm/20201102115311.103750-1-nikos.nikoleris@arm.com/T/
v2: https://lore.kernel.org/kvm/20201110144207.90693-1-nikos.nikoleris@arm.com/T/#u

Changes in v3:
  - Moved comment on break-before make

Changes in v2:
  - Add comment on break-before-make in get_mmu_pte()
  - Signed-off-by tag from all co-authors
  - Minor formatting changes

Thanks,

Nikos

Luc Maranget (1):
  arm: Add mmu_get_pte() to the MMU API

Nikos Nikoleris (1):
  arm: Add support for the DEVICE_nGRE and NORMAL_WT memory types

 lib/arm/asm/mmu-api.h         |  1 +
 lib/arm64/asm/pgtable-hwdef.h |  2 ++
 lib/arm/mmu.c                 | 32 +++++++++++++++++++++-----------
 arm/cstart64.S                |  6 +++++-
 4 files changed, 29 insertions(+), 12 deletions(-)

-- 
2.17.1

[kvm-unit-tests PATCH v3 1/2] arm: Add mmu_get_pte() to the MMU API

[Nikos Nikoleris]

From: Luc Maranget <Luc.Maranget@inria.fr>

Add the mmu_get_pte() function that allows a test to get a pointer to
the PTE for a valid virtual address. Return NULL if the MMU is off.

Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Signed-off-by: Luc Maranget <Luc.Maranget@inria.fr>
Co-Developed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
---
 lib/arm/asm/mmu-api.h |  1 +
 lib/arm/mmu.c         | 32 +++++++++++++++++++++-----------
 2 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/lib/arm/asm/mmu-api.h b/lib/arm/asm/mmu-api.h
index 2bbe1fa..3d04d03 100644
--- a/lib/arm/asm/mmu-api.h
+++ b/lib/arm/asm/mmu-api.h
@@ -22,5 +22,6 @@ extern void mmu_set_range_sect(pgd_t *pgtable, uintptr_t virt_offset,
 extern void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset,
 			       phys_addr_t phys_start, phys_addr_t phys_end,
 			       pgprot_t prot);
+extern pteval_t *mmu_get_pte(pgd_t *pgtable, uintptr_t vaddr);
 extern void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr);
 #endif
diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
index d937f20..a1862a5 100644
--- a/lib/arm/mmu.c
+++ b/lib/arm/mmu.c
@@ -212,7 +212,13 @@ unsigned long __phys_to_virt(phys_addr_t addr)
 	return addr;
 }
 
-void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
+/*
+ * NOTE: The Arm architecture might require the use of a
+ * break-before-make sequence before making changes to a PTE and
+ * certain conditions are met (see Arm ARM D5-2669 for AArch64 and
+ * B3-1378 for AArch32 for more details).
+ */
+pteval_t *mmu_get_pte(pgd_t *pgtable, uintptr_t vaddr)
 {
 	pgd_t *pgd;
 	pud_t *pud;
@@ -220,7 +226,7 @@ void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
 	pte_t *pte;
 
 	if (!mmu_enabled())
-		return;
+		return NULL;
 
 	pgd = pgd_offset(pgtable, vaddr);
 	assert(pgd_valid(*pgd));
@@ -229,17 +235,21 @@ void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
 	pmd = pmd_offset(pud, vaddr);
 	assert(pmd_valid(*pmd));
 
-	if (pmd_huge(*pmd)) {
-		pmd_t entry = __pmd(pmd_val(*pmd) & ~PMD_SECT_USER);
-		WRITE_ONCE(*pmd, entry);
-		goto out_flush_tlb;
-	}
+	if (pmd_huge(*pmd))
+		return &pmd_val(*pmd);
 
 	pte = pte_offset(pmd, vaddr);
 	assert(pte_valid(*pte));
-	pte_t entry = __pte(pte_val(*pte) & ~PTE_USER);
-	WRITE_ONCE(*pte, entry);
 
-out_flush_tlb:
-	flush_tlb_page(vaddr);
+        return &pte_val(*pte);
+}
+
+void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
+{
+	pteval_t *p_pte = mmu_get_pte(pgtable, vaddr);
+	if (p_pte) {
+		pteval_t entry = *p_pte & ~PTE_USER;
+		WRITE_ONCE(*p_pte, entry);
+		flush_tlb_page(vaddr);
+	}
 }
-- 
2.17.1

[kvm-unit-tests PATCH v3 2/2] arm: Add support for the DEVICE_nGRE and NORMAL_WT memory types

[Nikos Nikoleris]

Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
---
 lib/arm64/asm/pgtable-hwdef.h | 2 ++
 arm/cstart64.S                | 6 +++++-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/lib/arm64/asm/pgtable-hwdef.h b/lib/arm64/asm/pgtable-hwdef.h
index c31bc11..48a1d1a 100644
--- a/lib/arm64/asm/pgtable-hwdef.h
+++ b/lib/arm64/asm/pgtable-hwdef.h
@@ -153,5 +153,7 @@
 #define MT_DEVICE_GRE		2
 #define MT_NORMAL_NC		3	/* writecombine */
 #define MT_NORMAL		4
+#define MT_NORMAL_WT		5
+#define MT_DEVICE_nGRE		6
 
 #endif /* _ASMARM64_PGTABLE_HWDEF_H_ */
diff --git a/arm/cstart64.S b/arm/cstart64.S
index 6610779..0428014 100644
--- a/arm/cstart64.S
+++ b/arm/cstart64.S
@@ -154,6 +154,8 @@ halt:
  *   DEVICE_GRE         010     00001100
  *   NORMAL_NC          011     01000100
  *   NORMAL             100     11111111
+ *   NORMAL_WT          101     10111011
+ *   DEVICE_nGRE        110     00001000
  */
 #define MAIR(attr, mt) ((attr) << ((mt) * 8))
 
@@ -184,7 +186,9 @@ asm_mmu_enable:
 		     MAIR(0x04, MT_DEVICE_nGnRE) |	\
 		     MAIR(0x0c, MT_DEVICE_GRE) |	\
 		     MAIR(0x44, MT_NORMAL_NC) |		\
-		     MAIR(0xff, MT_NORMAL)
+		     MAIR(0xff, MT_NORMAL) |	        \
+		     MAIR(0xbb, MT_NORMAL_WT) |         \
+		     MAIR(0x08, MT_DEVICE_nGRE)
 	msr	mair_el1, x1
 
 	/* TTBR0 */
-- 
2.17.1

Re: [kvm-unit-tests PATCH v3 1/2] arm: Add mmu_get_pte() to the MMU API

[Alexandru Elisei]

Hi Nikos,

I tried to apply it on top of master just to make sure everything is correct and I
got a conflict in mmu.c. The line numbers were different, and mmu_clear_user() had
a pud_t *pud local variable, which isn't present in master, but is added by your
series to enable configurable translation granule. Applying on top of that series
worked without any conflicts. Just a heads-up to Drew when it picks them up.

Just to be on the safe side, I ran the tests on a Cortex-A53 and Cortex-A72, with
4k and 64k pages, nothing unexpected. The patch looks good to me.

Thanks,

Alex

On 11/10/20 6:09 PM, Nikos Nikoleris wrote:
> From: Luc Maranget <Luc.Maranget@inria.fr>
>
> Add the mmu_get_pte() function that allows a test to get a pointer to
> the PTE for a valid virtual address. Return NULL if the MMU is off.
>
> Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
> Signed-off-by: Luc Maranget <Luc.Maranget@inria.fr>
> Co-Developed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
> Reviewed-by: Andrew Jones <drjones@redhat.com>
> Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
> ---
>  lib/arm/asm/mmu-api.h |  1 +
>  lib/arm/mmu.c         | 32 +++++++++++++++++++++-----------
>  2 files changed, 22 insertions(+), 11 deletions(-)
>
> diff --git a/lib/arm/asm/mmu-api.h b/lib/arm/asm/mmu-api.h
> index 2bbe1fa..3d04d03 100644
> --- a/lib/arm/asm/mmu-api.h
> +++ b/lib/arm/asm/mmu-api.h
> @@ -22,5 +22,6 @@ extern void mmu_set_range_sect(pgd_t *pgtable, uintptr_t virt_offset,
>  extern void mmu_set_range_ptes(pgd_t *pgtable, uintptr_t virt_offset,
>  			       phys_addr_t phys_start, phys_addr_t phys_end,
>  			       pgprot_t prot);
> +extern pteval_t *mmu_get_pte(pgd_t *pgtable, uintptr_t vaddr);
>  extern void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr);
>  #endif
> diff --git a/lib/arm/mmu.c b/lib/arm/mmu.c
> index d937f20..a1862a5 100644
> --- a/lib/arm/mmu.c
> +++ b/lib/arm/mmu.c
> @@ -212,7 +212,13 @@ unsigned long __phys_to_virt(phys_addr_t addr)
>  	return addr;
>  }
>  
> -void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
> +/*
> + * NOTE: The Arm architecture might require the use of a
> + * break-before-make sequence before making changes to a PTE and
> + * certain conditions are met (see Arm ARM D5-2669 for AArch64 and
> + * B3-1378 for AArch32 for more details).
> + */
> +pteval_t *mmu_get_pte(pgd_t *pgtable, uintptr_t vaddr)
>  {
>  	pgd_t *pgd;
>  	pud_t *pud;
> @@ -220,7 +226,7 @@ void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
>  	pte_t *pte;
>  
>  	if (!mmu_enabled())
> -		return;
> +		return NULL;
>  
>  	pgd = pgd_offset(pgtable, vaddr);
>  	assert(pgd_valid(*pgd));
> @@ -229,17 +235,21 @@ void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
>  	pmd = pmd_offset(pud, vaddr);
>  	assert(pmd_valid(*pmd));
>  
> -	if (pmd_huge(*pmd)) {
> -		pmd_t entry = __pmd(pmd_val(*pmd) & ~PMD_SECT_USER);
> -		WRITE_ONCE(*pmd, entry);
> -		goto out_flush_tlb;
> -	}
> +	if (pmd_huge(*pmd))
> +		return &pmd_val(*pmd);
>  
>  	pte = pte_offset(pmd, vaddr);
>  	assert(pte_valid(*pte));
> -	pte_t entry = __pte(pte_val(*pte) & ~PTE_USER);
> -	WRITE_ONCE(*pte, entry);
>  
> -out_flush_tlb:
> -	flush_tlb_page(vaddr);
> +        return &pte_val(*pte);
> +}
> +
> +void mmu_clear_user(pgd_t *pgtable, unsigned long vaddr)
> +{
> +	pteval_t *p_pte = mmu_get_pte(pgtable, vaddr);
> +	if (p_pte) {
> +		pteval_t entry = *p_pte & ~PTE_USER;
> +		WRITE_ONCE(*p_pte, entry);
> +		flush_tlb_page(vaddr);
> +	}
>  }

Re: [kvm-unit-tests PATCH v3 0/2] arm: MMU extentions to enable litmus7

[Andrew Jones]

On Tue, Nov 10, 2020 at 06:09:22PM +0000, Nikos Nikoleris wrote:
> Hi all,
> 
> litmus7 [1][2], a tool that we develop and use to test the memory
> model on hardware, is building on kvm-unit-tests to encapsulate full
> system tests and control address translation. This series extends the
> kvm-unit-tests arm MMU API and adds two memory attributes to MAIR_EL1
> to make them available to the litmus tests.
> 
> [1]: http://diy.inria.fr/doc/litmus.html
> [2]: https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/expanding-memory-model-tools-system-level-architecture
> 
> v1: https://lore.kernel.org/kvm/20201102115311.103750-1-nikos.nikoleris@arm.com/T/
> v2: https://lore.kernel.org/kvm/20201110144207.90693-1-nikos.nikoleris@arm.com/T/#u
> 
> Changes in v3:
>   - Moved comment on break-before make
> 
> Changes in v2:
>   - Add comment on break-before-make in get_mmu_pte()
>   - Signed-off-by tag from all co-authors
>   - Minor formatting changes
> 
> Thanks,
> 
> Nikos
> 
> Luc Maranget (1):
>   arm: Add mmu_get_pte() to the MMU API
> 
> Nikos Nikoleris (1):
>   arm: Add support for the DEVICE_nGRE and NORMAL_WT memory types
> 
>  lib/arm/asm/mmu-api.h         |  1 +
>  lib/arm64/asm/pgtable-hwdef.h |  2 ++
>  lib/arm/mmu.c                 | 32 +++++++++++++++++++++-----------
>  arm/cstart64.S                |  6 +++++-
>  4 files changed, 29 insertions(+), 12 deletions(-)
> 
> -- 
> 2.17.1
>

Applied, thanks.