[igt-dev] [PATCH i-g-t 0/6] lib/igt_fb: Remove stride, offset restrictions on CCS FBs

[igt-dev] [PATCH i-g-t 0/6] lib/igt_fb: Remove stride, offset restrictions on CCS FBs

[Imre Deak]

Remove the power-of-two stride and 2 MB surface offset restriction on
ADL-P CCS FBs. Also fix/improve a few things in kms_ccs I noticed while
testing. The last for-ci only patch makes the removal of restriction
conditional on the required kernel FB remapping support.

Tested on SKL, TGL, ADL-P.

Imre Deak (6):
  tests/kms_ccs: Make sure to free GEM and FB objects
  tests/kms_ccs: Use test pattern when possible
  tests/kms_ccs: Fix small aux stride subtest
  tests/kms_ccs: Test bad params for all CCS planes
  lib/igt_fb: Add support for remapping CCS FBs
  for-ci: Check for ccs remap support

 lib/igt_fb.c            |  85 ++++++++++++++---
 lib/intel_aux_pgtable.c |  66 ++++++++++++--
 tests/kms_ccs.c         | 197 ++++++++++++++++++++++++++--------------
 3 files changed, 257 insertions(+), 91 deletions(-)

-- 
2.27.0

[igt-dev] [PATCH i-g-t 1/6] tests/kms_ccs: Make sure to free GEM and FB objects

[Imre Deak]

At the moment we're leaking the GEM and FB objects that could lead to
OOM if multiple subtests are run (vs. each subtest in a seperate test
run).

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 tests/kms_ccs.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 586680ae1..f376f1c80 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -345,6 +345,10 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
 	if (data->flags & TEST_FAIL_ON_ADDFB2) {
 		igt_assert_eq(ret, -1);
 		igt_assert_eq(errno, EINVAL);
+
+		if (f.handles[index])
+			gem_close(data->drm_fd, f.handles[index]);
+
 		return;
 	} else
 		igt_assert_eq(ret, 0);
@@ -387,7 +391,8 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
 	drmModeModeInfo *drm_mode = igt_output_get_mode(data->output);
 	int fb_width = drm_mode->hdisplay;
 	enum igt_commit_style commit;
-	struct igt_fb fb, fb_sprite;
+	struct igt_fb fb = {};
+	struct igt_fb fb_sprite = {};
 	int ret;
 
 	if (data->display.is_atomic)
@@ -425,7 +430,7 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
 	}
 
 	if (data->flags & TEST_FAIL_ON_ADDFB2)
-		return true;
+		goto out_free_fbs;
 
 	igt_plane_set_position(primary, 0, 0);
 	igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode->vdisplay);
@@ -458,14 +463,16 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
 		igt_plane_set_position(data->plane, 0, 0);
 		igt_plane_set_size(data->plane, 0, 0);
 		igt_plane_set_fb(data->plane, NULL);
-		igt_remove_fb(display->drm_fd, &fb_sprite);
 	}
 
 	igt_plane_set_fb(primary, NULL);
 	igt_plane_set_rotation(primary, IGT_ROTATION_0);
 	igt_display_commit2(display, commit);
 
-	if (data->flags & TEST_CRC)
+out_free_fbs:
+	if (fb_sprite.fb_id)
+		igt_remove_fb(data->drm_fd, &fb_sprite);
+	if (fb.fb_id)
 		igt_remove_fb(data->drm_fd, &fb);
 
 	return true;
-- 
2.27.0

Re: [igt-dev] [PATCH i-g-t 1/6] tests/kms_ccs: Make sure to free GEM and FB objects

[Juha-Pekka Heikkila]

On 27.8.2021 17.57, Imre Deak wrote:
> At the moment we're leaking the GEM and FB objects that could lead to
> OOM if multiple subtests are run (vs. each subtest in a seperate test
> run).
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   tests/kms_ccs.c | 15 +++++++++++----
>   1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> index 586680ae1..f376f1c80 100644
> --- a/tests/kms_ccs.c
> +++ b/tests/kms_ccs.c
> @@ -345,6 +345,10 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
>   	if (data->flags & TEST_FAIL_ON_ADDFB2) {
>   		igt_assert_eq(ret, -1);
>   		igt_assert_eq(errno, EINVAL);
> +
> +		if (f.handles[index])
> +			gem_close(data->drm_fd, f.handles[index]);
> +

I guess this gem_close could be called before doing asserts.

>   		return;
>   	} else
>   		igt_assert_eq(ret, 0);
> @@ -387,7 +391,8 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
>   	drmModeModeInfo *drm_mode = igt_output_get_mode(data->output);
>   	int fb_width = drm_mode->hdisplay;
>   	enum igt_commit_style commit;
> -	struct igt_fb fb, fb_sprite;
> +	struct igt_fb fb = {};
> +	struct igt_fb fb_sprite = {};
>   	int ret;
>   
>   	if (data->display.is_atomic)
> @@ -425,7 +430,7 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
>   	}
>   
>   	if (data->flags & TEST_FAIL_ON_ADDFB2)
> -		return true;
> +		goto out_free_fbs;
>   
>   	igt_plane_set_position(primary, 0, 0);
>   	igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode->vdisplay);
> @@ -458,14 +463,16 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
>   		igt_plane_set_position(data->plane, 0, 0);
>   		igt_plane_set_size(data->plane, 0, 0);
>   		igt_plane_set_fb(data->plane, NULL);
> -		igt_remove_fb(display->drm_fd, &fb_sprite);
>   	}
>   
>   	igt_plane_set_fb(primary, NULL);
>   	igt_plane_set_rotation(primary, IGT_ROTATION_0);
>   	igt_display_commit2(display, commit);
>   
> -	if (data->flags & TEST_CRC)
> +out_free_fbs:
> +	if (fb_sprite.fb_id)
> +		igt_remove_fb(data->drm_fd, &fb_sprite);
> +	if (fb.fb_id)
>   		igt_remove_fb(data->drm_fd, &fb);

These igt_remove_fb could be called unconditionally, they do as first 
things same check for fb_id

>   
>   	return true;
> 

those are just minor comments, fix or no fix either way

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

Re: [igt-dev] [PATCH i-g-t 1/6] tests/kms_ccs: Make sure to free GEM and FB objects

[Imre Deak]

On Tue, Aug 31, 2021 at 08:47:49PM +0300, Juha-Pekka Heikkila wrote:
> On 27.8.2021 17.57, Imre Deak wrote:
> > At the moment we're leaking the GEM and FB objects that could lead to
> > OOM if multiple subtests are run (vs. each subtest in a seperate test
> > run).
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >   tests/kms_ccs.c | 15 +++++++++++----
> >   1 file changed, 11 insertions(+), 4 deletions(-)
> > 
> > diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> > index 586680ae1..f376f1c80 100644
> > --- a/tests/kms_ccs.c
> > +++ b/tests/kms_ccs.c
> > @@ -345,6 +345,10 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
> >   	if (data->flags & TEST_FAIL_ON_ADDFB2) {
> >   		igt_assert_eq(ret, -1);
> >   		igt_assert_eq(errno, EINVAL);
> > +
> > +		if (f.handles[index])
> > +			gem_close(data->drm_fd, f.handles[index]);
> > +
> 
> I guess this gem_close could be called before doing asserts.

Ah yes, the assert will continue with the next subtest, doh:/

> >   		return;
> >   	} else
> >   		igt_assert_eq(ret, 0);
> > @@ -387,7 +391,8 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
> >   	drmModeModeInfo *drm_mode = igt_output_get_mode(data->output);
> >   	int fb_width = drm_mode->hdisplay;
> >   	enum igt_commit_style commit;
> > -	struct igt_fb fb, fb_sprite;
> > +	struct igt_fb fb = {};
> > +	struct igt_fb fb_sprite = {};
> >   	int ret;
> >   	if (data->display.is_atomic)
> > @@ -425,7 +430,7 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
> >   	}
> >   	if (data->flags & TEST_FAIL_ON_ADDFB2)
> > -		return true;
> > +		goto out_free_fbs;
> >   	igt_plane_set_position(primary, 0, 0);
> >   	igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode->vdisplay);
> > @@ -458,14 +463,16 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
> >   		igt_plane_set_position(data->plane, 0, 0);
> >   		igt_plane_set_size(data->plane, 0, 0);
> >   		igt_plane_set_fb(data->plane, NULL);
> > -		igt_remove_fb(display->drm_fd, &fb_sprite);
> >   	}
> >   	igt_plane_set_fb(primary, NULL);
> >   	igt_plane_set_rotation(primary, IGT_ROTATION_0);
> >   	igt_display_commit2(display, commit);
> > -	if (data->flags & TEST_CRC)
> > +out_free_fbs:
> > +	if (fb_sprite.fb_id)
> > +		igt_remove_fb(data->drm_fd, &fb_sprite);
> > +	if (fb.fb_id)
> >   		igt_remove_fb(data->drm_fd, &fb);
> 
> These igt_remove_fb could be called unconditionally, they do as first things
> same check for fb_id

Ok, missed that.

> >   	return true;
> > 
> 
> those are just minor comments, fix or no fix either way
> 
> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

[igt-dev] [PATCH i-g-t 2/6] tests/kms_ccs: Use test pattern when possible

[Imre Deak]

A CRC match against a test pattern reference image gives a better
guarantee than against a solid filled image, so use a test pattern
instead.

The sprite tests compare a single solid filled reference plane against
two overlapped solid filled planes for some reason, so for these subtests
and the fast clear subtest still keep the solid filled pattern.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 tests/kms_ccs.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index f376f1c80..5bc50b4bb 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -329,15 +329,21 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
 		srand(data->seed);
 		fill_fb_random(data->drm_fd, fb);
 	} else if (!(data->flags & TEST_BAD_PIXEL_FORMAT)) {
+		bool do_fast_clear = is_ccs_cc_modifier(data->ccs_modifier);
+		bool do_solid_fill = do_fast_clear || data->plane;
 		int c = !!data->plane;
 
-		if (is_ccs_cc_modifier(modifier)) {
+		if (do_fast_clear && (fb_flags & FB_COMPRESSED)) {
 			fast_clear_fb(data->drm_fd, fb, cc_color);
 		} else {
 			cr = igt_get_cairo_ctx(data->drm_fd, fb);
-			igt_paint_color(cr, 0, 0, width, height,
-					colors[c].r, colors[c].g, colors[c].b);
-					igt_put_cairo_ctx(cr);
+
+			if (do_solid_fill)
+				igt_paint_color(cr, 0, 0, width, height,
+						colors[c].r, colors[c].g, colors[c].b);
+			else
+				igt_paint_test_pattern(cr, width, height);
+			igt_put_cairo_ctx(cr);
 		}
 	}
 
-- 
2.27.0

Re: [igt-dev] [PATCH i-g-t 2/6] tests/kms_ccs: Use test pattern when possible

[Juha-Pekka Heikkila]

On 27.8.2021 17.57, Imre Deak wrote:
> A CRC match against a test pattern reference image gives a better
> guarantee than against a solid filled image, so use a test pattern
> instead.
> 
> The sprite tests compare a single solid filled reference plane against
> two overlapped solid filled planes for some reason, so for these subtests
> and the fast clear subtest still keep the solid filled pattern.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   tests/kms_ccs.c | 14 ++++++++++----
>   1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> index f376f1c80..5bc50b4bb 100644
> --- a/tests/kms_ccs.c
> +++ b/tests/kms_ccs.c
> @@ -329,15 +329,21 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
>   		srand(data->seed);
>   		fill_fb_random(data->drm_fd, fb);
>   	} else if (!(data->flags & TEST_BAD_PIXEL_FORMAT)) {
> +		bool do_fast_clear = is_ccs_cc_modifier(data->ccs_modifier);
> +		bool do_solid_fill = do_fast_clear || data->plane;

data->plane will be set when doing crc tests, why crc tests needed solid 
color?

>   		int c = !!data->plane;
>   
> -		if (is_ccs_cc_modifier(modifier)) {
> +		if (do_fast_clear && (fb_flags & FB_COMPRESSED)) {
>   			fast_clear_fb(data->drm_fd, fb, cc_color);
>   		} else {
>   			cr = igt_get_cairo_ctx(data->drm_fd, fb);
> -			igt_paint_color(cr, 0, 0, width, height,
> -					colors[c].r, colors[c].g, colors[c].b);
> -					igt_put_cairo_ctx(cr);
> +
> +			if (do_solid_fill)
> +				igt_paint_color(cr, 0, 0, width, height,
> +						colors[c].r, colors[c].g, colors[c].b);
> +			else
> +				igt_paint_test_pattern(cr, width, height);
> +			igt_put_cairo_ctx(cr);
>   		}
>   	}
>   
> 

Re: [igt-dev] [PATCH i-g-t 2/6] tests/kms_ccs: Use test pattern when possible

[Juha-Pekka Heikkila]

On 31.8.2021 20.48, Juha-Pekka Heikkila wrote:
> On 27.8.2021 17.57, Imre Deak wrote:
>> A CRC match against a test pattern reference image gives a better
>> guarantee than against a solid filled image, so use a test pattern
>> instead.
>>
>> The sprite tests compare a single solid filled reference plane against
>> two overlapped solid filled planes for some reason, so for these subtests
>> and the fast clear subtest still keep the solid filled pattern.
>>
>> Signed-off-by: Imre Deak <imre.deak@intel.com>
>> ---
>>   tests/kms_ccs.c | 14 ++++++++++----
>>   1 file changed, 10 insertions(+), 4 deletions(-)
>>
>> diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
>> index f376f1c80..5bc50b4bb 100644
>> --- a/tests/kms_ccs.c
>> +++ b/tests/kms_ccs.c
>> @@ -329,15 +329,21 @@ static void generate_fb(data_t *data, struct 
>> igt_fb *fb,
>>           srand(data->seed);
>>           fill_fb_random(data->drm_fd, fb);
>>       } else if (!(data->flags & TEST_BAD_PIXEL_FORMAT)) {
>> +        bool do_fast_clear = is_ccs_cc_modifier(data->ccs_modifier);
>> +        bool do_solid_fill = do_fast_clear || data->plane;
> 
> data->plane will be set when doing crc tests, why crc tests needed solid 
> color?

After offline discussion we agree this is ok because of two plane case.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

> 
>>           int c = !!data->plane;
>> -        if (is_ccs_cc_modifier(modifier)) {
>> +        if (do_fast_clear && (fb_flags & FB_COMPRESSED)) {
>>               fast_clear_fb(data->drm_fd, fb, cc_color);
>>           } else {
>>               cr = igt_get_cairo_ctx(data->drm_fd, fb);
>> -            igt_paint_color(cr, 0, 0, width, height,
>> -                    colors[c].r, colors[c].g, colors[c].b);
>> -                    igt_put_cairo_ctx(cr);
>> +
>> +            if (do_solid_fill)
>> +                igt_paint_color(cr, 0, 0, width, height,
>> +                        colors[c].r, colors[c].g, colors[c].b);
>> +            else
>> +                igt_paint_test_pattern(cr, width, height);
>> +            igt_put_cairo_ctx(cr);
>>           }
>>       }
>>
> 

[igt-dev] [PATCH i-g-t 3/6] tests/kms_ccs: Fix small aux stride subtest

[Imre Deak]

Use the correct CCS plane stride for the small aux stride subtest.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 tests/kms_ccs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 5bc50b4bb..52252c633 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -307,7 +307,7 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
 		if (fb_flags & FB_SMALL_AUX_STRIDE) {
 			igt_skip_on_f(width <= 1024,
 				      "FB already has the smallest possible stride\n");
-			f.pitches[index] = ALIGN(f.pitches[1]/2, 128);
+			f.pitches[index] = ALIGN(f.pitches[index]/2, 128);
 		}
 
 		if (fb_flags & FB_ZERO_AUX_STRIDE)
-- 
2.27.0

Re: [igt-dev] [PATCH i-g-t 3/6] tests/kms_ccs: Fix small aux stride subtest

[Juha-Pekka Heikkila]

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

On 27.8.2021 17.57, Imre Deak wrote:
> Use the correct CCS plane stride for the small aux stride subtest.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   tests/kms_ccs.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> index 5bc50b4bb..52252c633 100644
> --- a/tests/kms_ccs.c
> +++ b/tests/kms_ccs.c
> @@ -307,7 +307,7 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
>   		if (fb_flags & FB_SMALL_AUX_STRIDE) {
>   			igt_skip_on_f(width <= 1024,
>   				      "FB already has the smallest possible stride\n");
> -			f.pitches[index] = ALIGN(f.pitches[1]/2, 128);
> +			f.pitches[index] = ALIGN(f.pitches[index]/2, 128);
>   		}
>   
>   		if (fb_flags & FB_ZERO_AUX_STRIDE)
> 

[igt-dev] [PATCH i-g-t 4/6] tests/kms_ccs: Test bad params for all CCS planes

[Imre Deak]

Test creating an FB with incorrect CCS plane parameters for all CCS
planes. While at it move all the incorrect FB parameter subtests earlier
before generating an FB. For these subtests we won't modeset and so
don't need to generate FBs with a test pattern. Exceptions are the
bad-rotation subtests which also do a modeset.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 tests/kms_ccs.c | 180 ++++++++++++++++++++++++++++++------------------
 1 file changed, 112 insertions(+), 68 deletions(-)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index 52252c633..7440f8427 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -44,9 +44,9 @@ enum test_flags {
 	TEST_ALL_PLANES			= 1 << 9,
 };
 
-#define TEST_FAIL_ON_ADDFB2 \
-	(TEST_BAD_PIXEL_FORMAT | TEST_NO_AUX_BUFFER | TEST_BAD_CCS_HANDLE | \
-	 TEST_BAD_AUX_STRIDE)
+#define TEST_BAD_CCS_PLANE	(TEST_NO_AUX_BUFFER | TEST_BAD_CCS_HANDLE | \
+				 TEST_BAD_AUX_STRIDE)
+#define TEST_FAIL_ON_ADDFB2	(TEST_BAD_PIXEL_FORMAT | TEST_BAD_CCS_PLANE)
 
 enum test_fb_flags {
 	FB_COMPRESSED			= 1 << 0,
@@ -128,6 +128,17 @@ static void addfb_init(struct igt_fb *fb, struct drm_mode_fb_cmd2 *f)
 	}
 }
 
+static void
+create_fb_prepare_add(int drm_fd, int width, int height,
+		      uint32_t format, uint64_t modifier,
+		      igt_fb_t *fb, struct drm_mode_fb_cmd2 *f)
+{
+	igt_create_bo_for_fb(drm_fd, width, height, format, modifier, fb);
+	igt_assert(fb->gem_handle > 0);
+
+	addfb_init(fb, f);
+}
+
 static bool is_ccs_cc_modifier(uint64_t modifier)
 {
 	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
@@ -226,14 +237,96 @@ static void fill_fb_random(int drm_fd, igt_fb_t *fb)
 	munmap(map, fb->size);
 }
 
-static int get_ccs_plane_index(uint32_t format)
+static void test_bad_ccs_plane(data_t *data, int width, int height, int ccs_plane,
+			       enum test_fb_flags fb_flags)
 {
-	int index = 1;
+	struct igt_fb fb = {};
+	struct drm_mode_fb_cmd2 f = {};
+	uint32_t bad_ccs_bo = 0;
+	int ret;
 
-	if (igt_format_is_yuv_semiplanar(format))
-		return 2;
+	igt_assert(fb_flags & FB_COMPRESSED);
+	create_fb_prepare_add(data->drm_fd, width, height,
+			      data->format, data->ccs_modifier,
+			      &fb, &f);
 
-	return index;
+	/*
+	 * The stride of CCS planes on GEN12+ is fixed, so we can check for
+	 * an incorrect stride with the same delta as on earlier platforms.
+	 */
+	if (fb_flags & FB_MISALIGN_AUX_STRIDE) {
+		igt_skip_on_f(width <= 1024,
+			      "FB already has the smallest possible stride\n");
+		f.pitches[ccs_plane] -= 64;
+	}
+
+	if (fb_flags & FB_SMALL_AUX_STRIDE) {
+		igt_skip_on_f(width <= 1024,
+			      "FB already has the smallest possible stride\n");
+		f.pitches[ccs_plane] = ALIGN(f.pitches[ccs_plane] / 2, 128);
+	}
+
+	if (fb_flags & FB_ZERO_AUX_STRIDE)
+		f.pitches[ccs_plane] = 0;
+
+	/* Put the CCS buffer on a different BO. */
+	if (data->flags & TEST_BAD_CCS_HANDLE) {
+		bad_ccs_bo = gem_create(data->drm_fd, fb.size);
+		f.handles[ccs_plane] = bad_ccs_bo;
+	}
+
+	if (data->flags & TEST_NO_AUX_BUFFER) {
+		f.handles[ccs_plane] = 0;
+		f.modifier[ccs_plane] = 0;
+		f.pitches[ccs_plane] = 0;
+		f.offsets[ccs_plane] = 0;
+	}
+
+	ret = drmIoctl(data->drm_fd, DRM_IOCTL_MODE_ADDFB2, &f);
+	igt_assert_eq(ret, -1);
+	igt_assert_eq(errno, EINVAL);
+
+	if (bad_ccs_bo)
+		gem_close(data->drm_fd, bad_ccs_bo);
+
+	gem_close(data->drm_fd, fb.gem_handle);
+}
+
+static void test_bad_ccs_plane_params(data_t *data, int width, int height,
+				      enum test_fb_flags fb_flags)
+{
+	for (int ccs_plane = 1;
+	     ccs_plane <= (igt_format_is_yuv_semiplanar(data->format) ? 2 : 1);
+	     ccs_plane++)
+		test_bad_ccs_plane(data, width, height, ccs_plane, fb_flags);
+}
+
+static void test_bad_pixel_format(data_t *data, int width, int height,
+				  enum test_fb_flags fb_flags)
+{
+	struct igt_fb fb = {};
+	struct drm_mode_fb_cmd2 f = {};
+	int ret;
+
+	igt_assert(fb_flags & FB_COMPRESSED);
+	create_fb_prepare_add(data->drm_fd, width, height,
+			      DRM_FORMAT_RGB565, data->ccs_modifier,
+			      &fb, &f);
+
+	ret = drmIoctl(data->drm_fd, DRM_IOCTL_MODE_ADDFB2, &f);
+	igt_assert_eq(ret, -1);
+	igt_assert_eq(errno, EINVAL);
+
+	gem_close(data->drm_fd, fb.gem_handle);
+}
+
+static void test_bad_fb_params(data_t *data, int width, int height, enum test_fb_flags fb_flags)
+{
+	if (data->flags & TEST_BAD_PIXEL_FORMAT)
+		test_bad_pixel_format(data, width, height, fb_flags);
+
+	if (data->flags & TEST_BAD_CCS_PLANE)
+		test_bad_ccs_plane_params(data, width, height, fb_flags);
 }
 
 static void fast_clear_fb(int drm_fd, struct igt_fb *fb, const float *cc_color)
@@ -259,16 +352,15 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
 			enum test_fb_flags fb_flags)
 {
 	struct drm_mode_fb_cmd2 f = {0};
-	uint32_t format;
 	uint64_t modifier;
 	cairo_t *cr;
-	int index;
 	int ret;
 	const float cc_color[4] = {colors[!!data->plane].r,
 				   colors[!!data->plane].g,
 				   colors[!!data->plane].b,
 				   1.0};
 
+
 	/* Use either compressed or Y-tiled to test. However, given the lack of
 	 * available bandwidth, we use linear for the primary plane when
 	 * testing sprites, since we cannot fit two CCS planes into the
@@ -281,54 +373,14 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
 	else
 		modifier = 0;
 
-	if (data->flags & TEST_BAD_PIXEL_FORMAT)
-		format = DRM_FORMAT_RGB565;
-	else
-		format = data->format;
-
-	index = get_ccs_plane_index(format);
-
-	igt_create_bo_for_fb(data->drm_fd, width, height, format, modifier, fb);
-	igt_assert(fb->gem_handle > 0);
-
-	addfb_init(fb, &f);
-
-	/*
-	 * The stride of CCS planes on GEN12+ is fixed, so we can check for
-	 * an incorrect stride with the same delta as on earlier platforms.
-	 */
-	if (fb_flags & FB_COMPRESSED) {
-		if (fb_flags & FB_MISALIGN_AUX_STRIDE) {
-			igt_skip_on_f(width <= 1024,
-				      "FB already has the smallest possible stride\n");
-			f.pitches[index] -= 64;
-		}
-
-		if (fb_flags & FB_SMALL_AUX_STRIDE) {
-			igt_skip_on_f(width <= 1024,
-				      "FB already has the smallest possible stride\n");
-			f.pitches[index] = ALIGN(f.pitches[index]/2, 128);
-		}
-
-		if (fb_flags & FB_ZERO_AUX_STRIDE)
-			f.pitches[index] = 0;
-
-		/* Put the CCS buffer on a different BO. */
-		if (data->flags & TEST_BAD_CCS_HANDLE)
-			f.handles[index] = gem_create(data->drm_fd, fb->size);
-
-		if (data->flags & TEST_NO_AUX_BUFFER) {
-			f.handles[index] = 0;
-			f.modifier[index] = 0;
-			f.pitches[index] = 0;
-			f.offsets[index] = 0;
-		}
-	}
+	create_fb_prepare_add(data->drm_fd, width, height,
+			      data->format, modifier,
+			      fb, &f);
 
 	if (data->flags & TEST_RANDOM) {
 		srand(data->seed);
 		fill_fb_random(data->drm_fd, fb);
-	} else if (!(data->flags & TEST_BAD_PIXEL_FORMAT)) {
+	} else {
 		bool do_fast_clear = is_ccs_cc_modifier(data->ccs_modifier);
 		bool do_solid_fill = do_fast_clear || data->plane;
 		int c = !!data->plane;
@@ -348,16 +400,7 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
 	}
 
 	ret = drmIoctl(data->drm_fd, DRM_IOCTL_MODE_ADDFB2, &f);
-	if (data->flags & TEST_FAIL_ON_ADDFB2) {
-		igt_assert_eq(ret, -1);
-		igt_assert_eq(errno, EINVAL);
-
-		if (f.handles[index])
-			gem_close(data->drm_fd, f.handles[index]);
-
-		return;
-	} else
-		igt_assert_eq(ret, 0);
+	igt_assert_eq(ret, 0);
 
 	if (check_ccs_planes)
 		check_all_ccs_planes(data->drm_fd, fb, cc_color, !(data->flags & TEST_RANDOM));
@@ -423,6 +466,11 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
 
 	fb_width = min(MAX_SPRITE_PLANE_WIDTH, fb_width);
 
+	if (data->flags & TEST_FAIL_ON_ADDFB2) {
+		test_bad_fb_params(data, fb_width, drm_mode->vdisplay, fb_flags);
+		return true;
+	}
+
 	if (data->plane && fb_flags & FB_COMPRESSED) {
 		if (!igt_plane_has_format_mod(data->plane, data->format,
 					      data->ccs_modifier))
@@ -435,9 +483,6 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
 		generate_fb(data, &fb, fb_width, drm_mode->vdisplay, fb_flags);
 	}
 
-	if (data->flags & TEST_FAIL_ON_ADDFB2)
-		goto out_free_fbs;
-
 	igt_plane_set_position(primary, 0, 0);
 	igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode->vdisplay);
 	igt_plane_set_fb(primary, &fb);
@@ -475,7 +520,6 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
 	igt_plane_set_rotation(primary, IGT_ROTATION_0);
 	igt_display_commit2(display, commit);
 
-out_free_fbs:
 	if (fb_sprite.fb_id)
 		igt_remove_fb(data->drm_fd, &fb_sprite);
 	if (fb.fb_id)
-- 
2.27.0

Re: [igt-dev] [PATCH i-g-t 4/6] tests/kms_ccs: Test bad params for all CCS planes

[Juha-Pekka Heikkila]

Look ok to me

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

On 27.8.2021 17.57, Imre Deak wrote:
> Test creating an FB with incorrect CCS plane parameters for all CCS
> planes. While at it move all the incorrect FB parameter subtests earlier
> before generating an FB. For these subtests we won't modeset and so
> don't need to generate FBs with a test pattern. Exceptions are the
> bad-rotation subtests which also do a modeset.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   tests/kms_ccs.c | 180 ++++++++++++++++++++++++++++++------------------
>   1 file changed, 112 insertions(+), 68 deletions(-)
> 
> diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
> index 52252c633..7440f8427 100644
> --- a/tests/kms_ccs.c
> +++ b/tests/kms_ccs.c
> @@ -44,9 +44,9 @@ enum test_flags {
>   	TEST_ALL_PLANES			= 1 << 9,
>   };
>   
> -#define TEST_FAIL_ON_ADDFB2 \
> -	(TEST_BAD_PIXEL_FORMAT | TEST_NO_AUX_BUFFER | TEST_BAD_CCS_HANDLE | \
> -	 TEST_BAD_AUX_STRIDE)
> +#define TEST_BAD_CCS_PLANE	(TEST_NO_AUX_BUFFER | TEST_BAD_CCS_HANDLE | \
> +				 TEST_BAD_AUX_STRIDE)
> +#define TEST_FAIL_ON_ADDFB2	(TEST_BAD_PIXEL_FORMAT | TEST_BAD_CCS_PLANE)
>   
>   enum test_fb_flags {
>   	FB_COMPRESSED			= 1 << 0,
> @@ -128,6 +128,17 @@ static void addfb_init(struct igt_fb *fb, struct drm_mode_fb_cmd2 *f)
>   	}
>   }
>   
> +static void
> +create_fb_prepare_add(int drm_fd, int width, int height,
> +		      uint32_t format, uint64_t modifier,
> +		      igt_fb_t *fb, struct drm_mode_fb_cmd2 *f)
> +{
> +	igt_create_bo_for_fb(drm_fd, width, height, format, modifier, fb);
> +	igt_assert(fb->gem_handle > 0);
> +
> +	addfb_init(fb, f);
> +}
> +
>   static bool is_ccs_cc_modifier(uint64_t modifier)
>   {
>   	return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
> @@ -226,14 +237,96 @@ static void fill_fb_random(int drm_fd, igt_fb_t *fb)
>   	munmap(map, fb->size);
>   }
>   
> -static int get_ccs_plane_index(uint32_t format)
> +static void test_bad_ccs_plane(data_t *data, int width, int height, int ccs_plane,
> +			       enum test_fb_flags fb_flags)
>   {
> -	int index = 1;
> +	struct igt_fb fb = {};
> +	struct drm_mode_fb_cmd2 f = {};
> +	uint32_t bad_ccs_bo = 0;
> +	int ret;
>   
> -	if (igt_format_is_yuv_semiplanar(format))
> -		return 2;
> +	igt_assert(fb_flags & FB_COMPRESSED);
> +	create_fb_prepare_add(data->drm_fd, width, height,
> +			      data->format, data->ccs_modifier,
> +			      &fb, &f);
>   
> -	return index;
> +	/*
> +	 * The stride of CCS planes on GEN12+ is fixed, so we can check for
> +	 * an incorrect stride with the same delta as on earlier platforms.
> +	 */
> +	if (fb_flags & FB_MISALIGN_AUX_STRIDE) {
> +		igt_skip_on_f(width <= 1024,
> +			      "FB already has the smallest possible stride\n");
> +		f.pitches[ccs_plane] -= 64;
> +	}
> +
> +	if (fb_flags & FB_SMALL_AUX_STRIDE) {
> +		igt_skip_on_f(width <= 1024,
> +			      "FB already has the smallest possible stride\n");
> +		f.pitches[ccs_plane] = ALIGN(f.pitches[ccs_plane] / 2, 128);
> +	}
> +
> +	if (fb_flags & FB_ZERO_AUX_STRIDE)
> +		f.pitches[ccs_plane] = 0;
> +
> +	/* Put the CCS buffer on a different BO. */
> +	if (data->flags & TEST_BAD_CCS_HANDLE) {
> +		bad_ccs_bo = gem_create(data->drm_fd, fb.size);
> +		f.handles[ccs_plane] = bad_ccs_bo;
> +	}
> +
> +	if (data->flags & TEST_NO_AUX_BUFFER) {
> +		f.handles[ccs_plane] = 0;
> +		f.modifier[ccs_plane] = 0;
> +		f.pitches[ccs_plane] = 0;
> +		f.offsets[ccs_plane] = 0;
> +	}
> +
> +	ret = drmIoctl(data->drm_fd, DRM_IOCTL_MODE_ADDFB2, &f);
> +	igt_assert_eq(ret, -1);
> +	igt_assert_eq(errno, EINVAL);
> +
> +	if (bad_ccs_bo)
> +		gem_close(data->drm_fd, bad_ccs_bo);
> +
> +	gem_close(data->drm_fd, fb.gem_handle);
> +}
> +
> +static void test_bad_ccs_plane_params(data_t *data, int width, int height,
> +				      enum test_fb_flags fb_flags)
> +{
> +	for (int ccs_plane = 1;
> +	     ccs_plane <= (igt_format_is_yuv_semiplanar(data->format) ? 2 : 1);
> +	     ccs_plane++)
> +		test_bad_ccs_plane(data, width, height, ccs_plane, fb_flags);
> +}
> +
> +static void test_bad_pixel_format(data_t *data, int width, int height,
> +				  enum test_fb_flags fb_flags)
> +{
> +	struct igt_fb fb = {};
> +	struct drm_mode_fb_cmd2 f = {};
> +	int ret;
> +
> +	igt_assert(fb_flags & FB_COMPRESSED);
> +	create_fb_prepare_add(data->drm_fd, width, height,
> +			      DRM_FORMAT_RGB565, data->ccs_modifier,
> +			      &fb, &f);
> +
> +	ret = drmIoctl(data->drm_fd, DRM_IOCTL_MODE_ADDFB2, &f);
> +	igt_assert_eq(ret, -1);
> +	igt_assert_eq(errno, EINVAL);
> +
> +	gem_close(data->drm_fd, fb.gem_handle);
> +}
> +
> +static void test_bad_fb_params(data_t *data, int width, int height, enum test_fb_flags fb_flags)
> +{
> +	if (data->flags & TEST_BAD_PIXEL_FORMAT)
> +		test_bad_pixel_format(data, width, height, fb_flags);
> +
> +	if (data->flags & TEST_BAD_CCS_PLANE)
> +		test_bad_ccs_plane_params(data, width, height, fb_flags);
>   }
>   
>   static void fast_clear_fb(int drm_fd, struct igt_fb *fb, const float *cc_color)
> @@ -259,16 +352,15 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
>   			enum test_fb_flags fb_flags)
>   {
>   	struct drm_mode_fb_cmd2 f = {0};
> -	uint32_t format;
>   	uint64_t modifier;
>   	cairo_t *cr;
> -	int index;
>   	int ret;
>   	const float cc_color[4] = {colors[!!data->plane].r,
>   				   colors[!!data->plane].g,
>   				   colors[!!data->plane].b,
>   				   1.0};
>   
> +
>   	/* Use either compressed or Y-tiled to test. However, given the lack of
>   	 * available bandwidth, we use linear for the primary plane when
>   	 * testing sprites, since we cannot fit two CCS planes into the
> @@ -281,54 +373,14 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
>   	else
>   		modifier = 0;
>   
> -	if (data->flags & TEST_BAD_PIXEL_FORMAT)
> -		format = DRM_FORMAT_RGB565;
> -	else
> -		format = data->format;
> -
> -	index = get_ccs_plane_index(format);
> -
> -	igt_create_bo_for_fb(data->drm_fd, width, height, format, modifier, fb);
> -	igt_assert(fb->gem_handle > 0);
> -
> -	addfb_init(fb, &f);
> -
> -	/*
> -	 * The stride of CCS planes on GEN12+ is fixed, so we can check for
> -	 * an incorrect stride with the same delta as on earlier platforms.
> -	 */
> -	if (fb_flags & FB_COMPRESSED) {
> -		if (fb_flags & FB_MISALIGN_AUX_STRIDE) {
> -			igt_skip_on_f(width <= 1024,
> -				      "FB already has the smallest possible stride\n");
> -			f.pitches[index] -= 64;
> -		}
> -
> -		if (fb_flags & FB_SMALL_AUX_STRIDE) {
> -			igt_skip_on_f(width <= 1024,
> -				      "FB already has the smallest possible stride\n");
> -			f.pitches[index] = ALIGN(f.pitches[index]/2, 128);
> -		}
> -
> -		if (fb_flags & FB_ZERO_AUX_STRIDE)
> -			f.pitches[index] = 0;
> -
> -		/* Put the CCS buffer on a different BO. */
> -		if (data->flags & TEST_BAD_CCS_HANDLE)
> -			f.handles[index] = gem_create(data->drm_fd, fb->size);
> -
> -		if (data->flags & TEST_NO_AUX_BUFFER) {
> -			f.handles[index] = 0;
> -			f.modifier[index] = 0;
> -			f.pitches[index] = 0;
> -			f.offsets[index] = 0;
> -		}
> -	}
> +	create_fb_prepare_add(data->drm_fd, width, height,
> +			      data->format, modifier,
> +			      fb, &f);
>   
>   	if (data->flags & TEST_RANDOM) {
>   		srand(data->seed);
>   		fill_fb_random(data->drm_fd, fb);
> -	} else if (!(data->flags & TEST_BAD_PIXEL_FORMAT)) {
> +	} else {
>   		bool do_fast_clear = is_ccs_cc_modifier(data->ccs_modifier);
>   		bool do_solid_fill = do_fast_clear || data->plane;
>   		int c = !!data->plane;
> @@ -348,16 +400,7 @@ static void generate_fb(data_t *data, struct igt_fb *fb,
>   	}
>   
>   	ret = drmIoctl(data->drm_fd, DRM_IOCTL_MODE_ADDFB2, &f);
> -	if (data->flags & TEST_FAIL_ON_ADDFB2) {
> -		igt_assert_eq(ret, -1);
> -		igt_assert_eq(errno, EINVAL);
> -
> -		if (f.handles[index])
> -			gem_close(data->drm_fd, f.handles[index]);
> -
> -		return;
> -	} else
> -		igt_assert_eq(ret, 0);
> +	igt_assert_eq(ret, 0);
>   
>   	if (check_ccs_planes)
>   		check_all_ccs_planes(data->drm_fd, fb, cc_color, !(data->flags & TEST_RANDOM));
> @@ -423,6 +466,11 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
>   
>   	fb_width = min(MAX_SPRITE_PLANE_WIDTH, fb_width);
>   
> +	if (data->flags & TEST_FAIL_ON_ADDFB2) {
> +		test_bad_fb_params(data, fb_width, drm_mode->vdisplay, fb_flags);
> +		return true;
> +	}
> +
>   	if (data->plane && fb_flags & FB_COMPRESSED) {
>   		if (!igt_plane_has_format_mod(data->plane, data->format,
>   					      data->ccs_modifier))
> @@ -435,9 +483,6 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
>   		generate_fb(data, &fb, fb_width, drm_mode->vdisplay, fb_flags);
>   	}
>   
> -	if (data->flags & TEST_FAIL_ON_ADDFB2)
> -		goto out_free_fbs;
> -
>   	igt_plane_set_position(primary, 0, 0);
>   	igt_plane_set_size(primary, drm_mode->hdisplay, drm_mode->vdisplay);
>   	igt_plane_set_fb(primary, &fb);
> @@ -475,7 +520,6 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
>   	igt_plane_set_rotation(primary, IGT_ROTATION_0);
>   	igt_display_commit2(display, commit);
>   
> -out_free_fbs:
>   	if (fb_sprite.fb_id)
>   		igt_remove_fb(data->drm_fd, &fb_sprite);
>   	if (fb.fb_id)
> 

[igt-dev] [PATCH i-g-t 5/6] lib/igt_fb: Add support for remapping CCS FBs

[Imre Deak]

Having a kernel support for this, CCS framebuffer strides don't need to
be power-of-two aligned, the kernel will auto-pad the stride.

Only the main surface tiles can be remapped and the AUX surface must be
generated to align with the POT padded main surface stride. Add the
required AUX pagetable programming for this.

Since the AUX pagetable has a granularity of 64 kbytes on the main
surface, mapped by one AUX PTE, the main surface stride must be either 8
tiles, or the stride must be aligned to 16 tiles.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 lib/igt_fb.c            | 24 ++++++++-------
 lib/intel_aux_pgtable.c | 66 ++++++++++++++++++++++++++++++++++++-----
 2 files changed, 72 insertions(+), 18 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 2e53d9225..72291f4f7 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -780,23 +780,27 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
 		return ALIGN(min_stride, align);
 	} else {
 		unsigned int tile_width, tile_height;
-		uint32_t stride;
+		int tile_align = 1;
 
 		igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
 				     &tile_width, &tile_height);
 
 		if (is_gen12_ccs_modifier(fb->modifier)) {
-			stride = ALIGN(min_stride, tile_width * 4);
-
-			/* TODO: add support to kernel to POT align CCS format strides */
-			if (is_i915_device(fb->fd) &&
-			    IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
-				stride = roundup_power_of_two(max(stride, tile_width * 8));
-		} else {
-			stride = ALIGN(min_stride, tile_width);
+			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
+				/*
+				 * The main surface stride must be aligned to the CCS AUX
+				 * page table block size (covered by one AUX PTE). This
+				 * block size is 64kb -> 16 tiles.
+				 * We can do away padding an 8 tile stride to 16, since in
+				 * this case one AUX PTE entry will cover 2 main surface
+				 * tile rows.
+				 */
+				tile_align = (min_stride <= 8 * tile_width) ? 8 : 16;
+			else
+				tile_align = 4;
 		}
 
-		return stride;
+		return ALIGN(min_stride, tile_width * tile_align);
 	}
 }
 
diff --git a/lib/intel_aux_pgtable.c b/lib/intel_aux_pgtable.c
index d89b0575a..fcc337b8d 100644
--- a/lib/intel_aux_pgtable.c
+++ b/lib/intel_aux_pgtable.c
@@ -7,6 +7,8 @@
 #include "intel_bufops.h"
 #include "ioctl_wrappers.h"
 
+#include "lib/intel_chipset.h"
+
 #include "i915/gem_mman.h"
 
 #define BITS_PER_LONG_LONG	(sizeof(long long) * 8)
@@ -356,22 +358,70 @@ pgt_populate_entries_for_buf(struct pgtable *pgt,
 	uint64_t aux_addr = buf->addr.offset + buf->ccs[surface_idx].offset;
 	uint64_t l1_flags = pgt_get_l1_flags(buf, surface_idx);
 	uint64_t lx_flags = pgt_get_lx_flags();
+	int surface_tile_align;
+	int surface_src_row_tiles = buf->surface[surface_idx].stride / 128;
+	/*
+	 * The span of tiles in the FB object mapped by one AUX PTE
+	 * entry, which can be one or more tile rows.
+	 */
+	int surface_src_span_tiles = ALIGN(surface_src_row_tiles, 16);
+	int surface_src_span_size = surface_src_span_tiles * 4096;
+	/*
+	 * The number of tiles in a tile row on the surface auto-padded by
+	 * the kernel if necessary (to a power-of-two size on ADL-P).
+	 */
+	int surface_dst_row_tiles;
+	/*
+	 * The span of tiles on the auto-padded surface, including the
+	 * tiles in the FB object accounted by surface_src_span_tiles and
+	 * any padding tiles.
+	 */
+	int surface_dst_span_tiles;
+	/*
+	 * The size of CCS data mapping a surface_dst_span_tiles sized area
+	 * on the main surface.
+	 */
+	int aux_dst_span_size;
+	int surface_span_offset = 0;
+	int aux_span_offset = 0;
 
-	igt_assert(!(buf->surface[surface_idx].stride % 512));
-	igt_assert_eq(buf->ccs[surface_idx].stride,
-		      buf->surface[surface_idx].stride / 512 * 64);
+	if (IS_ALDERLAKE_P(buf->ibb->devid)) {
+		surface_tile_align = surface_src_row_tiles <= 8 ? 8 : 16;
+		surface_dst_row_tiles = roundup_power_of_two(surface_src_row_tiles);
+		surface_dst_span_tiles = roundup_power_of_two(surface_src_span_tiles);
+	} else {
+		surface_tile_align = 4;
+		surface_dst_row_tiles = surface_src_row_tiles;
+		surface_dst_span_tiles = surface_src_span_tiles;
+	}
 
-	for (; surface_addr < surface_end;
-	     surface_addr += MAIN_SURFACE_BLOCK_SIZE,
-	     aux_addr += AUX_CCS_BLOCK_SIZE) {
+	aux_dst_span_size = surface_dst_span_tiles / 16 * AUX_CCS_BLOCK_SIZE;
+
+	igt_assert_eq(buf->surface[surface_idx].stride % (128 * surface_tile_align), 0);
+	igt_assert_eq(buf->ccs[surface_idx].stride, surface_dst_row_tiles / 4 * 64);
+
+	while (surface_addr + surface_span_offset < surface_end) {
 		uint64_t table = top_table;
 		int level;
 
 		for (level = pgt->levels - 1; level >= 1; level--)
 			table = pgt_get_child_table(pgt, table, level,
-						    surface_addr, lx_flags);
+						    surface_addr + surface_span_offset, lx_flags);
 
-		pgt_set_l1_entry(pgt, table, surface_addr, aux_addr, l1_flags);
+		pgt_set_l1_entry(pgt, table,
+				 surface_addr + surface_span_offset,
+				 aux_addr + aux_span_offset, l1_flags);
+
+		surface_span_offset += MAIN_SURFACE_BLOCK_SIZE;
+		aux_span_offset += AUX_CCS_BLOCK_SIZE;
+
+		if (surface_span_offset >= surface_src_span_size) {
+			surface_addr += surface_src_span_size;
+			surface_span_offset = 0;
+
+			aux_addr += aux_dst_span_size;
+			aux_span_offset = 0;
+		}
 	}
 }
 
-- 
2.27.0

Re: [igt-dev] [PATCH i-g-t 5/6] lib/igt_fb: Add support for remapping CCS FBs

[Juha-Pekka Heikkila]

Look ok to me

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

On 27.8.2021 17.57, Imre Deak wrote:
> Having a kernel support for this, CCS framebuffer strides don't need to
> be power-of-two aligned, the kernel will auto-pad the stride.
> 
> Only the main surface tiles can be remapped and the AUX surface must be
> generated to align with the POT padded main surface stride. Add the
> required AUX pagetable programming for this.
> 
> Since the AUX pagetable has a granularity of 64 kbytes on the main
> surface, mapped by one AUX PTE, the main surface stride must be either 8
> tiles, or the stride must be aligned to 16 tiles.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   lib/igt_fb.c            | 24 ++++++++-------
>   lib/intel_aux_pgtable.c | 66 ++++++++++++++++++++++++++++++++++++-----
>   2 files changed, 72 insertions(+), 18 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 2e53d9225..72291f4f7 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -780,23 +780,27 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>   		return ALIGN(min_stride, align);
>   	} else {
>   		unsigned int tile_width, tile_height;
> -		uint32_t stride;
> +		int tile_align = 1;
>   
>   		igt_get_fb_tile_size(fb->fd, fb->modifier, fb->plane_bpp[plane],
>   				     &tile_width, &tile_height);
>   
>   		if (is_gen12_ccs_modifier(fb->modifier)) {
> -			stride = ALIGN(min_stride, tile_width * 4);
> -
> -			/* TODO: add support to kernel to POT align CCS format strides */
> -			if (is_i915_device(fb->fd) &&
> -			    IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> -				stride = roundup_power_of_two(max(stride, tile_width * 8));
> -		} else {
> -			stride = ALIGN(min_stride, tile_width);
> +			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> +				/*
> +				 * The main surface stride must be aligned to the CCS AUX
> +				 * page table block size (covered by one AUX PTE). This
> +				 * block size is 64kb -> 16 tiles.
> +				 * We can do away padding an 8 tile stride to 16, since in
> +				 * this case one AUX PTE entry will cover 2 main surface
> +				 * tile rows.
> +				 */
> +				tile_align = (min_stride <= 8 * tile_width) ? 8 : 16;
> +			else
> +				tile_align = 4;
>   		}
>   
> -		return stride;
> +		return ALIGN(min_stride, tile_width * tile_align);
>   	}
>   }
>   
> diff --git a/lib/intel_aux_pgtable.c b/lib/intel_aux_pgtable.c
> index d89b0575a..fcc337b8d 100644
> --- a/lib/intel_aux_pgtable.c
> +++ b/lib/intel_aux_pgtable.c
> @@ -7,6 +7,8 @@
>   #include "intel_bufops.h"
>   #include "ioctl_wrappers.h"
>   
> +#include "lib/intel_chipset.h"
> +
>   #include "i915/gem_mman.h"
>   
>   #define BITS_PER_LONG_LONG	(sizeof(long long) * 8)
> @@ -356,22 +358,70 @@ pgt_populate_entries_for_buf(struct pgtable *pgt,
>   	uint64_t aux_addr = buf->addr.offset + buf->ccs[surface_idx].offset;
>   	uint64_t l1_flags = pgt_get_l1_flags(buf, surface_idx);
>   	uint64_t lx_flags = pgt_get_lx_flags();
> +	int surface_tile_align;
> +	int surface_src_row_tiles = buf->surface[surface_idx].stride / 128;
> +	/*
> +	 * The span of tiles in the FB object mapped by one AUX PTE
> +	 * entry, which can be one or more tile rows.
> +	 */
> +	int surface_src_span_tiles = ALIGN(surface_src_row_tiles, 16);
> +	int surface_src_span_size = surface_src_span_tiles * 4096;
> +	/*
> +	 * The number of tiles in a tile row on the surface auto-padded by
> +	 * the kernel if necessary (to a power-of-two size on ADL-P).
> +	 */
> +	int surface_dst_row_tiles;
> +	/*
> +	 * The span of tiles on the auto-padded surface, including the
> +	 * tiles in the FB object accounted by surface_src_span_tiles and
> +	 * any padding tiles.
> +	 */
> +	int surface_dst_span_tiles;
> +	/*
> +	 * The size of CCS data mapping a surface_dst_span_tiles sized area
> +	 * on the main surface.
> +	 */
> +	int aux_dst_span_size;
> +	int surface_span_offset = 0;
> +	int aux_span_offset = 0;
>   
> -	igt_assert(!(buf->surface[surface_idx].stride % 512));
> -	igt_assert_eq(buf->ccs[surface_idx].stride,
> -		      buf->surface[surface_idx].stride / 512 * 64);
> +	if (IS_ALDERLAKE_P(buf->ibb->devid)) {
> +		surface_tile_align = surface_src_row_tiles <= 8 ? 8 : 16;
> +		surface_dst_row_tiles = roundup_power_of_two(surface_src_row_tiles);
> +		surface_dst_span_tiles = roundup_power_of_two(surface_src_span_tiles);
> +	} else {
> +		surface_tile_align = 4;
> +		surface_dst_row_tiles = surface_src_row_tiles;
> +		surface_dst_span_tiles = surface_src_span_tiles;
> +	}
>   
> -	for (; surface_addr < surface_end;
> -	     surface_addr += MAIN_SURFACE_BLOCK_SIZE,
> -	     aux_addr += AUX_CCS_BLOCK_SIZE) {
> +	aux_dst_span_size = surface_dst_span_tiles / 16 * AUX_CCS_BLOCK_SIZE;
> +
> +	igt_assert_eq(buf->surface[surface_idx].stride % (128 * surface_tile_align), 0);
> +	igt_assert_eq(buf->ccs[surface_idx].stride, surface_dst_row_tiles / 4 * 64);
> +
> +	while (surface_addr + surface_span_offset < surface_end) {
>   		uint64_t table = top_table;
>   		int level;
>   
>   		for (level = pgt->levels - 1; level >= 1; level--)
>   			table = pgt_get_child_table(pgt, table, level,
> -						    surface_addr, lx_flags);
> +						    surface_addr + surface_span_offset, lx_flags);
>   
> -		pgt_set_l1_entry(pgt, table, surface_addr, aux_addr, l1_flags);
> +		pgt_set_l1_entry(pgt, table,
> +				 surface_addr + surface_span_offset,
> +				 aux_addr + aux_span_offset, l1_flags);
> +
> +		surface_span_offset += MAIN_SURFACE_BLOCK_SIZE;
> +		aux_span_offset += AUX_CCS_BLOCK_SIZE;
> +
> +		if (surface_span_offset >= surface_src_span_size) {
> +			surface_addr += surface_src_span_size;
> +			surface_span_offset = 0;
> +
> +			aux_addr += aux_dst_span_size;
> +			aux_span_offset = 0;
> +		}
>   	}
>   }
>   
> 

[igt-dev] [PATCH i-g-t 6/6] for-ci: Check for ccs remap support

[Imre Deak]

Remove the power-of-two stride size restriction only if there is a
kernel support for this.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 lib/igt_fb.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 60 insertions(+), 5 deletions(-)

diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 72291f4f7..e729703d9 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -715,6 +715,55 @@ void igt_init_fb(struct igt_fb *fb, int fd, int width, int height,
 	}
 }
 
+static bool adlp_ccs_remap_supported(int drm_fd)
+{
+	uint64_t modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+	uint64_t size;
+	uint32_t width = 48 * 32;	/* Min stride with remapping to 48->64 tiles */
+	uint32_t height = 32 * 32;	/* 4 tile aligned height */
+	uint32_t format = DRM_FORMAT_XRGB8888;
+	uint32_t strides[4] = {};
+	uint32_t offsets[4] = {};
+	uint32_t bo;
+	uint32_t fb_id;
+	static int supported = -1;
+
+	if (supported != -1)
+		return supported;
+
+	strides[0] = width * 4;
+	strides[1] = roundup_power_of_two(strides[0] / 512) * 64;
+
+	offsets[0] = 0;
+	/* Ensure CCS plane 1 is misaligned. */
+	offsets[1] = ALIGN(offsets[0] + strides[0] * height, 2 * 1024 * 1024) + 4096;
+
+	size = offsets[1] + strides[1] * height / 32;
+
+	bo = gem_buffer_create_fb_obj(drm_fd, size);
+	igt_assert(bo);
+
+	if (__kms_addfb(drm_fd, bo,
+			width, height,
+			format, modifier,
+			strides, offsets,
+			2,
+			DRM_MODE_FB_MODIFIERS, &fb_id) != 0) {
+		supported = 0;
+		igt_debug("CCS framebuffer remapping not supported.\n");
+
+		return false;
+	}
+
+	igt_ioctl(drm_fd, DRM_IOCTL_MODE_RMFB, &fb_id);
+	gem_close(drm_fd, bo);
+
+	supported = 1;
+	igt_debug("CCS framebuffer remapping supported\n");
+
+	return true;
+}
+
 static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
 {
 	uint32_t min_stride = fb->plane_width[plane] *
@@ -786,7 +835,7 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
 				     &tile_width, &tile_height);
 
 		if (is_gen12_ccs_modifier(fb->modifier)) {
-			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
+			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd))) {
 				/*
 				 * The main surface stride must be aligned to the CCS AUX
 				 * page table block size (covered by one AUX PTE). This
@@ -796,8 +845,13 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
 				 * tile rows.
 				 */
 				tile_align = (min_stride <= 8 * tile_width) ? 8 : 16;
-			else
+				if (!adlp_ccs_remap_supported(fb->fd)) {
+					tile_align = roundup_power_of_two(min_stride) / 128;
+					tile_align = max(tile_align, 8);
+				}
+			} else {
 				tile_align = 4;
+			}
 		}
 
 		return ALIGN(min_stride, tile_width * tile_align);
@@ -848,7 +902,8 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
 		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
 		 * support is added for CCS FBs.
 		 */
-		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
+		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
+		    !adlp_ccs_remap_supported(fb->fd))
 			size = ALIGN(size, 2 * 1024 * 1024);
 
 		return size;
@@ -870,9 +925,9 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
 		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
 		 * support is added for CCS FBs.
 		 */
-		if (is_i915_device(fb->fd) &&
+		if (is_ccs_modifier(fb->modifier) &&
 		    IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
-		    is_ccs_modifier(fb->modifier))
+		    !adlp_ccs_remap_supported(fb->fd))
 			size = ALIGN(size, 2 * 1024 * 1024);
 
 		return size;
-- 
2.27.0

Re: [igt-dev] [PATCH i-g-t 6/6] for-ci: Check for ccs remap support

[Juha-Pekka Heikkila]

I wonder if this was unnecessary? I think those ccs tests will only run 
on shards and there's no adlp in shards yet?

/Juha-Pekka

On 27.8.2021 17.57, Imre Deak wrote:
> Remove the power-of-two stride size restriction only if there is a
> kernel support for this.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   lib/igt_fb.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++----
>   1 file changed, 60 insertions(+), 5 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 72291f4f7..e729703d9 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -715,6 +715,55 @@ void igt_init_fb(struct igt_fb *fb, int fd, int width, int height,
>   	}
>   }
>   
> +static bool adlp_ccs_remap_supported(int drm_fd)
> +{
> +	uint64_t modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
> +	uint64_t size;
> +	uint32_t width = 48 * 32;	/* Min stride with remapping to 48->64 tiles */
> +	uint32_t height = 32 * 32;	/* 4 tile aligned height */
> +	uint32_t format = DRM_FORMAT_XRGB8888;
> +	uint32_t strides[4] = {};
> +	uint32_t offsets[4] = {};
> +	uint32_t bo;
> +	uint32_t fb_id;
> +	static int supported = -1;
> +
> +	if (supported != -1)
> +		return supported;
> +
> +	strides[0] = width * 4;
> +	strides[1] = roundup_power_of_two(strides[0] / 512) * 64;
> +
> +	offsets[0] = 0;
> +	/* Ensure CCS plane 1 is misaligned. */
> +	offsets[1] = ALIGN(offsets[0] + strides[0] * height, 2 * 1024 * 1024) + 4096;
> +
> +	size = offsets[1] + strides[1] * height / 32;
> +
> +	bo = gem_buffer_create_fb_obj(drm_fd, size);
> +	igt_assert(bo);
> +
> +	if (__kms_addfb(drm_fd, bo,
> +			width, height,
> +			format, modifier,
> +			strides, offsets,
> +			2,
> +			DRM_MODE_FB_MODIFIERS, &fb_id) != 0) {
> +		supported = 0;
> +		igt_debug("CCS framebuffer remapping not supported.\n");
> +
> +		return false;
> +	}
> +
> +	igt_ioctl(drm_fd, DRM_IOCTL_MODE_RMFB, &fb_id);
> +	gem_close(drm_fd, bo);
> +
> +	supported = 1;
> +	igt_debug("CCS framebuffer remapping supported\n");
> +
> +	return true;
> +}
> +
>   static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>   {
>   	uint32_t min_stride = fb->plane_width[plane] *
> @@ -786,7 +835,7 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>   				     &tile_width, &tile_height);
>   
>   		if (is_gen12_ccs_modifier(fb->modifier)) {
> -			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> +			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd))) {
>   				/*
>   				 * The main surface stride must be aligned to the CCS AUX
>   				 * page table block size (covered by one AUX PTE). This
> @@ -796,8 +845,13 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>   				 * tile rows.
>   				 */
>   				tile_align = (min_stride <= 8 * tile_width) ? 8 : 16;
> -			else
> +				if (!adlp_ccs_remap_supported(fb->fd)) {
> +					tile_align = roundup_power_of_two(min_stride) / 128;
> +					tile_align = max(tile_align, 8);
> +				}
> +			} else {
>   				tile_align = 4;
> +			}
>   		}
>   
>   		return ALIGN(min_stride, tile_width * tile_align);
> @@ -848,7 +902,8 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
>   		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
>   		 * support is added for CCS FBs.
>   		 */
> -		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> +		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> +		    !adlp_ccs_remap_supported(fb->fd))
>   			size = ALIGN(size, 2 * 1024 * 1024);
>   
>   		return size;
> @@ -870,9 +925,9 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
>   		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
>   		 * support is added for CCS FBs.
>   		 */
> -		if (is_i915_device(fb->fd) &&
> +		if (is_ccs_modifier(fb->modifier) &&
>   		    IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> -		    is_ccs_modifier(fb->modifier))
> +		    !adlp_ccs_remap_supported(fb->fd))
>   			size = ALIGN(size, 2 * 1024 * 1024);
>   
>   		return size;
> 

Re: [igt-dev] [PATCH i-g-t 6/6] for-ci: Check for ccs remap support

[Imre Deak]

On Tue, Aug 31, 2021 at 08:52:21PM +0300, Juha-Pekka Heikkila wrote:
> I wonder if this was unnecessary?

It wasn't strictly necessary. I thought to test the AUX pagetable
programming w/o the kernel support for remapping as well (also on
the shards run).

> I think those ccs tests will only run on shards and there's no adlp in
> shards yet?

Ok, though the TGL results are still interesting to me (the AUX pagetable
programming changed for that too).

> /Juha-Pekka
> 
> On 27.8.2021 17.57, Imre Deak wrote:
> > Remove the power-of-two stride size restriction only if there is a
> > kernel support for this.
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >   lib/igt_fb.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++----
> >   1 file changed, 60 insertions(+), 5 deletions(-)
> > 
> > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > index 72291f4f7..e729703d9 100644
> > --- a/lib/igt_fb.c
> > +++ b/lib/igt_fb.c
> > @@ -715,6 +715,55 @@ void igt_init_fb(struct igt_fb *fb, int fd, int width, int height,
> >   	}
> >   }
> > +static bool adlp_ccs_remap_supported(int drm_fd)
> > +{
> > +	uint64_t modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
> > +	uint64_t size;
> > +	uint32_t width = 48 * 32;	/* Min stride with remapping to 48->64 tiles */
> > +	uint32_t height = 32 * 32;	/* 4 tile aligned height */
> > +	uint32_t format = DRM_FORMAT_XRGB8888;
> > +	uint32_t strides[4] = {};
> > +	uint32_t offsets[4] = {};
> > +	uint32_t bo;
> > +	uint32_t fb_id;
> > +	static int supported = -1;
> > +
> > +	if (supported != -1)
> > +		return supported;
> > +
> > +	strides[0] = width * 4;
> > +	strides[1] = roundup_power_of_two(strides[0] / 512) * 64;
> > +
> > +	offsets[0] = 0;
> > +	/* Ensure CCS plane 1 is misaligned. */
> > +	offsets[1] = ALIGN(offsets[0] + strides[0] * height, 2 * 1024 * 1024) + 4096;
> > +
> > +	size = offsets[1] + strides[1] * height / 32;
> > +
> > +	bo = gem_buffer_create_fb_obj(drm_fd, size);
> > +	igt_assert(bo);
> > +
> > +	if (__kms_addfb(drm_fd, bo,
> > +			width, height,
> > +			format, modifier,
> > +			strides, offsets,
> > +			2,
> > +			DRM_MODE_FB_MODIFIERS, &fb_id) != 0) {
> > +		supported = 0;
> > +		igt_debug("CCS framebuffer remapping not supported.\n");
> > +
> > +		return false;
> > +	}
> > +
> > +	igt_ioctl(drm_fd, DRM_IOCTL_MODE_RMFB, &fb_id);
> > +	gem_close(drm_fd, bo);
> > +
> > +	supported = 1;
> > +	igt_debug("CCS framebuffer remapping supported\n");
> > +
> > +	return true;
> > +}
> > +
> >   static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> >   {
> >   	uint32_t min_stride = fb->plane_width[plane] *
> > @@ -786,7 +835,7 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> >   				     &tile_width, &tile_height);
> >   		if (is_gen12_ccs_modifier(fb->modifier)) {
> > -			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > +			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd))) {
> >   				/*
> >   				 * The main surface stride must be aligned to the CCS AUX
> >   				 * page table block size (covered by one AUX PTE). This
> > @@ -796,8 +845,13 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> >   				 * tile rows.
> >   				 */
> >   				tile_align = (min_stride <= 8 * tile_width) ? 8 : 16;
> > -			else
> > +				if (!adlp_ccs_remap_supported(fb->fd)) {
> > +					tile_align = roundup_power_of_two(min_stride) / 128;
> > +					tile_align = max(tile_align, 8);
> > +				}
> > +			} else {
> >   				tile_align = 4;
> > +			}
> >   		}
> >   		return ALIGN(min_stride, tile_width * tile_align);
> > @@ -848,7 +902,8 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
> >   		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
> >   		 * support is added for CCS FBs.
> >   		 */
> > -		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > +		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> > +		    !adlp_ccs_remap_supported(fb->fd))
> >   			size = ALIGN(size, 2 * 1024 * 1024);
> >   		return size;
> > @@ -870,9 +925,9 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
> >   		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
> >   		 * support is added for CCS FBs.
> >   		 */
> > -		if (is_i915_device(fb->fd) &&
> > +		if (is_ccs_modifier(fb->modifier) &&
> >   		    IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> > -		    is_ccs_modifier(fb->modifier))
> > +		    !adlp_ccs_remap_supported(fb->fd))
> >   			size = ALIGN(size, 2 * 1024 * 1024);
> >   		return size;
> > 
> 

Re: [igt-dev] [PATCH i-g-t 6/6] for-ci: Check for ccs remap support

[Zbigniew Kempczyński]

On Fri, Aug 27, 2021 at 05:57:56PM +0300, Imre Deak wrote:
> Remove the power-of-two stride size restriction only if there is a
> kernel support for this.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  lib/igt_fb.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++----
>  1 file changed, 60 insertions(+), 5 deletions(-)
> 
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index 72291f4f7..e729703d9 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -715,6 +715,55 @@ void igt_init_fb(struct igt_fb *fb, int fd, int width, int height,
>  	}
>  }
>  
> +static bool adlp_ccs_remap_supported(int drm_fd)
> +{
> +	uint64_t modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
> +	uint64_t size;
> +	uint32_t width = 48 * 32;	/* Min stride with remapping to 48->64 tiles */
> +	uint32_t height = 32 * 32;	/* 4 tile aligned height */
> +	uint32_t format = DRM_FORMAT_XRGB8888;
> +	uint32_t strides[4] = {};
> +	uint32_t offsets[4] = {};
> +	uint32_t bo;
> +	uint32_t fb_id;
> +	static int supported = -1;

Just for making sure - 'supported' is kernel feature or behavior 
for specific gen? For latter case it shouldn't be cached.

--
Zbigniew 

> +
> +	if (supported != -1)
> +		return supported;
> +
> +	strides[0] = width * 4;
> +	strides[1] = roundup_power_of_two(strides[0] / 512) * 64;
> +
> +	offsets[0] = 0;
> +	/* Ensure CCS plane 1 is misaligned. */
> +	offsets[1] = ALIGN(offsets[0] + strides[0] * height, 2 * 1024 * 1024) + 4096;
> +
> +	size = offsets[1] + strides[1] * height / 32;
> +
> +	bo = gem_buffer_create_fb_obj(drm_fd, size);
> +	igt_assert(bo);
> +
> +	if (__kms_addfb(drm_fd, bo,
> +			width, height,
> +			format, modifier,
> +			strides, offsets,
> +			2,
> +			DRM_MODE_FB_MODIFIERS, &fb_id) != 0) {
> +		supported = 0;
> +		igt_debug("CCS framebuffer remapping not supported.\n");
> +
> +		return false;
> +	}
> +
> +	igt_ioctl(drm_fd, DRM_IOCTL_MODE_RMFB, &fb_id);
> +	gem_close(drm_fd, bo);
> +
> +	supported = 1;
> +	igt_debug("CCS framebuffer remapping supported\n");
> +
> +	return true;
> +}
> +
>  static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>  {
>  	uint32_t min_stride = fb->plane_width[plane] *
> @@ -786,7 +835,7 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>  				     &tile_width, &tile_height);
>  
>  		if (is_gen12_ccs_modifier(fb->modifier)) {
> -			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> +			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd))) {
>  				/*
>  				 * The main surface stride must be aligned to the CCS AUX
>  				 * page table block size (covered by one AUX PTE). This
> @@ -796,8 +845,13 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
>  				 * tile rows.
>  				 */
>  				tile_align = (min_stride <= 8 * tile_width) ? 8 : 16;
> -			else
> +				if (!adlp_ccs_remap_supported(fb->fd)) {
> +					tile_align = roundup_power_of_two(min_stride) / 128;
> +					tile_align = max(tile_align, 8);
> +				}
> +			} else {
>  				tile_align = 4;
> +			}
>  		}
>  
>  		return ALIGN(min_stride, tile_width * tile_align);
> @@ -848,7 +902,8 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
>  		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
>  		 * support is added for CCS FBs.
>  		 */
> -		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> +		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> +		    !adlp_ccs_remap_supported(fb->fd))
>  			size = ALIGN(size, 2 * 1024 * 1024);
>  
>  		return size;
> @@ -870,9 +925,9 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
>  		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
>  		 * support is added for CCS FBs.
>  		 */
> -		if (is_i915_device(fb->fd) &&
> +		if (is_ccs_modifier(fb->modifier) &&
>  		    IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> -		    is_ccs_modifier(fb->modifier))
> +		    !adlp_ccs_remap_supported(fb->fd))
>  			size = ALIGN(size, 2 * 1024 * 1024);
>  
>  		return size;
> -- 
> 2.27.0
> 

Re: [igt-dev] [PATCH i-g-t 6/6] for-ci: Check for ccs remap support

[Imre Deak]

On Tue, Sep 14, 2021 at 09:46:00AM +0200, Zbigniew Kempczyński wrote:
> On Fri, Aug 27, 2021 at 05:57:56PM +0300, Imre Deak wrote:
> > Remove the power-of-two stride size restriction only if there is a
> > kernel support for this.
> > 
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  lib/igt_fb.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++++----
> >  1 file changed, 60 insertions(+), 5 deletions(-)
> > 
> > diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> > index 72291f4f7..e729703d9 100644
> > --- a/lib/igt_fb.c
> > +++ b/lib/igt_fb.c
> > @@ -715,6 +715,55 @@ void igt_init_fb(struct igt_fb *fb, int fd, int width, int height,
> >  	}
> >  }
> >  
> > +static bool adlp_ccs_remap_supported(int drm_fd)
> > +{
> > +	uint64_t modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
> > +	uint64_t size;
> > +	uint32_t width = 48 * 32;	/* Min stride with remapping to 48->64 tiles */
> > +	uint32_t height = 32 * 32;	/* 4 tile aligned height */
> > +	uint32_t format = DRM_FORMAT_XRGB8888;
> > +	uint32_t strides[4] = {};
> > +	uint32_t offsets[4] = {};
> > +	uint32_t bo;
> > +	uint32_t fb_id;
> > +	static int supported = -1;
> 
> Just for making sure - 'supported' is kernel feature or behavior 
> for specific gen? For latter case it shouldn't be cached.

It reflects the presence of the kernel patches removing a constrain on
ADL-P for the plane offset and stride of framebuffers using CCS
modifiers.

> 
> --
> Zbigniew 
> 
> > +
> > +	if (supported != -1)
> > +		return supported;
> > +
> > +	strides[0] = width * 4;
> > +	strides[1] = roundup_power_of_two(strides[0] / 512) * 64;
> > +
> > +	offsets[0] = 0;
> > +	/* Ensure CCS plane 1 is misaligned. */
> > +	offsets[1] = ALIGN(offsets[0] + strides[0] * height, 2 * 1024 * 1024) + 4096;
> > +
> > +	size = offsets[1] + strides[1] * height / 32;
> > +
> > +	bo = gem_buffer_create_fb_obj(drm_fd, size);
> > +	igt_assert(bo);
> > +
> > +	if (__kms_addfb(drm_fd, bo,
> > +			width, height,
> > +			format, modifier,
> > +			strides, offsets,
> > +			2,
> > +			DRM_MODE_FB_MODIFIERS, &fb_id) != 0) {
> > +		supported = 0;
> > +		igt_debug("CCS framebuffer remapping not supported.\n");
> > +
> > +		return false;
> > +	}
> > +
> > +	igt_ioctl(drm_fd, DRM_IOCTL_MODE_RMFB, &fb_id);
> > +	gem_close(drm_fd, bo);
> > +
> > +	supported = 1;
> > +	igt_debug("CCS framebuffer remapping supported\n");
> > +
> > +	return true;
> > +}
> > +
> >  static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> >  {
> >  	uint32_t min_stride = fb->plane_width[plane] *
> > @@ -786,7 +835,7 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> >  				     &tile_width, &tile_height);
> >  
> >  		if (is_gen12_ccs_modifier(fb->modifier)) {
> > -			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > +			if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd))) {
> >  				/*
> >  				 * The main surface stride must be aligned to the CCS AUX
> >  				 * page table block size (covered by one AUX PTE). This
> > @@ -796,8 +845,13 @@ static uint32_t calc_plane_stride(struct igt_fb *fb, int plane)
> >  				 * tile rows.
> >  				 */
> >  				tile_align = (min_stride <= 8 * tile_width) ? 8 : 16;
> > -			else
> > +				if (!adlp_ccs_remap_supported(fb->fd)) {
> > +					tile_align = roundup_power_of_two(min_stride) / 128;
> > +					tile_align = max(tile_align, 8);
> > +				}
> > +			} else {
> >  				tile_align = 4;
> > +			}
> >  		}
> >  
> >  		return ALIGN(min_stride, tile_width * tile_align);
> > @@ -848,7 +902,8 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
> >  		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
> >  		 * support is added for CCS FBs.
> >  		 */
> > -		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)))
> > +		if (IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> > +		    !adlp_ccs_remap_supported(fb->fd))
> >  			size = ALIGN(size, 2 * 1024 * 1024);
> >  
> >  		return size;
> > @@ -870,9 +925,9 @@ static uint64_t calc_plane_size(struct igt_fb *fb, int plane)
> >  		 * On ADL_P CCS color planes must be 2MB aligned, until remapping
> >  		 * support is added for CCS FBs.
> >  		 */
> > -		if (is_i915_device(fb->fd) &&
> > +		if (is_ccs_modifier(fb->modifier) &&
> >  		    IS_ALDERLAKE_P(intel_get_drm_devid(fb->fd)) &&
> > -		    is_ccs_modifier(fb->modifier))
> > +		    !adlp_ccs_remap_supported(fb->fd))
> >  			size = ALIGN(size, 2 * 1024 * 1024);
> >  
> >  		return size;
> > -- 
> > 2.27.0
> > 

[igt-dev] ✓ Fi.CI.BAT: success for lib/igt_fb: Remove stride, offset restrictions on CCS FBs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2554 bytes --]

== Series Details ==

Series: lib/igt_fb: Remove stride, offset restrictions on CCS FBs
URL   : https://patchwork.freedesktop.org/series/94107/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10530 -> IGTPW_6168
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html

Known issues
------------

  Here are the changes found in IGTPW_6168 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][1] ([fdo#109271]) +8 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@i915_pm_rps@basic-api:
    - fi-rkl-guc:         [PASS][2] -> [DMESG-WARN][3] ([i915#3925])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-rkl-guc/igt@i915_pm_rps@basic-api.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/fi-rkl-guc/igt@i915_pm_rps@basic-api.html

  * igt@runner@aborted:
    - fi-rkl-guc:         NOTRUN -> [FAIL][4] ([i915#3925])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/fi-rkl-guc/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          [DMESG-WARN][5] ([i915#2203] / [i915#2868]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
  [i915#2868]: https://gitlab.freedesktop.org/drm/intel/issues/2868
  [i915#3925]: https://gitlab.freedesktop.org/drm/intel/issues/3925


Participating hosts (38 -> 33)
------------------------------

  Missing    (5): fi-ilk-m540 bat-adls-5 fi-bsw-cyan bat-jsl-1 fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6187 -> IGTPW_6168

  CI-20190529: 20190529
  CI_DRM_10530: 63bca765c920120bd9746d9093190d82c4ace341 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6168: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html
  IGT_6187: 1afd52c1471dafdf521eae431f3e228826de6de2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html

[-- Attachment #2: Type: text/html, Size: 3293 bytes --]

[igt-dev] ✓ Fi.CI.IGT: success for lib/igt_fb: Remove stride, offset restrictions on CCS FBs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30275 bytes --]

== Series Details ==

Series: lib/igt_fb: Remove stride, offset restrictions on CCS FBs
URL   : https://patchwork.freedesktop.org/series/94107/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10530_full -> IGTPW_6168_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html

Known issues
------------

  Here are the changes found in IGTPW_6168_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-massive:
    - shard-snb:          NOTRUN -> [DMESG-WARN][1] ([i915#3002]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-snb2/igt@gem_create@create-massive.html
    - shard-kbl:          NOTRUN -> [DMESG-WARN][2] ([i915#3002])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl3/igt@gem_create@create-massive.html

  * igt@gem_ctx_persistence@legacy-engines-mixed:
    - shard-snb:          NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-snb7/igt@gem_ctx_persistence@legacy-engines-mixed.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-kbl:          [PASS][4] -> [FAIL][5] ([i915#2842]) +1 similar issue
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl3/igt@gem_exec_fair@basic-none-solo@rcs0.html
    - shard-glk:          NOTRUN -> [FAIL][6] ([i915#2842]) +1 similar issue
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk1/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-glk:          [PASS][7] -> [FAIL][8] ([i915#2842]) +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk6/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-iclb:         [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb3/igt@gem_exec_fair@basic-pace@rcs0.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [PASS][11] -> [FAIL][12] ([i915#2849])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_huc_copy@huc-copy:
    - shard-apl:          NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#2190])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl2/igt@gem_huc_copy@huc-copy.html

  * igt@gem_pread@exhaustion:
    - shard-glk:          NOTRUN -> [WARN][14] ([i915#2658])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk8/igt@gem_pread@exhaustion.html

  * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled:
    - shard-iclb:         NOTRUN -> [SKIP][15] ([i915#768])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb8/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-apl:          NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3323])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl3/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@input-checking:
    - shard-apl:          NOTRUN -> [DMESG-WARN][17] ([i915#3002]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl6/igt@gem_userptr_blits@input-checking.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         NOTRUN -> [FAIL][18] ([i915#454])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb3/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@gem-mmap-type@fixed:
    - shard-glk:          NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#3976])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk4/igt@i915_pm_rpm@gem-mmap-type@fixed.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - shard-glk:          [PASS][20] -> [DMESG-WARN][21] ([i915#118] / [i915#95]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk8/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk4/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][22] ([fdo#110725] / [fdo#111614])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb6/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html
    - shard-tglb:         NOTRUN -> [SKIP][23] ([fdo#111614])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb3/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#3777]) +1 similar issue
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-glk:          NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3777])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3777]) +1 similar issue
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-apl:          NOTRUN -> [SKIP][27] ([fdo#109271]) +234 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-iclb:         NOTRUN -> [SKIP][28] ([fdo#110723])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_joiner@2x-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][29] ([i915#2705])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb7/igt@kms_big_joiner@2x-modeset.html
    - shard-tglb:         NOTRUN -> [SKIP][30] ([i915#2705])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb6/igt@kms_big_joiner@2x-modeset.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs:
    - shard-snb:          NOTRUN -> [SKIP][31] ([fdo#109271]) +380 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-snb6/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3886]) +6 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk9/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3886]) +17 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl2/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][34] ([i915#3689]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb3/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_ccs.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#3886]) +3 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl7/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-iclb:         NOTRUN -> [SKIP][36] ([fdo#109278] / [i915#3886])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb1/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-d-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][37] ([fdo#109271]) +129 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk8/igt@kms_ccs@pipe-d-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-hpd-with-enabled-mode:
    - shard-iclb:         NOTRUN -> [SKIP][38] ([fdo#109284] / [fdo#111827]) +2 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb4/igt@kms_chamelium@dp-hpd-with-enabled-mode.html

  * igt@kms_chamelium@hdmi-edid-change-during-suspend:
    - shard-apl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [fdo#111827]) +22 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl6/igt@kms_chamelium@hdmi-edid-change-during-suspend.html

  * igt@kms_chamelium@hdmi-mode-timings:
    - shard-snb:          NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +23 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-snb6/igt@kms_chamelium@hdmi-mode-timings.html

  * igt@kms_color_chamelium@pipe-a-ctm-0-75:
    - shard-kbl:          NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +12 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl6/igt@kms_color_chamelium@pipe-a-ctm-0-75.html
    - shard-tglb:         NOTRUN -> [SKIP][42] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb1/igt@kms_color_chamelium@pipe-a-ctm-0-75.html

  * igt@kms_color_chamelium@pipe-b-ctm-0-5:
    - shard-glk:          NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +13 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk3/igt@kms_color_chamelium@pipe-b-ctm-0-5.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen:
    - shard-iclb:         [PASS][44] -> [DMESG-FAIL][45] ([i915#1226])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb1/igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb2/igt@kms_cursor_crc@pipe-a-cursor-128x128-offscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-32x32-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][46] ([i915#3319])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb1/igt@kms_cursor_crc@pipe-a-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding:
    - shard-iclb:         NOTRUN -> [SKIP][47] ([fdo#109278] / [fdo#109279]) +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb6/igt@kms_cursor_crc@pipe-a-cursor-512x512-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-32x10-random:
    - shard-tglb:         NOTRUN -> [SKIP][48] ([i915#3359]) +4 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][49] ([fdo#109279] / [i915#3359]) +3 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-512x512-onscreen.html

  * igt@kms_cursor_legacy@pipe-d-single-move:
    - shard-iclb:         NOTRUN -> [SKIP][50] ([fdo#109278]) +9 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb1/igt@kms_cursor_legacy@pipe-d-single-move.html

  * igt@kms_flip@2x-nonexisting-fb-interruptible:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109274])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb6/igt@kms_flip@2x-nonexisting-fb-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@a-dp1:
    - shard-kbl:          [PASS][52] -> [FAIL][53] ([i915#79])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl3/igt@kms_flip@flip-vs-expired-vblank@a-dp1.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl1/igt@kms_flip@flip-vs-expired-vblank@a-dp1.html

  * igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a1:
    - shard-glk:          NOTRUN -> [FAIL][54] ([i915#79])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk3/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@b-vga1:
    - shard-snb:          NOTRUN -> [DMESG-WARN][55] ([i915#3305])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-snb2/igt@kms_flip@flip-vs-suspend-interruptible@b-vga1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
    - shard-apl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2672])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
    - shard-kbl:          NOTRUN -> [SKIP][57] ([fdo#109271]) +121 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt:
    - shard-iclb:         NOTRUN -> [SKIP][58] ([fdo#109280]) +7 similar issues
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][59] -> [DMESG-WARN][60] ([i915#180]) +2 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([fdo#111825]) +10 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence:
    - shard-glk:          NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#533])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk4/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d-frame-sequence.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-apl:          NOTRUN -> [FAIL][63] ([fdo#108145] / [i915#265]) +2 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-glk:          NOTRUN -> [FAIL][64] ([fdo#108145] / [i915#265])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][65] ([i915#265])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][66] ([fdo#108145] / [i915#265])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-iclb:         NOTRUN -> [SKIP][67] ([i915#3536]) +1 similar issue
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb7/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_plane_lowres@pipe-c-tiling-x:
    - shard-tglb:         NOTRUN -> [SKIP][68] ([i915#3536]) +1 similar issue
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb3/igt@kms_plane_lowres@pipe-c-tiling-x.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#658]) +4 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
    - shard-iclb:         NOTRUN -> [SKIP][70] ([i915#658])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
    - shard-glk:          NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#658]) +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
    - shard-kbl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#658]) +3 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
    - shard-tglb:         NOTRUN -> [SKIP][73] ([i915#2920])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][74] -> [SKIP][75] ([fdo#109642] / [fdo#111068] / [i915#658])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb3/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][76] -> [SKIP][77] ([fdo#109441]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb3/igt@kms_psr@psr2_sprite_blt.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-tglb:         NOTRUN -> [SKIP][78] ([fdo#111615]) +3 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_sysfs_edid_timing:
    - shard-apl:          NOTRUN -> [FAIL][79] ([IGT#2])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl2/igt@kms_sysfs_edid_timing.html
    - shard-kbl:          NOTRUN -> [FAIL][80] ([IGT#2])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl4/igt@kms_sysfs_edid_timing.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [PASS][81] -> [DMESG-WARN][82] ([i915#180] / [i915#295])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@kms_vblank@pipe-d-wait-idle:
    - shard-apl:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533]) +2 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl1/igt@kms_vblank@pipe-d-wait-idle.html

  * igt@kms_writeback@writeback-check-output:
    - shard-kbl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2437])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl4/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-apl:          NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#2437])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl7/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@nouveau_crc@pipe-b-ctx-flip-detection:
    - shard-tglb:         NOTRUN -> [SKIP][86] ([i915#2530])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb1/igt@nouveau_crc@pipe-b-ctx-flip-detection.html
    - shard-iclb:         NOTRUN -> [SKIP][87] ([i915#2530])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb2/igt@nouveau_crc@pipe-b-ctx-flip-detection.html

  * igt@perf@mi-rpc:
    - shard-tglb:         NOTRUN -> [SKIP][88] ([fdo#109289])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb5/igt@perf@mi-rpc.html

  * igt@runner@aborted:
    - shard-snb:          NOTRUN -> ([FAIL][89], [FAIL][90]) ([i915#3002])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-snb5/igt@runner@aborted.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-snb2/igt@runner@aborted.html

  * igt@sysfs_clients@create:
    - shard-apl:          NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#2994]) +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl2/igt@sysfs_clients@create.html

  * igt@sysfs_clients@fair-1:
    - shard-glk:          NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2994]) +1 similar issue
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk3/igt@sysfs_clients@fair-1.html

  * igt@sysfs_clients@recycle:
    - shard-kbl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994]) +1 similar issue
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl2/igt@sysfs_clients@recycle.html

  
#### Possible fixes ####

  * igt@gem_eio@unwedge-stress:
    - shard-iclb:         [TIMEOUT][94] ([i915#2369] / [i915#2481] / [i915#3070]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb1/igt@gem_eio@unwedge-stress.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb1/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-kbl:          [FAIL][96] ([i915#2842]) -> [PASS][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@gem_exec_fair@basic-none@vecs0.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl2/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-glk:          [FAIL][98] ([i915#2842]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk7/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_mmap_gtt@cpuset-big-copy-xy:
    - shard-iclb:         [FAIL][100] ([i915#307]) -> [PASS][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb4/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-xy.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [DMESG-WARN][102] ([i915#180]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-apl2/igt@gem_workarounds@suspend-resume-context.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl8/igt@gem_workarounds@suspend-resume-context.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          [DMESG-WARN][104] ([i915#1436] / [i915#716]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-glk1/igt@gen9_exec_parse@allowed-all.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-glk9/igt@gen9_exec_parse@allowed-all.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [INCOMPLETE][106] ([i915#155] / [i915#180] / [i915#636]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [SKIP][108] ([fdo#109441]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb8/igt@kms_psr@psr2_cursor_blt.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-kbl:          [DMESG-WARN][110] ([i915#180]) -> [PASS][111] +1 similar issue
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl3/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  
#### Warnings ####

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
    - shard-iclb:         [SKIP][112] ([i915#2920]) -> [SKIP][113] ([i915#658])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-iclb:         [SKIP][114] ([i915#658]) -> [SKIP][115] ([i915#2920]) +2 similar issues
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-iclb5/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][116], [FAIL][117], [FAIL][118], [FAIL][119], [FAIL][120]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602] / [i915#92]) -> ([FAIL][121], [FAIL][122], [FAIL][123], [FAIL][124], [FAIL][125], [FAIL][126]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl7/igt@runner@aborted.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl4/igt@runner@aborted.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl6/igt@runner@aborted.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl4/igt@runner@aborted.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-kbl1/igt@runner@aborted.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl1/igt@runner@aborted.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl1/igt@runner@aborted.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl1/igt@runner@aborted.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl1/igt@runner@aborted.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl7/igt@runner@aborted.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-kbl3/igt@runner@aborted.html
    - shard-apl:          ([FAIL][127], [FAIL][128]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3363]) -> ([FAIL][129], [FAIL][130]) ([i915#3002] / [i915#3363])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-apl2/igt@runner@aborted.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-apl6/igt@runner@aborted.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl1/igt@runner@aborted.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-apl6/igt@runner@aborted.html
    - shard-tglb:         ([FAIL][131], [FAIL][132]) ([i915#3002]) -> ([FAIL][133], [FAIL][134]) ([i915#1887] / [i915#3002])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-tglb5/igt@runner@aborted.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10530/shard-tglb5/igt@runner@aborted.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb5/igt@runner@aborted.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/shard-tglb3/igt@runner@aborted.html

  
  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#110725]: https://bugs.freedesktop.org/show_bug.cgi?id=110725
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1099]: https://gitlab.freedesktop.org/drm/intel/issues/1099
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
  [i915#1887]: https://gitlab.freedesktop.org/drm/intel/issues/1887
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2369]: https://gitlab.freedesktop.org/drm/intel/issues/2369
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2481]

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6168/index.html

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