* [U-Boot] [PATCH] arm: mvebu: theadorable: Configure board for PCIe 2.0 capability
@ 2016-08-25 14:22 Stefan Roese
2016-09-24 8:08 ` Stefan Roese
0 siblings, 1 reply; 2+ messages in thread
From: Stefan Roese @ 2016-08-25 14:22 UTC (permalink / raw)
To: u-boot
Use a board-specific board_sat_r_get() function to configure the board
for PCIe 2.0 capability (e.g. 5GB/s link speed). Otherwise the default
of 2.5GB/s will be established.
Signed-off-by: Stefan Roese <sr@denx.de>
---
board/theadorable/theadorable.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c
index 9c0f120..4be7b61 100644
--- a/board/theadorable/theadorable.c
+++ b/board/theadorable/theadorable.c
@@ -126,6 +126,12 @@ MV_BIN_SERDES_CFG *board_serdes_cfg_get(u8 pex_mode)
return &theadorable_serdes_cfg[0];
}
+u8 board_sat_r_get(u8 dev_num, u8 reg)
+{
+ /* Bit 0 enables PCI 2.0 link capabilities instead of PCI 1.x */
+ return 0x01;
+}
+
int board_early_init_f(void)
{
/* Configure MPP */
--
2.9.3
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] arm: mvebu: theadorable: Configure board for PCIe 2.0 capability
2016-08-25 14:22 [U-Boot] [PATCH] arm: mvebu: theadorable: Configure board for PCIe 2.0 capability Stefan Roese
@ 2016-09-24 8:08 ` Stefan Roese
0 siblings, 0 replies; 2+ messages in thread
From: Stefan Roese @ 2016-09-24 8:08 UTC (permalink / raw)
To: u-boot
On 25.08.2016 16:22, Stefan Roese wrote:
> Use a board-specific board_sat_r_get() function to configure the board
> for PCIe 2.0 capability (e.g. 5GB/s link speed). Otherwise the default
> of 2.5GB/s will be established.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
Applied to u-boot-marvell/master
Thanks,
Stefan
^ permalink raw reply [flat|nested] 2+ messages in thread
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2016-08-25 14:22 [U-Boot] [PATCH] arm: mvebu: theadorable: Configure board for PCIe 2.0 capability Stefan Roese
2016-09-24 8:08 ` Stefan Roese
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