From: Mesih Kilinc <mesihkilinc@gmail.com>
To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-sunxi@googlegroups.com
Cc: Mesih Kilinc <mesihkilinc@gmail.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>,
Icenowy Zheng <icenowy@aosc.io>, Rob Herring <robh+dt@kernel.org>
Subject: [PATCH 6/7] ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s
Date: Mon, 11 Feb 2019 12:21:12 +0300 [thread overview]
Message-ID: <37f573797e18fc22f8f78d0a62550b6d5e460a8d.1549875778.git.mesihkilinc@gmail.com> (raw)
In-Reply-To: <cover.1549875778.git.mesihkilinc@gmail.com>
PC0~PC4 is pin group for SPI0. PA0~PA4 is pin group for SPI1.
Add device tree nodes for this groups.
Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 1b332d9..a92a411 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -96,6 +96,16 @@
pins = "PE0", "PE1";
function = "uart0";
};
+
+ spi0_pc_pins: spi0-pc-pins {
+ pins = "PC0", "PC1", "PC2", "PC3";
+ function = "spi0";
+ };
+
+ spi1_pa_pins: spi1-pa-pins {
+ pins = "PA0", "PA1", "PA2", "PA3";
+ function = "spi1";
+ };
};
timer@1c20c00 {
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Mesih Kilinc <mesihkilinc-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Cc: Mesih Kilinc
<mesihkilinc-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: [PATCH 6/7] ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s
Date: Mon, 11 Feb 2019 12:21:12 +0300 [thread overview]
Message-ID: <37f573797e18fc22f8f78d0a62550b6d5e460a8d.1549875778.git.mesihkilinc@gmail.com> (raw)
In-Reply-To: <cover.1549875778.git.mesihkilinc-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
PC0~PC4 is pin group for SPI0. PA0~PA4 is pin group for SPI1.
Add device tree nodes for this groups.
Signed-off-by: Mesih Kilinc <mesihkilinc-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 1b332d9..a92a411 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -96,6 +96,16 @@
pins = "PE0", "PE1";
function = "uart0";
};
+
+ spi0_pc_pins: spi0-pc-pins {
+ pins = "PC0", "PC1", "PC2", "PC3";
+ function = "spi0";
+ };
+
+ spi1_pa_pins: spi1-pa-pins {
+ pins = "PA0", "PA1", "PA2", "PA3";
+ function = "spi1";
+ };
};
timer@1c20c00 {
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Mesih Kilinc <mesihkilinc@gmail.com>
To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-sunxi@googlegroups.com
Cc: Mesih Kilinc <mesihkilinc@gmail.com>,
Linus Walleij <linus.walleij@linaro.org>,
Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 6/7] ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s
Date: Mon, 11 Feb 2019 12:21:12 +0300 [thread overview]
Message-ID: <37f573797e18fc22f8f78d0a62550b6d5e460a8d.1549875778.git.mesihkilinc@gmail.com> (raw)
In-Reply-To: <cover.1549875778.git.mesihkilinc@gmail.com>
PC0~PC4 is pin group for SPI0. PA0~PA4 is pin group for SPI1.
Add device tree nodes for this groups.
Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com>
---
arch/arm/boot/dts/suniv-f1c100s.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 1b332d9..a92a411 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -96,6 +96,16 @@
pins = "PE0", "PE1";
function = "uart0";
};
+
+ spi0_pc_pins: spi0-pc-pins {
+ pins = "PC0", "PC1", "PC2", "PC3";
+ function = "spi0";
+ };
+
+ spi1_pa_pins: spi1-pa-pins {
+ pins = "PA0", "PA1", "PA2", "PA3";
+ function = "spi1";
+ };
};
timer@1c20c00 {
--
2.7.4
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next prev parent reply other threads:[~2019-02-11 9:22 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-11 9:21 [PATCH 0/7] Timer & SPI support for Allwinner suniv F1C100s Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` [PATCH 1/7] dt-bindings: timer: Add Allwinner suniv timer Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` [PATCH 2/7] clocksource: sun4i: add a compatible for suniv Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` [PATCH 3/7] ARM: dts: suniv: Add dt-binding headers for F1C100s Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` [PATCH 4/7] dt-bindings: spi: Add Support for Allwinner F1C100s Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-25 23:33 ` Rob Herring
2019-02-25 23:33 ` Rob Herring
2019-02-25 23:33 ` Rob Herring
2019-02-11 9:21 ` [PATCH 5/7] ARM: dts: suniv: Add SPI device-tree nodes Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc [this message]
2019-02-11 9:21 ` [PATCH 6/7] ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 15:51 ` Maxime Ripard
2019-02-11 15:51 ` Maxime Ripard
2019-02-11 15:51 ` Maxime Ripard
2019-02-11 9:21 ` [PATCH 7/7] ARM: dts: f1c100s: Activate SPI flash on Lichee Pi Nano Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-02-11 9:21 ` Mesih Kilinc
2019-03-17 17:39 ` [PATCH 0/7] Timer & SPI support for Allwinner suniv F1C100s Icenowy Zheng
2019-03-17 17:39 ` Icenowy Zheng
2019-03-17 17:39 ` Icenowy Zheng
2019-03-17 20:52 ` Daniel Lezcano
2019-03-17 20:52 ` Daniel Lezcano
2019-03-17 20:52 ` Daniel Lezcano
2019-03-18 7:18 ` Icenowy Zheng
2019-03-18 7:18 ` Icenowy Zheng
2019-03-18 8:04 ` Daniel Lezcano
2019-03-18 8:04 ` Daniel Lezcano
[not found] ` <c741ed1a-ef02-c7c9-846b-c5240c8d07b6-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2019-03-18 9:25 ` Mesih Kılınç
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