* [U-Boot] [PATCH v2 0/9] FPGA subsystem changes
@ 2014-05-07 13:03 Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 1/9] fpga: spartan2: Avoid CamelCase Michal Simek
` (8 more replies)
0 siblings, 9 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
Hi,
Tom reported me one warning in spear board and I have run
buildman for all boards which have xilinx_desc in board folder.
Below is the report for this patch series.
Thanks,
Michal
[u-boot]$ ./tools/buildman/buildman -b xnext/fpga apf27 zynq spear astro balloon3 pmc440 gen860t mvsmr mt_ventoux -se
Summary of 10 commits for 35 boards (4 threads, 1 job per thread)
01: Merge branch 'next' of git://git.denx.de/u-boot-sh
m68k: + astro_mcf5373l
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/cpu/mcf532x/cpu_init.c: In function 'cpu_init_f':
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/cpu/mcf532x/cpu_init.c:211:10: warning: unused variable 'wdog' [-Wunused-variable]
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/lib/bootm.c: In function 'do_bootm_linux':
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/lib/bootm.c:53:8: warning: unused variable 'rd_len' [-Wunused-variable]
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/lib/bootm.c:99:12: warning: 'initrd_start' may be used uninitialized in this function [-Wuninitialized]
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/lib/bootm.c:99:12: warning: 'initrd_end' may be used uninitialized in this function [-Wuninitialized]
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/lib/bootm.c:99:12: warning: 'cmd_start' may be used uninitialized in this function [-Wuninitialized]
+/mnt/disk/xnext/fpga/.bm-work/00/arch/m68k/lib/bootm.c:99:12: warning: 'cmd_end' may be used uninitialized in this function [-Wuninitialized]
+/mnt/disk/xnext/fpga/.bm-work/00/board/astro/mcf5373l/mcf5373l.c: In function 'initdram':
+/mnt/disk/xnext/fpga/.bm-work/00/board/astro/mcf5373l/mcf5373l.c:83:5: warning: pointer targets in passing argument 1 of 'get_ram_size' differ in signedness [-Wpointer-sign]
+/mnt/disk/xnext/fpga/.bm-work/00/include/common.h:470:6: note: expected 'long int *' but argument is of type 'long unsigned int *'
+/mnt/disk/xnext/fpga/.bm-work/00/board/astro/mcf5373l/fpga.c:168:2: warning: initialization from incompatible pointer type [enabled by default]
+/mnt/disk/xnext/fpga/.bm-work/00/board/astro/mcf5373l/fpga.c:168:2: warning: (near initialization for 'altera_fns.write') [enabled by default]
+/mnt/disk/xnext/fpga/.bm-work/00/board/astro/mcf5373l/fpga.c: In function 'astro5373l_altera_load':
+/mnt/disk/xnext/fpga/.bm-work/00/board/astro/mcf5373l/fpga.c:196:20: warning: assignment from incompatible pointer type [enabled by default]
02: fpga: spartan2: Avoid CamelCase
03: fpga: spartan3: Avoid CamelCase
04: fpga: virtex2: Avoid CamelCase
05: fpga: xilinx: Avoid CamelCase for in Xilinx_desc
06: fpga: xilinx: Fix the rest of CamelCases
07: fpga: xilinx: Simplify load/dump/info function handling
08: fpga: zynq: Remove sparse warnings
09: fpga: zynq: Use helper functions for zynq dma
10: fpga: zynq: Use helper function zynq_validate_bitstream
Changes in v2:
- Fix compilation errors in Astro
- Exchange fpga_op and name in xilinx_desc because spartan2/3, virtex2
are not using names.
- Fix warning reported by Tom
board/spear/x600/fpga.c:177:2: warning: initialization from incompatible pointer type [enabled by default]
board/spear/x600/fpga.c:177:2: warning: (near initialization for ?fpga[0].name?) [enabled by default]
- Add fix for apf27 and astro
Michal Simek (7):
fpga: spartan2: Avoid CamelCase
fpga: spartan3: Avoid CamelCase
fpga: virtex2: Avoid CamelCase
fpga: xilinx: Avoid CamelCase for in Xilinx_desc
fpga: xilinx: Fix the rest of CamelCases
fpga: xilinx: Simplify load/dump/info function handling
fpga: zynq: Remove sparse warnings
Siva Durga Prasad Paladugu (2):
fpga: zynq: Use helper functions for zynq dma
fpga: zynq: Use helper function zynq_validate_bitstream
board/armadeus/apf27/fpga.c | 7 +-
board/astro/mcf5373l/fpga.c | 47 +++----
board/balloon3/balloon3.c | 4 +-
board/esd/pmc440/fpga.c | 8 +-
board/gen860t/fpga.c | 6 +-
board/matrix_vision/mvsmr/fpga.c | 6 +-
board/spear/x600/fpga.c | 4 +-
board/teejet/mt_ventoux/mt_ventoux.c | 4 +-
board/xilinx/zynq/board.c | 14 +--
drivers/fpga/spartan2.c | 46 ++++---
drivers/fpga/spartan3.c | 46 ++++---
drivers/fpga/virtex2.c | 40 +++---
drivers/fpga/xilinx.c | 179 +++------------------------
drivers/fpga/zynqpl.c | 234 +++++++++++++++++++++--------------
include/spartan2.h | 72 ++++++-----
include/spartan3.h | 84 ++++++-------
include/virtex2.h | 66 +++++-----
include/xilinx.h | 65 +++++-----
include/zynqpl.h | 16 ++-
19 files changed, 438 insertions(+), 510 deletions(-)
--
1.8.2.3
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 1/9] fpga: spartan2: Avoid CamelCase
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 2/9] fpga: spartan3: " Michal Simek
` (7 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
No functional changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
board/esd/pmc440/fpga.c | 2 +-
board/matrix_vision/mvsmr/fpga.c | 2 +-
drivers/fpga/spartan2.c | 40 ++++++++++++++++++++--------------------
drivers/fpga/xilinx.c | 14 +++++++-------
include/spartan2.h | 32 ++++++++++++++++----------------
include/xilinx.h | 2 +-
6 files changed, 46 insertions(+), 46 deletions(-)
diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c
index b7b62dd94dbb..cef205088270 100644
--- a/board/esd/pmc440/fpga.c
+++ b/board/esd/pmc440/fpga.c
@@ -47,7 +47,7 @@ Xilinx_Spartan3_Slave_Serial_fns pmc440_fpga_fns = {
};
#endif
-Xilinx_Spartan2_Slave_Serial_fns ngcc_fpga_fns = {
+xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = {
ngcc_fpga_pre_config_fn,
ngcc_fpga_pgm_fn,
ngcc_fpga_clk_fn,
diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c
index 88035a9e9e39..639bc7c75b9d 100644
--- a/board/matrix_vision/mvsmr/fpga.c
+++ b/board/matrix_vision/mvsmr/fpga.c
@@ -27,7 +27,7 @@ Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
};
Xilinx_desc spartan3 = {
- Xilinx_Spartan2,
+ xilinx_spartan2,
slave_serial,
XILINX_XC3S200_SIZE,
(void *) &fpga_fns,
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 6eab1b51e556..bd317095c656 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -31,29 +31,29 @@
#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
#endif
-static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int Spartan2_sp_info(Xilinx_desc *desc ); */
+static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan2_sp_info(Xilinx_desc *desc ); */
-static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int Spartan2_ss_info(Xilinx_desc *desc ); */
+static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan2_ss_info(Xilinx_desc *desc ); */
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
- ret_val = Spartan2_ss_load (desc, buf, bsize);
+ ret_val = spartan2_ss_load(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
- ret_val = Spartan2_sp_load (desc, buf, bsize);
+ ret_val = spartan2_sp_load(desc, buf, bsize);
break;
default:
@@ -64,19 +64,19 @@ int Spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
- ret_val = Spartan2_ss_dump (desc, buf, bsize);
+ ret_val = spartan2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
- ret_val = Spartan2_sp_dump (desc, buf, bsize);
+ ret_val = spartan2_sp_dump(desc, buf, bsize);
break;
default:
@@ -87,7 +87,7 @@ int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int Spartan2_info( Xilinx_desc *desc )
+int spartan2_info(Xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -96,10 +96,10 @@ int Spartan2_info( Xilinx_desc *desc )
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
-static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
+ xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
PRINTF ("%s: start with interface functions @ 0x%p\n",
__FUNCTION__, fn);
@@ -248,10 +248,10 @@ static int Spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
+ xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
if (fn) {
unsigned char *data = (unsigned char *) buf;
@@ -296,10 +296,10 @@ static int Spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/* ------------------------------------------------------------------------- */
-static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns;
+ xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns;
int i;
unsigned char val;
@@ -439,7 +439,7 @@ static int Spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int Spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
/* Readback is only available through the Slave Parallel and */
/* boundary-scan interfaces. */
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 2e0db535d474..47bbf3951406 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -149,11 +149,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
} else
switch (desc->family) {
- case Xilinx_Spartan2:
+ case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Loader...\n",
__FUNCTION__);
- ret_val = Spartan2_load (desc, buf, bsize);
+ ret_val = spartan2_load(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-II devices.\n",
__FUNCTION__);
@@ -206,11 +206,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
} else
switch (desc->family) {
- case Xilinx_Spartan2:
+ case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Reader...\n",
__FUNCTION__);
- ret_val = Spartan2_dump (desc, buf, bsize);
+ ret_val = spartan2_dump(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-II devices.\n",
__FUNCTION__);
@@ -262,7 +262,7 @@ int xilinx_info (Xilinx_desc * desc)
if (xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("Family: \t");
switch (desc->family) {
- case Xilinx_Spartan2:
+ case xilinx_spartan2:
printf ("Spartan-II\n");
break;
case Xilinx_Spartan3:
@@ -316,9 +316,9 @@ int xilinx_info (Xilinx_desc * desc)
if (desc->iface_fns) {
printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
switch (desc->family) {
- case Xilinx_Spartan2:
+ case xilinx_spartan2:
#if defined(CONFIG_FPGA_SPARTAN2)
- Spartan2_info (desc);
+ spartan2_info(desc);
#else
/* just in case */
printf ("%s: No support for Spartan-II devices.\n",
diff --git a/include/spartan2.h b/include/spartan2.h
index 087a27d3cc04..a9fc68acc890 100644
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -10,9 +10,9 @@
#include <xilinx.h>
-extern int Spartan2_load(Xilinx_desc *desc, const void *image, size_t size);
-extern int Spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-extern int Spartan2_info(Xilinx_desc *desc);
+int spartan2_load(Xilinx_desc *desc, const void *image, size_t size);
+int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+int spartan2_info(Xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
@@ -29,7 +29,7 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
-} Xilinx_Spartan2_Slave_Parallel_fns;
+} xilinx_spartan2_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
@@ -40,7 +40,7 @@ typedef struct {
Xilinx_done_fn done;
Xilinx_wr_fn wr;
Xilinx_post_fn post;
-} Xilinx_Spartan2_Slave_Serial_fns;
+} xilinx_spartan2_slave_serial_fns;
/* Device Image Sizes
*********************************************************************/
@@ -63,36 +63,36 @@ typedef struct {
*********************************************************************/
/* Spartan-II devices */
#define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie }
#define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie }
#define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie }
#define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie }
#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie }
#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie }
#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie }
#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie }
#endif /* _SPARTAN2_H_ */
diff --git a/include/xilinx.h b/include/xilinx.h
index 00a585e5fc31..9d870b2d8481 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -26,7 +26,7 @@ typedef enum { /* typedef Xilinx_iface */
typedef enum { /* typedef Xilinx_Family */
min_xilinx_type, /* low range check value */
- Xilinx_Spartan2, /* Spartan-II Family */
+ xilinx_spartan2, /* Spartan-II Family */
Xilinx_VirtexE, /* Virtex-E Family */
Xilinx_Virtex2, /* Virtex2 Family */
Xilinx_Spartan3, /* Spartan-III Family */
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 2/9] fpga: spartan3: Avoid CamelCase
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 1/9] fpga: spartan2: Avoid CamelCase Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 3/9] fpga: virtex2: " Michal Simek
` (6 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
No functional changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
board/armadeus/apf27/fpga.c | 4 ++--
board/astro/mcf5373l/fpga.c | 4 ++--
board/balloon3/balloon3.c | 2 +-
board/esd/pmc440/fpga.c | 4 ++--
board/matrix_vision/mvsmr/fpga.c | 2 +-
board/spear/x600/fpga.c | 2 +-
board/teejet/mt_ventoux/mt_ventoux.c | 2 +-
drivers/fpga/spartan3.c | 40 ++++++++++++++++++------------------
drivers/fpga/xilinx.c | 14 ++++++-------
include/spartan3.h | 38 +++++++++++++++++-----------------
include/xilinx.h | 2 +-
11 files changed, 57 insertions(+), 57 deletions(-)
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
index 0c08c0640ef2..56fde200e794 100644
--- a/board/armadeus/apf27/fpga.c
+++ b/board/armadeus/apf27/fpga.c
@@ -26,7 +26,7 @@
* Spartan2 code is used to download our Spartan 3 :) code is compatible.
* Just take care about the file size
*/
-Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
+xilinx_spartan3_slave_parallel_fns fpga_fns = {
fpga_pre_fn,
fpga_pgm_fn,
fpga_init_fn,
@@ -43,7 +43,7 @@ Xilinx_Spartan3_Slave_Parallel_fns fpga_fns = {
};
Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
- {Xilinx_Spartan3,
+ {xilinx_spartan3,
slave_parallel,
1196128l/8,
(void *)&fpga_fns,
diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c
index c679ad7f65c6..152ff1f58c97 100644
--- a/board/astro/mcf5373l/fpga.c
+++ b/board/astro/mcf5373l/fpga.c
@@ -363,7 +363,7 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
* relocated at runtime.
* FIXME: relocation not yet working for coldfire, see below!
*/
-Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = {
+xilinx_spartan3_slave_serial_fns xilinx_fns = {
xilinx_pre_config_fn,
xilinx_pgm_fn,
xilinx_clk_fn,
@@ -375,7 +375,7 @@ Xilinx_Spartan3_Slave_Serial_fns xilinx_fns = {
};
Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
- {Xilinx_Spartan3,
+ {xilinx_spartan3,
slave_serial,
XILINX_XC3S4000_SIZE,
(void *)&xilinx_fns,
diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c
index 04e0574658ac..4aa66052da9c 100644
--- a/board/balloon3/balloon3.c
+++ b/board/balloon3/balloon3.c
@@ -191,7 +191,7 @@ int fpga_cs_fn(int assert_clk, int flush, int cookie)
return assert_clk;
}
-Xilinx_Spartan3_Slave_Parallel_fns balloon3_fpga_fns = {
+xilinx_spartan3_slave_parallel_fns balloon3_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_init_fn,
diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c
index cef205088270..18a1b63088d6 100644
--- a/board/esd/pmc440/fpga.c
+++ b/board/esd/pmc440/fpga.c
@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define USE_SP_CODE
#ifdef USE_SP_CODE
-Xilinx_Spartan3_Slave_Parallel_fns pmc440_fpga_fns = {
+xilinx_spartan3_slave_parallel_fns pmc440_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_init_fn,
@@ -36,7 +36,7 @@ Xilinx_Spartan3_Slave_Parallel_fns pmc440_fpga_fns = {
fpga_post_config_fn,
};
#else
-Xilinx_Spartan3_Slave_Serial_fns pmc440_fpga_fns = {
+xilinx_spartan3_slave_serial_fns pmc440_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c
index 639bc7c75b9d..b20745524394 100644
--- a/board/matrix_vision/mvsmr/fpga.c
+++ b/board/matrix_vision/mvsmr/fpga.c
@@ -16,7 +16,7 @@
#include "fpga.h"
#include "mvsmr.h"
-Xilinx_Spartan3_Slave_Serial_fns fpga_fns = {
+xilinx_spartan3_slave_serial_fns fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
diff --git a/board/spear/x600/fpga.c b/board/spear/x600/fpga.c
index c06c99477777..c26eba42845c 100644
--- a/board/spear/x600/fpga.c
+++ b/board/spear/x600/fpga.c
@@ -163,7 +163,7 @@ static int fpga_wr_fn(int assert_write, int flush, int cookie)
return assert_write;
}
-static Xilinx_Spartan3_Slave_Serial_fns x600_fpga_fns = {
+static xilinx_spartan3_slave_serial_fns x600_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c
index c32d554ea429..a36176494e42 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -190,7 +190,7 @@ int fpga_clk_fn(int assert_clk, int flush, int cookie)
return assert_clk;
}
-Xilinx_Spartan3_Slave_Serial_fns mt_ventoux_fpga_fns = {
+xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_clk_fn,
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 3edc5c2c66a6..e40abbfb9460 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -35,29 +35,29 @@
#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
#endif
-static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int Spartan3_sp_info(Xilinx_desc *desc ); */
+static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan3_sp_info(Xilinx_desc *desc ); */
-static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int Spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int Spartan3_ss_info(Xilinx_desc *desc); */
+static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan3_ss_info(Xilinx_desc *desc); */
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-int Spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
- ret_val = Spartan3_ss_load (desc, buf, bsize);
+ ret_val = spartan3_ss_load(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
- ret_val = Spartan3_sp_load (desc, buf, bsize);
+ ret_val = spartan3_sp_load(desc, buf, bsize);
break;
default:
@@ -68,19 +68,19 @@ int Spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
- ret_val = Spartan3_ss_dump (desc, buf, bsize);
+ ret_val = spartan3_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
- ret_val = Spartan3_sp_dump (desc, buf, bsize);
+ ret_val = spartan3_sp_dump(desc, buf, bsize);
break;
default:
@@ -91,7 +91,7 @@ int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int Spartan3_info( Xilinx_desc *desc )
+int spartan3_info(Xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -100,10 +100,10 @@ int Spartan3_info( Xilinx_desc *desc )
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
-static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
+ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
PRINTF ("%s: start with interface functions @ 0x%p\n",
__FUNCTION__, fn);
@@ -254,10 +254,10 @@ static int Spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
+ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
if (fn) {
unsigned char *data = (unsigned char *) buf;
@@ -302,10 +302,10 @@ static int Spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/* ------------------------------------------------------------------------- */
-static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Serial_fns *fn = desc->iface_fns;
+ xilinx_spartan3_slave_serial_fns *fn = desc->iface_fns;
int i;
unsigned char val;
@@ -457,7 +457,7 @@ static int Spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int Spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
/* Readback is only available through the Slave Parallel and */
/* boundary-scan interfaces. */
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 47bbf3951406..7d93d641f6aa 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -159,11 +159,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
#endif
break;
- case Xilinx_Spartan3:
+ case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Loader...\n",
__FUNCTION__);
- ret_val = Spartan3_load (desc, buf, bsize);
+ ret_val = spartan3_load(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-III devices.\n",
__FUNCTION__);
@@ -216,11 +216,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
#endif
break;
- case Xilinx_Spartan3:
+ case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Reader...\n",
__FUNCTION__);
- ret_val = Spartan3_dump (desc, buf, bsize);
+ ret_val = spartan3_dump(desc, buf, bsize);
#else
printf ("%s: No support for Spartan-III devices.\n",
__FUNCTION__);
@@ -265,7 +265,7 @@ int xilinx_info (Xilinx_desc * desc)
case xilinx_spartan2:
printf ("Spartan-II\n");
break;
- case Xilinx_Spartan3:
+ case xilinx_spartan3:
printf ("Spartan-III\n");
break;
case Xilinx_Virtex2:
@@ -325,9 +325,9 @@ int xilinx_info (Xilinx_desc * desc)
__FUNCTION__);
#endif
break;
- case Xilinx_Spartan3:
+ case xilinx_spartan3:
#if defined(CONFIG_FPGA_SPARTAN3)
- Spartan3_info (desc);
+ spartan3_info(desc);
#else
/* just in case */
printf ("%s: No support for Spartan-III devices.\n",
diff --git a/include/spartan3.h b/include/spartan3.h
index 72e7c0ddd002..93ca8a40bc34 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -10,9 +10,9 @@
#include <xilinx.h>
-extern int Spartan3_load(Xilinx_desc *desc, const void *image, size_t size);
-extern int Spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-extern int Spartan3_info(Xilinx_desc *desc);
+int spartan3_load(Xilinx_desc *desc, const void *image, size_t size);
+int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+int spartan3_info(Xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
@@ -29,7 +29,7 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
-} Xilinx_Spartan3_Slave_Parallel_fns;
+} xilinx_spartan3_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
@@ -42,7 +42,7 @@ typedef struct {
Xilinx_post_fn post;
Xilinx_bwr_fn bwr; /* block write function */
Xilinx_abort_fn abort;
-} Xilinx_Spartan3_Slave_Serial_fns;
+} xilinx_spartan3_slave_serial_fns;
/* Device Image Sizes
*********************************************************************/
@@ -73,46 +73,46 @@ typedef struct {
*********************************************************************/
/* Spartan-III devices */
#define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
#define XILINX_XC3S200_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie }
#define XILINX_XC3S400_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie }
#define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie }
#define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie }
#define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie }
#define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie }
#define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie }
/* Spartan-3E devices */
#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
#define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
-{ Xilinx_Spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie }
#endif /* _SPARTAN3_H_ */
diff --git a/include/xilinx.h b/include/xilinx.h
index 9d870b2d8481..365c0c358eb4 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -29,7 +29,7 @@ typedef enum { /* typedef Xilinx_Family */
xilinx_spartan2, /* Spartan-II Family */
Xilinx_VirtexE, /* Virtex-E Family */
Xilinx_Virtex2, /* Virtex2 Family */
- Xilinx_Spartan3, /* Spartan-III Family */
+ xilinx_spartan3, /* Spartan-III Family */
xilinx_zynq, /* Zynq Family */
max_xilinx_type /* insert all new types before this */
} Xilinx_Family; /* end, typedef Xilinx_Family */
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 3/9] fpga: virtex2: Avoid CamelCase
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 1/9] fpga: spartan2: Avoid CamelCase Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 2/9] fpga: spartan3: " Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 4/9] fpga: xilinx: Avoid CamelCase for in Xilinx_desc Michal Simek
` (5 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
No functional changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
board/gen860t/fpga.c | 4 ++--
drivers/fpga/virtex2.c | 34 +++++++++++++++++-----------------
drivers/fpga/xilinx.c | 14 +++++++-------
include/virtex2.h | 34 +++++++++++++++++-----------------
include/xilinx.h | 2 +-
5 files changed, 44 insertions(+), 44 deletions(-)
diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c
index b7984dd0fec1..48a4222ac410 100644
--- a/board/gen860t/fpga.c
+++ b/board/gen860t/fpga.c
@@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Note that these are pointers to code that is in Flash. They will be
* relocated at runtime.
*/
-Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = {
+xilinx_virtex2_slave_selectmap_fns fpga_fns = {
fpga_pre_config_fn,
fpga_pgm_fn,
fpga_init_fn,
@@ -57,7 +57,7 @@ Xilinx_Virtex2_Slave_SelectMap_fns fpga_fns = {
};
Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
- {Xilinx_Virtex2,
+ {xilinx_virtex2,
slave_selectmap,
XILINX_XC2V3000_SIZE,
(void *) &fpga_fns,
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index b5a895d41a73..1cd9046a2487 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -84,25 +84,25 @@
#define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */
#endif
-static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-int Virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
- ret_val = Virtex2_ss_load (desc, buf, bsize);
+ ret_val = virtex2_ss_load(desc, buf, bsize);
break;
case slave_selectmap:
PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
- ret_val = Virtex2_ssm_load (desc, buf, bsize);
+ ret_val = virtex2_ssm_load(desc, buf, bsize);
break;
default:
@@ -112,19 +112,19 @@ int Virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
switch (desc->iface) {
case slave_serial:
PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
- ret_val = Virtex2_ss_dump (desc, buf, bsize);
+ ret_val = virtex2_ss_dump(desc, buf, bsize);
break;
case slave_parallel:
PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
- ret_val = Virtex2_ssm_dump (desc, buf, bsize);
+ ret_val = virtex2_ssm_dump(desc, buf, bsize);
break;
default:
@@ -134,7 +134,7 @@ int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int Virtex2_info (Xilinx_desc * desc)
+int virtex2_info(Xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -153,10 +153,10 @@ int Virtex2_info (Xilinx_desc * desc)
* INIT_B and DONE lines. If both are high, configuration has
* succeeded. Congratulations!
*/
-static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
+ xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
PRINTF ("%s:%d: Start with interface functions @ 0x%p\n",
__FUNCTION__, __LINE__, fn);
@@ -352,10 +352,10 @@ static int Virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/*
* Read the FPGA configuration data
*/
-static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
+ xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
if (fn) {
unsigned char *data = (unsigned char *) buf;
@@ -404,13 +404,13 @@ static int Virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int Virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
{
printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
return FPGA_FAIL;
}
-static int Virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
{
printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__);
return FPGA_FAIL;
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 7d93d641f6aa..6953535f0823 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -169,11 +169,11 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
#endif
break;
- case Xilinx_Virtex2:
+ case xilinx_virtex2:
#if defined(CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Loader...\n",
__FUNCTION__);
- ret_val = Virtex2_load (desc, buf, bsize);
+ ret_val = virtex2_load(desc, buf, bsize);
#else
printf ("%s: No support for Virtex-II devices.\n",
__FUNCTION__);
@@ -226,11 +226,11 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
#endif
break;
- case Xilinx_Virtex2:
+ case xilinx_virtex2:
#if defined( CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Reader...\n",
__FUNCTION__);
- ret_val = Virtex2_dump (desc, buf, bsize);
+ ret_val = virtex2_dump(desc, buf, bsize);
#else
printf ("%s: No support for Virtex-II devices.\n",
__FUNCTION__);
@@ -268,7 +268,7 @@ int xilinx_info (Xilinx_desc * desc)
case xilinx_spartan3:
printf ("Spartan-III\n");
break;
- case Xilinx_Virtex2:
+ case xilinx_virtex2:
printf ("Virtex-II\n");
break;
case xilinx_zynq:
@@ -334,9 +334,9 @@ int xilinx_info (Xilinx_desc * desc)
__FUNCTION__);
#endif
break;
- case Xilinx_Virtex2:
+ case xilinx_virtex2:
#if defined(CONFIG_FPGA_VIRTEX2)
- Virtex2_info (desc);
+ virtex2_info(desc);
#else
/* just in case */
printf ("%s: No support for Virtex-II devices.\n",
diff --git a/include/virtex2.h b/include/virtex2.h
index 2e9a4f52da3d..1e6624ca9627 100644
--- a/include/virtex2.h
+++ b/include/virtex2.h
@@ -11,9 +11,9 @@
#include <xilinx.h>
-extern int Virtex2_load(Xilinx_desc *desc, const void *image, size_t size);
-extern int Virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-extern int Virtex2_info(Xilinx_desc *desc);
+int virtex2_load(Xilinx_desc *desc, const void *image, size_t size);
+int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+int virtex2_info(Xilinx_desc *desc);
/*
* Slave SelectMap Implementation function table.
@@ -32,7 +32,7 @@ typedef struct {
Xilinx_busy_fn busy;
Xilinx_abort_fn abort;
Xilinx_post_fn post;
-} Xilinx_Virtex2_Slave_SelectMap_fns;
+} xilinx_virtex2_slave_selectmap_fns;
/* Slave Serial Implementation function table */
typedef struct {
@@ -40,7 +40,7 @@ typedef struct {
Xilinx_clk_fn clk;
Xilinx_rdata_fn rdata;
Xilinx_wdata_fn wdata;
-} Xilinx_Virtex2_Slave_Serial_fns;
+} xilinx_virtex2_slave_serial_fns;
/* Device Image Sizes (in bytes)
*********************************************************************/
@@ -60,39 +60,39 @@ typedef struct {
/* Descriptor Macros
*********************************************************************/
#define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie }
#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie }
#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie }
#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie }
#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie }
#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie }
#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie }
#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie }
#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie }
#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie }
#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie }
#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
-{ Xilinx_Virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie }
#endif /* _VIRTEX2_H_ */
diff --git a/include/xilinx.h b/include/xilinx.h
index 365c0c358eb4..fa89fb68351b 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -28,7 +28,7 @@ typedef enum { /* typedef Xilinx_Family */
min_xilinx_type, /* low range check value */
xilinx_spartan2, /* Spartan-II Family */
Xilinx_VirtexE, /* Virtex-E Family */
- Xilinx_Virtex2, /* Virtex2 Family */
+ xilinx_virtex2, /* Virtex2 Family */
xilinx_spartan3, /* Spartan-III Family */
xilinx_zynq, /* Zynq Family */
max_xilinx_type /* insert all new types before this */
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 4/9] fpga: xilinx: Avoid CamelCase for in Xilinx_desc
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
` (2 preceding siblings ...)
2014-05-07 13:03 ` [U-Boot] [PATCH v2 3/9] fpga: virtex2: " Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 5/9] fpga: xilinx: Fix the rest of CamelCases Michal Simek
` (4 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
No functional changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
board/armadeus/apf27/fpga.c | 2 +-
board/astro/mcf5373l/fpga.c | 2 +-
board/balloon3/balloon3.c | 2 +-
board/esd/pmc440/fpga.c | 2 +-
board/gen860t/fpga.c | 2 +-
board/matrix_vision/mvsmr/fpga.c | 2 +-
board/spear/x600/fpga.c | 2 +-
board/teejet/mt_ventoux/mt_ventoux.c | 2 +-
board/xilinx/zynq/board.c | 14 +++++++-------
drivers/fpga/spartan2.c | 26 +++++++++++++-------------
drivers/fpga/spartan3.c | 26 +++++++++++++-------------
drivers/fpga/virtex2.c | 22 +++++++++++-----------
drivers/fpga/xilinx.c | 14 +++++++-------
drivers/fpga/zynqpl.c | 6 +++---
include/spartan2.h | 6 +++---
include/spartan3.h | 6 +++---
include/virtex2.h | 6 +++---
include/xilinx.h | 10 +++++-----
include/zynqpl.h | 6 +++---
19 files changed, 79 insertions(+), 79 deletions(-)
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
index 56fde200e794..7d6e1e462c99 100644
--- a/board/armadeus/apf27/fpga.c
+++ b/board/armadeus/apf27/fpga.c
@@ -42,7 +42,7 @@ xilinx_spartan3_slave_parallel_fns fpga_fns = {
fpga_post_fn,
};
-Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
{xilinx_spartan3,
slave_parallel,
1196128l/8,
diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c
index 152ff1f58c97..9dc82c5737c2 100644
--- a/board/astro/mcf5373l/fpga.c
+++ b/board/astro/mcf5373l/fpga.c
@@ -374,7 +374,7 @@ xilinx_spartan3_slave_serial_fns xilinx_fns = {
xilinx_fastwr_fn
};
-Xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
+xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
{xilinx_spartan3,
slave_serial,
XILINX_XC3S4000_SIZE,
diff --git a/board/balloon3/balloon3.c b/board/balloon3/balloon3.c
index 4aa66052da9c..aa108ca15390 100644
--- a/board/balloon3/balloon3.c
+++ b/board/balloon3/balloon3.c
@@ -207,7 +207,7 @@ xilinx_spartan3_slave_parallel_fns balloon3_fpga_fns = {
fpga_post_config_fn,
};
-Xilinx_desc fpga = XILINX_XC3S1000_DESC(slave_parallel,
+xilinx_desc fpga = XILINX_XC3S1000_DESC(slave_parallel,
(void *)&balloon3_fpga_fns, 0);
/* Initialize the FPGA */
diff --git a/board/esd/pmc440/fpga.c b/board/esd/pmc440/fpga.c
index 18a1b63088d6..f876da855b13 100644
--- a/board/esd/pmc440/fpga.c
+++ b/board/esd/pmc440/fpga.c
@@ -57,7 +57,7 @@ xilinx_spartan2_slave_serial_fns ngcc_fpga_fns = {
ngcc_fpga_post_config_fn
};
-Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
XILINX_XC3S1200E_DESC(
#ifdef USE_SP_CODE
slave_parallel,
diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c
index 48a4222ac410..dd0ef707d6d5 100644
--- a/board/gen860t/fpga.c
+++ b/board/gen860t/fpga.c
@@ -56,7 +56,7 @@ xilinx_virtex2_slave_selectmap_fns fpga_fns = {
fpga_post_config_fn
};
-Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
{xilinx_virtex2,
slave_selectmap,
XILINX_XC2V3000_SIZE,
diff --git a/board/matrix_vision/mvsmr/fpga.c b/board/matrix_vision/mvsmr/fpga.c
index b20745524394..518992578c1e 100644
--- a/board/matrix_vision/mvsmr/fpga.c
+++ b/board/matrix_vision/mvsmr/fpga.c
@@ -26,7 +26,7 @@ xilinx_spartan3_slave_serial_fns fpga_fns = {
0
};
-Xilinx_desc spartan3 = {
+xilinx_desc spartan3 = {
xilinx_spartan2,
slave_serial,
XILINX_XC3S200_SIZE,
diff --git a/board/spear/x600/fpga.c b/board/spear/x600/fpga.c
index c26eba42845c..b256222e1864 100644
--- a/board/spear/x600/fpga.c
+++ b/board/spear/x600/fpga.c
@@ -173,7 +173,7 @@ static xilinx_spartan3_slave_serial_fns x600_fpga_fns = {
fpga_post_config_fn,
};
-static Xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
+static xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
XILINX_XC3S1200E_DESC(slave_serial, &x600_fpga_fns, 0)
};
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c b/board/teejet/mt_ventoux/mt_ventoux.c
index a36176494e42..b4a0a72bd0fe 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -200,7 +200,7 @@ xilinx_spartan3_slave_serial_fns mt_ventoux_fpga_fns = {
fpga_post_config_fn,
};
-Xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial,
+xilinx_desc fpga = XILINX_XC6SLX4_DESC(slave_serial,
(void *)&mt_ventoux_fpga_fns, 0);
/* Initialize the FPGA */
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 485a5e4a2492..c8cc2bc93446 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -14,15 +14,15 @@
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_FPGA
-Xilinx_desc fpga;
+xilinx_desc fpga;
/* It can be done differently */
-Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
-Xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
-Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
-Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
-Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
-Xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
+xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
+xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
+xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
+xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
+xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
+xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
#endif
int board_init(void)
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index bd317095c656..0796729436cb 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -31,17 +31,17 @@
#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
#endif
-static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int spartan2_sp_info(Xilinx_desc *desc ); */
+static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan2_sp_info(xilinx_desc *desc ); */
-static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int spartan2_ss_info(Xilinx_desc *desc ); */
+static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan2_ss_info(xilinx_desc *desc ); */
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -64,7 +64,7 @@ int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -87,7 +87,7 @@ int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan2_info(Xilinx_desc *desc)
+int spartan2_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -96,7 +96,7 @@ int spartan2_info(Xilinx_desc *desc)
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
-static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
@@ -248,7 +248,7 @@ static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
@@ -296,7 +296,7 @@ static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/* ------------------------------------------------------------------------- */
-static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns;
@@ -439,7 +439,7 @@ static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
/* Readback is only available through the Slave Parallel and */
/* boundary-scan interfaces. */
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index e40abbfb9460..1304b4c646e3 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -35,17 +35,17 @@
#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
#endif
-static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int spartan3_sp_info(Xilinx_desc *desc ); */
+static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan3_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan3_sp_info(xilinx_desc *desc ); */
-static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int spartan3_ss_info(Xilinx_desc *desc); */
+static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan3_ss_info(xilinx_desc *desc); */
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -68,7 +68,7 @@ int spartan3_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -91,7 +91,7 @@ int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan3_info(Xilinx_desc *desc)
+int spartan3_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -100,7 +100,7 @@ int spartan3_info(Xilinx_desc *desc)
/* ------------------------------------------------------------------------- */
/* Spartan-II Slave Parallel Generic Implementation */
-static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
@@ -254,7 +254,7 @@ static int spartan3_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns;
@@ -302,7 +302,7 @@ static int spartan3_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
/* ------------------------------------------------------------------------- */
-static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
xilinx_spartan3_slave_serial_fns *fn = desc->iface_fns;
@@ -457,7 +457,7 @@ static int spartan3_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int spartan3_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
/* Readback is only available through the Slave Parallel and */
/* boundary-scan interfaces. */
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 1cd9046a2487..a582bf2d7987 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -84,13 +84,13 @@
#define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */
#endif
-static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -112,7 +112,7 @@ int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -134,7 +134,7 @@ int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int virtex2_info(Xilinx_desc *desc)
+int virtex2_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -153,7 +153,7 @@ int virtex2_info(Xilinx_desc *desc)
* INIT_B and DONE lines. If both are high, configuration has
* succeeded. Congratulations!
*/
-static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
@@ -352,7 +352,7 @@ static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
/*
* Read the FPGA configuration data
*/
-static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
@@ -404,13 +404,13 @@ static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
return FPGA_FAIL;
}
-static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__);
return FPGA_FAIL;
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 6953535f0823..b0e9cb35a31e 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -31,7 +31,7 @@
#endif
/* Local Static Functions */
-static int xilinx_validate (Xilinx_desc * desc, char *fn);
+static int xilinx_validate(xilinx_desc *desc, char *fn);
/* ------------------------------------------------------------------------- */
@@ -43,7 +43,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
unsigned char *dataptr;
unsigned int i;
const fpga_desc *desc;
- Xilinx_desc *xdesc;
+ xilinx_desc *xdesc;
dataptr = (unsigned char *)fpgadata;
/* Find out fpga_description */
@@ -94,7 +94,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
return FPGA_FAIL;
}
} else {
- printf("%s: Please fill correct device ID to Xilinx_desc\n",
+ printf("%s: Please fill correct device ID to xilinx_desc\n",
__func__);
}
printf(" part number = \"%s\"\n", buffer);
@@ -141,7 +141,7 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
return fpga_load(devnum, dataptr, swapsize);
}
-int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume a failure */
@@ -198,7 +198,7 @@ int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume a failure */
@@ -255,7 +255,7 @@ int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int xilinx_info (Xilinx_desc * desc)
+int xilinx_info(xilinx_desc *desc)
{
int ret_val = FPGA_FAIL;
@@ -369,7 +369,7 @@ int xilinx_info (Xilinx_desc * desc)
/* ------------------------------------------------------------------------- */
-static int xilinx_validate (Xilinx_desc * desc, char *fn)
+static int xilinx_validate(xilinx_desc *desc, char *fn)
{
int ret_val = false;
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 923a1586d8b5..b4d0e2278c94 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -36,7 +36,7 @@
#define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
#endif
-int zynq_info(Xilinx_desc *desc)
+int zynq_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -153,7 +153,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap)
}
-int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
unsigned long ts; /* Timestamp */
u32 partialbit = 0;
@@ -358,7 +358,7 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
return FPGA_SUCCESS;
}
-int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
return FPGA_FAIL;
}
diff --git a/include/spartan2.h b/include/spartan2.h
index a9fc68acc890..33b25e6b8b94 100644
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -10,9 +10,9 @@
#include <xilinx.h>
-int spartan2_load(Xilinx_desc *desc, const void *image, size_t size);
-int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-int spartan2_info(Xilinx_desc *desc);
+int spartan2_load(xilinx_desc *desc, const void *image, size_t size);
+int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+int spartan2_info(xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
diff --git a/include/spartan3.h b/include/spartan3.h
index 93ca8a40bc34..e06b99bff554 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -10,9 +10,9 @@
#include <xilinx.h>
-int spartan3_load(Xilinx_desc *desc, const void *image, size_t size);
-int spartan3_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-int spartan3_info(Xilinx_desc *desc);
+int spartan3_load(xilinx_desc *desc, const void *image, size_t size);
+int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+int spartan3_info(xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
diff --git a/include/virtex2.h b/include/virtex2.h
index 1e6624ca9627..dd47965aad3d 100644
--- a/include/virtex2.h
+++ b/include/virtex2.h
@@ -11,9 +11,9 @@
#include <xilinx.h>
-int virtex2_load(Xilinx_desc *desc, const void *image, size_t size);
-int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-int virtex2_info(Xilinx_desc *desc);
+int virtex2_load(xilinx_desc *desc, const void *image, size_t size);
+int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+int virtex2_info(xilinx_desc *desc);
/*
* Slave SelectMap Implementation function table.
diff --git a/include/xilinx.h b/include/xilinx.h
index fa89fb68351b..5900c837440c 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -34,20 +34,20 @@ typedef enum { /* typedef Xilinx_Family */
max_xilinx_type /* insert all new types before this */
} Xilinx_Family; /* end, typedef Xilinx_Family */
-typedef struct { /* typedef Xilinx_desc */
+typedef struct { /* typedef xilinx_desc */
Xilinx_Family family; /* part type */
Xilinx_iface iface; /* interface type */
size_t size; /* bytes of data part can accept */
void *iface_fns; /* interface function table */
int cookie; /* implementation specific cookie */
char *name; /* device name in bitstream */
-} Xilinx_desc; /* end, typedef Xilinx_desc */
+} xilinx_desc; /* end, typedef xilinx_desc */
/* Generic Xilinx Functions
*********************************************************************/
-extern int xilinx_load(Xilinx_desc *desc, const void *image, size_t size);
-extern int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-extern int xilinx_info(Xilinx_desc *desc);
+int xilinx_load(xilinx_desc *desc, const void *image, size_t size);
+int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+int xilinx_info(xilinx_desc *desc);
/* Board specific implementation specific function types
*********************************************************************/
diff --git a/include/zynqpl.h b/include/zynqpl.h
index c81446e9860c..fdee69110ce2 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -12,9 +12,9 @@
#include <xilinx.h>
-extern int zynq_load(Xilinx_desc *desc, const void *image, size_t size);
-extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-extern int zynq_info(Xilinx_desc *desc);
+int zynq_load(xilinx_desc *desc, const void *image, size_t size);
+int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+int zynq_info(xilinx_desc *desc);
#define XILINX_ZYNQ_7010 0x2
#define XILINX_ZYNQ_7015 0x1b
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 5/9] fpga: xilinx: Fix the rest of CamelCases
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
` (3 preceding siblings ...)
2014-05-07 13:03 ` [U-Boot] [PATCH v2 4/9] fpga: xilinx: Avoid CamelCase for in Xilinx_desc Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 6/9] fpga: xilinx: Simplify load/dump/info function handling Michal Simek
` (3 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
No functional changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2:
- Fix compilation errors in Astro
board/astro/mcf5373l/fpga.c | 38 +++++++++++++++++++-------------------
include/spartan2.h | 40 ++++++++++++++++++++--------------------
include/spartan3.h | 44 ++++++++++++++++++++++----------------------
include/virtex2.h | 34 +++++++++++++++++-----------------
include/xilinx.h | 42 +++++++++++++++++++++---------------------
5 files changed, 99 insertions(+), 99 deletions(-)
diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c
index 9dc82c5737c2..81ec19206577 100644
--- a/board/astro/mcf5373l/fpga.c
+++ b/board/astro/mcf5373l/fpga.c
@@ -203,7 +203,7 @@ int astro5373l_altera_load(void)
}
/* Set the FPGA's PROG_B line to the specified level */
-int xilinx_pgm_fn(int assert, int flush, int cookie)
+int xilinx_pgm_config_fn(int assert, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -218,7 +218,7 @@ int xilinx_pgm_fn(int assert, int flush, int cookie)
* Test the state of the active-low FPGA INIT line. Return 1 on INIT
* asserted (low).
*/
-int xilinx_init_fn(int cookie)
+int xilinx_init_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -226,7 +226,7 @@ int xilinx_init_fn(int cookie)
}
/* Test the state of the active-high FPGA DONE pin */
-int xilinx_done_fn(int cookie)
+int xilinx_done_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -234,7 +234,7 @@ int xilinx_done_fn(int cookie)
}
/* Abort an FPGA operation */
-int xilinx_abort_fn(int cookie)
+int xilinx_abort_config_fn(int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
/* ensure all SPI peripherals and FPGAs are deselected */
@@ -300,7 +300,7 @@ int xilinx_post_config_fn(int cookie)
return rc;
}
-int xilinx_clk_fn(int assert_clk, int flush, int cookie)
+int xilinx_clk_config_fn(int assert_clk, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -311,7 +311,7 @@ int xilinx_clk_fn(int assert_clk, int flush, int cookie)
return assert_clk;
}
-int xilinx_wr_fn(int assert_write, int flush, int cookie)
+int xilinx_wr_config_fn(int assert_write, int flush, int cookie)
{
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -322,7 +322,7 @@ int xilinx_wr_fn(int assert_write, int flush, int cookie)
return assert_write;
}
-int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
+int xilinx_fastwr_config_fn(void *buf, size_t len, int flush, int cookie)
{
size_t bytecount = 0;
gpio_t *gpiop = (gpio_t *)MMAP_GPIO;
@@ -365,13 +365,13 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie)
*/
xilinx_spartan3_slave_serial_fns xilinx_fns = {
xilinx_pre_config_fn,
- xilinx_pgm_fn,
- xilinx_clk_fn,
- xilinx_init_fn,
- xilinx_done_fn,
- xilinx_wr_fn,
+ xilinx_pgm_config_fn,
+ xilinx_clk_config_fn,
+ xilinx_init_config_fn,
+ xilinx_done_config_fn,
+ xilinx_wr_config_fn,
0,
- xilinx_fastwr_fn
+ xilinx_fastwr_config_fn
};
xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
@@ -395,12 +395,12 @@ int astro5373l_xilinx_load(void)
* so set stuff here instead of static initialisation:
*/
xilinx_fns.pre = xilinx_pre_config_fn;
- xilinx_fns.pgm = xilinx_pgm_fn;
- xilinx_fns.clk = xilinx_clk_fn;
- xilinx_fns.init = xilinx_init_fn;
- xilinx_fns.done = xilinx_done_fn;
- xilinx_fns.wr = xilinx_wr_fn;
- xilinx_fns.bwr = xilinx_fastwr_fn;
+ xilinx_fns.pgm = xilinx_pgm_config_fn;
+ xilinx_fns.clk = xilinx_clk_config_fn;
+ xilinx_fns.init = xilinx_init_config_fn;
+ xilinx_fns.done = xilinx_done_config_fn;
+ xilinx_fns.wr = xilinx_wr_config_fn;
+ xilinx_fns.bwr = xilinx_fastwr_config_fn;
xilinx_fpga[i].iface_fns = (void *)&xilinx_fns;
fpga_add(fpga_xilinx, &xilinx_fpga[i]);
}
diff --git a/include/spartan2.h b/include/spartan2.h
index 33b25e6b8b94..25db6e7a60db 100644
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -16,30 +16,30 @@ int spartan2_info(xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
- Xilinx_pre_fn pre;
- Xilinx_pgm_fn pgm;
- Xilinx_init_fn init;
- Xilinx_err_fn err;
- Xilinx_done_fn done;
- Xilinx_clk_fn clk;
- Xilinx_cs_fn cs;
- Xilinx_wr_fn wr;
- Xilinx_rdata_fn rdata;
- Xilinx_wdata_fn wdata;
- Xilinx_busy_fn busy;
- Xilinx_abort_fn abort;
- Xilinx_post_fn post;
+ xilinx_pre_fn pre;
+ xilinx_pgm_fn pgm;
+ xilinx_init_fn init;
+ xilinx_err_fn err;
+ xilinx_done_fn done;
+ xilinx_clk_fn clk;
+ xilinx_cs_fn cs;
+ xilinx_wr_fn wr;
+ xilinx_rdata_fn rdata;
+ xilinx_wdata_fn wdata;
+ xilinx_busy_fn busy;
+ xilinx_abort_fn abort;
+ xilinx_post_fn post;
} xilinx_spartan2_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
- Xilinx_pre_fn pre;
- Xilinx_pgm_fn pgm;
- Xilinx_clk_fn clk;
- Xilinx_init_fn init;
- Xilinx_done_fn done;
- Xilinx_wr_fn wr;
- Xilinx_post_fn post;
+ xilinx_pre_fn pre;
+ xilinx_pgm_fn pgm;
+ xilinx_clk_fn clk;
+ xilinx_init_fn init;
+ xilinx_done_fn done;
+ xilinx_wr_fn wr;
+ xilinx_post_fn post;
} xilinx_spartan2_slave_serial_fns;
/* Device Image Sizes
diff --git a/include/spartan3.h b/include/spartan3.h
index e06b99bff554..56698ac9c724 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -16,32 +16,32 @@ int spartan3_info(xilinx_desc *desc);
/* Slave Parallel Implementation function table */
typedef struct {
- Xilinx_pre_fn pre;
- Xilinx_pgm_fn pgm;
- Xilinx_init_fn init;
- Xilinx_err_fn err;
- Xilinx_done_fn done;
- Xilinx_clk_fn clk;
- Xilinx_cs_fn cs;
- Xilinx_wr_fn wr;
- Xilinx_rdata_fn rdata;
- Xilinx_wdata_fn wdata;
- Xilinx_busy_fn busy;
- Xilinx_abort_fn abort;
- Xilinx_post_fn post;
+ xilinx_pre_fn pre;
+ xilinx_pgm_fn pgm;
+ xilinx_init_fn init;
+ xilinx_err_fn err;
+ xilinx_done_fn done;
+ xilinx_clk_fn clk;
+ xilinx_cs_fn cs;
+ xilinx_wr_fn wr;
+ xilinx_rdata_fn rdata;
+ xilinx_wdata_fn wdata;
+ xilinx_busy_fn busy;
+ xilinx_abort_fn abort;
+ xilinx_post_fn post;
} xilinx_spartan3_slave_parallel_fns;
/* Slave Serial Implementation function table */
typedef struct {
- Xilinx_pre_fn pre;
- Xilinx_pgm_fn pgm;
- Xilinx_clk_fn clk;
- Xilinx_init_fn init;
- Xilinx_done_fn done;
- Xilinx_wr_fn wr;
- Xilinx_post_fn post;
- Xilinx_bwr_fn bwr; /* block write function */
- Xilinx_abort_fn abort;
+ xilinx_pre_fn pre;
+ xilinx_pgm_fn pgm;
+ xilinx_clk_fn clk;
+ xilinx_init_fn init;
+ xilinx_done_fn done;
+ xilinx_wr_fn wr;
+ xilinx_post_fn post;
+ xilinx_bwr_fn bwr; /* block write function */
+ xilinx_abort_fn abort;
} xilinx_spartan3_slave_serial_fns;
/* Device Image Sizes
diff --git a/include/virtex2.h b/include/virtex2.h
index dd47965aad3d..d39286c7ab9b 100644
--- a/include/virtex2.h
+++ b/include/virtex2.h
@@ -19,27 +19,27 @@ int virtex2_info(xilinx_desc *desc);
* Slave SelectMap Implementation function table.
*/
typedef struct {
- Xilinx_pre_fn pre;
- Xilinx_pgm_fn pgm;
- Xilinx_init_fn init;
- Xilinx_err_fn err;
- Xilinx_done_fn done;
- Xilinx_clk_fn clk;
- Xilinx_cs_fn cs;
- Xilinx_wr_fn wr;
- Xilinx_rdata_fn rdata;
- Xilinx_wdata_fn wdata;
- Xilinx_busy_fn busy;
- Xilinx_abort_fn abort;
- Xilinx_post_fn post;
+ xilinx_pre_fn pre;
+ xilinx_pgm_fn pgm;
+ xilinx_init_fn init;
+ xilinx_err_fn err;
+ xilinx_done_fn done;
+ xilinx_clk_fn clk;
+ xilinx_cs_fn cs;
+ xilinx_wr_fn wr;
+ xilinx_rdata_fn rdata;
+ xilinx_wdata_fn wdata;
+ xilinx_busy_fn busy;
+ xilinx_abort_fn abort;
+ xilinx_post_fn post;
} xilinx_virtex2_slave_selectmap_fns;
/* Slave Serial Implementation function table */
typedef struct {
- Xilinx_pgm_fn pgm;
- Xilinx_clk_fn clk;
- Xilinx_rdata_fn rdata;
- Xilinx_wdata_fn wdata;
+ xilinx_pgm_fn pgm;
+ xilinx_clk_fn clk;
+ xilinx_rdata_fn rdata;
+ xilinx_wdata_fn wdata;
} xilinx_virtex2_slave_serial_fns;
/* Device Image Sizes (in bytes)
diff --git a/include/xilinx.h b/include/xilinx.h
index 5900c837440c..b72aece7c900 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -12,7 +12,7 @@
/* Xilinx types
*********************************************************************/
-typedef enum { /* typedef Xilinx_iface */
+typedef enum { /* typedef xilinx_iface */
min_xilinx_iface_type, /* low range check value */
slave_serial, /* serial data and external clock */
master_serial, /* serial data w/ internal clock (not used) */
@@ -22,21 +22,21 @@ typedef enum { /* typedef Xilinx_iface */
slave_selectmap, /* slave SelectMap (virtex2) */
devcfg, /* devcfg interface (zynq) */
max_xilinx_iface_type /* insert all new types before this */
-} Xilinx_iface; /* end, typedef Xilinx_iface */
+} xilinx_iface; /* end, typedef xilinx_iface */
-typedef enum { /* typedef Xilinx_Family */
+typedef enum { /* typedef xilinx_family */
min_xilinx_type, /* low range check value */
xilinx_spartan2, /* Spartan-II Family */
- Xilinx_VirtexE, /* Virtex-E Family */
+ xilinx_virtexE, /* Virtex-E Family */
xilinx_virtex2, /* Virtex2 Family */
xilinx_spartan3, /* Spartan-III Family */
xilinx_zynq, /* Zynq Family */
max_xilinx_type /* insert all new types before this */
-} Xilinx_Family; /* end, typedef Xilinx_Family */
+} xilinx_family; /* end, typedef xilinx_family */
typedef struct { /* typedef xilinx_desc */
- Xilinx_Family family; /* part type */
- Xilinx_iface iface; /* interface type */
+ xilinx_family family; /* part type */
+ xilinx_iface iface; /* interface type */
size_t size; /* bytes of data part can accept */
void *iface_fns; /* interface function table */
int cookie; /* implementation specific cookie */
@@ -51,19 +51,19 @@ int xilinx_info(xilinx_desc *desc);
/* Board specific implementation specific function types
*********************************************************************/
-typedef int (*Xilinx_pgm_fn)( int assert_pgm, int flush, int cookie );
-typedef int (*Xilinx_init_fn)( int cookie );
-typedef int (*Xilinx_err_fn)( int cookie );
-typedef int (*Xilinx_done_fn)( int cookie );
-typedef int (*Xilinx_clk_fn)( int assert_clk, int flush, int cookie );
-typedef int (*Xilinx_cs_fn)( int assert_cs, int flush, int cookie );
-typedef int (*Xilinx_wr_fn)( int assert_write, int flush, int cookie );
-typedef int (*Xilinx_rdata_fn)( unsigned char *data, int cookie );
-typedef int (*Xilinx_wdata_fn)( unsigned char data, int flush, int cookie );
-typedef int (*Xilinx_busy_fn)( int cookie );
-typedef int (*Xilinx_abort_fn)( int cookie );
-typedef int (*Xilinx_pre_fn)( int cookie );
-typedef int (*Xilinx_post_fn)( int cookie );
-typedef int (*Xilinx_bwr_fn)( void *buf, size_t len, int flush, int cookie );
+typedef int (*xilinx_pgm_fn)(int assert_pgm, int flush, int cookie);
+typedef int (*xilinx_init_fn)(int cookie);
+typedef int (*xilinx_err_fn)(int cookie);
+typedef int (*xilinx_done_fn)(int cookie);
+typedef int (*xilinx_clk_fn)(int assert_clk, int flush, int cookie);
+typedef int (*xilinx_cs_fn)(int assert_cs, int flush, int cookie);
+typedef int (*xilinx_wr_fn)(int assert_write, int flush, int cookie);
+typedef int (*xilinx_rdata_fn)(unsigned char *data, int cookie);
+typedef int (*xilinx_wdata_fn)(unsigned char data, int flush, int cookie);
+typedef int (*xilinx_busy_fn)(int cookie);
+typedef int (*xilinx_abort_fn)(int cookie);
+typedef int (*xilinx_pre_fn)(int cookie);
+typedef int (*xilinx_post_fn)(int cookie);
+typedef int (*xilinx_bwr_fn)(void *buf, size_t len, int flush, int cookie);
#endif /* _XILINX_H_ */
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 6/9] fpga: xilinx: Simplify load/dump/info function handling
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
` (4 preceding siblings ...)
2014-05-07 13:03 ` [U-Boot] [PATCH v2 5/9] fpga: xilinx: Fix the rest of CamelCases Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 7/9] fpga: zynq: Remove sparse warnings Michal Simek
` (2 subsequent siblings)
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2:
- Exchange fpga_op and name in xilinx_desc because spartan2/3, virtex2
are not using names.
- Fix warning reported by Tom
board/spear/x600/fpga.c:177:2: warning: initialization from incompatible pointer type [enabled by default]
board/spear/x600/fpga.c:177:2: warning: (near initialization for ?fpga[0].name?) [enabled by default]
- Add fix for apf27 and astro
Based on http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/182419
I have checked that symbols are available in u-boot.map.
---
board/armadeus/apf27/fpga.c | 1 +
board/astro/mcf5373l/fpga.c | 3 +-
drivers/fpga/spartan2.c | 12 +++-
drivers/fpga/spartan3.c | 12 +++-
drivers/fpga/virtex2.c | 12 +++-
drivers/fpga/xilinx.c | 159 ++------------------------------------------
drivers/fpga/zynqpl.c | 13 ++--
include/spartan2.h | 28 ++++----
include/spartan3.h | 36 +++++-----
include/virtex2.h | 28 ++++----
include/xilinx.h | 7 ++
include/zynqpl.h | 16 ++---
12 files changed, 104 insertions(+), 223 deletions(-)
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
index 7d6e1e462c99..65a4812c35b8 100644
--- a/board/armadeus/apf27/fpga.c
+++ b/board/armadeus/apf27/fpga.c
@@ -48,6 +48,7 @@ xilinx_desc fpga[CONFIG_FPGA_COUNT] = {
1196128l/8,
(void *)&fpga_fns,
0,
+ &spartan3_op,
"3s200aft256"}
};
diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c
index 81ec19206577..1d044d96a563 100644
--- a/board/astro/mcf5373l/fpga.c
+++ b/board/astro/mcf5373l/fpga.c
@@ -379,7 +379,8 @@ xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = {
slave_serial,
XILINX_XC3S4000_SIZE,
(void *)&xilinx_fns,
- 0}
+ 0,
+ &spartan3_op}
};
/* Initialize the fpga. Return 1 on success, 0 on failure. */
diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 0796729436cb..705405614033 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -41,7 +41,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -64,7 +64,7 @@ int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -87,7 +87,7 @@ int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan2_info(xilinx_desc *desc)
+static int spartan2_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -447,3 +447,9 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
return FPGA_FAIL;
}
+
+struct xilinx_fpga_op spartan2_op = {
+ .load = spartan2_load,
+ .dump = spartan2_dump,
+ .info = spartan2_info,
+};
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 1304b4c646e3..5c9412c2f63b 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
/* ------------------------------------------------------------------------- */
/* Spartan-II Generic Implementation */
-int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -68,7 +68,7 @@ int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -91,7 +91,7 @@ int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int spartan3_info(xilinx_desc *desc)
+static int spartan3_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -465,3 +465,9 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
__FUNCTION__);
return FPGA_FAIL;
}
+
+struct xilinx_fpga_op spartan3_op = {
+ .load = spartan3_load,
+ .dump = spartan3_dump,
+ .info = spartan3_info,
+};
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index a582bf2d7987..e092147edd10 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -90,7 +90,7 @@ static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -112,7 +112,7 @@ int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
@@ -134,7 +134,7 @@ int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
return ret_val;
}
-int virtex2_info(xilinx_desc *desc)
+static int virtex2_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -417,3 +417,9 @@ static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
}
/* vim: set ts=4 tw=78: */
+
+struct xilinx_fpga_op virtex2_op = {
+ .load = virtex2_load,
+ .dump = virtex2_dump,
+ .info = virtex2_info,
+};
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index b0e9cb35a31e..8837f5c122e7 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -19,17 +19,6 @@
#include <spartan3.h>
#include <zynqpl.h>
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
/* Local Static Functions */
static int xilinx_validate(xilinx_desc *desc, char *fn);
@@ -143,116 +132,22 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else
- switch (desc->family) {
- case xilinx_spartan2:
-#if defined(CONFIG_FPGA_SPARTAN2)
- PRINTF ("%s: Launching the Spartan-II Loader...\n",
- __FUNCTION__);
- ret_val = spartan2_load(desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_spartan3:
-#if defined(CONFIG_FPGA_SPARTAN3)
- PRINTF ("%s: Launching the Spartan-III Loader...\n",
- __FUNCTION__);
- ret_val = spartan3_load(desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-III devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_virtex2:
-#if defined(CONFIG_FPGA_VIRTEX2)
- PRINTF ("%s: Launching the Virtex-II Loader...\n",
- __FUNCTION__);
- ret_val = virtex2_load(desc, buf, bsize);
-#else
- printf ("%s: No support for Virtex-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_zynq:
-#if defined(CONFIG_FPGA_ZYNQPL)
- PRINTF("%s: Launching the Zynq PL Loader...\n",
- __func__);
- ret_val = zynq_load(desc, buf, bsize);
-#else
- printf("%s: No support for Zynq devices.\n",
- __func__);
-#endif
- break;
-
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
+ return FPGA_FAIL;
+ }
- return ret_val;
+ return desc->operations->load(desc, buf, bsize);
}
int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else
- switch (desc->family) {
- case xilinx_spartan2:
-#if defined(CONFIG_FPGA_SPARTAN2)
- PRINTF ("%s: Launching the Spartan-II Reader...\n",
- __FUNCTION__);
- ret_val = spartan2_dump(desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_spartan3:
-#if defined(CONFIG_FPGA_SPARTAN3)
- PRINTF ("%s: Launching the Spartan-III Reader...\n",
- __FUNCTION__);
- ret_val = spartan3_dump(desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-III devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_virtex2:
-#if defined( CONFIG_FPGA_VIRTEX2)
- PRINTF ("%s: Launching the Virtex-II Reader...\n",
- __FUNCTION__);
- ret_val = virtex2_dump(desc, buf, bsize);
-#else
- printf ("%s: No support for Virtex-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_zynq:
-#if defined(CONFIG_FPGA_ZYNQPL)
- PRINTF("%s: Launching the Zynq PL Reader...\n",
- __func__);
- ret_val = zynq_dump(desc, buf, bsize);
-#else
- printf("%s: No support for Zynq devices.\n",
- __func__);
-#endif
- break;
-
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
+ return FPGA_FAIL;
+ }
- return ret_val;
+ return desc->operations->dump(desc, buf, bsize);
}
int xilinx_info(xilinx_desc *desc)
@@ -315,47 +210,7 @@ int xilinx_info(xilinx_desc *desc)
if (desc->iface_fns) {
printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
- switch (desc->family) {
- case xilinx_spartan2:
-#if defined(CONFIG_FPGA_SPARTAN2)
- spartan2_info(desc);
-#else
- /* just in case */
- printf ("%s: No support for Spartan-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_spartan3:
-#if defined(CONFIG_FPGA_SPARTAN3)
- spartan3_info(desc);
-#else
- /* just in case */
- printf ("%s: No support for Spartan-III devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_virtex2:
-#if defined(CONFIG_FPGA_VIRTEX2)
- virtex2_info(desc);
-#else
- /* just in case */
- printf ("%s: No support for Virtex-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case xilinx_zynq:
-#if defined(CONFIG_FPGA_ZYNQPL)
- zynq_info(desc);
-#else
- /* just in case */
- printf("%s: No support for Zynq devices.\n",
- __func__);
-#endif
- /* Add new family types here */
- default:
- /* we don't need a message here - we give one up above */
- ;
- }
+ desc->operations->info(desc);
} else
printf ("No Device Function Table.\n");
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index b4d0e2278c94..dcd34951ad68 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -36,7 +36,7 @@
#define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
#endif
-int zynq_info(xilinx_desc *desc)
+static int zynq_info(xilinx_desc *desc)
{
return FPGA_SUCCESS;
}
@@ -152,8 +152,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap)
return 0;
}
-
-int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
{
unsigned long ts; /* Timestamp */
u32 partialbit = 0;
@@ -358,7 +357,13 @@ int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
return FPGA_SUCCESS;
}
-int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize)
{
return FPGA_FAIL;
}
+
+struct xilinx_fpga_op zynq_op = {
+ .load = zynq_load,
+ .dump = zynq_dump,
+ .info = zynq_info,
+};
diff --git a/include/spartan2.h b/include/spartan2.h
index 25db6e7a60db..2aca954e73ab 100644
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -10,10 +10,6 @@
#include <xilinx.h>
-int spartan2_load(xilinx_desc *desc, const void *image, size_t size);
-int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-int spartan2_info(xilinx_desc *desc);
-
/* Slave Parallel Implementation function table */
typedef struct {
xilinx_pre_fn pre;
@@ -42,6 +38,8 @@ typedef struct {
xilinx_post_fn post;
} xilinx_spartan2_slave_serial_fns;
+extern struct xilinx_fpga_op spartan2_op;
+
/* Device Image Sizes
*********************************************************************/
/* Spartan-II (2.5V) */
@@ -63,36 +61,36 @@ typedef struct {
*********************************************************************/
/* Spartan-II devices */
#define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, &spartan2_op }
#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie }
+{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, &spartan2_op }
#endif /* _SPARTAN2_H_ */
diff --git a/include/spartan3.h b/include/spartan3.h
index 56698ac9c724..d6d67a6e560c 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -10,10 +10,6 @@
#include <xilinx.h>
-int spartan3_load(xilinx_desc *desc, const void *image, size_t size);
-int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-int spartan3_info(xilinx_desc *desc);
-
/* Slave Parallel Implementation function table */
typedef struct {
xilinx_pre_fn pre;
@@ -44,6 +40,8 @@ typedef struct {
xilinx_abort_fn abort;
} xilinx_spartan3_slave_serial_fns;
+extern struct xilinx_fpga_op spartan3_op;
+
/* Device Image Sizes
*********************************************************************/
/* Spartan-III (1.2V) */
@@ -73,46 +71,48 @@ typedef struct {
*********************************************************************/
/* Spartan-III devices */
#define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S200_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S400_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, &spartan3_op }
/* Spartan-3E devices */
#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, &spartan3_op }
#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie, \
+ &spartan3_op }
#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie, \
+ &spartan3_op }
#define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie }
+{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, &spartan3_op }
#endif /* _SPARTAN3_H_ */
diff --git a/include/virtex2.h b/include/virtex2.h
index d39286c7ab9b..7b7825f513e3 100644
--- a/include/virtex2.h
+++ b/include/virtex2.h
@@ -11,9 +11,7 @@
#include <xilinx.h>
-int virtex2_load(xilinx_desc *desc, const void *image, size_t size);
-int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-int virtex2_info(xilinx_desc *desc);
+extern struct xilinx_fpga_op virtex2_op;
/*
* Slave SelectMap Implementation function table.
@@ -60,39 +58,39 @@ typedef struct {
/* Descriptor Macros
*********************************************************************/
#define XILINX_XC2V40_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op }
#define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie }
+{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op }
#endif /* _VIRTEX2_H_ */
diff --git a/include/xilinx.h b/include/xilinx.h
index b72aece7c900..9801267c593f 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -40,9 +40,16 @@ typedef struct { /* typedef xilinx_desc */
size_t size; /* bytes of data part can accept */
void *iface_fns; /* interface function table */
int cookie; /* implementation specific cookie */
+ struct xilinx_fpga_op *operations; /* operations */
char *name; /* device name in bitstream */
} xilinx_desc; /* end, typedef xilinx_desc */
+struct xilinx_fpga_op {
+ int (*load)(xilinx_desc *, const void *, size_t);
+ int (*dump)(xilinx_desc *, const void *, size_t);
+ int (*info)(xilinx_desc *);
+};
+
/* Generic Xilinx Functions
*********************************************************************/
int xilinx_load(xilinx_desc *desc, const void *image, size_t size);
diff --git a/include/zynqpl.h b/include/zynqpl.h
index fdee69110ce2..8a9ec3297fbe 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -12,9 +12,7 @@
#include <xilinx.h>
-int zynq_load(xilinx_desc *desc, const void *image, size_t size);
-int zynq_dump(xilinx_desc *desc, const void *buf, size_t bsize);
-int zynq_info(xilinx_desc *desc);
+extern struct xilinx_fpga_op zynq_op;
#define XILINX_ZYNQ_7010 0x2
#define XILINX_ZYNQ_7015 0x1b
@@ -33,21 +31,21 @@ int zynq_info(xilinx_desc *desc);
/* Descriptor Macros */
#define XILINX_XC7Z010_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, &zynq_op, "7z010" }
#define XILINX_XC7Z015_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, &zynq_op, "7z015" }
#define XILINX_XC7Z020_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, &zynq_op, "7z020" }
#define XILINX_XC7Z030_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, "7z030" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, &zynq_op, "7z030" }
#define XILINX_XC7Z045_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, &zynq_op, "7z045" }
#define XILINX_XC7Z100_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, "7z100" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, &zynq_op, "7z100" }
#endif /* _ZYNQPL_H_ */
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 7/9] fpga: zynq: Remove sparse warnings
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
` (5 preceding siblings ...)
2014-05-07 13:03 ` [U-Boot] [PATCH v2 6/9] fpga: xilinx: Simplify load/dump/info function handling Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 8/9] fpga: zynq: Use helper functions for zynq dma Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 9/9] fpga: zynq: Use helper function zynq_validate_bitstream Michal Simek
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
Warnings:
drivers/fpga/zynqpl.c:150:32: warning: Using plain integer as NULL pointer
drivers/fpga/zynqpl.c:152:16: warning: Using plain integer as NULL pointer
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/fpga/zynqpl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index dcd34951ad68..0a134e524c44 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -147,9 +147,9 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap)
}
/* Loop can be huge - support CTRL + C */
if (ctrlc())
- return 0;
+ return NULL;
}
- return 0;
+ return NULL;
}
static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 8/9] fpga: zynq: Use helper functions for zynq dma
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
` (6 preceding siblings ...)
2014-05-07 13:03 ` [U-Boot] [PATCH v2 7/9] fpga: zynq: Remove sparse warnings Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 9/9] fpga: zynq: Use helper function zynq_validate_bitstream Michal Simek
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Use zynq_dma_xfer_init, zynq_align_dma_buffer,
zynq_dma_transfer helper function performing dma
transfers so that the code can be reused easily for
different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/fpga/zynqpl.c | 201 +++++++++++++++++++++++++++++---------------------
1 file changed, 115 insertions(+), 86 deletions(-)
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 0a134e524c44..ef6d1caca410 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -152,70 +152,52 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap)
return NULL;
}
-static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_dma_transfer(u32 srcbuf, u32 srclen, u32 dstbuf, u32 dstlen)
{
- unsigned long ts; /* Timestamp */
- u32 partialbit = 0;
- u32 i, control, isr_status, status, swap, diff;
- u32 *buf_start;
+ unsigned long ts;
+ u32 isr_status;
- /* Detect if we are going working with partial or full bitstream */
- if (bsize != desc->size) {
- printf("%s: Working with partial bitstream\n", __func__);
- partialbit = 1;
- }
-
- buf_start = check_data((u8 *)buf, bsize, &swap);
- if (!buf_start)
- return FPGA_FAIL;
-
- /* Check if data is postpone from start */
- diff = (u32)buf_start - (u32)buf;
- if (diff) {
- printf("%s: Bitstream is not validated yet (diff %x)\n",
- __func__, diff);
- return FPGA_FAIL;
- }
+ /* Set up the transfer */
+ writel((u32)srcbuf, &devcfg_base->dma_src_addr);
+ writel(dstbuf, &devcfg_base->dma_dst_addr);
+ writel(srclen, &devcfg_base->dma_src_len);
+ writel(dstlen, &devcfg_base->dma_dst_len);
- if ((u32)buf < SZ_1M) {
- printf("%s: Bitstream has to be placed up to 1MB (%x)\n",
- __func__, (u32)buf);
- return FPGA_FAIL;
- }
+ isr_status = readl(&devcfg_base->int_sts);
- if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
- u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
+ /* Polling the PCAP_INIT status for Set */
+ ts = get_timer(0);
+ while (!(isr_status & DEVCFG_ISR_DMA_DONE)) {
+ if (isr_status & DEVCFG_ISR_ERROR_FLAGS_MASK) {
+ debug("%s: Error: isr = 0x%08X\n", __func__,
+ isr_status);
+ debug("%s: Write count = 0x%08X\n", __func__,
+ readl(&devcfg_base->write_count));
+ debug("%s: Read count = 0x%08X\n", __func__,
+ readl(&devcfg_base->read_count));
- /*
- * This might be dangerous but permits to flash if
- * ARCH_DMA_MINALIGN is greater than header size
- */
- if (new_buf > buf_start) {
- debug("%s: Aligned buffer is after buffer start\n",
- __func__);
- new_buf -= ARCH_DMA_MINALIGN;
+ return FPGA_FAIL;
}
+ if (get_timer(ts) > CONFIG_SYS_FPGA_PROG_TIME) {
+ printf("%s: Timeout wait for DMA to complete\n",
+ __func__);
+ return FPGA_FAIL;
+ }
+ isr_status = readl(&devcfg_base->int_sts);
+ }
- printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
- (u32)buf_start, (u32)new_buf, swap);
-
- for (i = 0; i < (bsize/4); i++)
- new_buf[i] = load_word(&buf_start[i], swap);
-
- swap = SWAP_DONE;
- buf = new_buf;
- } else if (swap != SWAP_DONE) {
- /* For bitstream which are aligned */
- u32 *new_buf = (u32 *)buf;
+ debug("%s: DMA transfer is done\n", __func__);
- printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__,
- swap);
+ /* Clear out the DMA status */
+ writel(DEVCFG_ISR_DMA_DONE, &devcfg_base->int_sts);
- for (i = 0; i < (bsize/4); i++)
- new_buf[i] = load_word(&buf_start[i], swap);
+ return FPGA_SUCCESS;
+}
- swap = SWAP_DONE;
- }
+static int zynq_dma_xfer_init(u32 partialbit)
+{
+ u32 status, control, isr_status;
+ unsigned long ts;
/* Clear loopback bit */
clrbits_le32(&devcfg_base->mctrl, DEVCFG_MCTRL_PCAP_LPBK);
@@ -297,6 +279,83 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
writel(DEVCFG_STATUS_DMA_DONE_CNT_MASK, &devcfg_base->status);
}
+ return FPGA_SUCCESS;
+}
+
+static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap)
+{
+ u32 *new_buf;
+ u32 i;
+
+ if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
+ new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
+
+ /*
+ * This might be dangerous but permits to flash if
+ * ARCH_DMA_MINALIGN is greater than header size
+ */
+ if (new_buf > buf) {
+ debug("%s: Aligned buffer is after buffer start\n",
+ __func__);
+ new_buf -= ARCH_DMA_MINALIGN;
+ }
+ printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
+ (u32)buf, (u32)new_buf, swap);
+
+ for (i = 0; i < (len/4); i++)
+ new_buf[i] = load_word(&buf[i], swap);
+
+ buf = new_buf;
+ } else if (swap != SWAP_DONE) {
+ /* For bitstream which are aligned */
+ u32 *new_buf = (u32 *)buf;
+
+ printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__,
+ swap);
+
+ for (i = 0; i < (len/4); i++)
+ new_buf[i] = load_word(&buf[i], swap);
+ }
+
+ return buf;
+}
+
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+{
+ unsigned long ts; /* Timestamp */
+ u32 partialbit = 0;
+ u32 isr_status, swap, diff;
+ u32 *buf_start;
+
+ /* Detect if we are going working with partial or full bitstream */
+ if (bsize != desc->size) {
+ printf("%s: Working with partial bitstream\n", __func__);
+ partialbit = 1;
+ }
+
+ buf_start = check_data((u8 *)buf, bsize, &swap);
+ if (!buf_start)
+ return FPGA_FAIL;
+
+ /* Check if data is postpone from start */
+ diff = (u32)buf_start - (u32)buf;
+ if (diff) {
+ printf("%s: Bitstream is not validated yet (diff %x)\n",
+ __func__, diff);
+ return FPGA_FAIL;
+ }
+
+ if ((u32)buf < SZ_1M) {
+ printf("%s: Bitstream has to be placed up to 1MB (%x)\n",
+ __func__, (u32)buf);
+ return FPGA_FAIL;
+ }
+
+ if (zynq_dma_xfer_init(partialbit))
+ return FPGA_FAIL;
+
+ buf = zynq_align_dma_buffer((u32 *)buf, bsize, swap);
+
debug("%s: Source = 0x%08X\n", __func__, (u32)buf);
debug("%s: Size = %zu\n", __func__, bsize);
@@ -304,37 +363,10 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
flush_dcache_range((u32)buf, (u32)buf +
roundup(bsize, ARCH_DMA_MINALIGN));
- /* Set up the transfer */
- writel((u32)buf | 1, &devcfg_base->dma_src_addr);
- writel(0xFFFFFFFF, &devcfg_base->dma_dst_addr);
- writel(bsize >> 2, &devcfg_base->dma_src_len);
- writel(0, &devcfg_base->dma_dst_len);
+ if (zynq_dma_transfer((u32)buf | 1, bsize >> 2, 0xffffffff, 0))
+ return FPGA_FAIL;
isr_status = readl(&devcfg_base->int_sts);
-
- /* Polling the PCAP_INIT status for Set */
- ts = get_timer(0);
- while (!(isr_status & DEVCFG_ISR_DMA_DONE)) {
- if (isr_status & DEVCFG_ISR_ERROR_FLAGS_MASK) {
- debug("%s: Error: isr = 0x%08X\n", __func__,
- isr_status);
- debug("%s: Write count = 0x%08X\n", __func__,
- readl(&devcfg_base->write_count));
- debug("%s: Read count = 0x%08X\n", __func__,
- readl(&devcfg_base->read_count));
-
- return FPGA_FAIL;
- }
- if (get_timer(ts) > CONFIG_SYS_FPGA_PROG_TIME) {
- printf("%s: Timeout wait for DMA to complete\n",
- __func__);
- return FPGA_FAIL;
- }
- isr_status = readl(&devcfg_base->int_sts);
- }
-
- debug("%s: DMA transfer is done\n", __func__);
-
/* Check FPGA configuration completion */
ts = get_timer(0);
while (!(isr_status & DEVCFG_ISR_PCFG_DONE)) {
@@ -348,9 +380,6 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
debug("%s: FPGA config done\n", __func__);
- /* Clear out the DMA status */
- writel(DEVCFG_ISR_DMA_DONE, &devcfg_base->int_sts);
-
if (!partialbit)
zynq_slcr_devcfg_enable();
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [U-Boot] [PATCH v2 9/9] fpga: zynq: Use helper function zynq_validate_bitstream
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
` (7 preceding siblings ...)
2014-05-07 13:03 ` [U-Boot] [PATCH v2 8/9] fpga: zynq: Use helper functions for zynq dma Michal Simek
@ 2014-05-07 13:03 ` Michal Simek
8 siblings, 0 replies; 10+ messages in thread
From: Michal Simek @ 2014-05-07 13:03 UTC (permalink / raw)
To: u-boot
From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Use helper function zynq_validate_bitstream so that the
code can be reused easily for different cases of dma transfer.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
Changes in v2: None
drivers/fpga/zynqpl.c | 32 +++++++++++++++++++++++++-------
1 file changed, 25 insertions(+), 7 deletions(-)
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index ef6d1caca410..c066f21d79f3 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -320,20 +320,20 @@ static u32 *zynq_align_dma_buffer(u32 *buf, u32 len, u32 swap)
return buf;
}
-static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
+ size_t bsize, u32 blocksize, u32 *swap,
+ u32 *partialbit)
{
- unsigned long ts; /* Timestamp */
- u32 partialbit = 0;
- u32 isr_status, swap, diff;
u32 *buf_start;
+ u32 diff;
/* Detect if we are going working with partial or full bitstream */
if (bsize != desc->size) {
printf("%s: Working with partial bitstream\n", __func__);
- partialbit = 1;
+ *partialbit = 1;
}
+ buf_start = check_data((u8 *)buf, blocksize, swap);
- buf_start = check_data((u8 *)buf, bsize, &swap);
if (!buf_start)
return FPGA_FAIL;
@@ -351,7 +351,25 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
return FPGA_FAIL;
}
- if (zynq_dma_xfer_init(partialbit))
+ if (zynq_dma_xfer_init(*partialbit))
+ return FPGA_FAIL;
+
+ return 0;
+}
+
+
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+{
+ unsigned long ts; /* Timestamp */
+ u32 partialbit = 0;
+ u32 isr_status, swap;
+
+ /*
+ * send bsize inplace of blocksize as it was not a bitstream
+ * in chunks
+ */
+ if (zynq_validate_bitstream(desc, buf, bsize, bsize, &swap,
+ &partialbit))
return FPGA_FAIL;
buf = zynq_align_dma_buffer((u32 *)buf, bsize, swap);
--
1.8.2.3
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^ permalink raw reply related [flat|nested] 10+ messages in thread
end of thread, other threads:[~2014-05-07 13:03 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-05-07 13:03 [U-Boot] [PATCH v2 0/9] FPGA subsystem changes Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 1/9] fpga: spartan2: Avoid CamelCase Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 2/9] fpga: spartan3: " Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 3/9] fpga: virtex2: " Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 4/9] fpga: xilinx: Avoid CamelCase for in Xilinx_desc Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 5/9] fpga: xilinx: Fix the rest of CamelCases Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 6/9] fpga: xilinx: Simplify load/dump/info function handling Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 7/9] fpga: zynq: Remove sparse warnings Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 8/9] fpga: zynq: Use helper functions for zynq dma Michal Simek
2014-05-07 13:03 ` [U-Boot] [PATCH v2 9/9] fpga: zynq: Use helper function zynq_validate_bitstream Michal Simek
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