From: Cyrille Pitchen <cyrille.pitchen@atmel.com> To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>, <nicolas.ferre@atmel.com> Cc: <linux-crypto@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Cyrille Pitchen <cyrille.pitchen@atmel.com> Subject: [PATCH v2 07/12] crypto: atmel-sha: add atmel_sha_cpu_start() Date: Thu, 22 Dec 2016 17:37:56 +0100 [thread overview] Message-ID: <39e69aee6fcce63e8c9aa083ac8c28171ac5f3b9.1482424395.git.cyrille.pitchen@atmel.com> (raw) In-Reply-To: <cover.1482424395.git.cyrille.pitchen@atmel.com> This patch adds a simple function to perform data transfer with PIO, hence handled by the CPU. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> --- drivers/crypto/atmel-sha.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index be0d72cf4352..58d9ca8ac0f2 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -64,6 +64,8 @@ #define SHA_FLAGS_ERROR BIT(23) #define SHA_FLAGS_PAD BIT(24) #define SHA_FLAGS_RESTORE BIT(25) +#define SHA_FLAGS_IDATAR0 BIT(26) +#define SHA_FLAGS_WAIT_DATARDY BIT(27) #define SHA_OP_UPDATE 1 #define SHA_OP_FINAL 2 @@ -141,6 +143,7 @@ struct atmel_sha_dev { struct ahash_request *req; bool is_async; atmel_sha_fn_t resume; + atmel_sha_fn_t cpu_transfer_complete; struct atmel_sha_dma dma_lch_in; @@ -1317,6 +1320,93 @@ static irqreturn_t atmel_sha_irq(int irq, void *dev_id) return IRQ_NONE; } + +/* CPU transfer functions */ + +static int atmel_sha_cpu_transfer(struct atmel_sha_dev *dd) +{ + struct ahash_request *req = dd->req; + struct atmel_sha_reqctx *ctx = ahash_request_ctx(req); + const u32 *words = (const u32 *)ctx->buffer; + size_t i, num_words; + u32 isr, din, din_inc; + + din_inc = (ctx->flags & SHA_FLAGS_IDATAR0) ? 0 : 1; + for (;;) { + /* Write data into the Input Data Registers. */ + num_words = DIV_ROUND_UP(ctx->bufcnt, sizeof(u32)); + for (i = 0, din = 0; i < num_words; ++i, din += din_inc) + atmel_sha_write(dd, SHA_REG_DIN(din), words[i]); + + ctx->offset += ctx->bufcnt; + ctx->total -= ctx->bufcnt; + + if (!ctx->total) + break; + + /* + * Prepare next block: + * Fill ctx->buffer now with the next data to be written into + * IDATARx: it gives time for the SHA hardware to process + * the current data so the SHA_INT_DATARDY flag might be set + * in SHA_ISR when polling this register at the beginning of + * the next loop. + */ + ctx->bufcnt = min_t(size_t, ctx->block_size, ctx->total); + scatterwalk_map_and_copy(ctx->buffer, ctx->sg, + ctx->offset, ctx->bufcnt, 0); + + /* Wait for hardware to be ready again. */ + isr = atmel_sha_read(dd, SHA_ISR); + if (!(isr & SHA_INT_DATARDY)) { + /* Not ready yet. */ + dd->resume = atmel_sha_cpu_transfer; + atmel_sha_write(dd, SHA_IER, SHA_INT_DATARDY); + return -EINPROGRESS; + } + } + + if (unlikely(!(ctx->flags & SHA_FLAGS_WAIT_DATARDY))) + return dd->cpu_transfer_complete(dd); + + return atmel_sha_wait_for_data_ready(dd, dd->cpu_transfer_complete); +} + +static int atmel_sha_cpu_start(struct atmel_sha_dev *dd, + struct scatterlist *sg, + unsigned int len, + bool idatar0_only, + bool wait_data_ready, + atmel_sha_fn_t resume) +{ + struct ahash_request *req = dd->req; + struct atmel_sha_reqctx *ctx = ahash_request_ctx(req); + + if (!len) + return resume(dd); + + ctx->flags &= ~(SHA_FLAGS_IDATAR0 | SHA_FLAGS_WAIT_DATARDY); + + if (idatar0_only) + ctx->flags |= SHA_FLAGS_IDATAR0; + + if (wait_data_ready) + ctx->flags |= SHA_FLAGS_WAIT_DATARDY; + + ctx->sg = sg; + ctx->total = len; + ctx->offset = 0; + + /* Prepare the first block to be written. */ + ctx->bufcnt = min_t(size_t, ctx->block_size, ctx->total); + scatterwalk_map_and_copy(ctx->buffer, ctx->sg, + ctx->offset, ctx->bufcnt, 0); + + dd->cpu_transfer_complete = resume; + return atmel_sha_cpu_transfer(dd); +} + + static void atmel_sha_unregister_algs(struct atmel_sha_dev *dd) { int i; -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: cyrille.pitchen@atmel.com (Cyrille Pitchen) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 07/12] crypto: atmel-sha: add atmel_sha_cpu_start() Date: Thu, 22 Dec 2016 17:37:56 +0100 [thread overview] Message-ID: <39e69aee6fcce63e8c9aa083ac8c28171ac5f3b9.1482424395.git.cyrille.pitchen@atmel.com> (raw) In-Reply-To: <cover.1482424395.git.cyrille.pitchen@atmel.com> This patch adds a simple function to perform data transfer with PIO, hence handled by the CPU. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> --- drivers/crypto/atmel-sha.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c index be0d72cf4352..58d9ca8ac0f2 100644 --- a/drivers/crypto/atmel-sha.c +++ b/drivers/crypto/atmel-sha.c @@ -64,6 +64,8 @@ #define SHA_FLAGS_ERROR BIT(23) #define SHA_FLAGS_PAD BIT(24) #define SHA_FLAGS_RESTORE BIT(25) +#define SHA_FLAGS_IDATAR0 BIT(26) +#define SHA_FLAGS_WAIT_DATARDY BIT(27) #define SHA_OP_UPDATE 1 #define SHA_OP_FINAL 2 @@ -141,6 +143,7 @@ struct atmel_sha_dev { struct ahash_request *req; bool is_async; atmel_sha_fn_t resume; + atmel_sha_fn_t cpu_transfer_complete; struct atmel_sha_dma dma_lch_in; @@ -1317,6 +1320,93 @@ static irqreturn_t atmel_sha_irq(int irq, void *dev_id) return IRQ_NONE; } + +/* CPU transfer functions */ + +static int atmel_sha_cpu_transfer(struct atmel_sha_dev *dd) +{ + struct ahash_request *req = dd->req; + struct atmel_sha_reqctx *ctx = ahash_request_ctx(req); + const u32 *words = (const u32 *)ctx->buffer; + size_t i, num_words; + u32 isr, din, din_inc; + + din_inc = (ctx->flags & SHA_FLAGS_IDATAR0) ? 0 : 1; + for (;;) { + /* Write data into the Input Data Registers. */ + num_words = DIV_ROUND_UP(ctx->bufcnt, sizeof(u32)); + for (i = 0, din = 0; i < num_words; ++i, din += din_inc) + atmel_sha_write(dd, SHA_REG_DIN(din), words[i]); + + ctx->offset += ctx->bufcnt; + ctx->total -= ctx->bufcnt; + + if (!ctx->total) + break; + + /* + * Prepare next block: + * Fill ctx->buffer now with the next data to be written into + * IDATARx: it gives time for the SHA hardware to process + * the current data so the SHA_INT_DATARDY flag might be set + * in SHA_ISR when polling this register at the beginning of + * the next loop. + */ + ctx->bufcnt = min_t(size_t, ctx->block_size, ctx->total); + scatterwalk_map_and_copy(ctx->buffer, ctx->sg, + ctx->offset, ctx->bufcnt, 0); + + /* Wait for hardware to be ready again. */ + isr = atmel_sha_read(dd, SHA_ISR); + if (!(isr & SHA_INT_DATARDY)) { + /* Not ready yet. */ + dd->resume = atmel_sha_cpu_transfer; + atmel_sha_write(dd, SHA_IER, SHA_INT_DATARDY); + return -EINPROGRESS; + } + } + + if (unlikely(!(ctx->flags & SHA_FLAGS_WAIT_DATARDY))) + return dd->cpu_transfer_complete(dd); + + return atmel_sha_wait_for_data_ready(dd, dd->cpu_transfer_complete); +} + +static int atmel_sha_cpu_start(struct atmel_sha_dev *dd, + struct scatterlist *sg, + unsigned int len, + bool idatar0_only, + bool wait_data_ready, + atmel_sha_fn_t resume) +{ + struct ahash_request *req = dd->req; + struct atmel_sha_reqctx *ctx = ahash_request_ctx(req); + + if (!len) + return resume(dd); + + ctx->flags &= ~(SHA_FLAGS_IDATAR0 | SHA_FLAGS_WAIT_DATARDY); + + if (idatar0_only) + ctx->flags |= SHA_FLAGS_IDATAR0; + + if (wait_data_ready) + ctx->flags |= SHA_FLAGS_WAIT_DATARDY; + + ctx->sg = sg; + ctx->total = len; + ctx->offset = 0; + + /* Prepare the first block to be written. */ + ctx->bufcnt = min_t(size_t, ctx->block_size, ctx->total); + scatterwalk_map_and_copy(ctx->buffer, ctx->sg, + ctx->offset, ctx->bufcnt, 0); + + dd->cpu_transfer_complete = resume; + return atmel_sha_cpu_transfer(dd); +} + + static void atmel_sha_unregister_algs(struct atmel_sha_dev *dd) { int i; -- 2.7.4
next prev parent reply other threads:[~2016-12-22 16:37 UTC|newest] Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-12-22 16:37 [PATCH v2 00/12] crypto: atmel-authenc: add support to authenc(hmac(shaX),Y(aes)) modes Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 00/12] crypto: atmel-authenc: add support to authenc(hmac(shaX), Y(aes)) modes Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 01/12] crypto: atmel-sha: create function to get an Atmel SHA device Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 02/12] crypto: atmel-sha: update request queue management to make it more generic Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 03/12] crypto: atmel-sha: make atmel_sha_done_task " Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 04/12] crypto: atmel-sha: redefine SHA_FLAGS_SHA* flags to match SHA_MR_ALGO_SHA* Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 05/12] crypto: atmel-sha: add atmel_sha_wait_for_data_ready() Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 06/12] crypto: atmel-sha: add SHA_MR_MODE_IDATAR0 Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen [this message] 2016-12-22 16:37 ` [PATCH v2 07/12] crypto: atmel-sha: add atmel_sha_cpu_start() Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 08/12] crypto: atmel-sha: add simple DMA transfers Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 09/12] crypto: atmel-sha: add support to hmac(shaX) Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:37 ` [PATCH v2 10/12] crypto: atmel-aes: fix atmel_aes_handle_queue() Cyrille Pitchen 2016-12-22 16:37 ` Cyrille Pitchen 2016-12-22 16:38 ` [PATCH v2 11/12] crypto: atmel-authenc: add support to authenc(hmac(shaX),Y(aes)) modes Cyrille Pitchen 2016-12-22 16:38 ` [PATCH v2 11/12] crypto: atmel-authenc: add support to authenc(hmac(shaX), Y(aes)) modes Cyrille Pitchen 2016-12-22 21:10 ` [PATCH v2 11/12] crypto: atmel-authenc: add support to authenc(hmac(shaX),Y(aes)) modes kbuild test robot 2016-12-22 21:10 ` kbuild test robot 2016-12-23 11:34 ` [PATCH v2 11/12] crypto: atmel-authenc: add support to authenc(hmac(shaX), Y(aes)) modes Stephan Müller 2016-12-23 11:34 ` Stephan Müller 2016-12-23 11:34 ` [PATCH v2 11/12] crypto: atmel-authenc: add support to authenc(hmac(shaX),Y(aes)) modes Stephan Müller 2017-01-09 18:24 ` Cyrille Pitchen 2017-01-09 18:24 ` Cyrille Pitchen 2017-01-09 18:34 ` Stephan Müller 2017-01-09 18:34 ` [PATCH v2 11/12] crypto: atmel-authenc: add support to authenc(hmac(shaX), Y(aes)) modes Stephan Müller 2016-12-22 16:38 ` [PATCH v2 12/12] crypto: atmel-sha: add verbose debug facilities to print hw register names Cyrille Pitchen 2016-12-22 16:38 ` Cyrille Pitchen
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