All of lore.kernel.org
 help / color / mirror / Atom feed
From: Richtek Jeff Chang <richtek.jeff.chang@gmail.com>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
	tiwai@suse.com, lgirdwood@gmail.com,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [alsa-devel] [PATCH] [MT6660] Mediatek Smart Amplifier Driver
Date: Wed, 25 Sep 2019 18:04:23 +0800	[thread overview]
Message-ID: <3a9f66b3-bdb7-9bec-a9c4-ac58d3efa543@gmail.com> (raw)
In-Reply-To: <20190904115630.GA4348@sirena.co.uk>

Dear Mark:

     Thanks for your reply.

     But I still have some questions. please check the red comment.

Mark Brown 於 2019/9/4 下午7:56 寫道:
> On Wed, Sep 04, 2019 at 03:07:06PM +0800, Richtek Jeff Chang wrote:
>
>>>> +static int32_t mt6660_i2c_update_bits(struct mt6660_chip *chip,
>>>> +	uint32_t addr, uint32_t mask, uint32_t data)
>>>> +{
>>> It would be good to implement a regmap rather than open coding
>>> *everything* - it'd give you things like this without needing to open
>>> code them.  Providing you don't use the cache code it should cope fine
>>> with variable register sizes.
>> Due to our hardware design, it is hard to implement regmap for MT6660.
> You definitely can't use all the functionality due to the variable
> register sizes but using reg_write() and reg_read() should get you most
> of it.


     How can I fill the val_bits for variable register size?

     I try to use all 32 bits val_bits, but our chip some registers are 
overlap...

     Do you have any suggestion for this issue?  Thank you very much!

>
>>>> +static int mt6660_i2c_init_setting(struct mt6660_chip *chip)
>>>> +{
>>>> +	int i, len, ret;
>>>> +	const struct codec_reg_val *init_table;
>>>> +
>>>> +	init_table = e4_reg_inits;
>>>> +	len = ARRAY_SIZE(e4_reg_inits);
>>>> +
>>>> +	for (i = 0; i < len; i++) {
>>>> +		ret = mt6660_i2c_update_bits(chip, init_table[i].addr,
>>>> +				init_table[i].mask, init_table[i].data);
>>>> +		if (ret < 0)
>>>> +			return ret;
>>> Why are we not using the chip defaults here?
>> Because MT6660 needs this initial setting for working well.
> What are these settings?  Are you sure they are generic settings and
> not board specific?

Yes, they are generic setting. It comes from our hardware designers.


>>>> +	if (on_off) {
>>>> +		if (chip->pwr_cnt == 0) {
>>>> +			ret = mt6660_i2c_update_bits(chip,
>>>> +				MT6660_REG_SYSTEM_CTRL, 0x01, 0x00);
>>>> +			val = mt6660_i2c_read(chip, MT6660_REG_IRQ_STATUS1);
>>>> +			dev_info(chip->dev,
>>>> +				"%s reg0x05 = 0x%x\n", __func__, val);
>>>> +		}
>>>> +		chip->pwr_cnt++;
>>> This looks like you're open coding runtime PM stuff?  AFAICT the issue
>>> is that you need to write to this register to do any I/O.  Just
>>> implement this via the standard runtime PM framework, you'll need to do
>>> something about the register I/O in the controls (ideally in the
>>> framework, it'd be a lot easier if you did have a cache) but you could
>>> cut out this bit.
>> In our experience, some Customer platform doesn't support runtime PM.
> Tell your customers to turn it on, it's a standard kernel framework and
> there's really no excuse for open coding it.  If there's some reason why
> runtime PM can't work for them then we should get that fixed but it
> really is *very* widely deployed.


We already implement it in runtime PM.

For all your comment, regmap is a hard thing to modify. I also survey 
others driver about variable register size. But it seems no one like our 
MT6660 chip...

Should I send new patch file to you in this mail loop, or I should send 
new patch via new Email Loop?

Thanks a lot.

Richtek Jeff Chang


_______________________________________________
Alsa-devel mailing list
Alsa-devel@alsa-project.org
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel

WARNING: multiple messages have this Message-ID (diff)
From: Richtek Jeff Chang <richtek.jeff.chang@gmail.com>
To: Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
	tiwai@suse.com, lgirdwood@gmail.com,
	linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] [MT6660] Mediatek Smart Amplifier Driver
Date: Wed, 25 Sep 2019 18:04:23 +0800	[thread overview]
Message-ID: <3a9f66b3-bdb7-9bec-a9c4-ac58d3efa543@gmail.com> (raw)
In-Reply-To: <20190904115630.GA4348@sirena.co.uk>

Dear Mark:

     Thanks for your reply.

     But I still have some questions. please check the red comment.

Mark Brown 於 2019/9/4 下午7:56 寫道:
> On Wed, Sep 04, 2019 at 03:07:06PM +0800, Richtek Jeff Chang wrote:
>
>>>> +static int32_t mt6660_i2c_update_bits(struct mt6660_chip *chip,
>>>> +	uint32_t addr, uint32_t mask, uint32_t data)
>>>> +{
>>> It would be good to implement a regmap rather than open coding
>>> *everything* - it'd give you things like this without needing to open
>>> code them.  Providing you don't use the cache code it should cope fine
>>> with variable register sizes.
>> Due to our hardware design, it is hard to implement regmap for MT6660.
> You definitely can't use all the functionality due to the variable
> register sizes but using reg_write() and reg_read() should get you most
> of it.


     How can I fill the val_bits for variable register size?

     I try to use all 32 bits val_bits, but our chip some registers are 
overlap...

     Do you have any suggestion for this issue?  Thank you very much!

>
>>>> +static int mt6660_i2c_init_setting(struct mt6660_chip *chip)
>>>> +{
>>>> +	int i, len, ret;
>>>> +	const struct codec_reg_val *init_table;
>>>> +
>>>> +	init_table = e4_reg_inits;
>>>> +	len = ARRAY_SIZE(e4_reg_inits);
>>>> +
>>>> +	for (i = 0; i < len; i++) {
>>>> +		ret = mt6660_i2c_update_bits(chip, init_table[i].addr,
>>>> +				init_table[i].mask, init_table[i].data);
>>>> +		if (ret < 0)
>>>> +			return ret;
>>> Why are we not using the chip defaults here?
>> Because MT6660 needs this initial setting for working well.
> What are these settings?  Are you sure they are generic settings and
> not board specific?

Yes, they are generic setting. It comes from our hardware designers.


>>>> +	if (on_off) {
>>>> +		if (chip->pwr_cnt == 0) {
>>>> +			ret = mt6660_i2c_update_bits(chip,
>>>> +				MT6660_REG_SYSTEM_CTRL, 0x01, 0x00);
>>>> +			val = mt6660_i2c_read(chip, MT6660_REG_IRQ_STATUS1);
>>>> +			dev_info(chip->dev,
>>>> +				"%s reg0x05 = 0x%x\n", __func__, val);
>>>> +		}
>>>> +		chip->pwr_cnt++;
>>> This looks like you're open coding runtime PM stuff?  AFAICT the issue
>>> is that you need to write to this register to do any I/O.  Just
>>> implement this via the standard runtime PM framework, you'll need to do
>>> something about the register I/O in the controls (ideally in the
>>> framework, it'd be a lot easier if you did have a cache) but you could
>>> cut out this bit.
>> In our experience, some Customer platform doesn't support runtime PM.
> Tell your customers to turn it on, it's a standard kernel framework and
> there's really no excuse for open coding it.  If there's some reason why
> runtime PM can't work for them then we should get that fixed but it
> really is *very* widely deployed.


We already implement it in runtime PM.

For all your comment, regmap is a hard thing to modify. I also survey 
others driver about variable register size. But it seems no one like our 
MT6660 chip...

Should I send new patch file to you in this mail loop, or I should send 
new patch via new Email Loop?

Thanks a lot.

Richtek Jeff Chang


_______________________________________________
Alsa-devel mailing list
Alsa-devel@alsa-project.org
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel

  reply	other threads:[~2019-09-25 10:06 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-03  7:08 [PATCH] [MT6660] Mediatek Smart Amplifier Driver richtek.jeff.chang
2019-09-03  7:08 ` richtek.jeff.chang
2019-09-03  7:08 ` [alsa-devel] " richtek.jeff.chang
2019-09-03 16:38 ` Mark Brown
2019-09-03 16:38   ` Mark Brown
2019-09-03 16:38   ` [alsa-devel] " Mark Brown
2019-09-04  7:07   ` Richtek Jeff Chang
2019-09-04  7:07     ` Richtek Jeff Chang
2019-09-04 11:56     ` Mark Brown
2019-09-04 11:56       ` Mark Brown
2019-09-04 11:56       ` [alsa-devel] " Mark Brown
2019-09-25 10:04       ` Richtek Jeff Chang [this message]
2019-09-25 10:04         ` Richtek Jeff Chang
2019-09-25 16:50         ` Mark Brown
2019-09-25 16:50           ` Mark Brown
2019-09-25 16:50           ` [alsa-devel] " Mark Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3a9f66b3-bdb7-9bec-a9c4-ac58d3efa543@gmail.com \
    --to=richtek.jeff.chang@gmail.com \
    --cc=alsa-devel@alsa-project.org \
    --cc=broonie@kernel.org \
    --cc=lgirdwood@gmail.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=tiwai@suse.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.