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From: Zong Li <zong.li@sifive.com>
To: palmer@dabbelt.com, paul.walmsley@sifive.com,
	aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: Zong Li <zong.li@sifive.com>
Subject: [PATCH v3 3/9] riscv: add ARCH_SUPPORTS_DEBUG_PAGEALLOC support
Date: Tue, 10 Mar 2020 00:55:38 +0800	[thread overview]
Message-ID: <3b6b3c18655b41306e24a96d56abe1f860a6f900.1583772574.git.zong.li@sifive.com> (raw)
In-Reply-To: <cover.1583772574.git.zong.li@sifive.com>

ARCH_SUPPORTS_DEBUG_PAGEALLOC provides a hook to map and unmap
pages for debugging purposes. Implement the __kernel_map_pages
functions to fill the poison pattern.

Signed-off-by: Zong Li <zong.li@sifive.com>
---
 arch/riscv/Kconfig       |  3 +++
 arch/riscv/mm/pageattr.c | 13 +++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 71fabb0ffdbe..54437d7662a5 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -133,6 +133,9 @@ config ARCH_SELECT_MEMORY_MODEL
 config ARCH_WANT_GENERAL_HUGETLB
 	def_bool y
 
+config ARCH_SUPPORTS_DEBUG_PAGEALLOC
+	def_bool y
+
 config SYS_SUPPORTS_HUGETLBFS
 	def_bool y
 
diff --git a/arch/riscv/mm/pageattr.c b/arch/riscv/mm/pageattr.c
index 7be6cd67e2ef..728759eb530a 100644
--- a/arch/riscv/mm/pageattr.c
+++ b/arch/riscv/mm/pageattr.c
@@ -172,3 +172,16 @@ int set_direct_map_default_noflush(struct page *page)
 
 	return walk_page_range(&init_mm, start, end, &pageattr_ops, &masks);
 }
+
+void __kernel_map_pages(struct page *page, int numpages, int enable)
+{
+	if (!debug_pagealloc_enabled())
+		return;
+
+	if (enable)
+		__set_memory((unsigned long)page_address(page), numpages,
+			     __pgprot(_PAGE_PRESENT), __pgprot(0));
+	else
+		__set_memory((unsigned long)page_address(page), numpages,
+			     __pgprot(0), __pgprot(_PAGE_PRESENT));
+}
-- 
2.25.1


  parent reply	other threads:[~2020-03-09 16:56 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-09 16:55 [PATCH v3 0/9] Support strict kernel memory permissions for security Zong Li
2020-03-09 16:55 ` [PATCH v3 1/9] riscv: add ARCH_HAS_SET_MEMORY support Zong Li
2020-03-09 16:55 ` [PATCH v3 2/9] riscv: add ARCH_HAS_SET_DIRECT_MAP support Zong Li
2020-03-09 16:55 ` Zong Li [this message]
2020-03-09 16:55 ` [PATCH v3 4/9] riscv: move exception table immediately after RO_DATA Zong Li
2020-03-09 16:55 ` [PATCH v3 5/9] riscv: add alignment for text, rodata and data sections Zong Li
2020-03-09 16:55 ` [PATCH v3 6/9] riscv: add STRICT_KERNEL_RWX support Zong Li
2020-03-09 16:55 ` [PATCH v3 7/9] riscv: add macro to get instruction length Zong Li
2020-03-09 16:55 ` [PATCH v3 8/9] riscv: introduce interfaces to patch kernel code Zong Li
2020-03-31 15:32   ` Masami Hiramatsu
2020-03-31 15:32     ` Masami Hiramatsu
2020-04-01  7:42     ` Zong Li
2020-04-01  7:42       ` Zong Li
2020-04-02  1:17       ` Masami Hiramatsu
2020-04-02  1:17         ` Masami Hiramatsu
2020-04-03  9:04         ` Zong Li
2020-04-03  9:04           ` Zong Li
2020-04-04  3:14           ` Masami Hiramatsu
2020-04-04  3:14             ` Masami Hiramatsu
2020-04-04 12:12             ` Zong Li
2020-04-04 12:12               ` Zong Li
2020-04-06 10:36               ` Zong Li
2020-04-06 10:36                 ` Zong Li
2020-04-07 12:29                 ` Masami Hiramatsu
2020-04-07 12:29                   ` Masami Hiramatsu
2020-04-07 13:06                   ` Zong Li
2020-04-07 13:06                     ` Zong Li
2020-03-09 16:55 ` [PATCH v3 9/9] riscv: patch code by fixmap mapping Zong Li
2020-03-31 13:32 ` [PATCH v3 0/9] Support strict kernel memory permissions for security Masami Hiramatsu
2020-03-31 13:32   ` Masami Hiramatsu
2020-04-01  7:18   ` Zong Li
2020-04-01  7:18     ` Zong Li

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