From: Julien Grall <julien@xen.org>
To: "Roger Pau Monné" <roger.pau@citrix.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>, Wei Liu <wl@xen.org>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Ian Jackson <ian.jackson@eu.citrix.com>,
George Dunlap <george.dunlap@citrix.com>,
Tim Deegan <tim@xen.org>, Jan Beulich <jbeulich@suse.com>,
xen-devel@lists.xenproject.org
Subject: Re: [Xen-devel] [PATCH v7 1/3] x86/tlb: introduce a flush HVM ASIDs flag
Date: Thu, 19 Mar 2020 18:07:44 +0000 [thread overview]
Message-ID: <3d242660-7c28-5465-5da8-d126d2d347b4@xen.org> (raw)
In-Reply-To: <20200319173825.GQ24458@Air-de-Roger.citrite.net>
On 19/03/2020 17:38, Roger Pau Monné wrote:
> On Thu, Mar 19, 2020 at 04:21:23PM +0000, Julien Grall wrote:
>> Hi,
>>
>> On 19/03/2020 15:47, Roger Pau Monne wrote:
>>> diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
>>> index d0d095d9c7..02aad43042 100644
>>> --- a/xen/include/xen/mm.h
>>> +++ b/xen/include/xen/mm.h
>>> @@ -644,7 +644,7 @@ static inline void filtered_flush_tlb_mask(uint32_t tlbflush_timestamp)
>>> if ( !cpumask_empty(&mask) )
>>> {
>>> perfc_incr(need_flush_tlb_flush);
>>> - flush_tlb_mask(&mask);
>>> + flush_mask(&mask, FLUSH_TLB | FLUSH_HVM_ASID_CORE);
>>
>> A rule of thumb is any modification in common code may impact Arm. This is a
>> case here because the flag and the "new" function are not defined on Arm and
>> therefore going to break the build.
>
> flush_mask is not a new function, it's just not implemented on ARM I
> guess.
That's why I said it in "" ;).
> >> Why can't you keep flush_tlb_mask() here?
>
> Because filtered_flush_tlb_mask is used in populate_physmap, and
> changes to the phymap require an ASID flush on AMD hardware.
I am afraid this does not yet explain me why flush_tlb_mask() could not
be updated so it flush the ASID on AMD hardware.
This would actually match the behavior of flush_tlb_mask() on Arm where
all the guest TLBs would be removed.
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2020-03-19 18:08 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-19 15:47 [Xen-devel] [PATCH v7 0/3] x86/guest: use assisted TLB flush in guest mode Roger Pau Monne
2020-03-19 15:47 ` [Xen-devel] [PATCH v7 1/3] x86/tlb: introduce a flush HVM ASIDs flag Roger Pau Monne
2020-03-19 16:21 ` Julien Grall
2020-03-19 17:38 ` Roger Pau Monné
2020-03-19 18:07 ` Julien Grall [this message]
2020-03-19 18:43 ` Roger Pau Monné
2020-03-19 19:07 ` Julien Grall
2020-03-20 7:21 ` Jan Beulich
2020-03-20 9:01 ` Roger Pau Monné
2020-03-20 9:12 ` Julien Grall
2020-03-20 9:42 ` Roger Pau Monné
2020-03-20 10:00 ` Roger Pau Monné
2020-03-20 10:08 ` Julien Grall
2020-03-20 10:24 ` Roger Pau Monné
2020-03-20 10:36 ` Julien Grall
2020-03-20 11:18 ` Roger Pau Monné
2020-03-20 13:19 ` Jan Beulich
2020-03-20 14:17 ` Julien Grall
2020-03-20 14:56 ` Jan Beulich
2020-03-20 13:16 ` Jan Beulich
2020-03-20 14:22 ` Roger Pau Monné
2020-03-20 14:27 ` Julien Grall
2020-03-20 14:43 ` Julien Grall
2020-03-20 14:52 ` Roger Pau Monné
2020-03-20 14:49 ` Roger Pau Monné
2020-03-20 14:59 ` Jan Beulich
2020-03-20 15:05 ` Roger Pau Monné
2020-03-19 15:47 ` [Xen-devel] [PATCH v7 2/3] x86/tlb: allow disabling the TLB clock Roger Pau Monne
2020-03-19 15:47 ` [Xen-devel] [PATCH v7 3/3] x86/tlb: use Xen L0 assisted TLB flush when available Roger Pau Monne
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