* [PATCH 1/9] arm64: versal-net: Add support for Versal NET platform
2022-09-16 8:53 [PATCH 0/9] xilinx: versal-net: Add support for new Versal NET SoC Michal Simek
@ 2022-09-16 8:53 ` Michal Simek
2022-09-16 8:53 ` [PATCH 2/9] spi: cadence_qspi: " Michal Simek
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Michal Simek @ 2022-09-16 8:53 UTC (permalink / raw)
To: u-boot, git
Cc: Andre Przywara, Andrew Scull, Bharat Gooty, Christian Hewitt,
Fabio Estevam, Icenowy Zheng, Joe Hershberger, Marcel Ziswiler,
Marek Vasut, Ovidiu Panait, Pali Rohár, Peng Fan,
Rayagonda Kokatanur, Samuel Holland, Sean Anderson, Simon Glass,
Wolfgang Denk, Ying-Chun Liu (PaulLiu)
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
Kconfig | 2 +-
MAINTAINERS | 7 +
arch/arm/Kconfig | 14 ++
arch/arm/Makefile | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/xilinx-versal-net-virt.dts | 11 ++
arch/arm/mach-versal-net/Kconfig | 43 +++++
arch/arm/mach-versal-net/Makefile | 10 ++
arch/arm/mach-versal-net/clk.c | 35 ++++
arch/arm/mach-versal-net/cpu.c | 89 +++++++++
.../mach-versal-net/include/mach/hardware.h | 27 +++
.../mach-versal-net/include/mach/sys_proto.h | 16 ++
board/xilinx/Kconfig | 6 +-
board/xilinx/versal-net/Kconfig | 9 +
board/xilinx/versal-net/MAINTAINERS | 8 +
board/xilinx/versal-net/Makefile | 9 +
board/xilinx/versal-net/board.c | 170 ++++++++++++++++++
env/Kconfig | 6 +-
include/configs/xilinx_versal_net.h | 156 ++++++++++++++++
19 files changed, 614 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/dts/xilinx-versal-net-virt.dts
create mode 100644 arch/arm/mach-versal-net/Kconfig
create mode 100644 arch/arm/mach-versal-net/Makefile
create mode 100644 arch/arm/mach-versal-net/clk.c
create mode 100644 arch/arm/mach-versal-net/cpu.c
create mode 100644 arch/arm/mach-versal-net/include/mach/hardware.h
create mode 100644 arch/arm/mach-versal-net/include/mach/sys_proto.h
create mode 100644 board/xilinx/versal-net/Kconfig
create mode 100644 board/xilinx/versal-net/MAINTAINERS
create mode 100644 board/xilinx/versal-net/Makefile
create mode 100644 board/xilinx/versal-net/board.c
create mode 100644 include/configs/xilinx_versal_net.h
diff --git a/Kconfig b/Kconfig
index 991b260182e8..4542ed7333d1 100644
--- a/Kconfig
+++ b/Kconfig
@@ -539,7 +539,7 @@ config PLATFORM_ELFENTRY
config STACK_SIZE
hex "Define max stack size that can be used by U-Boot"
- default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
+ default 0x4000000 if ARCH_VERSAL_NET || ARCH_VERSAL || ARCH_ZYNQMP
default 0x200000 if MICROBLAZE
default 0x1000000
help
diff --git a/MAINTAINERS b/MAINTAINERS
index 1a7a56335f6f..82b5e9edc29c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -628,6 +628,13 @@ F: arch/arm/mach-uniphier/
F: configs/uniphier_*_defconfig
N: uniphier
+ARM VERSAL NET
+M: Michal Simek <michal.simek@amd.com>
+S: Maintained
+T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git
+F: arch/arm/mach-versal-net/
+N: (?<!uni)versal-net
+
ARM VERSAL
M: Michal Simek <michal.simek@amd.com>
S: Maintained
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3649222470ea..cf2ccb4a7306 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1248,6 +1248,18 @@ config ARCH_VERSAL
imply BOARD_LATE_INIT
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
+config ARCH_VERSAL_NET
+ bool "Support Xilinx Keystone Platform"
+ select ARM64
+ select CLK
+ select DM
+ select DM_ETH if NET
+ select DM_MMC if MMC
+ select DM_SERIAL
+ select OF_CONTROL
+ imply BOARD_LATE_INIT
+ imply ENV_VARS_UBOOT_RUNTIME_CONFIG
+
config ARCH_VF610
bool "Freescale Vybrid"
select CPU_V7A
@@ -2297,6 +2309,8 @@ source "arch/arm/mach-zynqmp/Kconfig"
source "arch/arm/mach-versal/Kconfig"
+source "arch/arm/mach-versal-net/Kconfig"
+
source "arch/arm/mach-zynqmp-r5/Kconfig"
source "arch/arm/cpu/armv7/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1f4a1d57883b..ac602aed9c9a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -88,6 +88,7 @@ machine-$(CONFIG_ARCH_OCTEONTX) += octeontx
machine-$(CONFIG_ARCH_OCTEONTX2) += octeontx2
machine-$(CONFIG_ARCH_UNIPHIER) += uniphier
machine-$(CONFIG_ARCH_VERSAL) += versal
+machine-$(CONFIG_ARCH_VERSAL_NET) += versal-net
machine-$(CONFIG_ARCH_ZYNQ) += zynq
machine-$(CONFIG_ARCH_ZYNQMP) += zynqmp
machine-$(CONFIG_ARCH_ZYNQMP_R5) += zynqmp-r5
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5bff2e65b76f..a141d0de0c20 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -379,6 +379,8 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
versal-mini-emmc0.dtb \
versal-mini-emmc1.dtb \
xilinx-versal-virt.dtb
+dtb-$(CONFIG_ARCH_VERSAL_NET) += \
+ xilinx-versal-net-virt.dtb
dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
zynqmp-r5.dtb
dtb-$(CONFIG_AM33XX) += \
diff --git a/arch/arm/dts/xilinx-versal-net-virt.dts b/arch/arm/dts/xilinx-versal-net-virt.dts
new file mode 100644
index 000000000000..c99257cb0834
--- /dev/null
+++ b/arch/arm/dts/xilinx-versal-net-virt.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Empty device tree for versal-net-virt board
+ *
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ */
+
+/dts-v1/;
+
+/ {
+};
diff --git a/arch/arm/mach-versal-net/Kconfig b/arch/arm/mach-versal-net/Kconfig
new file mode 100644
index 000000000000..62825e189fe6
--- /dev/null
+++ b/arch/arm/mach-versal-net/Kconfig
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: GPL-2.0
+
+if ARCH_VERSAL_NET
+
+config SYS_BOARD
+ string "Board name"
+ default "versal-net"
+
+config SYS_VENDOR
+ string "Vendor name"
+ default "xilinx"
+
+config SYS_SOC
+ default "versal-net"
+
+config SYS_CONFIG_NAME
+ string "Board configuration name"
+ default "xilinx_versal_net"
+ help
+ This option contains information about board configuration name.
+ Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
+ will be used for board configuration.
+
+config SYS_MEM_RSVD_FOR_MMU
+ bool "Reserve memory for MMU Table"
+ help
+ If defined this option is used to setup different space for
+ MMU table than the one which will be allocated during
+ relocation.
+
+config GICV3
+ def_bool y
+
+config SYS_MALLOC_LEN
+ default 0x2000000
+
+config ZYNQ_SDHCI_MAX_FREQ
+ default 200000000
+
+source "board/xilinx/Kconfig"
+source "board/xilinx/versal-net/Kconfig"
+
+endif
diff --git a/arch/arm/mach-versal-net/Makefile b/arch/arm/mach-versal-net/Makefile
new file mode 100644
index 000000000000..e12c4c0e6739
--- /dev/null
+++ b/arch/arm/mach-versal-net/Makefile
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2021 - 2022, Xilinx, Inc.
+# Copyright (C) 2022, Advanced Micro Devices, Inc.
+#
+# Michal Simek <michal.simek@amd.com>
+#
+
+obj-y += clk.o
+obj-y += cpu.o
diff --git a/arch/arm/mach-versal-net/clk.c b/arch/arm/mach-versal-net/clk.c
new file mode 100644
index 000000000000..d097de7afa63
--- /dev/null
+++ b/arch/arm/mach-versal-net/clk.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2016 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <time.h>
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_CLOCKS
+/**
+ * set_cpu_clk_info - Initialize clock framework
+ *
+ * Return: 0 always.
+ *
+ * This function is called from common code after relocation and sets up the
+ * clock framework. The framework must not be used before this function had been
+ * called.
+ */
+int set_cpu_clk_info(void)
+{
+ gd->cpu_clk = get_tbclk();
+
+ gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;
+ gd->bd->bi_dsp_freq = 0;
+
+ return 0;
+}
+#endif
diff --git a/arch/arm/mach-versal-net/cpu.c b/arch/arm/mach-versal-net/cpu.c
new file mode 100644
index 000000000000..4c9b15411df2
--- /dev/null
+++ b/arch/arm/mach-versal-net/cpu.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+#include <common.h>
+#include <init.h>
+#include <asm/armv8/mmu.h>
+#include <asm/cache.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define VERSAL_NET_MEM_MAP_USED 5
+
+#define DRAM_BANKS CONFIG_NR_DRAM_BANKS
+
+/* +1 is end of list which needs to be empty */
+#define VERSAL_NET_MEM_MAP_MAX (VERSAL_NET_MEM_MAP_USED + DRAM_BANKS + 1)
+
+static struct mm_region versal_mem_map[VERSAL_NET_MEM_MAP_MAX] = {
+ {
+ .virt = 0x80000000UL,
+ .phys = 0x80000000UL,
+ .size = 0x70000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = 0xf0000000UL,
+ .phys = 0xf0000000UL,
+ .size = 0x0fe00000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = 0x400000000UL,
+ .phys = 0x400000000UL,
+ .size = 0x200000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = 0x600000000UL,
+ .phys = 0x600000000UL,
+ .size = 0x800000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ .virt = 0xe00000000UL,
+ .phys = 0xe00000000UL,
+ .size = 0xf200000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }
+};
+
+void mem_map_fill(void)
+{
+ int banks = VERSAL_NET_MEM_MAP_USED;
+
+ for (int i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ /* Zero size means no more DDR that's this is end */
+ if (!gd->bd->bi_dram[i].size)
+ break;
+
+ versal_mem_map[banks].virt = gd->bd->bi_dram[i].start;
+ versal_mem_map[banks].phys = gd->bd->bi_dram[i].start;
+ versal_mem_map[banks].size = gd->bd->bi_dram[i].size;
+ versal_mem_map[banks].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE;
+ banks = banks + 1;
+ }
+}
+
+struct mm_region *mem_map = versal_mem_map;
+
+u64 get_page_table_size(void)
+{
+ return 0x14000;
+}
diff --git a/arch/arm/mach-versal-net/include/mach/hardware.h b/arch/arm/mach-versal-net/include/mach/hardware.h
new file mode 100644
index 000000000000..2eb549849825
--- /dev/null
+++ b/arch/arm/mach-versal-net/include/mach/hardware.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2016 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ */
+
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
+#define PMC_TAP 0xF11A0000
+
+#define PMC_TAP_IDCODE (PMC_TAP + 0)
+#define PMC_TAP_VERSION (PMC_TAP + 0x4)
+# define PMC_VERSION_MASK GENMASK(7, 0)
+# define PS_VERSION_MASK GENMASK(15, 8)
+# define RTL_VERSION_MASK GENMASK(23, 16)
+# define PLATFORM_MASK GENMASK(27, 24)
+# define PLATFORM_VERSION_MASK GENMASK(31, 28)
+#define PMC_TAP_USERCODE (PMC_TAP + 0x8)
+
+enum versal_net_platform {
+ VERSAL_NET_SILICON = 0,
+ VERSAL_NET_SPP = 1,
+ VERSAL_NET_EMU = 2,
+ VERSAL_NET_QEMU = 3,
+};
diff --git a/arch/arm/mach-versal-net/include/mach/sys_proto.h b/arch/arm/mach-versal-net/include/mach/sys_proto.h
new file mode 100644
index 000000000000..5bba9030f2dd
--- /dev/null
+++ b/arch/arm/mach-versal-net/include/mach/sys_proto.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ */
+
+#include <linux/build_bug.h>
+
+void mem_map_fill(void);
+
+static inline int zynqmp_mmio_write(const u32 address, const u32 mask,
+ const u32 value)
+{
+ BUILD_BUG();
+ return -EINVAL;
+}
diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig
index 17880661736d..746a2332ad5f 100644
--- a/board/xilinx/Kconfig
+++ b/board/xilinx/Kconfig
@@ -42,7 +42,7 @@ endif
config XILINX_OF_BOARD_DTB_ADDR
hex "Default DTB pickup address"
- default 0x1000 if ARCH_VERSAL
+ default 0x1000 if ARCH_VERSAL || ARCH_VERSAL_NET
default 0x8000 if MICROBLAZE
default 0x100000 if ARCH_ZYNQ || ARCH_ZYNQMP
depends on OF_BOARD || OF_SEPARATE
@@ -51,10 +51,10 @@ config XILINX_OF_BOARD_DTB_ADDR
config BOOT_SCRIPT_OFFSET
hex "Boot script offset"
- depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || MICROBLAZE
+ depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET || MICROBLAZE
default 0xFC0000 if ARCH_ZYNQ || MICROBLAZE
default 0x3E80000 if ARCH_ZYNQMP
- default 0x7F80000 if ARCH_VERSAL
+ default 0x7F80000 if ARCH_VERSAL || ARCH_VERSAL_NET
help
Specifies distro boot script offset in NAND/QSPI/NOR flash.
diff --git a/board/xilinx/versal-net/Kconfig b/board/xilinx/versal-net/Kconfig
new file mode 100644
index 000000000000..8f94d2bb399a
--- /dev/null
+++ b/board/xilinx/versal-net/Kconfig
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2020 - 2022, Xilinx, Inc.
+# Copyright (C) 2022, Advanced Micro Devices, Inc.
+#
+
+if ARCH_VERSAL_NET
+
+endif
diff --git a/board/xilinx/versal-net/MAINTAINERS b/board/xilinx/versal-net/MAINTAINERS
new file mode 100644
index 000000000000..50120a88d6e7
--- /dev/null
+++ b/board/xilinx/versal-net/MAINTAINERS
@@ -0,0 +1,8 @@
+XILINX_VERSAL_NET BOARDS
+M: Michal Simek <michal.simek@amd.com>
+S: Maintained
+T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
+F: arch/arm/dts/versal-net*
+F: board/xilinx/versal-net/
+F: include/configs/xilinx_versal_net*
+F: configs/xilinx_versal_net*
diff --git a/board/xilinx/versal-net/Makefile b/board/xilinx/versal-net/Makefile
new file mode 100644
index 000000000000..2008d4e231c6
--- /dev/null
+++ b/board/xilinx/versal-net/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Copyright (C) 2021 - 2022, Xilinx, Inc.
+# Copyright (C) 2022, Advanced Micro Devices, Inc.
+#
+# Michal Simek <michal.simek@amd.com>
+#
+
+obj-y := board.o
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
new file mode 100644
index 000000000000..760031927f7c
--- /dev/null
+++ b/board/xilinx/versal-net/board.c
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+#include <common.h>
+#include <cpu_func.h>
+#include <fdtdec.h>
+#include <init.h>
+#include <log.h>
+#include <malloc.h>
+#include <time.h>
+#include <asm/cache.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sys_proto.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include "../common/board.h"
+
+#include <linux/bitfield.h>
+#include <debug_uart.h>
+#include <generated/dt.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ printf("EL Level:\tEL%d\n", current_el());
+
+ return 0;
+}
+
+static u32 platform_id, platform_version;
+
+char *soc_name_decode(void)
+{
+ char *name, *platform_name;
+
+ switch (platform_id) {
+ case VERSAL_NET_SPP:
+ platform_name = "ipp";
+ break;
+ case VERSAL_NET_EMU:
+ platform_name = "emu";
+ break;
+ case VERSAL_NET_QEMU:
+ platform_name = "qemu";
+ break;
+ default:
+ return NULL;
+ }
+
+ /*
+ * --rev. are 6 chars
+ * max platform name is qemu which is 4 chars
+ * platform version number are 1+1
+ * Plus 1 char for \n
+ */
+ name = calloc(1, strlen(CONFIG_SYS_BOARD) + 13);
+ if (!name)
+ return NULL;
+
+ sprintf(name, "%s-%s-rev%d.%d", CONFIG_SYS_BOARD,
+ platform_name, platform_version / 10,
+ platform_version % 10);
+
+ return name;
+}
+
+bool soc_detection(void)
+{
+ u32 version;
+
+ version = readl(PMC_TAP_VERSION);
+ platform_id = FIELD_GET(PLATFORM_MASK, version);
+
+ debug("idcode %x, version %x, usercode %x\n",
+ readl(PMC_TAP_IDCODE), version,
+ readl(PMC_TAP_USERCODE));
+
+ debug("pmc_ver %lx, ps version %lx, rtl version %lx\n",
+ FIELD_GET(PMC_VERSION_MASK, version),
+ FIELD_GET(PS_VERSION_MASK, version),
+ FIELD_GET(RTL_VERSION_MASK, version));
+
+ platform_version = FIELD_GET(PLATFORM_VERSION_MASK, version);
+
+ if (platform_id == VERSAL_NET_SPP ||
+ platform_id == VERSAL_NET_EMU) {
+ /*
+ * 9 is diff for
+ * 0 means 0.9 version
+ * 1 means 1.0 version
+ * 2 means 1.1 version
+ * etc,
+ */
+ platform_version += 9;
+ }
+
+ debug("Platform id: %d version: %d.%d\n", platform_id,
+ platform_version / 10, platform_version % 10);
+
+ return true;
+}
+
+int board_early_init_f(void)
+{
+ if (IS_ENABLED(CONFIG_DEBUG_UART)) {
+ /* Uart debug for sure */
+ debug_uart_init();
+ puts("Debug uart enabled\n"); /* or printch() */
+ }
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+ return 0;
+}
+
+int board_late_init(void)
+{
+ if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
+ debug("Saved variables - Skipping\n");
+ return 0;
+ }
+
+ if (!CONFIG_IS_ENABLED(ENV_VARS_UBOOT_RUNTIME_CONFIG))
+ return 0;
+
+ return board_late_init_xilinx();
+}
+
+int dram_init_banksize(void)
+{
+ int ret;
+
+ ret = fdtdec_setup_memory_banksize();
+ if (ret)
+ return ret;
+
+ mem_map_fill();
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ int ret;
+
+ if (CONFIG_IS_ENABLED(SYS_MEM_RSVD_FOR_MMU))
+ ret = fdtdec_setup_mem_size_base();
+ else
+ ret = fdtdec_setup_mem_size_base_lowest();
+
+ if (ret)
+ return -EINVAL;
+
+ return 0;
+}
+
+void reset_cpu(void)
+{
+}
diff --git a/env/Kconfig b/env/Kconfig
index 5329f7585be5..24111dfaf47b 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -558,7 +558,7 @@ config ENV_OFFSET
default 0xF0000 if ARCH_SUNXI
default 0xE0000 if ARCH_ZYNQ
default 0x1E00000 if ARCH_ZYNQMP
- default 0x7F40000 if ARCH_VERSAL
+ default 0x7F40000 if ARCH_VERSAL || ARCH_VERSAL_NET
default 0 if ARC
default 0x140000 if ARCH_AT91
default 0x260000 if ARCH_OMAP2PLUS
@@ -583,7 +583,7 @@ config ENV_SIZE
default 0x10000 if ARCH_SUNXI
default 0x8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC
default 0x2000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH
- default 0x8000 if ARCH_ZYNQMP || ARCH_VERSAL
+ default 0x8000 if ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET
default 0x4000 if ARC
default 0x1f000
help
@@ -593,7 +593,7 @@ config ENV_SECT_SIZE
hex "Environment Sector-Size"
depends on ENV_IS_IN_FLASH || ENV_IS_IN_SPI_FLASH
default 0x2000 if ARCH_ROCKCHIP
- default 0x40000 if ARCH_ZYNQMP || ARCH_VERSAL
+ default 0x40000 if ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET
default 0x20000 if ARCH_ZYNQ || ARCH_OMAP2PLUS || ARCH_AT91
default 0x20000 if MICROBLAZE && ENV_IS_IN_SPI_FLASH
default 0x10000 if ARCH_SUNXI && ENV_IS_IN_SPI_FLASH
diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h
new file mode 100644
index 000000000000..d9286e7f5017
--- /dev/null
+++ b/include/configs/xilinx_versal_net.h
@@ -0,0 +1,156 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for Xilinx Versal NET
+ * Copyright (C) 2016 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ *
+ * Based on Configuration for Xilinx ZynqMP
+ */
+
+#ifndef __XILINX_VERSAL_NET_H
+#define __XILINX_VERSAL_NET_H
+
+#define CONFIG_REMAKE_ELF
+
+/* FIXME this is causing issue at least on IPP */
+/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */
+
+/* Generic Interrupt Controller Definitions */
+#define GICD_BASE 0xF9000000
+#define GICR_BASE 0xF9060000
+
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
+
+/* Serial setup */
+#define CONFIG_CPU_ARMV8
+
+#define CONFIG_SYS_BAUDRATE_TABLE \
+ { 4800, 9600, 19200, 38400, 57600, 115200 }
+
+/* BOOTP options */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_MAY_FAIL
+
+/* Monitor Command Prompt */
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 2048
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_MAXARGS 64
+
+#if defined(CONFIG_CMD_DFU)
+#define DFU_DEFAULT_POLL_TIMEOUT 300
+#define CONFIG_THOR_RESET_OFF
+#define DFU_ALT_INFO_RAM \
+ "dfu_ram_info=" \
+ "setenv dfu_alt_info " \
+ "Image ram 80000 $kernel_size_r\\\\;" \
+ "system.dtb ram $fdt_addr_r $fdt_size_r\0" \
+ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
+ "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
+
+#define DFU_ALT_INFO \
+ DFU_ALT_INFO_RAM
+#endif
+
+#if !defined(DFU_ALT_INFO)
+# define DFU_ALT_INFO
+#endif
+
+/* Ethernet driver */
+#if defined(CONFIG_ZYNQ_GEM)
+# define CONFIG_NET_MULTI
+# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
+# define PHY_ANEG_TIMEOUT 20000
+#endif
+
+#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
+
+#define CONFIG_CLOCKS
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+ "fdt_addr_r=0x40000000\0" \
+ "fdt_size_r=0x400000\0" \
+ "pxefile_addr_r=0x10000000\0" \
+ "kernel_addr_r=0x18000000\0" \
+ "kernel_size_r=0x10000000\0" \
+ "scriptaddr=0x20000000\0" \
+ "ramdisk_addr_r=0x02100000\0" \
+ "script_size_f=0x80000\0"
+
+#if defined(CONFIG_MMC_SDHCI_ZYNQ)
+# define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
+#else
+# define BOOT_TARGET_DEVICES_MMC(func)
+#endif
+
+#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
+# define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
+#else
+# define BOOT_TARGET_DEVICES_PXE(func)
+#endif
+
+#if defined(CONFIG_CMD_DHCP)
+# define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
+#else
+# define BOOT_TARGET_DEVICES_DHCP(func)
+#endif
+
+#if defined(CONFIG_ZYNQMP_GQSPI) || defined(CONFIG_CADENCE_OSPI_VERSAL_NET)
+# define BOOT_TARGET_DEVICES_XSPI(func) func(XSPI, xspi, 0)
+#else
+# define BOOT_TARGET_DEVICES_XSPI(func)
+#endif
+
+#define BOOTENV_DEV_XSPI(devtypeu, devtypel, instance) \
+ "bootcmd_xspi0=sf probe 0 0 0 && " \
+ "sf read $scriptaddr $script_offset_f $script_size_f && " \
+ "echo XSPI: Trying to boot script at ${scriptaddr} && " \
+ "source ${scriptaddr}; echo XSPI: SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_XSPI(devtypeu, devtypel, instance) \
+ "xspi0 "
+
+#define BOOT_TARGET_DEVICES_JTAG(func) func(JTAG, jtag, na)
+
+#define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
+ "bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && " \
+ "source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
+ "jtag "
+
+#define BOOT_TARGET_DEVICES_DFU_USB(func) func(DFU_USB, dfu_usb, 0)
+
+#define BOOTENV_DEV_DFU_USB(devtypeu, devtypel, instance) \
+ "bootcmd_dfu_usb=setenv dfu_alt_info boot.scr ram $scriptaddr " \
+ "$script_size_f; dfu 0 ram 0 && " \
+ "echo DFU: Trying to boot script at ${scriptaddr} && " \
+ "source ${scriptaddr}; " \
+ "echo DFU: SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_DFU_USB(devtypeu, devtypel, instance) \
+ ""
+
+#define BOOT_TARGET_DEVICES(func) \
+ BOOT_TARGET_DEVICES_JTAG(func) \
+ BOOT_TARGET_DEVICES_MMC(func) \
+ BOOT_TARGET_DEVICES_XSPI(func) \
+ BOOT_TARGET_DEVICES_DFU_USB(func) \
+ BOOT_TARGET_DEVICES_PXE(func) \
+ BOOT_TARGET_DEVICES_DHCP(func)
+
+#include <config_distro_bootcmd.h>
+
+/* Initial environment variables */
+#ifndef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ ENV_MEM_LAYOUT_SETTINGS \
+ BOOTENV \
+ DFU_ALT_INFO
+#endif
+
+#endif /* __XILINX_VERSAL_NET_H */
--
2.36.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 9/9] arm64: versal-net: Add support for mini configuration
2022-09-16 8:53 [PATCH 0/9] xilinx: versal-net: Add support for new Versal NET SoC Michal Simek
` (7 preceding siblings ...)
2022-09-16 8:53 ` [PATCH 8/9] arm64: versal-net: Add defconfig " Michal Simek
@ 2022-09-16 8:53 ` Michal Simek
2022-09-16 9:06 ` [PATCH 0/9] xilinx: versal-net: Add support for new Versal NET SoC Pali Rohár
9 siblings, 0 replies; 11+ messages in thread
From: Michal Simek @ 2022-09-16 8:53 UTC (permalink / raw)
To: u-boot, git
Cc: Andre Przywara, Christian Hewitt, Fabio Estevam, Marcel Ziswiler,
Marek Vasut, Pali Rohár, Samuel Holland, Simon Glass,
Ying-Chun Liu (PaulLiu)
Versal NET mini configuration is designed for running memory test. Current
output is on DCC but changing serial0 alias to pl011 will move console to
serial port.
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/versal-net-mini.dts | 67 +++++++++++++++++++++++
configs/xilinx_versal_net_mini_defconfig | 70 ++++++++++++++++++++++++
include/configs/xilinx_versal_net_mini.h | 28 ++++++++++
4 files changed, 166 insertions(+)
create mode 100644 arch/arm/dts/versal-net-mini.dts
create mode 100644 configs/xilinx_versal_net_mini_defconfig
create mode 100644 include/configs/xilinx_versal_net_mini.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a141d0de0c20..4ad526d565c9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -380,6 +380,7 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
versal-mini-emmc1.dtb \
xilinx-versal-virt.dtb
dtb-$(CONFIG_ARCH_VERSAL_NET) += \
+ versal-net-mini.dtb \
xilinx-versal-net-virt.dtb
dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
zynqmp-r5.dtb
diff --git a/arch/arm/dts/versal-net-mini.dts b/arch/arm/dts/versal-net-mini.dts
new file mode 100644
index 000000000000..8c29a6ed6bfe
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini.dts
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal NET
+ *
+ * Copyright (C) 2021 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "xlnx,versal-net-mini";
+ model = "Xilinx Versal NET MINI";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ memory: memory@0 {
+ reg = <0 0xBBF00000 0 0x100000>, <0 0 0 0x80000000>;
+ device_type = "memory";
+ };
+
+ aliases {
+ /* serial0 = &serial0; */
+ serial0 = &dcc;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200";
+ };
+
+ clk1: clk1 {
+ u-boot,dm-pre-reloc;
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1000000>;
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "okay";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: axi {
+ compatible = "simple-bus";
+ u-boot,dm-pre-reloc;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ serial0: serial@f1920000 {
+ u-boot,dm-pre-reloc;
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0 0xf1920000 0 0x1000>;
+ reg-io-width = <4>;
+ clock-names = "uartclk", "apb_pclk";
+ clocks = <&clk1>, <&clk1>;
+ clock = <1000000>;
+ current-speed = <115200>;
+ skip-init;
+ };
+ };
+};
diff --git a/configs/xilinx_versal_net_mini_defconfig b/configs/xilinx_versal_net_mini_defconfig
new file mode 100644
index 000000000000..eff560dfdf88
--- /dev/null
+++ b/configs/xilinx_versal_net_mini_defconfig
@@ -0,0 +1,70 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="xilinx_versal_net_mini"
+CONFIG_SYS_ICACHE_OFF=y
+# CONFIG_ARM64_CRC32 is not set
+# CONFIG_ARM64_SUPPORT_AARCH32 is not set
+CONFIG_ARCH_VERSAL_NET=y
+CONFIG_SYS_TEXT_BASE=0xBBF10000
+CONFIG_SYS_MALLOC_LEN=0x20000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=3
+CONFIG_ENV_SIZE=0x80
+CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini"
+CONFIG_SYS_PROMPT="Versal NET> "
+CONFIG_SYS_MEM_RSVD_FOR_MMU=y
+# CONFIG_PSCI_RESET is not set
+CONFIG_SYS_LOAD_ADDR=0x8000000
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
+# CONFIG_EXPERT is not set
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+# CONFIG_AUTOBOOT is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MX_CYCLIC=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_ECHO is not set
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+# CONFIG_CMD_SLEEP is not set
+CONFIG_OF_EMBED=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_NET is not set
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+# CONFIG_GPIO is not set
+# CONFIG_I2C is not set
+# CONFIG_INPUT is not set
+# CONFIG_MMC is not set
+# CONFIG_POWER is not set
+CONFIG_ARM_DCC=y
+CONFIG_PL01X_SERIAL=y
+# CONFIG_GZIP is not set
diff --git a/include/configs/xilinx_versal_net_mini.h b/include/configs/xilinx_versal_net_mini.h
new file mode 100644
index 000000000000..aff906316b2d
--- /dev/null
+++ b/include/configs/xilinx_versal_net_mini.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for Xilinx Versal NET MINI configuration
+ *
+ * Copyright (C) 2018 - 2022, Xilinx, Inc.
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ */
+
+#ifndef __CONFIG_VERSAL_NET_MINI_H
+#define __CONFIG_VERSAL_NET_MINI_H
+
+#define CONFIG_EXTRA_ENV_SETTINGS
+
+#include <configs/xilinx_versal_net.h>
+
+/* Undef unneeded configs */
+#undef CONFIG_EXTRA_ENV_SETTINGS
+
+/* BOOTP options */
+#undef CONFIG_BOOTP_BOOTFILESIZE
+#undef CONFIG_BOOTP_MAY_FAIL
+
+#undef CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_CBSIZE 1024
+
+#endif /* __CONFIG_VERSAL_NET_MINI_H */
--
2.36.1
^ permalink raw reply related [flat|nested] 11+ messages in thread