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From: Andrey Konovalov <andreyknvl@google.com>
To: Andrey Ryabinin <aryabinin@virtuozzo.com>,
	Alexander Potapenko <glider@google.com>,
	Dmitry Vyukov <dvyukov@google.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Christoph Lameter <cl@linux.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Nick Desaulniers <ndesaulniers@google.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Dave Martin <dave.martin@arm.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	"Eric W . Biederman" <ebiederm@xmission.com>,
	Ingo Molnar <mingo@kernel.org>,
	Paul Lawrence <paullawrence@google.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Arnd Bergmann <arnd@arndb.de>,
	"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Kate Stewart <kstewart@linuxfoundation.org>,
	Mike Rapoport <rppt@linux.vnet.ibm.com>,
	kasan-dev@googlegroups.com, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sparse@vger.kernel.org, linux-mm@kvack.org,
	linux-kbuild@vger.kernel.org
Cc: Kostya Serebryany <kcc@google.com>,
	Evgeniy Stepanov <eugenis@google.com>,
	Lee Smith <Lee.Smith@arm.com>,
	Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>,
	Jacob Bramley <Jacob.Bramley@arm.com>,
	Ruben Ayrapetyan <Ruben.Ayrapetyan@arm.com>,
	Jann Horn <jannh@google.com>, Mark Brand <markbrand@google.com>,
	Chintan Pandya <cpandya@codeaurora.org>,
	Vishwath Mohan <vishwath@google.com>,
	Andrey Konovalov <andreyknvl@google.com>
Subject: [PATCH v13 13/25] kasan, arm64: fix up fault handling logic
Date: Thu,  6 Dec 2018 13:24:31 +0100	[thread overview]
Message-ID: <3f349b0e9e48b5df3298a6b4ae0634332274494a.1544099024.git.andreyknvl@google.com> (raw)
In-Reply-To: <cover.1544099024.git.andreyknvl@google.com>

Right now arm64 fault handling code removes pointer tags from addresses
covered by TTBR0 in faults taken from both EL0 and EL1, but doesn't do
that for pointers covered by TTBR1.

This patch adds two helper functions is_ttbr0_addr() and is_ttbr1_addr(),
where the latter one accounts for the fact that TTBR1 pointers might be
tagged when tag-based KASAN is in use, and uses these helper functions to
perform pointer checks in arch/arm64/mm/fault.c.

Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
---
 arch/arm64/mm/fault.c | 31 ++++++++++++++++++++++---------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 7d9571f4ae3d..c1d98f0a3086 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -40,6 +40,7 @@
 #include <asm/daifflags.h>
 #include <asm/debug-monitors.h>
 #include <asm/esr.h>
+#include <asm/kasan.h>
 #include <asm/sysreg.h>
 #include <asm/system_misc.h>
 #include <asm/pgtable.h>
@@ -132,6 +133,18 @@ static void mem_abort_decode(unsigned int esr)
 		data_abort_decode(esr);
 }
 
+static inline bool is_ttbr0_addr(unsigned long addr)
+{
+	/* entry assembly clears tags for TTBR0 addrs */
+	return addr < TASK_SIZE;
+}
+
+static inline bool is_ttbr1_addr(unsigned long addr)
+{
+	/* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
+	return arch_kasan_reset_tag(addr) >= VA_START;
+}
+
 /*
  * Dump out the page tables associated with 'addr' in the currently active mm.
  */
@@ -141,7 +154,7 @@ void show_pte(unsigned long addr)
 	pgd_t *pgdp;
 	pgd_t pgd;
 
-	if (addr < TASK_SIZE) {
+	if (is_ttbr0_addr(addr)) {
 		/* TTBR0 */
 		mm = current->active_mm;
 		if (mm == &init_mm) {
@@ -149,7 +162,7 @@ void show_pte(unsigned long addr)
 				 addr);
 			return;
 		}
-	} else if (addr >= VA_START) {
+	} else if (is_ttbr1_addr(addr)) {
 		/* TTBR1 */
 		mm = &init_mm;
 	} else {
@@ -254,7 +267,7 @@ static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
 	if (fsc_type == ESR_ELx_FSC_PERM)
 		return true;
 
-	if (addr < TASK_SIZE && system_uses_ttbr0_pan())
+	if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
 		return fsc_type == ESR_ELx_FSC_FAULT &&
 			(regs->pstate & PSR_PAN_BIT);
 
@@ -319,7 +332,7 @@ static void set_thread_esr(unsigned long address, unsigned int esr)
 	 * type", so we ignore this wrinkle and just return the translation
 	 * fault.)
 	 */
-	if (current->thread.fault_address >= TASK_SIZE) {
+	if (!is_ttbr0_addr(current->thread.fault_address)) {
 		switch (ESR_ELx_EC(esr)) {
 		case ESR_ELx_EC_DABT_LOW:
 			/*
@@ -455,7 +468,7 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
 		mm_flags |= FAULT_FLAG_WRITE;
 	}
 
-	if (addr < TASK_SIZE && is_el1_permission_fault(addr, esr, regs)) {
+	if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
 		/* regs->orig_addr_limit may be 0 if we entered from EL0 */
 		if (regs->orig_addr_limit == KERNEL_DS)
 			die_kernel_fault("access to user memory with fs=KERNEL_DS",
@@ -603,7 +616,7 @@ static int __kprobes do_translation_fault(unsigned long addr,
 					  unsigned int esr,
 					  struct pt_regs *regs)
 {
-	if (addr < TASK_SIZE)
+	if (is_ttbr0_addr(addr))
 		return do_page_fault(addr, esr, regs);
 
 	do_bad_area(addr, esr, regs);
@@ -758,7 +771,7 @@ asmlinkage void __exception do_el0_ia_bp_hardening(unsigned long addr,
 	 * re-enabled IRQs. If the address is a kernel address, apply
 	 * BP hardening prior to enabling IRQs and pre-emption.
 	 */
-	if (addr > TASK_SIZE)
+	if (!is_ttbr0_addr(addr))
 		arm64_apply_bp_hardening();
 
 	local_daif_restore(DAIF_PROCCTX);
@@ -771,7 +784,7 @@ asmlinkage void __exception do_sp_pc_abort(unsigned long addr,
 					   struct pt_regs *regs)
 {
 	if (user_mode(regs)) {
-		if (instruction_pointer(regs) > TASK_SIZE)
+		if (!is_ttbr0_addr(instruction_pointer(regs)))
 			arm64_apply_bp_hardening();
 		local_daif_restore(DAIF_PROCCTX);
 	}
@@ -825,7 +838,7 @@ asmlinkage int __exception do_debug_exception(unsigned long addr,
 	if (interrupts_enabled(regs))
 		trace_hardirqs_off();
 
-	if (user_mode(regs) && instruction_pointer(regs) > TASK_SIZE)
+	if (user_mode(regs) && !is_ttbr0_addr(instruction_pointer(regs)))
 		arm64_apply_bp_hardening();
 
 	if (!inf->fn(addr, esr, regs)) {
-- 
2.20.0.rc1.387.gf8505762e3-goog


WARNING: multiple messages have this Message-ID (diff)
From: Andrey Konovalov <andreyknvl@google.com>
To: Andrey Ryabinin <aryabinin@virtuozzo.com>,
	Alexander Potapenko <glider@google.com>,
	Dmitry Vyukov <dvyukov@google.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Christoph Lameter <cl@linux.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Nick Desaulniers <ndesaulniers@google.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Dave Martin <dave.martin@arm.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	"Eric W . Biederman" <ebiederm@xmission.com>,
	Ingo Molnar <mingo@kernel.org>,
	Paul Lawrence <paullawrence@google.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Arnd Bergmann <arnd@arndb.de>,
	"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Kate Stewart <kstewart@linuxfoundation.org>,
	Mike Rapoport <rppt@linux.vnet.ibm.com>,
	kasan-dev@googlegroups.com, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sparse@vger.kernel.org, linux-mm@kvack.org,
	linux-kbuild@vger.kernel.org
Cc: Vishwath Mohan <vishwath@google.com>,
	Chintan Pandya <cpandya@codeaurora.org>,
	Jacob Bramley <Jacob.Bramley@arm.com>,
	Jann Horn <jannh@google.com>,
	Ruben Ayrapetyan <Ruben.Ayrapetyan@arm.com>,
	Andrey Konovalov <andreyknvl@google.com>,
	Lee Smith <Lee.Smith@arm.com>, Kostya Serebryany <kcc@google.com>,
	Mark Brand <markbrand@google.com>,
	Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>,
	Evgeniy Stepanov <eugenis@google.com>
Subject: [PATCH v13 13/25] kasan, arm64: fix up fault handling logic
Date: Thu,  6 Dec 2018 13:24:31 +0100	[thread overview]
Message-ID: <3f349b0e9e48b5df3298a6b4ae0634332274494a.1544099024.git.andreyknvl@google.com> (raw)
In-Reply-To: <cover.1544099024.git.andreyknvl@google.com>

Right now arm64 fault handling code removes pointer tags from addresses
covered by TTBR0 in faults taken from both EL0 and EL1, but doesn't do
that for pointers covered by TTBR1.

This patch adds two helper functions is_ttbr0_addr() and is_ttbr1_addr(),
where the latter one accounts for the fact that TTBR1 pointers might be
tagged when tag-based KASAN is in use, and uses these helper functions to
perform pointer checks in arch/arm64/mm/fault.c.

Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
---
 arch/arm64/mm/fault.c | 31 ++++++++++++++++++++++---------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
index 7d9571f4ae3d..c1d98f0a3086 100644
--- a/arch/arm64/mm/fault.c
+++ b/arch/arm64/mm/fault.c
@@ -40,6 +40,7 @@
 #include <asm/daifflags.h>
 #include <asm/debug-monitors.h>
 #include <asm/esr.h>
+#include <asm/kasan.h>
 #include <asm/sysreg.h>
 #include <asm/system_misc.h>
 #include <asm/pgtable.h>
@@ -132,6 +133,18 @@ static void mem_abort_decode(unsigned int esr)
 		data_abort_decode(esr);
 }
 
+static inline bool is_ttbr0_addr(unsigned long addr)
+{
+	/* entry assembly clears tags for TTBR0 addrs */
+	return addr < TASK_SIZE;
+}
+
+static inline bool is_ttbr1_addr(unsigned long addr)
+{
+	/* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
+	return arch_kasan_reset_tag(addr) >= VA_START;
+}
+
 /*
  * Dump out the page tables associated with 'addr' in the currently active mm.
  */
@@ -141,7 +154,7 @@ void show_pte(unsigned long addr)
 	pgd_t *pgdp;
 	pgd_t pgd;
 
-	if (addr < TASK_SIZE) {
+	if (is_ttbr0_addr(addr)) {
 		/* TTBR0 */
 		mm = current->active_mm;
 		if (mm == &init_mm) {
@@ -149,7 +162,7 @@ void show_pte(unsigned long addr)
 				 addr);
 			return;
 		}
-	} else if (addr >= VA_START) {
+	} else if (is_ttbr1_addr(addr)) {
 		/* TTBR1 */
 		mm = &init_mm;
 	} else {
@@ -254,7 +267,7 @@ static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
 	if (fsc_type == ESR_ELx_FSC_PERM)
 		return true;
 
-	if (addr < TASK_SIZE && system_uses_ttbr0_pan())
+	if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
 		return fsc_type == ESR_ELx_FSC_FAULT &&
 			(regs->pstate & PSR_PAN_BIT);
 
@@ -319,7 +332,7 @@ static void set_thread_esr(unsigned long address, unsigned int esr)
 	 * type", so we ignore this wrinkle and just return the translation
 	 * fault.)
 	 */
-	if (current->thread.fault_address >= TASK_SIZE) {
+	if (!is_ttbr0_addr(current->thread.fault_address)) {
 		switch (ESR_ELx_EC(esr)) {
 		case ESR_ELx_EC_DABT_LOW:
 			/*
@@ -455,7 +468,7 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
 		mm_flags |= FAULT_FLAG_WRITE;
 	}
 
-	if (addr < TASK_SIZE && is_el1_permission_fault(addr, esr, regs)) {
+	if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
 		/* regs->orig_addr_limit may be 0 if we entered from EL0 */
 		if (regs->orig_addr_limit == KERNEL_DS)
 			die_kernel_fault("access to user memory with fs=KERNEL_DS",
@@ -603,7 +616,7 @@ static int __kprobes do_translation_fault(unsigned long addr,
 					  unsigned int esr,
 					  struct pt_regs *regs)
 {
-	if (addr < TASK_SIZE)
+	if (is_ttbr0_addr(addr))
 		return do_page_fault(addr, esr, regs);
 
 	do_bad_area(addr, esr, regs);
@@ -758,7 +771,7 @@ asmlinkage void __exception do_el0_ia_bp_hardening(unsigned long addr,
 	 * re-enabled IRQs. If the address is a kernel address, apply
 	 * BP hardening prior to enabling IRQs and pre-emption.
 	 */
-	if (addr > TASK_SIZE)
+	if (!is_ttbr0_addr(addr))
 		arm64_apply_bp_hardening();
 
 	local_daif_restore(DAIF_PROCCTX);
@@ -771,7 +784,7 @@ asmlinkage void __exception do_sp_pc_abort(unsigned long addr,
 					   struct pt_regs *regs)
 {
 	if (user_mode(regs)) {
-		if (instruction_pointer(regs) > TASK_SIZE)
+		if (!is_ttbr0_addr(instruction_pointer(regs)))
 			arm64_apply_bp_hardening();
 		local_daif_restore(DAIF_PROCCTX);
 	}
@@ -825,7 +838,7 @@ asmlinkage int __exception do_debug_exception(unsigned long addr,
 	if (interrupts_enabled(regs))
 		trace_hardirqs_off();
 
-	if (user_mode(regs) && instruction_pointer(regs) > TASK_SIZE)
+	if (user_mode(regs) && !is_ttbr0_addr(instruction_pointer(regs)))
 		arm64_apply_bp_hardening();
 
 	if (!inf->fn(addr, esr, regs)) {
-- 
2.20.0.rc1.387.gf8505762e3-goog


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  parent reply	other threads:[~2018-12-06 12:25 UTC|newest]

Thread overview: 91+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-06 12:24 [PATCH v13 00/25] kasan: add software tag-based mode for arm64 Andrey Konovalov
2018-12-06 12:24 ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 01/25] kasan, mm: change hooks signatures Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 02/25] kasan, slub: handle pointer tags in early_kmem_cache_node_alloc Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 03/25] kasan: move common generic and tag-based code to common.c Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 04/25] kasan: rename source files to reflect the new naming scheme Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 05/25] kasan: add CONFIG_KASAN_GENERIC and CONFIG_KASAN_SW_TAGS Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-11 15:28   ` Luc Van Oostenryck
2018-12-11 15:28     ` Luc Van Oostenryck
2018-12-11 15:28     ` Luc Van Oostenryck
2018-12-11 16:02     ` Andrey Konovalov
2018-12-11 16:02       ` Andrey Konovalov
2018-12-11 16:02       ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 06/25] kasan, arm64: adjust shadow size for tag-based mode Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 07/25] kasan: rename kasan_zero_page to kasan_early_shadow_page Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 08/25] kasan: initialize shadow to 0xff for tag-based mode Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-10  1:35   ` Paul Gortmaker
2018-12-10 12:12     ` Andrey Konovalov
2018-12-10 12:12       ` Andrey Konovalov
2018-12-10 12:12       ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 09/25] arm64: move untagged_addr macro from uaccess.h to memory.h Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 10/25] kasan: add tag related helper functions Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 11/25] kasan, arm64: untag address in _virt_addr_is_linear Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 12/25] kasan: preassign tags to objects with ctors or SLAB_TYPESAFE_BY_RCU Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` Andrey Konovalov [this message]
2018-12-06 12:24   ` [PATCH v13 13/25] kasan, arm64: fix up fault handling logic Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 14/25] kasan, arm64: enable top byte ignore for the kernel Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 15/25] kasan, mm: perform untagged pointers comparison in krealloc Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 16/25] kasan: split out generic_report.c from report.c Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 17/25] kasan: add bug reporting routines for tag-based mode Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 18/25] mm: move obj_to_index to include/linux/slab_def.h Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 19/25] kasan: add hooks implementation for tag-based mode Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-11 16:22   ` Vincenzo Frascino
2018-12-11 16:22     ` Vincenzo Frascino
2018-12-12 15:04     ` Andrey Konovalov
2018-12-12 15:04       ` Andrey Konovalov
2018-12-12 15:04       ` Andrey Konovalov
2018-12-14 12:35       ` Vincenzo Frascino
2018-12-14 12:35         ` Vincenzo Frascino
2018-12-14 12:35         ` Vincenzo Frascino
2018-12-17 19:33         ` Andrey Konovalov
2018-12-17 19:33           ` Andrey Konovalov
2018-12-17 19:33           ` Andrey Konovalov
2018-12-17 20:38           ` Andrew Morton
2018-12-17 20:38             ` Andrew Morton
2018-12-17 20:38             ` Andrew Morton
2018-12-18 13:31             ` Andrey Konovalov
2018-12-18 13:31               ` Andrey Konovalov
2018-12-18 13:31               ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 20/25] kasan, arm64: add brk handler for inline instrumentation Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 21/25] kasan, mm, arm64: tag non slab memory allocated via pagealloc Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 22/25] kasan: add __must_check annotations to kasan hooks Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 23/25] kasan, arm64: select HAVE_ARCH_KASAN_SW_TAGS Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 24/25] kasan: update documentation Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-06 12:24 ` [PATCH v13 25/25] kasan: add SPDX-License-Identifier mark to source files Andrey Konovalov
2018-12-06 12:24   ` Andrey Konovalov
2018-12-11 15:18 ` [PATCH v13 00/25] kasan: add software tag-based mode for arm64 Will Deacon
2018-12-11 15:18   ` Will Deacon
2018-12-11 15:18   ` Will Deacon
2018-12-11 15:57   ` Andrey Konovalov
2018-12-11 15:57     ` Andrey Konovalov
2018-12-11 15:57     ` Andrey Konovalov
2018-12-11 16:00     ` Will Deacon
2018-12-11 16:00       ` Will Deacon
2018-12-11 16:00       ` Will Deacon
2018-12-11 21:44       ` Andrew Morton
2018-12-11 21:44         ` Andrew Morton
2018-12-11 21:44         ` Andrew Morton

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