From: Harry Wentland <harry.wentland-5C7GfCeVMHo@public.gmane.org>
To: Tom St Denis <tom.stdenis-5C7GfCeVMHo@public.gmane.org>,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: Re: [PATCH] drm/amd/display: Correct VGA handoff for DCN1 devices
Date: Thu, 15 Mar 2018 11:09:28 -0400 [thread overview]
Message-ID: <3f465300-0af1-31df-8a0d-dec9507956e2@amd.com> (raw)
In-Reply-To: <20180315134722.25718-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
On 2018-03-15 09:47 AM, Tom St Denis wrote:
> Partial revert of 1b0ff66bc0bf1a0559255cb7b066a65d55491974
>
> Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Thanks for your patch.
It seems like on some systems this is not enough as D1 is off and D2-4 are on, which would still early return from this function. I sent a patch that should resolve this in all cases.
Harry
> ---
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> index 4365906b14ee..7688ed5724b9 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> @@ -228,6 +228,9 @@ static void disable_vga(
> return;
>
> REG_WRITE(D1VGA_CONTROL, 0);
> + REG_WRITE(D2VGA_CONTROL, 0);
> + REG_WRITE(D3VGA_CONTROL, 0);
> + REG_WRITE(D4VGA_CONTROL, 0);
>
> /* HW Engineer's Notes:
> * During switch from vga->extended, if we set the VGA_TEST_ENABLE and
>
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prev parent reply other threads:[~2018-03-15 15:09 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-15 13:47 [PATCH] drm/amd/display: Correct VGA handoff for DCN1 devices Tom St Denis
[not found] ` <20180315134722.25718-1-tom.stdenis-5C7GfCeVMHo@public.gmane.org>
2018-03-15 15:09 ` Harry Wentland [this message]
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