[PATCH 00/53] net/sfc: base driver update

[PATCH 00/53] net/sfc: base driver update

[Andrew Rybchenko]

The series updates sfc base driver.

There are a number of check patch warnings and errors because of
coding style differencies.

Andrew Jackson (2):
  net/sfc/base: copy new header from firmwaresrc
  net/sfc/base: add support for new sensors

Andrew Lee (9):
  net/sfc/base: add support for MUM/SUC firmware partitions
  net/sfc/base: fix warnings from VS2015 C compiler (C4310)
  net/sfc/base: fix warnings from VS2015 C compiler (C4244)
  net/sfc/base: fix warnings from VS2015 C compiler (C4245)
  net/sfc/base: fix warnings from VS2015 C compiler (C4100)
  net/sfc/base: fix warnings from VS2015 C compiler (C4189)
  net/sfc/base: fix warnings from VS2015 C compiler (C4057)
  net/sfc/base: fix warnings from VS2015 C compiler (C4214)
  net/sfc/base: fix PreFAST static analysis warning (C6001)

Andrew Rybchenko (9):
  net/sfc/base: improve PS credits push function name
  net/sfc/base: improve RxQ label init prototype
  net/sfc/base: add description of the PS packets layout
  net/sfc/base: clarify meaning of Rx desc lbits in PS mode
  net/sfc/base: optimize credits overflow check
  net/sfc/base: provide simple access to RxQ state in EvQ
  net/sfc/base: enforce packed stream fake buffer size
  net/sfc/base: more accurately calculate number of PS credits
  net/sfc/base: support inner checksum offload on transmit

Andy Moreton (21):
  net/sfc/base: fix result code in MCDI NVRAM update finish
  net/sfc/base: simplify verify result handling
  net/sfc/base: report verify result from RW finish callback
  net/sfc/base: extend NVRAM RW finish to return verify result
  net/sfc/base: rename firmware update verify result cap field
  net/sfc/base: simplify NVRAM type to partition mappings
  net/sfc/base: check NVRAM locking by partition ID
  net/sfc/base: report correct partition write chunk size
  net/sfc/base: fix check in NVRAM validate
  net/sfc/base: precheck and verify flash writes
  net/sfc/base: remove duplicate NVRAM asserts
  net/sfc/base: quieten get version methods
  net/sfc/base: fix PreFAST issues
  net/sfc/base: make MAC naming consistent with other modules
  net/sfc/base: improve names for EVQ descriptor counts
  net/sfc/base: improve names for RXQ descriptor counts
  net/sfc/base: improve names for TXQ descriptor counts
  net/sfc/base: move Siena-specific defs to right header
  net/sfc/base: run mkconfig.py to add a new sensors
  net/sfc/base: remove unused defined for WPTR alignment
  net/sfc/base: cstyle fixes

Mark Spender (11):
  net/sfc/base: do not use Tx desc push with TSO descriptors
  net/sfc/base: use MCDIv2 for requests with too long response
  net/sfc/base: ignore error in completion event on MCDIv2 HW
  net/sfc/base: request info about outer frame in Rx events
  net/sfc/base: remove assertion on no longer used define
  net/sfc/base: allow to use PHY stats on Huntington/Medford
  net/sfc/base: fix diagnostics support build without Siena
  net/sfc/base: fix probes in licensing support
  net/sfc/base: remove obsolete check for pre-Siena hardware
  net/sfc/base: expand on comment on number of queues field
  net/sfc/base: move BIU test code into Siena-specific file

Vijay Srivastava (1):
  net/sfc/base: fix build issue with PHY LED control enabled

 drivers/net/sfc/base/ef10_ev.c      |  42 ++++---
 drivers/net/sfc/base/ef10_filter.c  |  10 +-
 drivers/net/sfc/base/ef10_impl.h    |  85 +++++++-------
 drivers/net/sfc/base/ef10_mcdi.c    |   2 +-
 drivers/net/sfc/base/ef10_nic.c     |   2 +-
 drivers/net/sfc/base/ef10_nvram.c   | 172 +++++++++++++--------------
 drivers/net/sfc/base/ef10_phy.c     |   2 +
 drivers/net/sfc/base/ef10_rx.c      | 130 +++++++++++++++------
 drivers/net/sfc/base/ef10_tx.c      | 135 +++++++++++++++-------
 drivers/net/sfc/base/efx.h          | 221 ++++++++++++++++++-----------------
 drivers/net/sfc/base/efx_bootcfg.c  |  16 +--
 drivers/net/sfc/base/efx_check.h    |   8 +-
 drivers/net/sfc/base/efx_ev.c       |  21 ++--
 drivers/net/sfc/base/efx_impl.h     |  56 +++------
 drivers/net/sfc/base/efx_lic.c      | 198 +++++++++++++------------------
 drivers/net/sfc/base/efx_mac.c      |  10 +-
 drivers/net/sfc/base/efx_mcdi.c     |   8 +-
 drivers/net/sfc/base/efx_mcdi.h     |   2 +-
 drivers/net/sfc/base/efx_mon.c      |   4 +-
 drivers/net/sfc/base/efx_nic.c      | 214 +---------------------------------
 drivers/net/sfc/base/efx_nvram.c    | 162 +++++++++++++++-----------
 drivers/net/sfc/base/efx_phy.c      |   2 +-
 drivers/net/sfc/base/efx_rx.c       |  79 ++++++-------
 drivers/net/sfc/base/efx_tx.c       | 115 +++++++++---------
 drivers/net/sfc/base/efx_types.h    |   3 +-
 drivers/net/sfc/base/efx_vpd.c      |   2 +-
 drivers/net/sfc/base/mcdi_mon.c     |  26 +++--
 drivers/net/sfc/base/medford_impl.h |   8 --
 drivers/net/sfc/base/medford_nic.c  |   3 +-
 drivers/net/sfc/base/siena_flash.h  |  12 +-
 drivers/net/sfc/base/siena_impl.h   |  24 +++-
 drivers/net/sfc/base/siena_nic.c    | 225 ++++++++++++++++++++++++++++++++++--
 drivers/net/sfc/base/siena_nvram.c  |  13 ++-
 drivers/net/sfc/base/siena_phy.c    |   2 +
 drivers/net/sfc/base/siena_vpd.c    |   4 +-
 35 files changed, 1090 insertions(+), 928 deletions(-)

-- 
2.7.4

[PATCH 01/53] net/sfc/base: copy new header from firmwaresrc

[Andrew Rybchenko]

From: Andrew Jackson <ajackson@solarflare.com>

Signed-off-by: Andrew Jackson <ajackson@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/siena_flash.h | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sfc/base/siena_flash.h b/drivers/net/sfc/base/siena_flash.h
index e2700554..5fa3ea4 100644
--- a/drivers/net/sfc/base/siena_flash.h
+++ b/drivers/net/sfc/base/siena_flash.h
@@ -113,15 +113,21 @@ typedef struct siena_mc_boot_hdr_s {		/* GENERATED BY scripts/genfwdef */
 	efx_word_t	checksum;		/* of whole header area + firmware image */
 	efx_word_t	firmware_version_d;
 	efx_byte_t	mcfw_subtype;
-	efx_byte_t	generation;		/* Valid for medford, SBZ for earlier chips */
+	efx_byte_t	generation;		/* MC (Medford and later): MC partition generation when */
+						/* written to NVRAM. */
+						/* MUM & SUC images: subtype. */
+						/* (Otherwise set to 0) */
 	efx_dword_t	firmware_text_offset;	/* offset to firmware .text */
 	efx_dword_t	firmware_text_size;	/* length of firmware .text, in bytes */
 	efx_dword_t	firmware_data_offset;	/* offset to firmware .data */
 	efx_dword_t	firmware_data_size;	/* length of firmware .data, in bytes */
 	efx_byte_t	spi_rate;		/* SPI rate for reading image, 0 is BootROM default */
 	efx_byte_t	spi_phase_adj;		/* SPI SDO/SCL phase adjustment, 0 is default (no adj) */
-	efx_word_t	xpm_sector;		/* The sector that contains the key, or 0xffff if unsigned (medford) SBZ (earlier) */
-	efx_dword_t	reserved_c[7];		/* (set to 0) */
+	efx_word_t	xpm_sector;		/* XPM (MEDFORD and later): The sector that contains */
+						/* the key, or 0xffff if unsigned. (Otherwise set to 0) */
+	efx_byte_t	mumfw_subtype;		/* MUM & SUC images: subtype. (Otherwise set to 0) */
+	efx_byte_t	reserved_b[3];		/* (set to 0) */
+	efx_dword_t	reserved_c[6];		/* (set to 0) */
 } siena_mc_boot_hdr_t;
 
 #define	SIENA_MC_BOOT_HDR_PADDING \
-- 
2.7.4

Re: [PATCH 01/53] net/sfc/base: copy new header from firmwaresrc

[Ferruh Yigit]

On 11/16/2017 12:03 AM, Andrew Rybchenko wrote:
> From: Andrew Jackson <ajackson@solarflare.com>
> 
> Signed-off-by: Andrew Jackson <ajackson@solarflare.com>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> ---
>  drivers/net/sfc/base/siena_flash.h | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/sfc/base/siena_flash.h b/drivers/net/sfc/base/siena_flash.h
> index e2700554..5fa3ea4 100644
> --- a/drivers/net/sfc/base/siena_flash.h
> +++ b/drivers/net/sfc/base/siena_flash.h
> @@ -113,15 +113,21 @@ typedef struct siena_mc_boot_hdr_s {		/* GENERATED BY scripts/genfwdef */
>  	efx_word_t	checksum;		/* of whole header area + firmware image */
>  	efx_word_t	firmware_version_d;
>  	efx_byte_t	mcfw_subtype;
> -	efx_byte_t	generation;		/* Valid for medford, SBZ for earlier chips */
> +	efx_byte_t	generation;		/* MC (Medford and later): MC partition generation when */
> +						/* written to NVRAM. */
> +						/* MUM & SUC images: subtype. */
> +						/* (Otherwise set to 0) */
>  	efx_dword_t	firmware_text_offset;	/* offset to firmware .text */
>  	efx_dword_t	firmware_text_size;	/* length of firmware .text, in bytes */
>  	efx_dword_t	firmware_data_offset;	/* offset to firmware .data */
>  	efx_dword_t	firmware_data_size;	/* length of firmware .data, in bytes */
>  	efx_byte_t	spi_rate;		/* SPI rate for reading image, 0 is BootROM default */
>  	efx_byte_t	spi_phase_adj;		/* SPI SDO/SCL phase adjustment, 0 is default (no adj) */
> -	efx_word_t	xpm_sector;		/* The sector that contains the key, or 0xffff if unsigned (medford) SBZ (earlier) */
> -	efx_dword_t	reserved_c[7];		/* (set to 0) */
> +	efx_word_t	xpm_sector;		/* XPM (MEDFORD and later): The sector that contains */
> +						/* the key, or 0xffff if unsigned. (Otherwise set to 0) */
> +	efx_byte_t	mumfw_subtype;		/* MUM & SUC images: subtype. (Otherwise set to 0) */

Does this means there is a new updated FW? Should user know about version of it,
or is FW upgrade needs to be documented somewhere?

> +	efx_byte_t	reserved_b[3];		/* (set to 0) */
> +	efx_dword_t	reserved_c[6];		/* (set to 0) */
>  } siena_mc_boot_hdr_t;
>  
>  #define	SIENA_MC_BOOT_HDR_PADDING \
> 

Re: [PATCH 01/53] net/sfc/base: copy new header from firmwaresrc

[Andrew Rybchenko]

On 11/27/2017 10:58 PM, Ferruh Yigit wrote:
> On 11/16/2017 12:03 AM, Andrew Rybchenko wrote:
>> From: Andrew Jackson <ajackson@solarflare.com>
>>
>> Signed-off-by: Andrew Jackson <ajackson@solarflare.com>
>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
>> ---
>>   drivers/net/sfc/base/siena_flash.h | 12 +++++++++---
>>   1 file changed, 9 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/net/sfc/base/siena_flash.h b/drivers/net/sfc/base/siena_flash.h
>> index e2700554..5fa3ea4 100644
>> --- a/drivers/net/sfc/base/siena_flash.h
>> +++ b/drivers/net/sfc/base/siena_flash.h
>> @@ -113,15 +113,21 @@ typedef struct siena_mc_boot_hdr_s {		/* GENERATED BY scripts/genfwdef */
>>   	efx_word_t	checksum;		/* of whole header area + firmware image */
>>   	efx_word_t	firmware_version_d;
>>   	efx_byte_t	mcfw_subtype;
>> -	efx_byte_t	generation;		/* Valid for medford, SBZ for earlier chips */
>> +	efx_byte_t	generation;		/* MC (Medford and later): MC partition generation when */
>> +						/* written to NVRAM. */
>> +						/* MUM & SUC images: subtype. */
>> +						/* (Otherwise set to 0) */
>>   	efx_dword_t	firmware_text_offset;	/* offset to firmware .text */
>>   	efx_dword_t	firmware_text_size;	/* length of firmware .text, in bytes */
>>   	efx_dword_t	firmware_data_offset;	/* offset to firmware .data */
>>   	efx_dword_t	firmware_data_size;	/* length of firmware .data, in bytes */
>>   	efx_byte_t	spi_rate;		/* SPI rate for reading image, 0 is BootROM default */
>>   	efx_byte_t	spi_phase_adj;		/* SPI SDO/SCL phase adjustment, 0 is default (no adj) */
>> -	efx_word_t	xpm_sector;		/* The sector that contains the key, or 0xffff if unsigned (medford) SBZ (earlier) */
>> -	efx_dword_t	reserved_c[7];		/* (set to 0) */
>> +	efx_word_t	xpm_sector;		/* XPM (MEDFORD and later): The sector that contains */
>> +						/* the key, or 0xffff if unsigned. (Otherwise set to 0) */
>> +	efx_byte_t	mumfw_subtype;		/* MUM & SUC images: subtype. (Otherwise set to 0) */
> Does this means there is a new updated FW? Should user know about version of it,
> or is FW upgrade needs to be documented somewhere?

No, it just defines some fields in reserved space. So, it does not 
change size.
In fact the new field is not used directly and useful for other tools 
based on libefx.
Hopefully it will not generate too much traffic on the mailing list.

>> +	efx_byte_t	reserved_b[3];		/* (set to 0) */
>> +	efx_dword_t	reserved_c[6];		/* (set to 0) */
>>   } siena_mc_boot_hdr_t;
>>   
>>   #define	SIENA_MC_BOOT_HDR_PADDING \
>>
>>

Re: [PATCH 01/53] net/sfc/base: copy new header from firmwaresrc

[Ferruh Yigit]

On 11/16/2017 12:03 AM, Andrew Rybchenko wrote:
> From: Andrew Jackson <ajackson@solarflare.com>
> 
> Signed-off-by: Andrew Jackson <ajackson@solarflare.com>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

Welcome Andrew Jackson!

[PATCH 02/53] net/sfc/base: do not use Tx desc push with TSO descriptors

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

Pushing TSO option descriptors is unsafe if pacer bypass is enabled,
so to make sure that doesn't happen never push TSO option descriptors.

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_tx.c | 56 ++++++++++++++++++++++++++++++++----------
 1 file changed, 43 insertions(+), 13 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index 211d265..2666943 100644
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -473,9 +473,9 @@ ef10_tx_qpost(
 }
 
 /*
- * This improves performance by pushing a TX descriptor at the same time as the
- * doorbell. The descriptor must be added to the TXQ, so that can be used if the
- * hardware decides not to use the pushed descriptor.
+ * This improves performance by, when possible, pushing a TX descriptor at the
+ * same time as the doorbell. The descriptor must be added to the TXQ, so that
+ * can be used if the hardware decides not to use the pushed descriptor.
  */
 			void
 ef10_tx_qpush(
@@ -495,16 +495,46 @@ ef10_tx_qpush(
 	offset = id * sizeof (efx_qword_t);
 
 	EFSYS_MEM_READQ(etp->et_esmp, offset, &desc);
-	EFX_POPULATE_OWORD_3(oword,
-	    ERF_DZ_TX_DESC_WPTR, wptr,
-	    ERF_DZ_TX_DESC_HWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_1),
-	    ERF_DZ_TX_DESC_LWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_0));
-
-	/* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
-	EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1, wptr, id);
-	EFSYS_PIO_WRITE_BARRIER();
-	EFX_BAR_TBL_DOORBELL_WRITEO(enp, ER_DZ_TX_DESC_UPD_REG, etp->et_index,
-				    &oword);
+
+	/*
+	 * Bug 65776: TSO option descriptors cannot be pushed if pacer bypass is
+	 * enabled on the event queue this transmit queue is attached to.
+	 *
+	 * To ensure the code is safe, it is easiest to simply test the type of
+	 * the descriptor to push, and only push it is if it not a TSO option
+	 * descriptor.
+	 */
+	if ((EFX_QWORD_FIELD(desc, ESF_DZ_TX_DESC_IS_OPT) != 1) ||
+	    (EFX_QWORD_FIELD(desc, ESF_DZ_TX_OPTION_TYPE) !=
+	    ESE_DZ_TX_OPTION_DESC_TSO)) {
+		/* Push the descriptor and update the wptr. */
+		EFX_POPULATE_OWORD_3(oword, ERF_DZ_TX_DESC_WPTR, wptr,
+		    ERF_DZ_TX_DESC_HWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_1),
+		    ERF_DZ_TX_DESC_LWORD, EFX_QWORD_FIELD(desc, EFX_DWORD_0));
+
+		/* Ensure ordering of memory (descriptors) and PIO (doorbell) */
+		EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1,
+					    wptr, id);
+		EFSYS_PIO_WRITE_BARRIER();
+		EFX_BAR_TBL_DOORBELL_WRITEO(enp, ER_DZ_TX_DESC_UPD_REG,
+					    etp->et_index, &oword);
+	} else {
+		efx_dword_t dword;
+
+		/*
+		 * Only update the wptr. This is signalled to the hardware by
+		 * only writing one DWORD of the doorbell register.
+		 */
+		EFX_POPULATE_OWORD_1(oword, ERF_DZ_TX_DESC_WPTR, wptr);
+		dword = oword.eo_dword[2];
+
+		/* Ensure ordering of memory (descriptors) and PIO (doorbell) */
+		EFX_DMA_SYNC_QUEUE_FOR_DEVICE(etp->et_esmp, etp->et_mask + 1,
+					    wptr, id);
+		EFSYS_PIO_WRITE_BARRIER();
+		EFX_BAR_TBL_WRITED2(enp, ER_DZ_TX_DESC_UPD_REG,
+				    etp->et_index, &dword, B_FALSE);
+	}
 }
 
 	__checkReturn	efx_rc_t
-- 
2.7.4

[PATCH 03/53] net/sfc/base: fix result code in MCDI NVRAM update finish

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Fixes: d96a34d165b1 ("net/sfc/base: import NVRAM support")
Cc: stable@dpdk.org

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_nvram.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 6ee2a71..14ff829 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -921,7 +921,7 @@ efx_mcdi_nvram_update_finish(
 	efx_mcdi_req_t req;
 	uint8_t payload[MAX(MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN,
 			    MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN)];
-	uint32_t result = 0; /* FIXME: use MC_CMD_NVRAM_VERIFY_RC_UNKNOWN */
+	uint32_t result = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
 	efx_rc_t rc;
 
 	(void) memset(payload, 0, sizeof (payload));
-- 
2.7.4

[PATCH 04/53] net/sfc/base: simplify verify result handling

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Simplify verify result handling in NVRAM update finish

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_nvram.c | 23 +++++++++++------------
 1 file changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 14ff829..7d4c9a0 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -944,24 +944,23 @@ efx_mcdi_nvram_update_finish(
 		goto fail1;
 	}
 
-	if (encp->enc_fw_verified_nvram_update_required == B_FALSE) {
-		/* Report success if verified updates are not supported. */
-		result = MC_CMD_NVRAM_VERIFY_RC_SUCCESS;
-	} else {
-		/* Firmware-verified NVRAM updates are required */
-		if (req.emr_out_length_used <
-		    MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
+	if (req.emr_out_length_used < MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
+		result = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
+		if (encp->enc_fw_verified_nvram_update_required) {
+			/* Mandatory verification result is missing */
 			rc = EMSGSIZE;
 			goto fail2;
 		}
+	} else {
 		result =
 		    MCDI_OUT_DWORD(req, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
+	}
 
-		if (result != MC_CMD_NVRAM_VERIFY_RC_SUCCESS) {
-			/* Mandatory verification failed */
-			rc = EINVAL;
-			goto fail3;
-		}
+	if ((encp->enc_fw_verified_nvram_update_required) &&
+	    (result != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)) {
+		/* Mandatory verification failed */
+		rc = EINVAL;
+		goto fail3;
 	}
 
 	if (resultp != NULL)
-- 
2.7.4

[PATCH 05/53] net/sfc/base: report verify result from RW finish callback

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

This makes the verify result visible to efx_nvram_rw_finish(), which
can be extended to report it in a later patch.

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_impl.h   |  3 ++-
 drivers/net/sfc/base/ef10_nvram.c  | 13 +++++++------
 drivers/net/sfc/base/efx_impl.h    |  5 +++--
 drivers/net/sfc/base/efx_nvram.c   | 21 +++++++++++----------
 drivers/net/sfc/base/siena_impl.h  |  6 ++++--
 drivers/net/sfc/base/siena_nvram.c | 12 +++++++-----
 drivers/net/sfc/base/siena_vpd.c   |  4 ++--
 7 files changed, 36 insertions(+), 28 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 8f9eb7a..4624113 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -460,7 +460,8 @@ ef10_nvram_partn_write(
 extern	__checkReturn		efx_rc_t
 ef10_nvram_partn_rw_finish(
 	__in			efx_nic_t *enp,
-	__in			uint32_t partn);
+	__in			uint32_t partn,
+	__out_opt		uint32_t *verify_resultp);
 
 extern	__checkReturn		efx_rc_t
 ef10_nvram_partn_get_version(
diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index 3f9d375..0d742ab 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -2047,15 +2047,15 @@ ef10_nvram_partn_write(
 ef10_nvram_partn_unlock(
 	__in			efx_nic_t *enp,
 	__in			uint32_t partn,
-	__out_opt		uint32_t *resultp)
+	__out_opt		uint32_t *verify_resultp)
 {
 	boolean_t reboot = B_FALSE;
 	efx_rc_t rc;
 
-	if (resultp != NULL)
-		*resultp = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
+	if (verify_resultp != NULL)
+		*verify_resultp = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
 
-	rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, resultp);
+	rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 	if (rc != 0)
 		goto fail1;
 
@@ -2365,11 +2365,12 @@ ef10_nvram_partn_rw_start(
 	__checkReturn		efx_rc_t
 ef10_nvram_partn_rw_finish(
 	__in			efx_nic_t *enp,
-	__in			uint32_t partn)
+	__in			uint32_t partn,
+	__out_opt		uint32_t *verify_resultp)
 {
 	efx_rc_t rc;
 
-	if ((rc = ef10_nvram_partn_unlock(enp, partn, NULL)) != 0)
+	if ((rc = ef10_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 		goto fail1;
 
 	return (0);
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 53fa37a..6cb015a 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -475,7 +475,8 @@ typedef struct efx_nvram_ops_s {
 					    unsigned int, size_t);
 	efx_rc_t	(*envo_partn_write)(efx_nic_t *, uint32_t,
 					    unsigned int, caddr_t, size_t);
-	efx_rc_t	(*envo_partn_rw_finish)(efx_nic_t *, uint32_t);
+	efx_rc_t	(*envo_partn_rw_finish)(efx_nic_t *, uint32_t,
+					    uint32_t *);
 	efx_rc_t	(*envo_partn_get_version)(efx_nic_t *, uint32_t,
 					    uint32_t *, uint16_t *);
 	efx_rc_t	(*envo_partn_set_version)(efx_nic_t *, uint32_t,
@@ -564,7 +565,7 @@ efx_mcdi_nvram_update_finish(
 	__in			efx_nic_t *enp,
 	__in			uint32_t partn,
 	__in			boolean_t reboot,
-	__out_opt		uint32_t *resultp);
+	__out_opt		uint32_t *verify_resultp);
 
 #if EFSYS_OPT_DIAG
 
diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 7d4c9a0..773bc10 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -366,6 +366,7 @@ efx_nvram_rw_finish(
 {
 	const efx_nvram_ops_t *envop = enp->en_envop;
 	uint32_t partn;
+	uint32_t verify_result;
 	efx_rc_t rc;
 
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
@@ -379,7 +380,7 @@ efx_nvram_rw_finish(
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
-	if ((rc = envop->envo_partn_rw_finish(enp, partn)) != 0)
+	if ((rc = envop->envo_partn_rw_finish(enp, partn, &verify_result)) != 0)
 		goto fail2;
 
 	enp->en_nvram_locked = EFX_NVRAM_INVALID;
@@ -915,13 +916,13 @@ efx_mcdi_nvram_update_finish(
 	__in			efx_nic_t *enp,
 	__in			uint32_t partn,
 	__in			boolean_t reboot,
-	__out_opt		uint32_t *resultp)
+	__out_opt		uint32_t *verify_resultp)
 {
 	const efx_nic_cfg_t *encp = &enp->en_nic_cfg;
 	efx_mcdi_req_t req;
 	uint8_t payload[MAX(MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN,
 			    MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN)];
-	uint32_t result = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
+	uint32_t verify_result = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
 	efx_rc_t rc;
 
 	(void) memset(payload, 0, sizeof (payload));
@@ -945,26 +946,26 @@ efx_mcdi_nvram_update_finish(
 	}
 
 	if (req.emr_out_length_used < MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
-		result = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
+		verify_result = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
 		if (encp->enc_fw_verified_nvram_update_required) {
 			/* Mandatory verification result is missing */
 			rc = EMSGSIZE;
 			goto fail2;
 		}
 	} else {
-		result =
+		verify_result =
 		    MCDI_OUT_DWORD(req, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
 	}
 
 	if ((encp->enc_fw_verified_nvram_update_required) &&
-	    (result != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)) {
+	    (verify_result != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)) {
 		/* Mandatory verification failed */
 		rc = EINVAL;
 		goto fail3;
 	}
 
-	if (resultp != NULL)
-		*resultp = result;
+	if (verify_resultp != NULL)
+		*verify_resultp = verify_result;
 
 	return (0);
 
@@ -976,8 +977,8 @@ efx_mcdi_nvram_update_finish(
 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
 
 	/* Always report verification result */
-	if (resultp != NULL)
-		*resultp = result;
+	if (verify_resultp != NULL)
+		*verify_resultp = verify_result;
 
 	return (rc);
 }
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index ea6de98..15019f8 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -143,7 +143,8 @@ siena_nvram_partn_lock(
 extern	__checkReturn		efx_rc_t
 siena_nvram_partn_unlock(
 	__in			efx_nic_t *enp,
-	__in			uint32_t partn);
+	__in			uint32_t partn,
+	__out_opt		uint32_t *verify_resultp);
 
 extern	__checkReturn		efx_rc_t
 siena_nvram_get_dynamic_cfg(
@@ -215,7 +216,8 @@ siena_nvram_partn_write(
 extern	__checkReturn		efx_rc_t
 siena_nvram_partn_rw_finish(
 	__in			efx_nic_t *enp,
-	__in			uint32_t partn);
+	__in			uint32_t partn,
+	__out_opt		uint32_t *verify_resultp);
 
 extern	__checkReturn		efx_rc_t
 siena_nvram_partn_get_version(
diff --git a/drivers/net/sfc/base/siena_nvram.c b/drivers/net/sfc/base/siena_nvram.c
index af4cf17..bb78ae0 100644
--- a/drivers/net/sfc/base/siena_nvram.c
+++ b/drivers/net/sfc/base/siena_nvram.c
@@ -170,7 +170,8 @@ siena_nvram_partn_write(
 	__checkReturn		efx_rc_t
 siena_nvram_partn_unlock(
 	__in			efx_nic_t *enp,
-	__in			uint32_t partn)
+	__in			uint32_t partn,
+	__out_opt		uint32_t *verify_resultp)
 {
 	boolean_t reboot;
 	efx_rc_t rc;
@@ -183,7 +184,7 @@ siena_nvram_partn_unlock(
 		    partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 		    partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 
-	rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, NULL);
+	rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 	if (rc != 0)
 		goto fail1;
 
@@ -587,11 +588,12 @@ siena_nvram_partn_rw_start(
 	__checkReturn		efx_rc_t
 siena_nvram_partn_rw_finish(
 	__in			efx_nic_t *enp,
-	__in			uint32_t partn)
+	__in			uint32_t partn,
+	__out_opt		uint32_t *verify_resultp)
 {
 	efx_rc_t rc;
 
-	if ((rc = siena_nvram_partn_unlock(enp, partn)) != 0)
+	if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 		goto fail1;
 
 	return (0);
@@ -705,7 +707,7 @@ siena_nvram_partn_set_version(
 
 	EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 
-	siena_nvram_partn_unlock(enp, dcfg_partn);
+	siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 
 	return (0);
 
diff --git a/drivers/net/sfc/base/siena_vpd.c b/drivers/net/sfc/base/siena_vpd.c
index 4fb2e42..c85ca63 100644
--- a/drivers/net/sfc/base/siena_vpd.c
+++ b/drivers/net/sfc/base/siena_vpd.c
@@ -572,7 +572,7 @@ siena_vpd_write(
 
 	EFSYS_KMEM_FREE(enp->en_esip, dcfg_size, dcfg);
 
-	siena_nvram_partn_unlock(enp, dcfg_partn);
+	siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 
 	return (0);
 
@@ -587,7 +587,7 @@ siena_vpd_write(
 fail4:
 	EFSYS_PROBE(fail4);
 
-	siena_nvram_partn_unlock(enp, dcfg_partn);
+	siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 fail3:
 	EFSYS_PROBE(fail3);
 fail2:
-- 
2.7.4

[PATCH 06/53] net/sfc/base: extend NVRAM RW finish to return verify result

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Extend efx_nvram_rw_finish() to return firmware verify result code.

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx.h         |  3 ++-
 drivers/net/sfc/base/efx_bootcfg.c |  8 ++++----
 drivers/net/sfc/base/efx_nvram.c   | 12 ++++++++++--
 3 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 57fba05..3bde46f 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1411,7 +1411,8 @@ efx_nvram_rw_start(
 extern	__checkReturn		efx_rc_t
 efx_nvram_rw_finish(
 	__in			efx_nic_t *enp,
-	__in			efx_nvram_type_t type);
+	__in			efx_nvram_type_t type,
+	__out_opt		uint32_t *verify_resultp);
 
 extern	__checkReturn		efx_rc_t
 efx_nvram_get_version(
diff --git a/drivers/net/sfc/base/efx_bootcfg.c b/drivers/net/sfc/base/efx_bootcfg.c
index d589c86..c47d16b 100644
--- a/drivers/net/sfc/base/efx_bootcfg.c
+++ b/drivers/net/sfc/base/efx_bootcfg.c
@@ -345,11 +345,11 @@ efx_bootcfg_read(
 
 	if ((rc = efx_nvram_read_chunk(enp, EFX_NVRAM_BOOTROM_CFG,
 	    sector_offset, (caddr_t)payload, sector_length)) != 0) {
-		(void) efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG);
+		(void) efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG, NULL);
 		goto fail6;
 	}
 
-	if ((rc = efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG)) != 0)
+	if ((rc = efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG, NULL)) != 0)
 		goto fail7;
 
 	/* Verify that the area is correctly formatted and checksummed */
@@ -521,7 +521,7 @@ efx_bootcfg_write(
 		    0, (caddr_t)partn_data, partn_length)) != 0)
 		goto fail11;
 
-	if ((rc = efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG)) != 0)
+	if ((rc = efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG, NULL)) != 0)
 		goto fail12;
 
 	EFSYS_KMEM_FREE(enp->en_esip, partn_length, partn_data);
@@ -537,7 +537,7 @@ efx_bootcfg_write(
 fail9:
 	EFSYS_PROBE(fail9);
 
-	(void) efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG);
+	(void) efx_nvram_rw_finish(enp, EFX_NVRAM_BOOTROM_CFG, NULL);
 fail8:
 	EFSYS_PROBE(fail8);
 
diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 773bc10..6e18e44 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -362,11 +362,12 @@ efx_nvram_write_chunk(
 	__checkReturn		efx_rc_t
 efx_nvram_rw_finish(
 	__in			efx_nic_t *enp,
-	__in			efx_nvram_type_t type)
+	__in			efx_nvram_type_t type,
+	__out_opt		uint32_t *verify_resultp)
 {
 	const efx_nvram_ops_t *envop = enp->en_envop;
 	uint32_t partn;
-	uint32_t verify_result;
+	uint32_t verify_result = 0;
 	efx_rc_t rc;
 
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
@@ -385,6 +386,9 @@ efx_nvram_rw_finish(
 
 	enp->en_nvram_locked = EFX_NVRAM_INVALID;
 
+	if (verify_resultp != NULL)
+		*verify_resultp = verify_result;
+
 	return (0);
 
 fail2:
@@ -394,6 +398,10 @@ efx_nvram_rw_finish(
 fail1:
 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
 
+	/* Always report verification result */
+	if (verify_resultp != NULL)
+		*verify_resultp = verify_result;
+
 	return (rc);
 }
 
-- 
2.7.4

[PATCH 07/53] net/sfc/base: rename firmware update verify result cap field

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

The existing name confuses support for secure boot with
support for reporting a verify result after an NVRAM update.

As the capability only reports support for returning a verify
result, change the name to be less confusing.

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_mcdi.c | 2 +-
 drivers/net/sfc/base/ef10_nic.c  | 2 +-
 drivers/net/sfc/base/efx.h       | 2 +-
 drivers/net/sfc/base/efx_nvram.c | 8 ++++----
 drivers/net/sfc/base/siena_nic.c | 2 +-
 5 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_mcdi.c b/drivers/net/sfc/base/ef10_mcdi.c
index 5a26bda..dbdfa36 100644
--- a/drivers/net/sfc/base/ef10_mcdi.c
+++ b/drivers/net/sfc/base/ef10_mcdi.c
@@ -130,7 +130,7 @@ ef10_mcdi_get_timeout(
 	case MC_CMD_NVRAM_ERASE:
 	case MC_CMD_LICENSING_V3:
 	case MC_CMD_NVRAM_UPDATE_FINISH:
-		if (encp->enc_fw_verified_nvram_update_required != B_FALSE) {
+		if (encp->enc_nvram_update_verify_result_supported != B_FALSE) {
 			/*
 			 * Potentially longer running commands, which firmware
 			 * may choose to process in a background thread.
diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c
index 58d1b0a..cf56236 100644
--- a/drivers/net/sfc/base/ef10_nic.c
+++ b/drivers/net/sfc/base/ef10_nic.c
@@ -1054,7 +1054,7 @@ ef10_get_datapath_caps(
 	 * and version 2 of MC_CMD_NVRAM_UPDATE_FINISH (to verify the updated
 	 * partition and report the result).
 	 */
-	encp->enc_fw_verified_nvram_update_required =
+	encp->enc_nvram_update_verify_result_supported =
 	    CAP_FLAG2(flags2, NVRAM_UPDATE_REPORT_VERIFY_RESULT) ?
 	    B_TRUE : B_FALSE;
 
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 3bde46f..b298a75 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1206,7 +1206,7 @@ typedef struct efx_nic_cfg_s {
 	uint32_t		enc_required_pcie_bandwidth_mbps;
 	uint32_t		enc_max_pcie_link_gen;
 	/* Firmware verifies integrity of NVRAM updates */
-	uint32_t		enc_fw_verified_nvram_update_required;
+	uint32_t		enc_nvram_update_verify_result_supported;
 } efx_nic_cfg_t;
 
 #define	EFX_PCI_FUNCTION_IS_PF(_encp)	((_encp)->enc_vf == 0xffff)
diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 6e18e44..6e22169 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -955,8 +955,8 @@ efx_mcdi_nvram_update_finish(
 
 	if (req.emr_out_length_used < MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
 		verify_result = MC_CMD_NVRAM_VERIFY_RC_UNKNOWN;
-		if (encp->enc_fw_verified_nvram_update_required) {
-			/* Mandatory verification result is missing */
+		if (encp->enc_nvram_update_verify_result_supported) {
+			/* Result of update verification is missing */
 			rc = EMSGSIZE;
 			goto fail2;
 		}
@@ -965,9 +965,9 @@ efx_mcdi_nvram_update_finish(
 		    MCDI_OUT_DWORD(req, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
 	}
 
-	if ((encp->enc_fw_verified_nvram_update_required) &&
+	if ((encp->enc_nvram_update_verify_result_supported) &&
 	    (verify_result != MC_CMD_NVRAM_VERIFY_RC_SUCCESS)) {
-		/* Mandatory verification failed */
+		/* Update verification failed */
 		rc = EINVAL;
 		goto fail3;
 	}
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index fcc8f15..d574b24 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -174,7 +174,7 @@ siena_board_cfg(
 	encp->enc_required_pcie_bandwidth_mbps = 2 * 10000;
 	encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN2;
 
-	encp->enc_fw_verified_nvram_update_required = B_FALSE;
+	encp->enc_nvram_update_verify_result_supported = B_FALSE;
 
 	return (0);
 
-- 
2.7.4

[PATCH 08/53] net/sfc/base: simplify NVRAM type to partition mappings

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_nvram.c | 110 +++++++++++++-------------------------
 1 file changed, 37 insertions(+), 73 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index 0d742ab..fdd7646 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -2106,83 +2106,47 @@ ef10_nvram_partn_set_version(
 
 typedef struct ef10_parttbl_entry_s {
 	unsigned int		partn;
-	unsigned int		port;
+	unsigned int		port_mask;
 	efx_nvram_type_t	nvtype;
 } ef10_parttbl_entry_t;
 
+/* Port mask values */
+#define	PORT_1		(1u << 1)
+#define	PORT_2		(1u << 2)
+#define	PORT_3		(1u << 3)
+#define	PORT_4		(1u << 4)
+#define	PORT_ALL	(0xffffffffu)
+
+#define	PARTN_MAP_ENTRY(partn, port_mask, nvtype)	\
+{ (NVRAM_PARTITION_TYPE_##partn), (PORT_##port_mask), (EFX_NVRAM_##nvtype) }
+
 /* Translate EFX NVRAM types to firmware partition types */
 static ef10_parttbl_entry_t hunt_parttbl[] = {
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   1, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   2, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   3, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   4, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  1, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  2, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  3, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  4, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   1, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   2, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   3, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   4, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT1, 2, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT2, 3, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3, 4, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   1, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   2, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   3, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   4, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_FPGA,		   1, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA,		   2, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA,		   3, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA,		   4, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   1, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   2, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   3, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   4, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   1, EFX_NVRAM_LICENSE},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   2, EFX_NVRAM_LICENSE},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   3, EFX_NVRAM_LICENSE},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   4, EFX_NVRAM_LICENSE}
+	/*		partn			ports	nvtype */
+	PARTN_MAP_ENTRY(MC_FIRMWARE,		ALL,	MC_FIRMWARE),
+	PARTN_MAP_ENTRY(MC_FIRMWARE_BACKUP,	ALL,	MC_GOLDEN),
+	PARTN_MAP_ENTRY(EXPANSION_ROM,		ALL,	BOOTROM),
+	PARTN_MAP_ENTRY(EXPROM_CONFIG_PORT0,	1,	BOOTROM_CFG),
+	PARTN_MAP_ENTRY(EXPROM_CONFIG_PORT1,	2,	BOOTROM_CFG),
+	PARTN_MAP_ENTRY(EXPROM_CONFIG_PORT2,	3,	BOOTROM_CFG),
+	PARTN_MAP_ENTRY(EXPROM_CONFIG_PORT3,	4,	BOOTROM_CFG),
+	PARTN_MAP_ENTRY(DYNAMIC_CONFIG,		ALL,	DYNAMIC_CFG),
+	PARTN_MAP_ENTRY(FPGA,			ALL,	FPGA),
+	PARTN_MAP_ENTRY(FPGA_BACKUP,		ALL,	FPGA_BACKUP),
+	PARTN_MAP_ENTRY(LICENSE,		ALL,	LICENSE),
 };
 
 static ef10_parttbl_entry_t medford_parttbl[] = {
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   1, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   2, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   3, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE,	   4, EFX_NVRAM_MC_FIRMWARE},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  1, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  2, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  3, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP,  4, EFX_NVRAM_MC_GOLDEN},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   1, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   2, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   3, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_ROM,	   4, EFX_NVRAM_BOOTROM},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 1, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 2, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 3, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0, 4, EFX_NVRAM_BOOTROM_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   1, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   2, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   3, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG,	   4, EFX_NVRAM_DYNAMIC_CFG},
-	{NVRAM_PARTITION_TYPE_FPGA,		   1, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA,		   2, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA,		   3, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA,		   4, EFX_NVRAM_FPGA},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   1, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   2, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   3, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_FPGA_BACKUP,	   4, EFX_NVRAM_FPGA_BACKUP},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   1, EFX_NVRAM_LICENSE},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   2, EFX_NVRAM_LICENSE},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   3, EFX_NVRAM_LICENSE},
-	{NVRAM_PARTITION_TYPE_LICENSE,		   4, EFX_NVRAM_LICENSE},
-	{NVRAM_PARTITION_TYPE_EXPANSION_UEFI,	   1, EFX_NVRAM_UEFIROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_UEFI,	   2, EFX_NVRAM_UEFIROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_UEFI,	   3, EFX_NVRAM_UEFIROM},
-	{NVRAM_PARTITION_TYPE_EXPANSION_UEFI,	   4, EFX_NVRAM_UEFIROM}
+	/*		partn			ports	nvtype */
+	PARTN_MAP_ENTRY(MC_FIRMWARE,		ALL,	MC_FIRMWARE),
+	PARTN_MAP_ENTRY(MC_FIRMWARE_BACKUP,	ALL,	MC_GOLDEN),
+	PARTN_MAP_ENTRY(EXPANSION_ROM,		ALL,	BOOTROM),
+	PARTN_MAP_ENTRY(EXPROM_CONFIG,		ALL,	BOOTROM_CFG),
+	PARTN_MAP_ENTRY(DYNAMIC_CONFIG,		ALL,	DYNAMIC_CFG),
+	PARTN_MAP_ENTRY(FPGA,			ALL,	FPGA),
+	PARTN_MAP_ENTRY(FPGA_BACKUP,		ALL,	FPGA_BACKUP),
+	PARTN_MAP_ENTRY(LICENSE,		ALL,	LICENSE),
+	PARTN_MAP_ENTRY(EXPANSION_UEFI,		ALL,	UEFIROM),
 };
 
 static	__checkReturn		efx_rc_t
@@ -2227,8 +2191,8 @@ ef10_nvram_type_to_partn(
 		for (i = 0; i < parttbl_rows; i++) {
 			ef10_parttbl_entry_t *entry = &parttbl[i];
 
-			if (entry->nvtype == type &&
-			    entry->port == emip->emi_port) {
+			if ((entry->nvtype == type) &&
+			    (entry->port_mask & (1u << emip->emi_port))) {
 				*partnp = entry->partn;
 				return (0);
 			}
@@ -2257,8 +2221,8 @@ ef10_nvram_partn_to_type(
 		for (i = 0; i < parttbl_rows; i++) {
 			ef10_parttbl_entry_t *entry = &parttbl[i];
 
-			if (entry->partn == partn &&
-			    entry->port == emip->emi_port) {
+			if ((entry->partn == partn) &&
+			    (entry->port_mask & (1u << emip->emi_port))) {
 				*typep = entry->nvtype;
 				return (0);
 			}
-- 
2.7.4

[PATCH 09/53] net/sfc/base: check NVRAM locking by partition ID

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Tracking which partition is locked avoids being overly conservative
when EFX_NVRAM_xxx maps to more than one partition (depnding on the
current port number).

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_impl.h  |  6 +++++-
 drivers/net/sfc/base/efx_nvram.c | 40 +++++++++++++++++++++-------------------
 2 files changed, 26 insertions(+), 20 deletions(-)

diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 6cb015a..7b07f34 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -461,6 +461,10 @@ typedef struct efx_mcdi_s {
 #endif /* EFSYS_OPT_MCDI */
 
 #if EFSYS_OPT_NVRAM
+
+/* Invalid partition ID for en_nvram_partn_locked field of efx_nc_t */
+#define	EFX_NVRAM_PARTN_INVALID		(0xffffffffu)
+
 typedef struct efx_nvram_ops_s {
 #if EFSYS_OPT_DIAG
 	efx_rc_t	(*envo_test)(efx_nic_t *);
@@ -648,7 +652,7 @@ struct efx_nic_s {
 	efx_mcdi_t		en_mcdi;
 #endif	/* EFSYS_OPT_MCDI */
 #if EFSYS_OPT_NVRAM
-	efx_nvram_type_t	en_nvram_locked;
+	uint32_t		en_nvram_partn_locked;
 	const efx_nvram_ops_t	*en_envop;
 #endif	/* EFSYS_OPT_NVRAM */
 #if EFSYS_OPT_VPD
diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 6e22169..a2b0e05 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -112,6 +112,8 @@ efx_nvram_init(
 	enp->en_envop = envop;
 	enp->en_mod_flags |= EFX_MOD_NVRAM;
 
+	enp->en_nvram_partn_locked = EFX_NVRAM_PARTN_INVALID;
+
 	return (0);
 
 fail1:
@@ -227,15 +229,15 @@ efx_nvram_rw_start(
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 
-	EFSYS_ASSERT3U(enp->en_nvram_locked, ==, EFX_NVRAM_INVALID);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, EFX_NVRAM_PARTN_INVALID);
+
 	if ((rc = envop->envo_partn_rw_start(enp, partn, chunk_sizep)) != 0)
 		goto fail2;
 
-	enp->en_nvram_locked = type;
+	enp->en_nvram_partn_locked = partn;
 
 	return (0);
 
@@ -265,11 +267,11 @@ efx_nvram_read_chunk(
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 
-	EFSYS_ASSERT3U(enp->en_nvram_locked, ==, type);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, partn);
+
 	if ((rc = envop->envo_partn_read(enp, partn, offset, data, size)) != 0)
 		goto fail2;
 
@@ -300,11 +302,11 @@ efx_nvram_erase(
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 
-	EFSYS_ASSERT3U(enp->en_nvram_locked, ==, type);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, partn);
+
 	if ((rc = envop->envo_partn_size(enp, partn, &size)) != 0)
 		goto fail2;
 
@@ -341,11 +343,11 @@ efx_nvram_write_chunk(
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 
-	EFSYS_ASSERT3U(enp->en_nvram_locked, ==, type);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, partn);
+
 	if ((rc = envop->envo_partn_write(enp, partn, offset, data, size)) != 0)
 		goto fail2;
 
@@ -376,15 +378,15 @@ efx_nvram_rw_finish(
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 
-	EFSYS_ASSERT3U(enp->en_nvram_locked, ==, type);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, partn);
+
 	if ((rc = envop->envo_partn_rw_finish(enp, partn, &verify_result)) != 0)
 		goto fail2;
 
-	enp->en_nvram_locked = EFX_NVRAM_INVALID;
+	enp->en_nvram_partn_locked = EFX_NVRAM_PARTN_INVALID;
 
 	if (verify_resultp != NULL)
 		*verify_resultp = verify_result;
@@ -393,7 +395,7 @@ efx_nvram_rw_finish(
 
 fail2:
 	EFSYS_PROBE(fail2);
-	enp->en_nvram_locked = EFX_NVRAM_INVALID;
+	enp->en_nvram_partn_locked = EFX_NVRAM_PARTN_INVALID;
 
 fail1:
 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
@@ -421,15 +423,15 @@ efx_nvram_set_version(
 
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 
+	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
+		goto fail1;
+
 	/*
 	 * The Siena implementation of envo_set_version() will attempt to
-	 * acquire the NVRAM_UPDATE lock for the DYNAMIC_CONFIG sector.
+	 * acquire the NVRAM_UPDATE lock for the DYNAMIC_CONFIG partition.
 	 * Therefore, you can't have already acquired the NVRAM_UPDATE lock.
 	 */
-	EFSYS_ASSERT3U(enp->en_nvram_locked, ==, EFX_NVRAM_INVALID);
-
-	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
-		goto fail1;
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, EFX_NVRAM_PARTN_INVALID);
 
 	if ((rc = envop->envo_partn_set_version(enp, partn, version)) != 0)
 		goto fail2;
@@ -490,7 +492,7 @@ efx_nvram_fini(
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(enp->en_nvram_locked, ==, EFX_NVRAM_INVALID);
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, EFX_NVRAM_PARTN_INVALID);
 
 	enp->en_envop = NULL;
 	enp->en_mod_flags &= ~EFX_MOD_NVRAM;
-- 
2.7.4

[PATCH 10/53] net/sfc/base: report correct partition write chunk size

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

If the firmware reports a non-zero write chunk size then nvram writes
may fail if a different granularity is used (e.g. for MUM firmware on
Sorrento).

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_nvram.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index fdd7646..a70838b 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -2310,16 +2310,27 @@ ef10_nvram_partn_rw_start(
 	__in			uint32_t partn,
 	__out			size_t *chunk_sizep)
 {
+	uint32_t write_size = 0;
 	efx_rc_t rc;
 
-	if ((rc = ef10_nvram_partn_lock(enp, partn)) != 0)
+	if ((rc = efx_mcdi_nvram_info(enp, partn, NULL, NULL,
+	    NULL, &write_size)) != 0)
 		goto fail1;
 
-	if (chunk_sizep != NULL)
-		*chunk_sizep = EF10_NVRAM_CHUNK;
+	if ((rc = ef10_nvram_partn_lock(enp, partn)) != 0)
+		goto fail2;
+
+	if (chunk_sizep != NULL) {
+		if (write_size == 0)
+			*chunk_sizep = EF10_NVRAM_CHUNK;
+		else
+			*chunk_sizep = write_size;
+	}
 
 	return (0);
 
+fail2:
+	EFSYS_PROBE(fail2);
 fail1:
 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
 
-- 
2.7.4

[PATCH 11/53] net/sfc/base: fix check in NVRAM validate

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Fixes: d96a34d165b1 ("net/sfc/base: import NVRAM support")
Cc: stable@dpdk.org

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_nvram.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index a2b0e05..bdad5d5 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -468,10 +468,11 @@ efx_nvram_validate(
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
-	if (envop->envo_type_to_partn != NULL &&
-	    ((rc = envop->envo_buffer_validate(enp, partn,
-	    partn_data, partn_size)) != 0))
-		goto fail2;
+	if (envop->envo_buffer_validate != NULL) {
+		if ((rc = envop->envo_buffer_validate(enp, partn,
+			    partn_data, partn_size)) != 0)
+			goto fail2;
+	}
 
 	return (0);
 
-- 
2.7.4

[PATCH 12/53] net/sfc/base: precheck and verify flash writes

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Read existing flash content before writing, so the flash write can be
avoided if the existing partition content matches the new image. This
avoids unnecessary write cycles for the flash device, and may also be
faster. If the flash does need to be updated, verify the content after
writing.

Note that reading the flash content after writing but before calling
efx_nvram-rw_finish() avoids firmware bug68170, which can lead to
signed image updates failing on Medford.

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_impl.h  |  8 +++++++
 drivers/net/sfc/base/ef10_nvram.c | 27 ++++++++++++++++++++++--
 drivers/net/sfc/base/efx.h        |  8 +++++++
 drivers/net/sfc/base/efx_impl.h   |  2 ++
 drivers/net/sfc/base/efx_nvram.c  | 44 +++++++++++++++++++++++++++++++++++++++
 5 files changed, 87 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 4624113..97922f3 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -443,6 +443,14 @@ ef10_nvram_partn_read(
 	__in			size_t size);
 
 extern	__checkReturn		efx_rc_t
+ef10_nvram_partn_read_backup(
+	__in			efx_nic_t *enp,
+	__in			uint32_t partn,
+	__in			unsigned int offset,
+	__out_bcount(size)	caddr_t data,
+	__in			size_t size);
+
+extern	__checkReturn		efx_rc_t
 ef10_nvram_partn_erase(
 	__in			efx_nic_t *enp,
 	__in			uint32_t partn,
diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index a70838b..68f14d5 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -1937,14 +1937,37 @@ ef10_nvram_partn_read(
 	__in			size_t size)
 {
 	/*
-	 * Read requests which come in through the EFX API expect to
-	 * read the current, active partition.
+	 * An A/B partition has two data stores (current and backup).
+	 * Read requests which come in through the EFX API expect to read the
+	 * current, active store of an A/B partition. For non A/B partitions,
+	 * there is only a single store and so the mode param is ignored.
 	 */
 	return ef10_nvram_partn_read_mode(enp, partn, offset, data, size,
 			    MC_CMD_NVRAM_READ_IN_V2_TARGET_CURRENT);
 }
 
 	__checkReturn		efx_rc_t
+ef10_nvram_partn_read_backup(
+	__in			efx_nic_t *enp,
+	__in			uint32_t partn,
+	__in			unsigned int offset,
+	__out_bcount(size)	caddr_t data,
+	__in			size_t size)
+{
+	/*
+	 * An A/B partition has two data stores (current and backup).
+	 * Read the backup store of an A/B partition (i.e. the store currently
+	 * being written to if the partition is locked).
+	 *
+	 * This is needed when comparing the existing partition content to avoid
+	 * unnecessary writes, or to read back what has been written to check
+	 * that the writes have succeeded.
+	 */
+	return ef10_nvram_partn_read_mode(enp, partn, offset, data, size,
+			    MC_CMD_NVRAM_READ_IN_V2_TARGET_BACKUP);
+}
+
+	__checkReturn		efx_rc_t
 ef10_nvram_partn_erase(
 	__in			efx_nic_t *enp,
 	__in			uint32_t partn,
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index b298a75..834eea0 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1430,6 +1430,14 @@ efx_nvram_read_chunk(
 	__in			size_t size);
 
 extern	__checkReturn		efx_rc_t
+efx_nvram_read_backup(
+	__in			efx_nic_t *enp,
+	__in			efx_nvram_type_t type,
+	__in			unsigned int offset,
+	__out_bcount(size)	caddr_t data,
+	__in			size_t size);
+
+extern	__checkReturn		efx_rc_t
 efx_nvram_set_version(
 	__in			efx_nic_t *enp,
 	__in			efx_nvram_type_t type,
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 7b07f34..2be8b9c 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -475,6 +475,8 @@ typedef struct efx_nvram_ops_s {
 	efx_rc_t	(*envo_partn_rw_start)(efx_nic_t *, uint32_t, size_t *);
 	efx_rc_t	(*envo_partn_read)(efx_nic_t *, uint32_t,
 					    unsigned int, caddr_t, size_t);
+	efx_rc_t	(*envo_partn_read_backup)(efx_nic_t *, uint32_t,
+					    unsigned int, caddr_t, size_t);
 	efx_rc_t	(*envo_partn_erase)(efx_nic_t *, uint32_t,
 					    unsigned int, size_t);
 	efx_rc_t	(*envo_partn_write)(efx_nic_t *, uint32_t,
diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index bdad5d5..affe496 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -43,6 +43,7 @@ static const efx_nvram_ops_t	__efx_nvram_siena_ops = {
 	siena_nvram_partn_size,		/* envo_partn_size */
 	siena_nvram_partn_rw_start,	/* envo_partn_rw_start */
 	siena_nvram_partn_read,		/* envo_partn_read */
+	siena_nvram_partn_read,		/* envo_partn_read_backup */
 	siena_nvram_partn_erase,	/* envo_partn_erase */
 	siena_nvram_partn_write,	/* envo_partn_write */
 	siena_nvram_partn_rw_finish,	/* envo_partn_rw_finish */
@@ -63,6 +64,7 @@ static const efx_nvram_ops_t	__efx_nvram_ef10_ops = {
 	ef10_nvram_partn_size,		/* envo_partn_size */
 	ef10_nvram_partn_rw_start,	/* envo_partn_rw_start */
 	ef10_nvram_partn_read,		/* envo_partn_read */
+	ef10_nvram_partn_read_backup,	/* envo_partn_read_backup */
 	ef10_nvram_partn_erase,		/* envo_partn_erase */
 	ef10_nvram_partn_write,		/* envo_partn_write */
 	ef10_nvram_partn_rw_finish,	/* envo_partn_rw_finish */
@@ -285,6 +287,48 @@ efx_nvram_read_chunk(
 	return (rc);
 }
 
+/*
+ * Read from the backup (writeable) store of an A/B partition.
+ * For non A/B partitions, there is only a single store, and so this
+ * function has the same behaviour as efx_nvram_read_chunk().
+ */
+	__checkReturn		efx_rc_t
+efx_nvram_read_backup(
+	__in			efx_nic_t *enp,
+	__in			efx_nvram_type_t type,
+	__in			unsigned int offset,
+	__out_bcount(size)	caddr_t data,
+	__in			size_t size)
+{
+	const efx_nvram_ops_t *envop = enp->en_envop;
+	uint32_t partn;
+	efx_rc_t rc;
+
+	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
+	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
+
+	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
+	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
+
+	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
+		goto fail1;
+
+	EFSYS_ASSERT3U(enp->en_nvram_partn_locked, ==, partn);
+
+	if ((rc = envop->envo_partn_read_backup(enp, partn, offset,
+		    data, size)) != 0)
+		goto fail2;
+
+	return (0);
+
+fail2:
+	EFSYS_PROBE(fail2);
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	return (rc);
+}
+
 	__checkReturn		efx_rc_t
 efx_nvram_erase(
 	__in			efx_nic_t *enp,
-- 
2.7.4

[PATCH 13/53] net/sfc/base: remove duplicate NVRAM asserts

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

The checking performed in the ->envo_type_to_partn
internal method make these assertions unnecessary.

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_nvram.c  |  1 +
 drivers/net/sfc/base/efx_nvram.c   | 27 ---------------------------
 drivers/net/sfc/base/siena_nvram.c |  1 +
 3 files changed, 2 insertions(+), 27 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index 68f14d5..5d7a66f 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -2207,6 +2207,7 @@ ef10_nvram_type_to_partn(
 	size_t parttbl_rows = 0;
 	unsigned int i;
 
+	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 	EFSYS_ASSERT(partnp != NULL);
 
diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index affe496..6bd7fc2 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -162,8 +162,6 @@ efx_nvram_size(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -196,8 +194,6 @@ efx_nvram_get_version(
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -228,9 +224,6 @@ efx_nvram_rw_start(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -266,9 +259,6 @@ efx_nvram_read_chunk(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -307,9 +297,6 @@ efx_nvram_read_backup(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -343,9 +330,6 @@ efx_nvram_erase(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -384,9 +368,6 @@ efx_nvram_write_chunk(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -419,9 +400,6 @@ efx_nvram_rw_finish(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -465,8 +443,6 @@ efx_nvram_set_version(
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
@@ -506,9 +482,6 @@ efx_nvram_validate(
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NVRAM);
 
-	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
-
-
 	if ((rc = envop->envo_type_to_partn(enp, type, &partn)) != 0)
 		goto fail1;
 
diff --git a/drivers/net/sfc/base/siena_nvram.c b/drivers/net/sfc/base/siena_nvram.c
index bb78ae0..33628c3 100644
--- a/drivers/net/sfc/base/siena_nvram.c
+++ b/drivers/net/sfc/base/siena_nvram.c
@@ -240,6 +240,7 @@ siena_nvram_type_to_partn(
 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 	unsigned int i;
 
+	EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 	EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 	EFSYS_ASSERT(partnp != NULL);
 
-- 
2.7.4

[PATCH 14/53] net/sfc/base: quieten get version methods

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_nvram.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/sfc/base/efx_nvram.c b/drivers/net/sfc/base/efx_nvram.c
index 6bd7fc2..edf1d7d 100644
--- a/drivers/net/sfc/base/efx_nvram.c
+++ b/drivers/net/sfc/base/efx_nvram.c
@@ -608,7 +608,7 @@ efx_mcdi_nvram_metadata(
 
 	MCDI_IN_SET_DWORD(req, NVRAM_METADATA_IN_TYPE, partn);
 
-	efx_mcdi_execute(enp, &req);
+	efx_mcdi_execute_quiet(enp, &req);
 
 	if (req.emr_rc != 0) {
 		rc = req.emr_rc;
-- 
2.7.4

[PATCH 15/53] net/sfc/base: fix PreFAST issues

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Fixes: 19b64c6ac35f ("net/sfc/base: import libefx base")
Cc: stable@dpdk.org

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx.h     | 12 ++++++------
 drivers/net/sfc/base/efx_phy.c |  2 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 834eea0..ca0f945 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -913,13 +913,13 @@ efx_phy_media_type_get(
 	__in		efx_nic_t *enp,
 	__out		efx_phy_media_type_t *typep);
 
-extern					efx_rc_t
+extern	__checkReturn		efx_rc_t
 efx_phy_module_get_info(
-	__in				efx_nic_t *enp,
-	__in				uint8_t dev_addr,
-	__in				uint8_t offset,
-	__in				uint8_t len,
-	__out_bcount(len)		uint8_t *data);
+	__in			efx_nic_t *enp,
+	__in			uint8_t dev_addr,
+	__in			uint8_t offset,
+	__in			uint8_t len,
+	__out_bcount(len)	uint8_t *data);
 
 #if EFSYS_OPT_PHY_STATS
 
diff --git a/drivers/net/sfc/base/efx_phy.c b/drivers/net/sfc/base/efx_phy.c
index 752cd52..c81a91c 100644
--- a/drivers/net/sfc/base/efx_phy.c
+++ b/drivers/net/sfc/base/efx_phy.c
@@ -296,7 +296,7 @@ efx_phy_media_type_get(
 		*typep = epp->ep_fixed_port_type;
 }
 
-	__checkReturn	efx_rc_t
+	__checkReturn		efx_rc_t
 efx_phy_module_get_info(
 	__in			efx_nic_t *enp,
 	__in			uint8_t dev_addr,
-- 
2.7.4

Re: [dpdk-stable] [PATCH 15/53] net/sfc/base: fix PreFAST issues

[Ferruh Yigit]

On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
> From: Andy Moreton <amoreton@solarflare.com>
> 

PREfast seems a static analysis tool. Can you please give more detail about
fixed issue itself. "fix PREfast issue" is not informative about what has been
fixed.

If you can send the details I can amend the commit.

Thanks,
ferruh

> Fixes: 19b64c6ac35f ("net/sfc/base: import libefx base")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Andy Moreton <amoreton@solarflare.com>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> ---
>  drivers/net/sfc/base/efx.h     | 12 ++++++------
>  drivers/net/sfc/base/efx_phy.c |  2 +-
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
> index 834eea0..ca0f945 100644
> --- a/drivers/net/sfc/base/efx.h
> +++ b/drivers/net/sfc/base/efx.h
> @@ -913,13 +913,13 @@ efx_phy_media_type_get(
>  	__in		efx_nic_t *enp,
>  	__out		efx_phy_media_type_t *typep);
>  
> -extern					efx_rc_t
> +extern	__checkReturn		efx_rc_t
>  efx_phy_module_get_info(
> -	__in				efx_nic_t *enp,
> -	__in				uint8_t dev_addr,
> -	__in				uint8_t offset,
> -	__in				uint8_t len,
> -	__out_bcount(len)		uint8_t *data);
> +	__in			efx_nic_t *enp,
> +	__in			uint8_t dev_addr,
> +	__in			uint8_t offset,
> +	__in			uint8_t len,
> +	__out_bcount(len)	uint8_t *data);
>  
>  #if EFSYS_OPT_PHY_STATS
>  
> diff --git a/drivers/net/sfc/base/efx_phy.c b/drivers/net/sfc/base/efx_phy.c
> index 752cd52..c81a91c 100644
> --- a/drivers/net/sfc/base/efx_phy.c
> +++ b/drivers/net/sfc/base/efx_phy.c
> @@ -296,7 +296,7 @@ efx_phy_media_type_get(
>  		*typep = epp->ep_fixed_port_type;
>  }
>  
> -	__checkReturn	efx_rc_t
> +	__checkReturn		efx_rc_t
>  efx_phy_module_get_info(
>  	__in			efx_nic_t *enp,
>  	__in			uint8_t dev_addr,
> 

Re: [dpdk-stable] [PATCH 15/53] net/sfc/base: fix PreFAST issues

[Andrew Rybchenko]

On 11/27/2017 10:58 PM, Ferruh Yigit wrote:
> On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
>> From: Andy Moreton <amoreton@solarflare.com>
>>
> PREfast seems a static analysis tool. Can you please give more detail about
> fixed issue itself. "fix PREfast issue" is not informative about what has been
> fixed.
>
> If you can send the details I can amend the commit.

Add missing annotation that function return value should not be
ignored. Fix alignment.

Thanks,
Andrew.

>
> Thanks,
> ferruh
>
>> Fixes: 19b64c6ac35f ("net/sfc/base: import libefx base")
>> Cc: stable@dpdk.org
>>
>> Signed-off-by: Andy Moreton <amoreton@solarflare.com>
>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
>> ---
>>   drivers/net/sfc/base/efx.h     | 12 ++++++------
>>   drivers/net/sfc/base/efx_phy.c |  2 +-
>>   2 files changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
>> index 834eea0..ca0f945 100644
>> --- a/drivers/net/sfc/base/efx.h
>> +++ b/drivers/net/sfc/base/efx.h
>> @@ -913,13 +913,13 @@ efx_phy_media_type_get(
>>   	__in		efx_nic_t *enp,
>>   	__out		efx_phy_media_type_t *typep);
>>   
>> -extern					efx_rc_t
>> +extern	__checkReturn		efx_rc_t
>>   efx_phy_module_get_info(
>> -	__in				efx_nic_t *enp,
>> -	__in				uint8_t dev_addr,
>> -	__in				uint8_t offset,
>> -	__in				uint8_t len,
>> -	__out_bcount(len)		uint8_t *data);
>> +	__in			efx_nic_t *enp,
>> +	__in			uint8_t dev_addr,
>> +	__in			uint8_t offset,
>> +	__in			uint8_t len,
>> +	__out_bcount(len)	uint8_t *data);
>>   
>>   #if EFSYS_OPT_PHY_STATS
>>   
>> diff --git a/drivers/net/sfc/base/efx_phy.c b/drivers/net/sfc/base/efx_phy.c
>> index 752cd52..c81a91c 100644
>> --- a/drivers/net/sfc/base/efx_phy.c
>> +++ b/drivers/net/sfc/base/efx_phy.c
>> @@ -296,7 +296,7 @@ efx_phy_media_type_get(
>>   		*typep = epp->ep_fixed_port_type;
>>   }
>>   
>> -	__checkReturn	efx_rc_t
>> +	__checkReturn		efx_rc_t
>>   efx_phy_module_get_info(
>>   	__in			efx_nic_t *enp,
>>   	__in			uint8_t dev_addr,
>>

[PATCH 16/53] net/sfc/base: add support for MUM/SUC firmware partitions

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_nvram.c | 1 +
 drivers/net/sfc/base/efx.h        | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index 5d7a66f..d0ee1be 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -2170,6 +2170,7 @@ static ef10_parttbl_entry_t medford_parttbl[] = {
 	PARTN_MAP_ENTRY(FPGA_BACKUP,		ALL,	FPGA_BACKUP),
 	PARTN_MAP_ENTRY(LICENSE,		ALL,	LICENSE),
 	PARTN_MAP_ENTRY(EXPANSION_UEFI,		ALL,	UEFIROM),
+	PARTN_MAP_ENTRY(MUM_FIRMWARE,		ALL,	MUM_FIRMWARE),
 };
 
 static	__checkReturn		efx_rc_t
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index ca0f945..f9d983d 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1381,6 +1381,7 @@ typedef enum efx_nvram_type_e {
 	EFX_NVRAM_DYNAMIC_CFG,
 	EFX_NVRAM_LICENSE,
 	EFX_NVRAM_UEFIROM,
+	EFX_NVRAM_MUM_FIRMWARE,
 	EFX_NVRAM_NTYPES,
 } efx_nvram_type_t;
 
-- 
2.7.4

[PATCH 17/53] net/sfc/base: improve PS credits push function name

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

Make it clear from the name that it pushes doorbell.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_impl.h |  4 ++--
 drivers/net/sfc/base/ef10_rx.c   |  4 ++--
 drivers/net/sfc/base/efx.h       |  2 +-
 drivers/net/sfc/base/efx_impl.h  |  2 +-
 drivers/net/sfc/base/efx_rx.c    | 12 ++++++------
 5 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 97922f3..d913c6c 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -695,8 +695,8 @@ ef10_tx_qpush(
 
 #if EFSYS_OPT_RX_PACKED_STREAM
 extern			void
-ef10_rx_qps_update_credits(
-	__in	efx_rxq_t *erp);
+ef10_rx_qpush_ps_credits(
+	__in		efx_rxq_t *erp);
 
 extern	__checkReturn	uint8_t *
 ef10_rx_qps_packet_info(
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 849f674..da1c645 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -779,8 +779,8 @@ ef10_rx_qpush(
 #if EFSYS_OPT_RX_PACKED_STREAM
 
 			void
-ef10_rx_qps_update_credits(
-	__in	efx_rxq_t *erp)
+ef10_rx_qpush_ps_credits(
+	__in		efx_rxq_t *erp)
 {
 	efx_nic_t *enp = erp->er_enp;
 	efx_dword_t dword;
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index f9d983d..bf1ed21 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2050,7 +2050,7 @@ efx_rx_qpush(
 #define	EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32
 
 extern			void
-efx_rx_qps_update_credits(
+efx_rx_qpush_ps_credits(
 	__in		efx_rxq_t *erp);
 
 extern	__checkReturn	uint8_t *
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 2be8b9c..1fd5c71 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -173,7 +173,7 @@ typedef struct efx_rx_ops_s {
 				      unsigned int);
 	void		(*erxo_qpush)(efx_rxq_t *, unsigned int, unsigned int *);
 #if EFSYS_OPT_RX_PACKED_STREAM
-	void		(*erxo_qps_update_credits)(efx_rxq_t *);
+	void		(*erxo_qpush_ps_credits)(efx_rxq_t *);
 	uint8_t *	(*erxo_qps_packet_info)(efx_rxq_t *, uint8_t *,
 						uint32_t, uint32_t,
 						uint16_t *, uint32_t *, uint32_t *);
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index 785365d..e1a9777 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -103,7 +103,7 @@ siena_rx_qpush(
 
 #if EFSYS_OPT_RX_PACKED_STREAM
 static		void
-siena_rx_qps_update_credits(
+siena_rx_qpush_ps_credits(
 	__in		efx_rxq_t *erp);
 
 static	__checkReturn	uint8_t *
@@ -163,7 +163,7 @@ static const efx_rx_ops_t __efx_rx_siena_ops = {
 	siena_rx_qpost,				/* erxo_qpost */
 	siena_rx_qpush,				/* erxo_qpush */
 #if EFSYS_OPT_RX_PACKED_STREAM
-	siena_rx_qps_update_credits,		/* erxo_qps_update_credits */
+	siena_rx_qpush_ps_credits,		/* erxo_qpush_ps_credits */
 	siena_rx_qps_packet_info,		/* erxo_qps_packet_info */
 #endif
 	siena_rx_qflush,			/* erxo_qflush */
@@ -192,7 +192,7 @@ static const efx_rx_ops_t __efx_rx_ef10_ops = {
 	ef10_rx_qpost,				/* erxo_qpost */
 	ef10_rx_qpush,				/* erxo_qpush */
 #if EFSYS_OPT_RX_PACKED_STREAM
-	ef10_rx_qps_update_credits,		/* erxo_qps_update_credits */
+	ef10_rx_qpush_ps_credits,		/* erxo_qpush_ps_credits */
 	ef10_rx_qps_packet_info,		/* erxo_qps_packet_info */
 #endif
 	ef10_rx_qflush,				/* erxo_qflush */
@@ -532,7 +532,7 @@ efx_rx_qpost(
 #if EFSYS_OPT_RX_PACKED_STREAM
 
 			void
-efx_rx_qps_update_credits(
+efx_rx_qpush_ps_credits(
 	__in		efx_rxq_t *erp)
 {
 	efx_nic_t *enp = erp->er_enp;
@@ -540,7 +540,7 @@ efx_rx_qps_update_credits(
 
 	EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 
-	erxop->erxo_qps_update_credits(erp);
+	erxop->erxo_qpush_ps_credits(erp);
 }
 
 	__checkReturn	uint8_t *
@@ -1235,7 +1235,7 @@ siena_rx_qpush(
 
 #if EFSYS_OPT_RX_PACKED_STREAM
 static		void
-siena_rx_qps_update_credits(
+siena_rx_qpush_ps_credits(
 	__in		efx_rxq_t *erp)
 {
 	/* Not supported by Siena hardware */
-- 
2.7.4

Re: [PATCH 17/53] net/sfc/base: improve PS credits push function name

[Ferruh Yigit]

On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
> From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

Since sign-off by is from @solarflare.com, I have updated author to:
"Andrew Rybchenko <arybchenko@solarflare.com>" for all patches that author and
sign-off is different, assuming both are you.

> Make it clear from the name that it pushes doorbell.
> 
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

<...>

Re: [PATCH 17/53] net/sfc/base: improve PS credits push function name

[Andrew Rybchenko]

On 11/27/2017 10:59 PM, Ferruh Yigit wrote:
> On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
>> From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>
> Since sign-off by is from @solarflare.com, I have updated author to:
> "Andrew Rybchenko <arybchenko@solarflare.com>" for all patches that author and
> sign-off is different, assuming both are you.

Thanks a lot.

>> Make it clear from the name that it pushes doorbell.
>>
>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> <...>

[PATCH 18/53] net/sfc/base: improve RxQ label init prototype

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

RxQ type provides more information which may be useful to
setup event queue appropriately.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_ev.c   | 4 +++-
 drivers/net/sfc/base/ef10_impl.h | 2 +-
 drivers/net/sfc/base/ef10_rx.c   | 2 +-
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index d9389da..eb9ec75 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -1336,9 +1336,11 @@ ef10_ev_rxlabel_init(
 	__in		efx_evq_t *eep,
 	__in		efx_rxq_t *erp,
 	__in		unsigned int label,
-	__in		boolean_t packed_stream)
+	__in		efx_rxq_type_t type)
 {
 	efx_evq_rxq_state_t *eersp;
+	boolean_t packed_stream = (type >= EFX_RXQ_TYPE_PACKED_STREAM_1M) &&
+	    (type <= EFX_RXQ_TYPE_PACKED_STREAM_64K);
 
 	EFSYS_ASSERT3U(label, <, EFX_ARRAY_SIZE(eep->ee_rxq_state));
 	eersp = &eep->ee_rxq_state[label];
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index d913c6c..ad33da3 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -117,7 +117,7 @@ ef10_ev_rxlabel_init(
 	__in		efx_evq_t *eep,
 	__in		efx_rxq_t *erp,
 	__in		unsigned int label,
-	__in		boolean_t packed_stream);
+	__in		efx_rxq_type_t type);
 
 		void
 ef10_ev_rxlabel_fini(
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index da1c645..53ea054 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -978,7 +978,7 @@ ef10_rx_qcreate(
 	erp->er_eep = eep;
 	erp->er_label = label;
 
-	ef10_ev_rxlabel_init(eep, erp, label, ps_buf_size != 0);
+	ef10_ev_rxlabel_init(eep, erp, label, type);
 
 	return (0);
 
-- 
2.7.4

[PATCH 19/53] net/sfc/base: add description of the PS packets layout

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_rx.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 53ea054..69ebc2d 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -804,6 +804,16 @@ ef10_rx_qpush_ps_credits(
 	rxq_state->eers_rx_packed_stream_credits = 0;
 }
 
+/*
+ * In accordance with SF-112241-TC the received data has the following layout:
+ *  - 8 byte pseudo-header which consist of:
+ *    - 4 byte little-endian timestamp
+ *    - 2 byte little-endian captured length in bytes
+ *    - 2 byte little-endian original packet length in bytes
+ *  - captured packet bytes
+ *  - optional padding to align to 64 bytes boundary
+ *  - 64 bytes scratch space for the host software
+ */
 	__checkReturn	uint8_t *
 ef10_rx_qps_packet_info(
 	__in		efx_rxq_t *erp,
-- 
2.7.4

[PATCH 20/53] net/sfc/base: clarify meaning of Rx desc lbits in PS mode

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

There is no point to add mask plus one before mask applying since it
still does not help to avoid overflow on subtract. Modulo mask
arithmetic works perfectly for unsigned integers of the same type.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_ev.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index eb9ec75..9ed22f8 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -774,7 +774,7 @@ ef10_ev_rx_packed_stream(
 	__in_opt	void *arg)
 {
 	uint32_t label;
-	uint32_t next_read_lbits;
+	uint32_t pkt_count_lbits;
 	uint16_t flags;
 	boolean_t should_abort;
 	efx_evq_rxq_state_t *eersp;
@@ -782,15 +782,22 @@ ef10_ev_rx_packed_stream(
 	unsigned int current_id;
 	boolean_t new_buffer;
 
-	next_read_lbits = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_DSC_PTR_LBITS);
+	pkt_count_lbits = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_DSC_PTR_LBITS);
 	label = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_QLABEL);
 	new_buffer = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_EV_ROTATE);
 
 	flags = 0;
 
 	eersp = &eep->ee_rxq_state[label];
-	pkt_count = (EFX_MASK32(ESF_DZ_RX_DSC_PTR_LBITS) + 1 +
-	    next_read_lbits - eersp->eers_rx_stream_npackets) &
+
+	/*
+	 * RX_DSC_PTR_LBITS has least significant bits of the global
+	 * (not per-buffer) packet counter. It is guaranteed that
+	 * maximum number of completed packets fits in lbits-mask.
+	 * So, modulo lbits-mask arithmetic should be used to calculate
+	 * packet counter increment.
+	 */
+	pkt_count = (pkt_count_lbits - eersp->eers_rx_stream_npackets) &
 	    EFX_MASK32(ESF_DZ_RX_DSC_PTR_LBITS);
 	eersp->eers_rx_stream_npackets += pkt_count;
 
-- 
2.7.4

[PATCH 21/53] net/sfc/base: optimize credits overflow check

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

Apply check against firmware maximum just before pushing.
However, it does not save from overflow inside firmware,
if firmware still have some credits.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_ev.c |  4 +---
 drivers/net/sfc/base/ef10_rx.c | 18 +++++++++++-------
 2 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index 9ed22f8..946efeb 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -803,9 +803,7 @@ ef10_ev_rx_packed_stream(
 
 	if (new_buffer) {
 		flags |= EFX_PKT_PACKED_STREAM_NEW_BUFFER;
-		if (eersp->eers_rx_packed_stream_credits <
-		    EFX_RX_PACKED_STREAM_MAX_CREDITS)
-			eersp->eers_rx_packed_stream_credits++;
+		eersp->eers_rx_packed_stream_credits++;
 		eersp->eers_rx_read_ptr++;
 	}
 	current_id = eersp->eers_rx_read_ptr & eersp->eers_rx_mask;
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 69ebc2d..6a301c1 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -786,18 +786,25 @@ ef10_rx_qpush_ps_credits(
 	efx_dword_t dword;
 	efx_evq_rxq_state_t *rxq_state =
 		&erp->er_eep->ee_rxq_state[erp->er_label];
+	uint32_t credits;
 
 	EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
 
 	if (rxq_state->eers_rx_packed_stream_credits == 0)
 		return;
 
+	/*
+	 * It is a bug if we think that FW has utilized more
+	 * credits than it is allowed to have (maximum). However,
+	 * make sure that we do not credit more than maximum anyway.
+	 */
+	credits = MIN(rxq_state->eers_rx_packed_stream_credits,
+	    EFX_RX_PACKED_STREAM_MAX_CREDITS);
 	EFX_POPULATE_DWORD_3(dword,
 	    ERF_DZ_RX_DESC_MAGIC_DOORBELL, 1,
 	    ERF_DZ_RX_DESC_MAGIC_CMD,
 	    ERE_DZ_RX_DESC_MAGIC_CMD_PS_CREDITS,
-	    ERF_DZ_RX_DESC_MAGIC_DATA,
-	    rxq_state->eers_rx_packed_stream_credits);
+	    ERF_DZ_RX_DESC_MAGIC_DATA, credits);
 	EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
 	    erp->er_index, &dword, B_FALSE);
 
@@ -849,11 +856,8 @@ ef10_rx_qps_packet_info(
 	EFSYS_ASSERT3U(current_offset + *lengthp, <, *next_offsetp);
 
 	if ((*next_offsetp ^ current_offset) &
-	    EFX_RX_PACKED_STREAM_MEM_PER_CREDIT) {
-		if (rxq_state->eers_rx_packed_stream_credits <
-		    EFX_RX_PACKED_STREAM_MAX_CREDITS)
-			rxq_state->eers_rx_packed_stream_credits++;
-	}
+	    EFX_RX_PACKED_STREAM_MEM_PER_CREDIT)
+		rxq_state->eers_rx_packed_stream_credits++;
 
 	return (pkt_start);
 }
-- 
2.7.4

[PATCH 22/53] net/sfc/base: provide simple access to RxQ state in EvQ

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

Packed stream Rx datapath requires access to packed stream state
stored in event queue. Number of credits is upstead in event handler
on a new buffer, packets parsing on 64k boundary crossing and
Rx doorbell push to give credits back.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_rx.c  | 8 ++++----
 drivers/net/sfc/base/efx_impl.h | 1 +
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 6a301c1..534a06e 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -784,8 +784,7 @@ ef10_rx_qpush_ps_credits(
 {
 	efx_nic_t *enp = erp->er_enp;
 	efx_dword_t dword;
-	efx_evq_rxq_state_t *rxq_state =
-		&erp->er_eep->ee_rxq_state[erp->er_label];
+	efx_evq_rxq_state_t *rxq_state = erp->er_ev_qstate;
 	uint32_t credits;
 
 	EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
@@ -834,8 +833,7 @@ ef10_rx_qps_packet_info(
 	uint16_t buf_len;
 	uint8_t *pkt_start;
 	efx_qword_t *qwordp;
-	efx_evq_rxq_state_t *rxq_state =
-		&erp->er_eep->ee_rxq_state[erp->er_label];
+	efx_evq_rxq_state_t *rxq_state = erp->er_ev_qstate;
 
 	EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
 
@@ -994,6 +992,8 @@ ef10_rx_qcreate(
 
 	ef10_ev_rxlabel_init(eep, erp, label, type);
 
+	erp->er_ev_qstate = &erp->er_eep->ee_rxq_state[label];
+
 	return (0);
 
 fail6:
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 1fd5c71..dabb65d 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -761,6 +761,7 @@ struct efx_rxq_s {
 	unsigned int			er_label;
 	unsigned int			er_mask;
 	efsys_mem_t			*er_esmp;
+	efx_evq_rxq_state_t		*er_ev_qstate;
 };
 
 #define	EFX_RXQ_MAGIC	0x15022005
-- 
2.7.4

[PATCH 23/53] net/sfc/base: enforce packed stream fake buffer size

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

In the case of packed stream real size of the buffer does not fit in
Rx descriptor byte count. Real size is specified on Rx queue setup.
Non-zero fake should be used to bypass hardware checks.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_rx.c | 17 +++++++++++++++++
 drivers/net/sfc/base/efx.h     |  6 ------
 2 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 534a06e..4c74d1f 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -707,6 +707,14 @@ ef10_rx_prefix_hash(
 }
 #endif /* EFSYS_OPT_RX_SCALE */
 
+#if EFSYS_OPT_RX_PACKED_STREAM
+/*
+ * Fake length for RXQ descriptors in packed stream mode
+ * to make hardware happy
+ */
+#define	EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32
+#endif
+
 			void
 ef10_rx_qpost(
 	__in		efx_rxq_t *erp,
@@ -721,6 +729,15 @@ ef10_rx_qpost(
 	unsigned int offset;
 	unsigned int id;
 
+#if EFSYS_OPT_RX_PACKED_STREAM
+	/*
+	 * Real size of the buffer does not fit into ESF_DZ_RX_KER_BYTE_CNT
+	 * and equal to 0 after applying mask. Hardware does not like it.
+	 */
+	if (erp->er_ev_qstate->eers_rx_packed_stream)
+		size = EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE;
+#endif
+
 	/* The client driver must not overfill the queue */
 	EFSYS_ASSERT3U(added - completed + n, <=,
 	    EFX_RXQ_LIMIT(erp->er_mask + 1));
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index bf1ed21..bf17aba 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2043,12 +2043,6 @@ efx_rx_qpush(
 
 #if EFSYS_OPT_RX_PACKED_STREAM
 
-/*
- * Fake length for RXQ descriptors in packed stream mode
- * to make hardware happy
- */
-#define	EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32
-
 extern			void
 efx_rx_qpush_ps_credits(
 	__in		efx_rxq_t *erp);
-- 
2.7.4

[PATCH 24/53] net/sfc/base: more accurately calculate number of PS credits

[Andrew Rybchenko]

From: Andrew Rybchenko <Andrew.Rybchenko@oktetlabs.ru>

Maximum number of packets per 64k buffer should be rounded up
when calculating number of credits by event queue size.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_ev.c | 2 +-
 drivers/net/sfc/base/efx.h     | 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index 946efeb..2c6edf3 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -1370,7 +1370,7 @@ ef10_ev_rxlabel_init(
 	eersp->eers_rx_packed_stream = packed_stream;
 	if (packed_stream) {
 		eersp->eers_rx_packed_stream_credits = (eep->ee_mask + 1) /
-		    (EFX_RX_PACKED_STREAM_MEM_PER_CREDIT /
+		    EFX_DIV_ROUND_UP(EFX_RX_PACKED_STREAM_MEM_PER_CREDIT,
 		    EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE);
 		EFSYS_ASSERT3U(eersp->eers_rx_packed_stream_credits, !=, 0);
 		/*
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index bf17aba..d7ce0b5 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -48,6 +48,9 @@ extern "C" {
 #define	EFX_FIELD_OFFSET(_type, _field)		\
 	((size_t) &(((_type *)0)->_field))
 
+/* The macro expands divider twice */
+#define	EFX_DIV_ROUND_UP(_n, _d)		(((_n) + (_d) - 1) / (_d))
+
 /* Return codes */
 
 typedef __success(return == 0) int efx_rc_t;
-- 
2.7.4

[PATCH 25/53] net/sfc/base: make MAC naming consistent with other modules

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_mac.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/sfc/base/efx_mac.c b/drivers/net/sfc/base/efx_mac.c
index 752e720..e33d54a 100644
--- a/drivers/net/sfc/base/efx_mac.c
+++ b/drivers/net/sfc/base/efx_mac.c
@@ -40,7 +40,7 @@ siena_mac_multicast_list_set(
 #endif /* EFSYS_OPT_SIENA */
 
 #if EFSYS_OPT_SIENA
-static const efx_mac_ops_t	__efx_siena_mac_ops = {
+static const efx_mac_ops_t	__efx_mac_siena_ops = {
 	siena_mac_poll,				/* emo_poll */
 	siena_mac_up,				/* emo_up */
 	siena_mac_reconfigure,			/* emo_addr_set */
@@ -64,7 +64,7 @@ static const efx_mac_ops_t	__efx_siena_mac_ops = {
 #endif	/* EFSYS_OPT_SIENA */
 
 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
-static const efx_mac_ops_t	__efx_ef10_mac_ops = {
+static const efx_mac_ops_t	__efx_mac_ef10_ops = {
 	ef10_mac_poll,				/* emo_poll */
 	ef10_mac_up,				/* emo_up */
 	ef10_mac_addr_set,			/* emo_addr_set */
@@ -840,21 +840,21 @@ efx_mac_select(
 	switch (enp->en_family) {
 #if EFSYS_OPT_SIENA
 	case EFX_FAMILY_SIENA:
-		emop = &__efx_siena_mac_ops;
+		emop = &__efx_mac_siena_ops;
 		type = EFX_MAC_SIENA;
 		break;
 #endif /* EFSYS_OPT_SIENA */
 
 #if EFSYS_OPT_HUNTINGTON
 	case EFX_FAMILY_HUNTINGTON:
-		emop = &__efx_ef10_mac_ops;
+		emop = &__efx_mac_ef10_ops;
 		type = EFX_MAC_HUNTINGTON;
 		break;
 #endif /* EFSYS_OPT_HUNTINGTON */
 
 #if EFSYS_OPT_MEDFORD
 	case EFX_FAMILY_MEDFORD:
-		emop = &__efx_ef10_mac_ops;
+		emop = &__efx_mac_ef10_ops;
 		type = EFX_MAC_MEDFORD;
 		break;
 #endif /* EFSYS_OPT_MEDFORD */
-- 
2.7.4

[PATCH 26/53] net/sfc/base: support inner checksum offload on transmit

[Andrew Rybchenko]

Inner checksum offloads may be used only if firmware supports
these tunnels.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_tx.c | 27 +++++++++++++++++++++++----
 drivers/net/sfc/base/efx.h     |  8 +++++---
 drivers/net/sfc/base/efx_tx.c  |  9 +++++++++
 3 files changed, 37 insertions(+), 7 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index 2666943..a708b8f 100644
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -84,12 +84,16 @@ efx_mcdi_init_txq(
 	MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_LABEL, label);
 	MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_INSTANCE, instance);
 
-	MCDI_IN_POPULATE_DWORD_7(req, INIT_TXQ_IN_FLAGS,
+	MCDI_IN_POPULATE_DWORD_9(req, INIT_TXQ_IN_FLAGS,
 	    INIT_TXQ_IN_FLAG_BUFF_MODE, 0,
 	    INIT_TXQ_IN_FLAG_IP_CSUM_DIS,
 	    (flags & EFX_TXQ_CKSUM_IPV4) ? 0 : 1,
 	    INIT_TXQ_IN_FLAG_TCP_CSUM_DIS,
 	    (flags & EFX_TXQ_CKSUM_TCPUDP) ? 0 : 1,
+	    INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN,
+	    (flags & EFX_TXQ_CKSUM_INNER_IPV4) ? 1 : 0,
+	    INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN,
+	    (flags & EFX_TXQ_CKSUM_INNER_TCPUDP) ? 1 : 0,
 	    INIT_TXQ_EXT_IN_FLAG_TSOV2_EN, (flags & EFX_TXQ_FATSOV2) ? 1 : 0,
 	    INIT_TXQ_IN_FLAG_TCP_UDP_ONLY, 0,
 	    INIT_TXQ_IN_CRC_MODE, 0,
@@ -194,14 +198,23 @@ ef10_tx_qcreate(
 	__in		efx_txq_t *etp,
 	__out		unsigned int *addedp)
 {
+	efx_nic_cfg_t *encp = &enp->en_nic_cfg;
+	uint16_t inner_csum;
 	efx_qword_t desc;
 	efx_rc_t rc;
 
 	_NOTE(ARGUNUSED(id))
 
+	inner_csum = EFX_TXQ_CKSUM_INNER_IPV4 | EFX_TXQ_CKSUM_INNER_TCPUDP;
+	if (((flags & inner_csum) != 0) &&
+	    (encp->enc_tunnel_encapsulations_supported == 0)) {
+		rc = EINVAL;
+		goto fail1;
+	}
+
 	if ((rc = efx_mcdi_init_txq(enp, n, eep->ee_index, label, index, flags,
 	    esmp)) != 0)
-		goto fail1;
+		goto fail2;
 
 	/*
 	 * A previous user of this TX queue may have written a descriptor to the
@@ -212,19 +225,25 @@ ef10_tx_qcreate(
 	 * a no-op TX option descriptor. See bug29981 for details.
 	 */
 	*addedp = 1;
-	EFX_POPULATE_QWORD_4(desc,
+	EFX_POPULATE_QWORD_6(desc,
 	    ESF_DZ_TX_DESC_IS_OPT, 1,
 	    ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_CRC_CSUM,
 	    ESF_DZ_TX_OPTION_UDP_TCP_CSUM,
 	    (flags & EFX_TXQ_CKSUM_TCPUDP) ? 1 : 0,
 	    ESF_DZ_TX_OPTION_IP_CSUM,
-	    (flags & EFX_TXQ_CKSUM_IPV4) ? 1 : 0);
+	    (flags & EFX_TXQ_CKSUM_IPV4) ? 1 : 0,
+	    ESF_DZ_TX_OPTION_INNER_UDP_TCP_CSUM,
+	    (flags & EFX_TXQ_CKSUM_INNER_TCPUDP) ? 1 : 0,
+	    ESF_DZ_TX_OPTION_INNER_IP_CSUM,
+	    (flags & EFX_TXQ_CKSUM_INNER_IPV4) ? 1 : 0);
 
 	EFSYS_MEM_WRITEQ(etp->et_esmp, 0, &desc);
 	ef10_tx_qpush(etp, *addedp, 0);
 
 	return (0);
 
+fail2:
+	EFSYS_PROBE(fail2);
 fail1:
 	EFSYS_PROBE1(fail1, efx_rc_t, rc);
 
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index d7ce0b5..d867da6 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2107,9 +2107,11 @@ efx_tx_fini(
 
 #define	EFX_TXQ_MAX_BUFS 8 /* Maximum independent of EFX_BUG35388_WORKAROUND. */
 
-#define	EFX_TXQ_CKSUM_IPV4	0x0001
-#define	EFX_TXQ_CKSUM_TCPUDP	0x0002
-#define	EFX_TXQ_FATSOV2		0x0004
+#define	EFX_TXQ_CKSUM_IPV4		0x0001
+#define	EFX_TXQ_CKSUM_TCPUDP		0x0002
+#define	EFX_TXQ_FATSOV2			0x0004
+#define	EFX_TXQ_CKSUM_INNER_IPV4	0x0008
+#define	EFX_TXQ_CKSUM_INNER_TCPUDP	0x0010
 
 extern	__checkReturn	efx_rc_t
 efx_tx_qcreate(
diff --git a/drivers/net/sfc/base/efx_tx.c b/drivers/net/sfc/base/efx_tx.c
index ceb2920..8044a09 100644
--- a/drivers/net/sfc/base/efx_tx.c
+++ b/drivers/net/sfc/base/efx_tx.c
@@ -899,6 +899,7 @@ siena_tx_qcreate(
 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 	efx_oword_t oword;
 	uint32_t size;
+	uint16_t inner_csum;
 	efx_rc_t rc;
 
 	_NOTE(ARGUNUSED(esmp))
@@ -928,6 +929,12 @@ siena_tx_qcreate(
 		goto fail3;
 	}
 
+	inner_csum = EFX_TXQ_CKSUM_INNER_IPV4 | EFX_TXQ_CKSUM_INNER_TCPUDP;
+	if ((flags & inner_csum) != 0) {
+		rc = EINVAL;
+		goto fail4;
+	}
+
 	/* Set up the new descriptor queue */
 	*addedp = 0;
 
@@ -950,6 +957,8 @@ siena_tx_qcreate(
 
 	return (0);
 
+fail4:
+	EFSYS_PROBE(fail4);
 fail3:
 	EFSYS_PROBE(fail3);
 fail2:
-- 
2.7.4

[PATCH 27/53] net/sfc/base: use MCDIv2 for requests with too long response

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

Use MCDIv2 for requests with a response size too long for MCDIv1.

Required for MC_CMD_MAC_STATS to reports the stats without using DMA.

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_mcdi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/sfc/base/efx_mcdi.c b/drivers/net/sfc/base/efx_mcdi.c
index c61b943..888a47b 100644
--- a/drivers/net/sfc/base/efx_mcdi.c
+++ b/drivers/net/sfc/base/efx_mcdi.c
@@ -290,7 +290,8 @@ efx_mcdi_request_start(
 	 */
 	if ((max_version >= 2) &&
 	    ((emrp->emr_cmd > MC_CMD_CMD_SPACE_ESCAPE_7) ||
-	    (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
+	    (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1) ||
+	    (emrp->emr_out_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
 		/* Construct MCDI v2 header */
 		hdr_len = sizeof (hdr);
 		EFX_POPULATE_DWORD_8(hdr[0],
-- 
2.7.4

[PATCH 28/53] net/sfc/base: ignore error in completion event on MCDIv2 HW

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

With MCDIv2, the reponse length can be to big to fit into the
CMDDONE_DATALEN field in the MCDI completion event. But rather that
the length being truncated, it can overflow into the CMDDONE_ERRNO
field (this is a longstanding firmware bug). Hence the CMDDONE_ERRNO
field may not be valid.

It isn't necessary to use the value in the CMDDONE_ERRNO field though,
so it can be ignored. The actual error code is already read from the
response header on MCDIv2 capable hardware and stored in emr_rc, so
that can be used instead.

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_mcdi.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/sfc/base/efx_mcdi.c b/drivers/net/sfc/base/efx_mcdi.c
index 888a47b..936ad25 100644
--- a/drivers/net/sfc/base/efx_mcdi.c
+++ b/drivers/net/sfc/base/efx_mcdi.c
@@ -793,9 +793,8 @@ efx_mcdi_ev_cpl(
 			emrp->emr_rc = 0;
 		}
 	}
-	if (errcode == 0) {
+	if (emrp->emr_rc == 0)
 		efx_mcdi_finish_response(enp, emrp);
-	}
 
 	emtp->emt_ev_cpl(emtp->emt_context);
 }
-- 
2.7.4

[PATCH 29/53] net/sfc/base: request info about outer frame in Rx events

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

For encapsulated packets, the firmware gives info about the inner frame
fields by default. When not using encapsulation offload, ask for info
about the outer frame instead.

Unless bug69842 is fixed, a driver reload will be needed, at least
on some platforms, when switching from full-featured to low-latency
firmware (though users are unlikely to hit that).

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_rx.c | 26 ++++++++++++++++++++++++--
 1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 4c74d1f..5ede728 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -46,6 +46,7 @@ efx_mcdi_init_rxq(
 	__in		boolean_t disable_scatter,
 	__in		uint32_t ps_bufsize)
 {
+	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 	efx_mcdi_req_t req;
 	uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
 			    MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
@@ -55,6 +56,7 @@ efx_mcdi_init_rxq(
 	uint64_t addr;
 	efx_rc_t rc;
 	uint32_t dma_mode;
+	boolean_t want_outer_classes;
 
 	/* If this changes, then the payload size might need to change. */
 	EFSYS_ASSERT3U(MC_CMD_INIT_RXQ_OUT_LEN, ==, 0);
@@ -65,6 +67,25 @@ efx_mcdi_init_rxq(
 	else
 		dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
 
+	if (encp->enc_tunnel_encapsulations_supported != 0) {
+		/*
+		 * WANT_OUTER_CLASSES can only be specified on hardware which
+		 * supports tunnel encapsulation offloads, even though it is
+		 * effectively the behaviour the hardware gives.
+		 *
+		 * Also, on hardware which does support such offloads, older
+		 * firmware rejects the flag if the offloads are not supported
+		 * by the current firmware variant, which means this may fail if
+		 * the capabilities are not updated when the firmware variant
+		 * changes. This is not an issue on newer firmware, as it was
+		 * changed in bug 69842 (v6.4.2.1007) to permit this flag to be
+		 * specified on all firmware variants.
+		 */
+		want_outer_classes = B_TRUE;
+	} else {
+		want_outer_classes = B_FALSE;
+	}
+
 	(void) memset(payload, 0, sizeof (payload));
 	req.emr_cmd = MC_CMD_INIT_RXQ;
 	req.emr_in_buf = payload;
@@ -76,7 +97,7 @@ efx_mcdi_init_rxq(
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
-	MCDI_IN_POPULATE_DWORD_8(req, INIT_RXQ_EXT_IN_FLAGS,
+	MCDI_IN_POPULATE_DWORD_9(req, INIT_RXQ_EXT_IN_FLAGS,
 	    INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
 	    INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
 	    INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
@@ -85,7 +106,8 @@ efx_mcdi_init_rxq(
 	    INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
 	    INIT_RXQ_EXT_IN_DMA_MODE,
 	    dma_mode,
-	    INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize);
+	    INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize,
+	    INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes);
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
 
-- 
2.7.4

Re: [PATCH 29/53] net/sfc/base: request info about outer frame in Rx events

[Ferruh Yigit]

On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
> From: Mark Spender <mspender@solarflare.com>
> 
> For encapsulated packets, the firmware gives info about the inner frame
> fields by default. When not using encapsulation offload, ask for info
> about the outer frame instead.
> 
> Unless bug69842 is fixed, a driver reload will be needed, at least

I guess this is your internal bug tracking id, this is not very useful in commit
log since we don't have access to it.

Leaving it as it is, but it would be more useful to describe defect here instead
of referring to its id.

> on some platforms, when switching from full-featured to low-latency
> firmware (though users are unlikely to hit that).
> 
> Signed-off-by: Mark Spender <mspender@solarflare.com>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

<...>

Re: [PATCH 29/53] net/sfc/base: request info about outer frame in Rx events

[Andrew Rybchenko]

On 11/27/2017 10:57 PM, Ferruh Yigit wrote:
> On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
>> From: Mark Spender <mspender@solarflare.com>
>>
>> For encapsulated packets, the firmware gives info about the inner frame
>> fields by default. When not using encapsulation offload, ask for info
>> about the outer frame instead.
>>
>> Unless bug69842 is fixed, a driver reload will be needed, at least
> I guess this is your internal bug tracking id, this is not very useful in commit
> log since we don't have access to it.
>
> Leaving it as it is, but it would be more useful to describe defect here instead
> of referring to its id.
>

Let's rephrase the paragraph in the following way:

On SFN8xxx with firmware version before v6.4.2.1007 driver reload is needed
after switching from full-feature to low-latency firmware variant since 
the driver
still thinks that firmware supports encapsulation, but firmware does not
tolerate request to provide info about outer frame in Rx events.

>> on some platforms, when switching from full-featured to low-latency
>> firmware (though users are unlikely to hit that).
>>
>> Signed-off-by: Mark Spender <mspender@solarflare.com>
>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> <...>
>

[PATCH 30/53] net/sfc/base: remove assertion on no longer used define

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

MC_CMD_INIT_RXQ_OUT_LEN is not used any more.

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_rx.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 5ede728..2942d03 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -58,8 +58,6 @@ efx_mcdi_init_rxq(
 	uint32_t dma_mode;
 	boolean_t want_outer_classes;
 
-	/* If this changes, then the payload size might need to change. */
-	EFSYS_ASSERT3U(MC_CMD_INIT_RXQ_OUT_LEN, ==, 0);
 	EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS);
 
 	if (ps_bufsize > 0)
-- 
2.7.4

[PATCH 31/53] net/sfc/base: improve names for EVQ descriptor counts

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_ev.c   | 10 ++++++----
 drivers/net/sfc/base/ef10_impl.h |  2 +-
 drivers/net/sfc/base/efx.h       |  2 +-
 drivers/net/sfc/base/efx_ev.c    | 15 ++++++++-------
 4 files changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index 2c6edf3..e3a91c2 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -463,7 +463,7 @@ ef10_ev_qcreate(
 	__in		efx_nic_t *enp,
 	__in		unsigned int index,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint32_t us,
 	__in		uint32_t flags,
@@ -477,7 +477,8 @@ ef10_ev_qcreate(
 	EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
 	EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
 
-	if (!ISP2(n) || (n < EFX_EVQ_MINNEVS) || (n > EFX_EVQ_MAXNEVS)) {
+	if (!ISP2(ndescs) ||
+	    (ndescs < EFX_EVQ_MINNEVS) || (ndescs > EFX_EVQ_MAXNEVS)) {
 		rc = EINVAL;
 		goto fail1;
 	}
@@ -526,7 +527,8 @@ ef10_ev_qcreate(
 		 * it will choose the best settings for low latency, otherwise
 		 * it will choose the best settings for throughput.
 		 */
-		rc = efx_mcdi_init_evq_v2(enp, index, esmp, n, irq, us, flags);
+		rc = efx_mcdi_init_evq_v2(enp, index, esmp, ndescs, irq, us,
+		    flags);
 		if (rc != 0)
 			goto fail4;
 	} else {
@@ -542,7 +544,7 @@ ef10_ev_qcreate(
 		 * to choose it.)
 		 */
 		boolean_t low_latency = encp->enc_datapath_cap_evb ? 0 : 1;
-		rc = efx_mcdi_init_evq(enp, index, esmp, n, irq, us, flags,
+		rc = efx_mcdi_init_evq(enp, index, esmp, ndescs, irq, us, flags,
 		    low_latency);
 		if (rc != 0)
 			goto fail5;
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index ad33da3..8adde95 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -80,7 +80,7 @@ ef10_ev_qcreate(
 	__in		efx_nic_t *enp,
 	__in		unsigned int index,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint32_t us,
 	__in		uint32_t flags,
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index d867da6..14d870a 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1634,7 +1634,7 @@ efx_ev_qcreate(
 	__in		efx_nic_t *enp,
 	__in		unsigned int index,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint32_t us,
 	__in		uint32_t flags,
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index 42ded5a..e7f49d7 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -65,7 +65,7 @@ siena_ev_qcreate(
 	__in		efx_nic_t *enp,
 	__in		unsigned int index,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint32_t us,
 	__in		uint32_t flags,
@@ -216,7 +216,7 @@ efx_ev_qcreate(
 	__in		efx_nic_t *enp,
 	__in		unsigned int index,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint32_t us,
 	__in		uint32_t flags,
@@ -256,7 +256,7 @@ efx_ev_qcreate(
 	eep->ee_magic = EFX_EVQ_MAGIC;
 	eep->ee_enp = enp;
 	eep->ee_index = index;
-	eep->ee_mask = n - 1;
+	eep->ee_mask = ndescs - 1;
 	eep->ee_flags = flags;
 	eep->ee_esmp = esmp;
 
@@ -271,7 +271,7 @@ efx_ev_qcreate(
 	enp->en_ev_qcount++;
 	*eepp = eep;
 
-	if ((rc = eevop->eevo_qcreate(enp, index, esmp, n, id, us, flags,
+	if ((rc = eevop->eevo_qcreate(enp, index, esmp, ndescs, id, us, flags,
 	    eep)) != 0)
 		goto fail4;
 
@@ -1281,7 +1281,7 @@ siena_ev_qcreate(
 	__in		efx_nic_t *enp,
 	__in		unsigned int index,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint32_t us,
 	__in		uint32_t flags,
@@ -1298,7 +1298,8 @@ siena_ev_qcreate(
 	EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
 	EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
 
-	if (!ISP2(n) || (n < EFX_EVQ_MINNEVS) || (n > EFX_EVQ_MAXNEVS)) {
+	if (!ISP2(ndescs) ||
+	    (ndescs < EFX_EVQ_MINNEVS) || (ndescs > EFX_EVQ_MAXNEVS)) {
 		rc = EINVAL;
 		goto fail1;
 	}
@@ -1315,7 +1316,7 @@ siena_ev_qcreate(
 #endif
 	for (size = 0; (1 << size) <= (EFX_EVQ_MAXNEVS / EFX_EVQ_MINNEVS);
 	    size++)
-		if ((1 << size) == (int)(n / EFX_EVQ_MINNEVS))
+		if ((1 << size) == (int)(ndescs / EFX_EVQ_MINNEVS))
 			break;
 	if (id + (1 << size) >= encp->enc_buftbl_limit) {
 		rc = EINVAL;
-- 
2.7.4

[PATCH 32/53] net/sfc/base: improve names for RXQ descriptor counts

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_impl.h | 16 +++++-----
 drivers/net/sfc/base/ef10_rx.c   | 33 +++++++++++----------
 drivers/net/sfc/base/efx.h       | 16 +++++-----
 drivers/net/sfc/base/efx_rx.c    | 63 ++++++++++++++++++++--------------------
 4 files changed, 65 insertions(+), 63 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 8adde95..deaadcb 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -954,14 +954,14 @@ ef10_rx_prefix_pktlen(
 	__in		uint8_t *buffer,
 	__out		uint16_t *lengthp);
 
-extern			void
+extern				void
 ef10_rx_qpost(
-	__in		efx_rxq_t *erp,
-	__in_ecount(n)	efsys_dma_addr_t *addrp,
-	__in		size_t size,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__in		unsigned int added);
+	__in			efx_rxq_t *erp,
+	__in_ecount(ndescs)	efsys_dma_addr_t *addrp,
+	__in			size_t size,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__in			unsigned int added);
 
 extern			void
 ef10_rx_qpush(
@@ -984,7 +984,7 @@ ef10_rx_qcreate(
 	__in		unsigned int label,
 	__in		efx_rxq_type_t type,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		efx_evq_t *eep,
 	__in		efx_rxq_t *erp);
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 2942d03..cebc34f 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -38,7 +38,7 @@
 static	__checkReturn	efx_rc_t
 efx_mcdi_init_rxq(
 	__in		efx_nic_t *enp,
-	__in		uint32_t size,
+	__in		uint32_t ndescs,
 	__in		uint32_t target_evq,
 	__in		uint32_t label,
 	__in		uint32_t instance,
@@ -50,7 +50,7 @@ efx_mcdi_init_rxq(
 	efx_mcdi_req_t req;
 	uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
 			    MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
-	int npages = EFX_RXQ_NBUFS(size);
+	int npages = EFX_RXQ_NBUFS(ndescs);
 	int i;
 	efx_qword_t *dma_addr;
 	uint64_t addr;
@@ -58,7 +58,7 @@ efx_mcdi_init_rxq(
 	uint32_t dma_mode;
 	boolean_t want_outer_classes;
 
-	EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS);
+	EFSYS_ASSERT3U(ndescs, <=, EFX_RXQ_MAXNDESCS);
 
 	if (ps_bufsize > 0)
 		dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
@@ -91,7 +91,7 @@ efx_mcdi_init_rxq(
 	req.emr_out_buf = payload;
 	req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
 
-	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, size);
+	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
 	MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
@@ -735,14 +735,14 @@ ef10_rx_prefix_hash(
 #define	EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32
 #endif
 
-			void
+				void
 ef10_rx_qpost(
-	__in		efx_rxq_t *erp,
-	__in_ecount(n)	efsys_dma_addr_t *addrp,
-	__in		size_t size,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__in		unsigned int added)
+	__in			efx_rxq_t *erp,
+	__in_ecount(ndescs)	efsys_dma_addr_t *addrp,
+	__in			size_t size,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__in			unsigned int added)
 {
 	efx_qword_t qword;
 	unsigned int i;
@@ -759,11 +759,11 @@ ef10_rx_qpost(
 #endif
 
 	/* The client driver must not overfill the queue */
-	EFSYS_ASSERT3U(added - completed + n, <=,
+	EFSYS_ASSERT3U(added - completed + ndescs, <=,
 	    EFX_RXQ_LIMIT(erp->er_mask + 1));
 
 	id = added & (erp->er_mask);
-	for (i = 0; i < n; i++) {
+	for (i = 0; i < ndescs; i++) {
 		EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
 		    unsigned int, id, efsys_dma_addr_t, addrp[i],
 		    size_t, size);
@@ -941,7 +941,7 @@ ef10_rx_qcreate(
 	__in		unsigned int label,
 	__in		efx_rxq_type_t type,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		efx_evq_t *eep,
 	__in		efx_rxq_t *erp)
@@ -960,7 +960,8 @@ ef10_rx_qcreate(
 	EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
 	EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
 
-	if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
+	if (!ISP2(ndescs) ||
+	    (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
 		rc = EINVAL;
 		goto fail1;
 	}
@@ -1020,7 +1021,7 @@ ef10_rx_qcreate(
 	else
 		disable_scatter = encp->enc_rx_disable_scatter_supported;
 
-	if ((rc = efx_mcdi_init_rxq(enp, n, eep->ee_index, label, index,
+	if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep->ee_index, label, index,
 		    esmp, disable_scatter, ps_buf_size)) != 0)
 		goto fail6;
 
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 14d870a..5b3682c 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2014,7 +2014,7 @@ efx_rx_qcreate(
 	__in		unsigned int label,
 	__in		efx_rxq_type_t type,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		efx_evq_t *eep,
 	__deref_out	efx_rxq_t **erpp);
@@ -2029,14 +2029,14 @@ typedef struct efx_desc_s {
 	efx_qword_t ed_eq;
 } efx_desc_t;
 
-extern			void
+extern				void
 efx_rx_qpost(
-	__in		efx_rxq_t *erp,
-	__in_ecount(n)	efsys_dma_addr_t *addrp,
-	__in		size_t size,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__in		unsigned int added);
+	__in			efx_rxq_t *erp,
+	__in_ecount(ndescs)	efsys_dma_addr_t *addrp,
+	__in			size_t size,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__in			unsigned int added);
 
 extern		void
 efx_rx_qpush(
diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index e1a9777..1a3b6a5 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -86,14 +86,14 @@ siena_rx_prefix_pktlen(
 	__in		uint8_t *buffer,
 	__out		uint16_t *lengthp);
 
-static			void
+static				void
 siena_rx_qpost(
-	__in		efx_rxq_t *erp,
-	__in_ecount(n)	efsys_dma_addr_t *addrp,
-	__in		size_t size,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__in		unsigned int added);
+	__in			efx_rxq_t *erp,
+	__in_ecount(ndescs)	efsys_dma_addr_t *addrp,
+	__in			size_t size,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__in			unsigned int added);
 
 static			void
 siena_rx_qpush(
@@ -132,7 +132,7 @@ siena_rx_qcreate(
 	__in		unsigned int label,
 	__in		efx_rxq_type_t type,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		efx_evq_t *eep,
 	__in		efx_rxq_t *erp);
@@ -512,21 +512,21 @@ efx_rx_scale_tbl_set(
 }
 #endif	/* EFSYS_OPT_RX_SCALE */
 
-			void
+				void
 efx_rx_qpost(
-	__in		efx_rxq_t *erp,
-	__in_ecount(n)	efsys_dma_addr_t *addrp,
-	__in		size_t size,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__in		unsigned int added)
+	__in			efx_rxq_t *erp,
+	__in_ecount(ndescs)	efsys_dma_addr_t *addrp,
+	__in			size_t size,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__in			unsigned int added)
 {
 	efx_nic_t *enp = erp->er_enp;
 	const efx_rx_ops_t *erxop = enp->en_erxop;
 
 	EFSYS_ASSERT3U(erp->er_magic, ==, EFX_RXQ_MAGIC);
 
-	erxop->erxo_qpost(erp, addrp, size, n, completed, added);
+	erxop->erxo_qpost(erp, addrp, size, ndescs, completed, added);
 }
 
 #if EFSYS_OPT_RX_PACKED_STREAM
@@ -617,7 +617,7 @@ efx_rx_qcreate(
 	__in		unsigned int label,
 	__in		efx_rxq_type_t type,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		efx_evq_t *eep,
 	__deref_out	efx_rxq_t **erpp)
@@ -640,10 +640,10 @@ efx_rx_qcreate(
 	erp->er_magic = EFX_RXQ_MAGIC;
 	erp->er_enp = enp;
 	erp->er_index = index;
-	erp->er_mask = n - 1;
+	erp->er_mask = ndescs - 1;
 	erp->er_esmp = esmp;
 
-	if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, n, id,
+	if ((rc = erxop->erxo_qcreate(enp, index, label, type, esmp, ndescs, id,
 	    eep, erp)) != 0)
 		goto fail2;
 
@@ -1163,14 +1163,14 @@ siena_rx_prefix_pktlen(
 }
 
 
-static			void
+static				void
 siena_rx_qpost(
-	__in		efx_rxq_t *erp,
-	__in_ecount(n)	efsys_dma_addr_t *addrp,
-	__in		size_t size,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__in		unsigned int added)
+	__in			efx_rxq_t *erp,
+	__in_ecount(ndescs)	efsys_dma_addr_t *addrp,
+	__in			size_t size,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__in			unsigned int added)
 {
 	efx_qword_t qword;
 	unsigned int i;
@@ -1178,11 +1178,11 @@ siena_rx_qpost(
 	unsigned int id;
 
 	/* The client driver must not overfill the queue */
-	EFSYS_ASSERT3U(added - completed + n, <=,
+	EFSYS_ASSERT3U(added - completed + ndescs, <=,
 	    EFX_RXQ_LIMIT(erp->er_mask + 1));
 
 	id = added & (erp->er_mask);
-	for (i = 0; i < n; i++) {
+	for (i = 0; i < ndescs; i++) {
 		EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
 		    unsigned int, id, efsys_dma_addr_t, addrp[i],
 		    size_t, size);
@@ -1304,7 +1304,7 @@ siena_rx_qcreate(
 	__in		unsigned int label,
 	__in		efx_rxq_type_t type,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		efx_evq_t *eep,
 	__in		efx_rxq_t *erp)
@@ -1325,7 +1325,8 @@ siena_rx_qcreate(
 	EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
 	EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
 
-	if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
+	if (!ISP2(ndescs) ||
+	    (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
 		rc = EINVAL;
 		goto fail1;
 	}
@@ -1335,7 +1336,7 @@ siena_rx_qcreate(
 	}
 	for (size = 0; (1 << size) <= (EFX_RXQ_MAXNDESCS / EFX_RXQ_MINNDESCS);
 	    size++)
-		if ((1 << size) == (int)(n / EFX_RXQ_MINNDESCS))
+		if ((1 << size) == (int)(ndescs / EFX_RXQ_MINNDESCS))
 			break;
 	if (id + (1 << size) >= encp->enc_buftbl_limit) {
 		rc = EINVAL;
-- 
2.7.4

[PATCH 33/53] net/sfc/base: improve names for TXQ descriptor counts

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_impl.h |  14 +++---
 drivers/net/sfc/base/ef10_tx.c   |  46 +++++++++---------
 drivers/net/sfc/base/efx.h       |  12 ++---
 drivers/net/sfc/base/efx_tx.c    | 102 +++++++++++++++++++--------------------
 4 files changed, 87 insertions(+), 87 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index deaadcb..1d3296f 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -668,7 +668,7 @@ ef10_tx_qcreate(
 	__in		unsigned int index,
 	__in		unsigned int label,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint16_t flags,
 	__in		efx_evq_t *eep,
@@ -679,13 +679,13 @@ extern		void
 ef10_tx_qdestroy(
 	__in		efx_txq_t *etp);
 
-extern	__checkReturn	efx_rc_t
+extern	__checkReturn		efx_rc_t
 ef10_tx_qpost(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_buffer_t *eb,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp);
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_buffer_t *ebp,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp);
 
 extern			void
 ef10_tx_qpush(
diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index a708b8f..14b23d0 100644
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -47,7 +47,7 @@
 static	__checkReturn	efx_rc_t
 efx_mcdi_init_txq(
 	__in		efx_nic_t *enp,
-	__in		uint32_t size,
+	__in		uint32_t ndescs,
 	__in		uint32_t target_evq,
 	__in		uint32_t label,
 	__in		uint32_t instance,
@@ -66,7 +66,7 @@ efx_mcdi_init_txq(
 	EFSYS_ASSERT(EFX_TXQ_MAX_BUFS >=
 	    EFX_TXQ_NBUFS(enp->en_nic_cfg.enc_txq_max_ndescs));
 
-	npages = EFX_TXQ_NBUFS(size);
+	npages = EFX_TXQ_NBUFS(ndescs);
 	if (MC_CMD_INIT_TXQ_IN_LEN(npages) > sizeof (payload)) {
 		rc = EINVAL;
 		goto fail1;
@@ -79,7 +79,7 @@ efx_mcdi_init_txq(
 	req.emr_out_buf = payload;
 	req.emr_out_length = MC_CMD_INIT_TXQ_OUT_LEN;
 
-	MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_SIZE, size);
+	MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_SIZE, ndescs);
 	MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_TARGET_EVQ, target_evq);
 	MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_LABEL, label);
 	MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_INSTANCE, instance);
@@ -191,7 +191,7 @@ ef10_tx_qcreate(
 	__in		unsigned int index,
 	__in		unsigned int label,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint16_t flags,
 	__in		efx_evq_t *eep,
@@ -212,8 +212,8 @@ ef10_tx_qcreate(
 		goto fail1;
 	}
 
-	if ((rc = efx_mcdi_init_txq(enp, n, eep->ee_index, label, index, flags,
-	    esmp)) != 0)
+	if ((rc = efx_mcdi_init_txq(enp, ndescs, eep->ee_index, label, index,
+	    flags, esmp)) != 0)
 		goto fail2;
 
 	/*
@@ -433,24 +433,24 @@ ef10_tx_qpio_post(
 	return (rc);
 }
 
-	__checkReturn	efx_rc_t
+	__checkReturn		efx_rc_t
 ef10_tx_qpost(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_buffer_t *eb,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp)
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_buffer_t *eb,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp)
 {
 	unsigned int added = *addedp;
 	unsigned int i;
 	efx_rc_t rc;
 
-	if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
+	if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
 		rc = ENOSPC;
 		goto fail1;
 	}
 
-	for (i = 0; i < n; i++) {
+	for (i = 0; i < ndescs; i++) {
 		efx_buffer_t *ebp = &eb[i];
 		efsys_dma_addr_t addr = ebp->eb_addr;
 		size_t size = ebp->eb_size;
@@ -556,24 +556,24 @@ ef10_tx_qpush(
 	}
 }
 
-	__checkReturn	efx_rc_t
+	__checkReturn		efx_rc_t
 ef10_tx_qdesc_post(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_desc_t *ed,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp)
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_desc_t *ed,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp)
 {
 	unsigned int added = *addedp;
 	unsigned int i;
 	efx_rc_t rc;
 
-	if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
+	if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
 		rc = ENOSPC;
 		goto fail1;
 	}
 
-	for (i = 0; i < n; i++) {
+	for (i = 0; i < ndescs; i++) {
 		efx_desc_t *edp = &ed[i];
 		unsigned int id;
 		size_t offset;
@@ -585,7 +585,7 @@ ef10_tx_qdesc_post(
 	}
 
 	EFSYS_PROBE3(tx_desc_post, unsigned int, etp->et_index,
-		    unsigned int, added, unsigned int, n);
+		    unsigned int, added, unsigned int, ndescs);
 
 	EFX_TX_QSTAT_INCR(etp, TX_POST);
 
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 5b3682c..399d172 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2126,13 +2126,13 @@ efx_tx_qcreate(
 	__deref_out	efx_txq_t **etpp,
 	__out		unsigned int *addedp);
 
-extern	__checkReturn	efx_rc_t
+extern	__checkReturn		efx_rc_t
 efx_tx_qpost(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_buffer_t *eb,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp);
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_buffer_t *eb,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp);
 
 extern	__checkReturn	efx_rc_t
 efx_tx_qpace(
diff --git a/drivers/net/sfc/base/efx_tx.c b/drivers/net/sfc/base/efx_tx.c
index 8044a09..a68babc 100644
--- a/drivers/net/sfc/base/efx_tx.c
+++ b/drivers/net/sfc/base/efx_tx.c
@@ -57,7 +57,7 @@ siena_tx_qcreate(
 	__in		unsigned int index,
 	__in		unsigned int label,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint16_t flags,
 	__in		efx_evq_t *eep,
@@ -68,13 +68,13 @@ static		void
 siena_tx_qdestroy(
 	__in	efx_txq_t *etp);
 
-static	__checkReturn	efx_rc_t
+static	__checkReturn		efx_rc_t
 siena_tx_qpost(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_buffer_t *eb,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp);
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_buffer_t *eb,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp);
 
 static			void
 siena_tx_qpush(
@@ -95,13 +95,13 @@ static			void
 siena_tx_qenable(
 	__in	efx_txq_t *etp);
 
-	__checkReturn	efx_rc_t
+	__checkReturn		efx_rc_t
 siena_tx_qdesc_post(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_desc_t *ed,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp);
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_desc_t *ed,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp);
 
 	void
 siena_tx_qdesc_dma_create(
@@ -290,7 +290,7 @@ efx_tx_qcreate(
 	__in		unsigned int index,
 	__in		unsigned int label,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint16_t flags,
 	__in		efx_evq_t *eep,
@@ -318,14 +318,14 @@ efx_tx_qcreate(
 	etp->et_magic = EFX_TXQ_MAGIC;
 	etp->et_enp = enp;
 	etp->et_index = index;
-	etp->et_mask = n - 1;
+	etp->et_mask = ndescs - 1;
 	etp->et_esmp = esmp;
 
 	/* Initial descriptor index may be modified by etxo_qcreate */
 	*addedp = 0;
 
 	if ((rc = etxop->etxo_qcreate(enp, index, label, esmp,
-	    n, id, flags, eep, etp, addedp)) != 0)
+	    ndescs, id, flags, eep, etp, addedp)) != 0)
 		goto fail2;
 
 	enp->en_tx_qcount++;
@@ -359,13 +359,13 @@ efx_tx_qdestroy(
 	EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_txq_t), etp);
 }
 
-	__checkReturn	efx_rc_t
+	__checkReturn		efx_rc_t
 efx_tx_qpost(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_buffer_t *eb,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp)
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_buffer_t *eb,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp)
 {
 	efx_nic_t *enp = etp->et_enp;
 	const efx_tx_ops_t *etxop = enp->en_etxop;
@@ -373,8 +373,7 @@ efx_tx_qpost(
 
 	EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC);
 
-	if ((rc = etxop->etxo_qpost(etp, eb,
-	    n, completed, addedp)) != 0)
+	if ((rc = etxop->etxo_qpost(etp, eb, ndescs, completed, addedp)) != 0)
 		goto fail1;
 
 	return (0);
@@ -550,13 +549,13 @@ efx_tx_qpio_post(
 	return (rc);
 }
 
-	__checkReturn	efx_rc_t
+	__checkReturn		efx_rc_t
 efx_tx_qdesc_post(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_desc_t *ed,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp)
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_desc_t *ed,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp)
 {
 	efx_nic_t *enp = etp->et_enp;
 	const efx_tx_ops_t *etxop = enp->en_etxop;
@@ -565,7 +564,7 @@ efx_tx_qdesc_post(
 	EFSYS_ASSERT3U(etp->et_magic, ==, EFX_TXQ_MAGIC);
 
 	if ((rc = etxop->etxo_qdesc_post(etp, ed,
-	    n, completed, addedp)) != 0)
+	    ndescs, completed, addedp)) != 0)
 		goto fail1;
 
 	return (0);
@@ -724,22 +723,22 @@ siena_tx_init(
 		_NOTE(CONSTANTCONDITION)				\
 	} while (B_FALSE)
 
-static	__checkReturn	efx_rc_t
+static	__checkReturn		efx_rc_t
 siena_tx_qpost(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_buffer_t *eb,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp)
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_buffer_t *eb,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp)
 {
 	unsigned int added = *addedp;
 	unsigned int i;
 	int rc = ENOSPC;
 
-	if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1))
+	if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1))
 		goto fail1;
 
-	for (i = 0; i < n; i++) {
+	for (i = 0; i < ndescs; i++) {
 		efx_buffer_t *ebp = &eb[i];
 		efsys_dma_addr_t start = ebp->eb_addr;
 		size_t size = ebp->eb_size;
@@ -889,7 +888,7 @@ siena_tx_qcreate(
 	__in		unsigned int index,
 	__in		unsigned int label,
 	__in		efsys_mem_t *esmp,
-	__in		size_t n,
+	__in		size_t ndescs,
 	__in		uint32_t id,
 	__in		uint16_t flags,
 	__in		efx_evq_t *eep,
@@ -911,7 +910,8 @@ siena_tx_qcreate(
 	EFSYS_ASSERT(ISP2(encp->enc_txq_max_ndescs));
 	EFX_STATIC_ASSERT(ISP2(EFX_TXQ_MINNDESCS));
 
-	if (!ISP2(n) || (n < EFX_TXQ_MINNDESCS) || (n > EFX_EVQ_MAXNEVS)) {
+	if (!ISP2(ndescs) ||
+	    (ndescs < EFX_TXQ_MINNDESCS) || (ndescs > EFX_EVQ_MAXNEVS)) {
 		rc = EINVAL;
 		goto fail1;
 	}
@@ -922,7 +922,7 @@ siena_tx_qcreate(
 	for (size = 0;
 	    (1 << size) <= (int)(encp->enc_txq_max_ndescs / EFX_TXQ_MINNDESCS);
 	    size++)
-		if ((1 << size) == (int)(n / EFX_TXQ_MINNDESCS))
+		if ((1 << size) == (int)(ndescs / EFX_TXQ_MINNDESCS))
 			break;
 	if (id + (1 << size) >= encp->enc_buftbl_limit) {
 		rc = EINVAL;
@@ -969,24 +969,24 @@ siena_tx_qcreate(
 	return (rc);
 }
 
-	__checkReturn	efx_rc_t
+	__checkReturn		efx_rc_t
 siena_tx_qdesc_post(
-	__in		efx_txq_t *etp,
-	__in_ecount(n)	efx_desc_t *ed,
-	__in		unsigned int n,
-	__in		unsigned int completed,
-	__inout		unsigned int *addedp)
+	__in			efx_txq_t *etp,
+	__in_ecount(ndescs)	efx_desc_t *ed,
+	__in			unsigned int ndescs,
+	__in			unsigned int completed,
+	__inout			unsigned int *addedp)
 {
 	unsigned int added = *addedp;
 	unsigned int i;
 	efx_rc_t rc;
 
-	if (added - completed + n > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
+	if (added - completed + ndescs > EFX_TXQ_LIMIT(etp->et_mask + 1)) {
 		rc = ENOSPC;
 		goto fail1;
 	}
 
-	for (i = 0; i < n; i++) {
+	for (i = 0; i < ndescs; i++) {
 		efx_desc_t *edp = &ed[i];
 		unsigned int id;
 		size_t offset;
@@ -998,7 +998,7 @@ siena_tx_qdesc_post(
 	}
 
 	EFSYS_PROBE3(tx_desc_post, unsigned int, etp->et_index,
-		    unsigned int, added, unsigned int, n);
+		    unsigned int, added, unsigned int, ndescs);
 
 	EFX_TX_QSTAT_INCR(etp, TX_POST);
 
-- 
2.7.4

[PATCH 34/53] net/sfc/base: fix build issue with PHY LED control enabled

[Andrew Rybchenko]

From: Vijay Srivastava <vijays@solarflare.com>

Fixed build issue with the EFSYS_OPT_PHY_LED_CONTROL for Huntigton and
Medford.

Fixes: b1d06c75e32c ("net/sfc/base: import PHY LEDs control")
Fixes: 0a7864349106 ("net/sfc/base: import PHY statistics")
Cc: stable@dpdk.org

Signed-off-by: Vijay Srivastava <vijays@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_phy.c  | 2 ++
 drivers/net/sfc/base/efx_check.h | 4 ++--
 drivers/net/sfc/base/siena_nic.c | 2 ++
 drivers/net/sfc/base/siena_phy.c | 2 ++
 4 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_phy.c b/drivers/net/sfc/base/ef10_phy.c
index 81309f2..ad40d51 100644
--- a/drivers/net/sfc/base/ef10_phy.c
+++ b/drivers/net/sfc/base/ef10_phy.c
@@ -280,7 +280,9 @@ ef10_phy_reconfigure(
 	uint8_t payload[MAX(MC_CMD_SET_LINK_IN_LEN,
 			    MC_CMD_SET_LINK_OUT_LEN)];
 	uint32_t cap_mask;
+#if EFSYS_OPT_PHY_LED_CONTROL
 	unsigned int led_mode;
+#endif
 	unsigned int speed;
 	boolean_t supported;
 	efx_rc_t rc;
diff --git a/drivers/net/sfc/base/efx_check.h b/drivers/net/sfc/base/efx_check.h
index c8548c0..4ed7148 100644
--- a/drivers/net/sfc/base/efx_check.h
+++ b/drivers/net/sfc/base/efx_check.h
@@ -224,8 +224,8 @@
 
 #if EFSYS_OPT_PHY_LED_CONTROL
 /* Support for PHY LED control */
-# if !EFSYS_OPT_SIENA
-#  error "PHY_LED_CONTROL requires SIENA"
+# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
+#  error "PHY_LED_CONTROL requires SIENA or HUNTINGTON or MEDFORD"
 # endif
 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
 
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index d574b24..5216cc6 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -190,7 +190,9 @@ static	__checkReturn	efx_rc_t
 siena_phy_cfg(
 	__in		efx_nic_t *enp)
 {
+#if EFSYS_OPT_PHY_STATS
 	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
+#endif	/* EFSYS_OPT_PHY_STATS */
 	efx_rc_t rc;
 
 	/* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */
diff --git a/drivers/net/sfc/base/siena_phy.c b/drivers/net/sfc/base/siena_phy.c
index b90ccab..b1bd69f 100644
--- a/drivers/net/sfc/base/siena_phy.c
+++ b/drivers/net/sfc/base/siena_phy.c
@@ -273,7 +273,9 @@ siena_phy_reconfigure(
 			    MAX(MC_CMD_SET_LINK_IN_LEN,
 				MC_CMD_SET_LINK_OUT_LEN))];
 	uint32_t cap_mask;
+#if EFSYS_OPT_PHY_LED_CONTROL
 	unsigned int led_mode;
+#endif
 	unsigned int speed;
 	efx_rc_t rc;
 
-- 
2.7.4

Re: [dpdk-stable] [PATCH 34/53] net/sfc/base: fix build issue with PHY LED control enabled

[Ferruh Yigit]

On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
> From: Vijay Srivastava <vijays@solarflare.com>
> 
> Fixed build issue with the EFSYS_OPT_PHY_LED_CONTROL for Huntigton and
> Medford.
> 
> Fixes: b1d06c75e32c ("net/sfc/base: import PHY LEDs control")
> Fixes: 0a7864349106 ("net/sfc/base: import PHY statistics")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Vijay Srivastava <vijays@solarflare.com>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>

Welcome Vijay!

[PATCH 35/53] net/sfc/base: move Siena-specific defs to right header

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx.h        | 1 -
 drivers/net/sfc/base/efx_impl.h   | 7 +------
 drivers/net/sfc/base/siena_impl.h | 9 +++++++++
 3 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 399d172..df1594e 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2103,7 +2103,6 @@ efx_tx_fini(
 #define	EFX_TXQ_SIZE(_ndescs)		((_ndescs) * sizeof (efx_qword_t))
 #define	EFX_TXQ_NBUFS(_ndescs)		(EFX_TXQ_SIZE(_ndescs) / EFX_BUF_SIZE)
 #define	EFX_TXQ_LIMIT(_ndescs)		((_ndescs) - 16)
-#define	EFX_TXQ_DC_NDESCS(_dcsize)	(8 << _dcsize)
 
 #define	EFX_TXQ_MAX_BUFS 8 /* Maximum independent of EFX_BUG35388_WORKAROUND. */
 
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index dabb65d..c15608b 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -358,12 +358,7 @@ typedef struct efx_nic_ops_s {
 #ifndef EFX_RXQ_LIMIT_TARGET
 #define	EFX_RXQ_LIMIT_TARGET 512
 #endif
-#ifndef EFX_TXQ_DC_SIZE
-#define	EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
-#endif
-#ifndef EFX_RXQ_DC_SIZE
-#define	EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
-#endif
+
 
 #if EFSYS_OPT_FILTER
 
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 15019f8..654baa5 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -40,8 +40,17 @@
 extern "C" {
 #endif
 
+#ifndef EFX_TXQ_DC_SIZE
+#define	EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
+#endif
+#ifndef EFX_RXQ_DC_SIZE
+#define	EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
+#endif
+#define	EFX_TXQ_DC_NDESCS(_dcsize)	(8 << (_dcsize))
+
 #define	SIENA_NVRAM_CHUNK 0x80
 
+
 extern	__checkReturn	efx_rc_t
 siena_nic_probe(
 	__in		efx_nic_t *enp);
-- 
2.7.4

[PATCH 36/53] net/sfc/base: run mkconfig.py to add a new sensors

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx.h     | 4 +++-
 drivers/net/sfc/base/efx_mon.c | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index df1594e..b809819 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -627,7 +627,7 @@ efx_mon_init(
 #define	EFX_MON_STATS_PAGE_SIZE 0x100
 #define	EFX_MON_MASK_ELEMENT_SIZE 32
 
-/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 5d4ee5185e419abe */
+/* START MKCONFIG GENERATED MonitorHeaderStatsBlock aa0233c80156308e */
 typedef enum efx_mon_stat_e {
 	EFX_MON_STAT_2_5V,
 	EFX_MON_STAT_VCCP1,
@@ -706,6 +706,8 @@ typedef enum efx_mon_stat_e {
 	EFX_MON_STAT_CONTROLLER_TDIODE_TEMP,
 	EFX_MON_STAT_BOARD_FRONT_TEMP,
 	EFX_MON_STAT_BOARD_BACK_TEMP,
+	EFX_MON_STAT_I1V8,
+	EFX_MON_STAT_I2V5,
 	EFX_MON_NSTATS
 } efx_mon_stat_t;
 
diff --git a/drivers/net/sfc/base/efx_mon.c b/drivers/net/sfc/base/efx_mon.c
index c2f1e97..6074760 100644
--- a/drivers/net/sfc/base/efx_mon.c
+++ b/drivers/net/sfc/base/efx_mon.c
@@ -123,7 +123,7 @@ efx_mon_init(
 
 #if EFSYS_OPT_NAMES
 
-/* START MKCONFIG GENERATED MonitorStatNamesBlock 5daa2a5725ba734b */
+/* START MKCONFIG GENERATED MonitorStatNamesBlock d92af1538001301f */
 static const char * const __mon_stat_name[] = {
 	"value_2_5v",
 	"value_vccp1",
@@ -202,6 +202,8 @@ static const char * const __mon_stat_name[] = {
 	"controller_tdiode_temp",
 	"board_front_temp",
 	"board_back_temp",
+	"i1v8",
+	"i2v5",
 };
 
 /* END MKCONFIG GENERATED MonitorStatNamesBlock */
-- 
2.7.4

Re: [PATCH 36/53] net/sfc/base: run mkconfig.py to add a new sensors

[Ferruh Yigit]

On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
> From: Andy Moreton <amoreton@solarflare.com>

We don't know what mkconfig.py is and most probably not interested in :) This
looks like your internal detail, more interesting is the effect of this change,
like "add new sensors".

btw, just out of curiosity, what sensors are they?

> 
> Signed-off-by: Andy Moreton <amoreton@solarflare.com>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> ---
>  drivers/net/sfc/base/efx.h     | 4 +++-
>  drivers/net/sfc/base/efx_mon.c | 4 +++-
>  2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
> index df1594e..b809819 100644
> --- a/drivers/net/sfc/base/efx.h
> +++ b/drivers/net/sfc/base/efx.h
> @@ -627,7 +627,7 @@ efx_mon_init(
>  #define	EFX_MON_STATS_PAGE_SIZE 0x100
>  #define	EFX_MON_MASK_ELEMENT_SIZE 32
>  
> -/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 5d4ee5185e419abe */
> +/* START MKCONFIG GENERATED MonitorHeaderStatsBlock aa0233c80156308e */
>  typedef enum efx_mon_stat_e {
>  	EFX_MON_STAT_2_5V,
>  	EFX_MON_STAT_VCCP1,
> @@ -706,6 +706,8 @@ typedef enum efx_mon_stat_e {
>  	EFX_MON_STAT_CONTROLLER_TDIODE_TEMP,
>  	EFX_MON_STAT_BOARD_FRONT_TEMP,
>  	EFX_MON_STAT_BOARD_BACK_TEMP,
> +	EFX_MON_STAT_I1V8,
> +	EFX_MON_STAT_I2V5,
>  	EFX_MON_NSTATS
>  } efx_mon_stat_t;
>  
> diff --git a/drivers/net/sfc/base/efx_mon.c b/drivers/net/sfc/base/efx_mon.c
> index c2f1e97..6074760 100644
> --- a/drivers/net/sfc/base/efx_mon.c
> +++ b/drivers/net/sfc/base/efx_mon.c
> @@ -123,7 +123,7 @@ efx_mon_init(
>  
>  #if EFSYS_OPT_NAMES
>  
> -/* START MKCONFIG GENERATED MonitorStatNamesBlock 5daa2a5725ba734b */
> +/* START MKCONFIG GENERATED MonitorStatNamesBlock d92af1538001301f */
>  static const char * const __mon_stat_name[] = {
>  	"value_2_5v",
>  	"value_vccp1",
> @@ -202,6 +202,8 @@ static const char * const __mon_stat_name[] = {
>  	"controller_tdiode_temp",
>  	"board_front_temp",
>  	"board_back_temp",
> +	"i1v8",
> +	"i2v5",
>  };
>  
>  /* END MKCONFIG GENERATED MonitorStatNamesBlock */
> 

Re: [PATCH 36/53] net/sfc/base: run mkconfig.py to add a new sensors

[Andrew Rybchenko]

On 11/27/2017 10:58 PM, Ferruh Yigit wrote:
> On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
>> From: Andy Moreton <amoreton@solarflare.com>
> We don't know what mkconfig.py is and most probably not interested in :) This
> looks like your internal detail, more interesting is the effect of this change,
> like "add new sensors".

Yes. I'll adjust similar patches in the future.

> btw, just out of curiosity, what sensors are they?

It is current (mA) sensors for 1.8 V and 2.5 V power supplies used on
some boards.

Andrew.

>> Signed-off-by: Andy Moreton <amoreton@solarflare.com>
>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
>> ---
>>   drivers/net/sfc/base/efx.h     | 4 +++-
>>   drivers/net/sfc/base/efx_mon.c | 4 +++-
>>   2 files changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
>> index df1594e..b809819 100644
>> --- a/drivers/net/sfc/base/efx.h
>> +++ b/drivers/net/sfc/base/efx.h
>> @@ -627,7 +627,7 @@ efx_mon_init(
>>   #define	EFX_MON_STATS_PAGE_SIZE 0x100
>>   #define	EFX_MON_MASK_ELEMENT_SIZE 32
>>   
>> -/* START MKCONFIG GENERATED MonitorHeaderStatsBlock 5d4ee5185e419abe */
>> +/* START MKCONFIG GENERATED MonitorHeaderStatsBlock aa0233c80156308e */
>>   typedef enum efx_mon_stat_e {
>>   	EFX_MON_STAT_2_5V,
>>   	EFX_MON_STAT_VCCP1,
>> @@ -706,6 +706,8 @@ typedef enum efx_mon_stat_e {
>>   	EFX_MON_STAT_CONTROLLER_TDIODE_TEMP,
>>   	EFX_MON_STAT_BOARD_FRONT_TEMP,
>>   	EFX_MON_STAT_BOARD_BACK_TEMP,
>> +	EFX_MON_STAT_I1V8,
>> +	EFX_MON_STAT_I2V5,
>>   	EFX_MON_NSTATS
>>   } efx_mon_stat_t;
>>   
>> diff --git a/drivers/net/sfc/base/efx_mon.c b/drivers/net/sfc/base/efx_mon.c
>> index c2f1e97..6074760 100644
>> --- a/drivers/net/sfc/base/efx_mon.c
>> +++ b/drivers/net/sfc/base/efx_mon.c
>> @@ -123,7 +123,7 @@ efx_mon_init(
>>   
>>   #if EFSYS_OPT_NAMES
>>   
>> -/* START MKCONFIG GENERATED MonitorStatNamesBlock 5daa2a5725ba734b */
>> +/* START MKCONFIG GENERATED MonitorStatNamesBlock d92af1538001301f */
>>   static const char * const __mon_stat_name[] = {
>>   	"value_2_5v",
>>   	"value_vccp1",
>> @@ -202,6 +202,8 @@ static const char * const __mon_stat_name[] = {
>>   	"controller_tdiode_temp",
>>   	"board_front_temp",
>>   	"board_back_temp",
>> +	"i1v8",
>> +	"i2v5",
>>   };
>>   
>>   /* END MKCONFIG GENERATED MonitorStatNamesBlock */
>>

[PATCH 37/53] net/sfc/base: add support for new sensors

[Andrew Rybchenko]

From: Andrew Jackson <ajackson@solarflare.com>

Signed-off-by: Andrew Jackson <ajackson@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/mcdi_mon.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/sfc/base/mcdi_mon.c b/drivers/net/sfc/base/mcdi_mon.c
index c5360c3..a083eac 100644
--- a/drivers/net/sfc/base/mcdi_mon.c
+++ b/drivers/net/sfc/base/mcdi_mon.c
@@ -157,6 +157,8 @@ static const struct mcdi_sensor_map_s {
 	STAT(Px, CONTROLLER_TDIODE_TEMP), /* 0x4e CONTROLLER_TDIODE_TEMP */
 	STAT(Px, BOARD_FRONT_TEMP),	/* 0x4f BOARD_FRONT_TEMP */
 	STAT(Px, BOARD_BACK_TEMP),	/* 0x50 BOARD_BACK_TEMP */
+	STAT(Px, I1V8),			/* 0x51 IN_I1V8 */
+	STAT(Px, I2V5),			/* 0x52 IN_I2V5 */
 };
 
 #define	MCDI_STATIC_SENSOR_ASSERT(_field)				\
-- 
2.7.4

[PATCH 38/53] net/sfc/base: remove unused defined for WPTR alignment

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

MEDFORD_RX_WPTR_ALIGN is not used.

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/medford_impl.h | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/net/sfc/base/medford_impl.h b/drivers/net/sfc/base/medford_impl.h
index de2f5cf..18d065a 100644
--- a/drivers/net/sfc/base/medford_impl.h
+++ b/drivers/net/sfc/base/medford_impl.h
@@ -35,14 +35,6 @@
 extern "C" {
 #endif
 
-/* Alignment requirement for value written to RX WPTR:
- *  the WPTR must be aligned to an 8 descriptor boundary
- *
- * FIXME: Is this the same on Medford as Huntington?
- */
-#define	MEDFORD_RX_WPTR_ALIGN	8
-
-
 
 #ifndef	ER_EZ_TX_PIOBUF_SIZE
 #define	ER_EZ_TX_PIOBUF_SIZE	4096
-- 
2.7.4

[PATCH 39/53] net/sfc/base: cstyle fixes

[Andrew Rybchenko]

From: Andy Moreton <amoreton@solarflare.com>

Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_filter.c |   8 +-
 drivers/net/sfc/base/ef10_impl.h   |  36 +++----
 drivers/net/sfc/base/efx.h         |  49 +++++-----
 drivers/net/sfc/base/efx_impl.h    |   3 +-
 drivers/net/sfc/base/efx_lic.c     | 186 +++++++++++++++----------------------
 drivers/net/sfc/base/efx_mcdi.h    |   2 +-
 drivers/net/sfc/base/efx_nic.c     |   9 +-
 drivers/net/sfc/base/efx_types.h   |   3 +-
 drivers/net/sfc/base/medford_nic.c |   3 +-
 9 files changed, 126 insertions(+), 173 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_filter.c b/drivers/net/sfc/base/ef10_filter.c
index e1faf1d..2dd823b 100644
--- a/drivers/net/sfc/base/ef10_filter.c
+++ b/drivers/net/sfc/base/ef10_filter.c
@@ -1243,8 +1243,8 @@ typedef struct ef10_filter_encap_entry_s {
 	uint32_t		inner_frame_match;
 } ef10_filter_encap_entry_t;
 
-#define EF10_ENCAP_FILTER_ENTRY(ipv, encap_type, inner_frame_match)	\
-	{ EFX_ETHER_TYPE_##ipv, EFX_TUNNEL_PROTOCOL_##encap_type,		\
+#define	EF10_ENCAP_FILTER_ENTRY(ipv, encap_type, inner_frame_match)	\
+	{ EFX_ETHER_TYPE_##ipv, EFX_TUNNEL_PROTOCOL_##encap_type,	\
 	    EFX_FILTER_INNER_FRAME_MATCH_UNKNOWN_##inner_frame_match }
 
 static ef10_filter_encap_entry_t ef10_filter_encap_list[] = {
@@ -1305,8 +1305,8 @@ ef10_filter_insert_encap_filters(
 		 */
 		if ((mulcst == B_FALSE) &&
 		    (encap_filter->inner_frame_match ==
-		     EFX_FILTER_INNER_FRAME_MATCH_UNKNOWN_MCAST_DST))
-				continue;
+		    EFX_FILTER_INNER_FRAME_MATCH_UNKNOWN_MCAST_DST))
+			continue;
 
 		efx_filter_spec_init_rx(&spec, EFX_FILTER_PRI_AUTO,
 					filter_flags,
diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h
index 1d3296f..a9b2862 100644
--- a/drivers/net/sfc/base/ef10_impl.h
+++ b/drivers/net/sfc/base/ef10_impl.h
@@ -50,8 +50,9 @@ extern "C" {
  */
 #define	EF10_NVRAM_CHUNK 0x80
 
-/* Alignment requirement for value written to RX WPTR:
- *  the WPTR must be aligned to an 8 descriptor boundary
+/*
+ * Alignment requirement for value written to RX WPTR: the WPTR must be aligned
+ * to an 8 descriptor boundary.
  */
 #define	EF10_RX_WPTR_ALIGN 8
 
@@ -505,8 +506,7 @@ ef10_nvram_buffer_find_item_start(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
 	__in			size_t buffer_size,
-	__out			uint32_t *startp
-	);
+	__out			uint32_t *startp);
 
 extern	__checkReturn		efx_rc_t
 ef10_nvram_buffer_find_end(
@@ -514,8 +514,7 @@ ef10_nvram_buffer_find_end(
 				caddr_t bufferp,
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
-	__out			uint32_t *endp
-	);
+	__out			uint32_t *endp);
 
 extern	__checkReturn	__success(return != B_FALSE)	boolean_t
 ef10_nvram_buffer_find_item(
@@ -524,8 +523,7 @@ ef10_nvram_buffer_find_item(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__out			uint32_t *startp,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 extern	__checkReturn		efx_rc_t
 ef10_nvram_buffer_get_item(
@@ -537,8 +535,7 @@ ef10_nvram_buffer_get_item(
 	__out_bcount_part(item_max_size, *lengthp)
 				caddr_t itemp,
 	__in			size_t item_max_size,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 extern	__checkReturn		efx_rc_t
 ef10_nvram_buffer_insert_item(
@@ -548,8 +545,7 @@ ef10_nvram_buffer_insert_item(
 	__in			uint32_t offset,
 	__in_bcount(length)	caddr_t keyp,
 	__in			uint32_t length,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 extern	__checkReturn		efx_rc_t
 ef10_nvram_buffer_delete_item(
@@ -558,15 +554,13 @@ ef10_nvram_buffer_delete_item(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__in			uint32_t length,
-	__in			uint32_t end
-	);
+	__in			uint32_t end);
 
 extern	__checkReturn		efx_rc_t
 ef10_nvram_buffer_finish(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	);
+	__in			size_t buffer_size);
 
 #endif	/* EFSYS_OPT_NVRAM */
 
@@ -795,7 +789,7 @@ ef10_tx_qstats_update(
 
 typedef uint32_t	efx_piobuf_handle_t;
 
-#define	EFX_PIOBUF_HANDLE_INVALID	((efx_piobuf_handle_t) -1)
+#define	EFX_PIOBUF_HANDLE_INVALID	((efx_piobuf_handle_t)-1)
 
 extern	__checkReturn	efx_rc_t
 ef10_nic_pio_alloc(
@@ -1034,7 +1028,7 @@ typedef struct ef10_filter_entry_s {
  * IPv4 or IPv6 outer frame, VXLAN, GENEVE or NVGRE packet type, and unicast or
  * multicast inner frames.
  */
-#define EFX_EF10_FILTER_ENCAP_FILTERS_MAX	12
+#define	EFX_EF10_FILTER_ENCAP_FILTERS_MAX	12
 
 typedef struct ef10_filter_table_s {
 	ef10_filter_entry_t	eft_entry[EFX_EF10_FILTER_TBL_ROWS];
@@ -1201,9 +1195,9 @@ ef10_external_port_mapping(
 /* Minimum space for packet in packed stream mode */
 #define	EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE		     \
 	P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE +	     \
-		  EFX_MAC_PDU_MIN +			     \
-		  EFX_RX_PACKED_STREAM_ALIGNMENT,	     \
-		  EFX_RX_PACKED_STREAM_ALIGNMENT)
+	    EFX_MAC_PDU_MIN +				     \
+	    EFX_RX_PACKED_STREAM_ALIGNMENT,		     \
+	    EFX_RX_PACKED_STREAM_ALIGNMENT)
 
 /* Maximum number of credits */
 #define	EFX_RX_PACKED_STREAM_MAX_CREDITS 127
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index b809819..eb44279 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -40,13 +40,13 @@ extern "C" {
 #endif
 
 #define	EFX_STATIC_ASSERT(_cond)		\
-	((void)sizeof(char[(_cond) ? 1 : -1]))
+	((void)sizeof (char[(_cond) ? 1 : -1]))
 
 #define	EFX_ARRAY_SIZE(_array)			\
-	(sizeof(_array) / sizeof((_array)[0]))
+	(sizeof (_array) / sizeof ((_array)[0]))
 
 #define	EFX_FIELD_OFFSET(_type, _field)		\
-	((size_t) &(((_type *)0)->_field))
+	((size_t)&(((_type *)0)->_field))
 
 /* The macro expands divider twice */
 #define	EFX_DIV_ROUND_UP(_n, _d)		(((_n) + (_d) - 1) / (_d))
@@ -558,7 +558,7 @@ efx_mac_stats_get_mask(
 
 #define	EFX_MAC_STAT_SUPPORTED(_mask, _stat)	\
 	((_mask)[(_stat) / EFX_MAC_STATS_MASK_BITS_PER_PAGE] &	\
-	 (1ULL << ((_stat) & (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1))))
+	    (1ULL << ((_stat) & (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1))))
 
 #define	EFX_MAC_STATS_SIZE 0x400
 
@@ -908,7 +908,8 @@ typedef enum efx_phy_media_type_e {
 	EFX_PHY_MEDIA_NTYPES
 } efx_phy_media_type_t;
 
-/* Get the type of medium currently used.  If the board has ports for
+/*
+ * Get the type of medium currently used.  If the board has ports for
  * modules, a module is present, and we recognise the media type of
  * the module, then this will be the media type of the module.
  * Otherwise it will be the media type of the port.
@@ -1009,7 +1010,7 @@ typedef enum efx_bist_type_e {
 	EFX_BIST_TYPE_PHY_CABLE_SHORT,
 	EFX_BIST_TYPE_PHY_CABLE_LONG,
 	EFX_BIST_TYPE_MC_MEM,	/* Test the MC DMEM and IMEM */
-	EFX_BIST_TYPE_SAT_MEM,	/* Test the DMEM and IMEM of satellite cpus*/
+	EFX_BIST_TYPE_SAT_MEM,	/* Test the DMEM and IMEM of satellite cpus */
 	EFX_BIST_TYPE_REG,	/* Test the register memories */
 	EFX_BIST_TYPE_NTYPES,
 } efx_bist_type_t;
@@ -1040,8 +1041,10 @@ typedef enum efx_bist_value_e {
 	EFX_BIST_PHY_CABLE_STATUS_C,
 	EFX_BIST_PHY_CABLE_STATUS_D,
 	EFX_BIST_FAULT_CODE,
-	/* Memory BIST specific values. These match to the MC_CMD_BIST_POLL
-	 * response. */
+	/*
+	 * Memory BIST specific values. These match to the MC_CMD_BIST_POLL
+	 * response.
+	 */
 	EFX_BIST_MEM_TEST,
 	EFX_BIST_MEM_ADDR,
 	EFX_BIST_MEM_BUS,
@@ -1793,8 +1796,7 @@ typedef __checkReturn	boolean_t
 typedef __checkReturn	boolean_t
 (*efx_mac_stats_ev_t)(
 	__in_opt	void *arg,
-	__in		uint32_t generation
-	);
+	__in		uint32_t generation);
 
 #endif	/* EFSYS_OPT_MAC_STATS */
 
@@ -2510,8 +2512,7 @@ efx_lic_find_start(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
 	__in			size_t buffer_size,
-	__out			uint32_t *startp
-	);
+	__out			uint32_t *startp);
 
 extern	__checkReturn		efx_rc_t
 efx_lic_find_end(
@@ -2520,8 +2521,7 @@ efx_lic_find_end(
 				caddr_t bufferp,
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
-	__out			uint32_t *endp
-	);
+	__out			uint32_t *endp);
 
 extern	__checkReturn	__success(return != B_FALSE)	boolean_t
 efx_lic_find_key(
@@ -2531,15 +2531,13 @@ efx_lic_find_key(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__out			uint32_t *startp,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 extern	__checkReturn	__success(return != B_FALSE)	boolean_t
 efx_lic_validate_key(
 	__in			efx_nic_t *enp,
 	__in_bcount(length)	caddr_t keyp,
-	__in			uint32_t length
-	);
+	__in			uint32_t length);
 
 extern	__checkReturn		efx_rc_t
 efx_lic_read_key(
@@ -2552,8 +2550,7 @@ efx_lic_read_key(
 	__out_bcount_part(key_max_size, *lengthp)
 				caddr_t keyp,
 	__in			size_t key_max_size,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 extern	__checkReturn		efx_rc_t
 efx_lic_write_key(
@@ -2564,8 +2561,7 @@ efx_lic_write_key(
 	__in			uint32_t offset,
 	__in_bcount(length)	caddr_t keyp,
 	__in			uint32_t length,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 	__checkReturn		efx_rc_t
 efx_lic_delete_key(
@@ -2576,24 +2572,21 @@ efx_lic_delete_key(
 	__in			uint32_t offset,
 	__in			uint32_t length,
 	__in			uint32_t end,
-	__out			uint32_t *deltap
-	);
+	__out			uint32_t *deltap);
 
 extern	__checkReturn		efx_rc_t
 efx_lic_create_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	);
+	__in			size_t buffer_size);
 
 extern	__checkReturn		efx_rc_t
 efx_lic_finish_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	);
+	__in			size_t buffer_size);
 
 #endif	/* EFSYS_OPT_LICENSING */
 
diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index c15608b..255a6af 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -1039,8 +1039,7 @@ struct efx_txq_s {
 	do {								\
 		EFX_CHECK_REG((_enp), (_reg));				\
 		EFSYS_PROBE7(efx_bar_tbl_doorbell_writeo,		\
-		    const char *,					\
-		    #_reg,						\
+		    const char *, #_reg,				\
 		    uint32_t, (_index),					\
 		    uint32_t, _reg ## _OFST,				\
 		    uint32_t, (_eop)->eo_u32[3],			\
diff --git a/drivers/net/sfc/base/efx_lic.c b/drivers/net/sfc/base/efx_lic.c
index 2cd05cc..de25c5c 100644
--- a/drivers/net/sfc/base/efx_lic.c
+++ b/drivers/net/sfc/base/efx_lic.c
@@ -43,8 +43,7 @@ efx_lic_v1v2_find_start(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
 	__in			size_t buffer_size,
-	__out			uint32_t *startp
-	);
+	__out			uint32_t *startp);
 
 	__checkReturn		efx_rc_t
 efx_lic_v1v2_find_end(
@@ -53,8 +52,7 @@ efx_lic_v1v2_find_end(
 				caddr_t bufferp,
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
-	__out			uint32_t *endp
-	);
+	__out			uint32_t *endp);
 
 	__checkReturn	__success(return != B_FALSE)	boolean_t
 efx_lic_v1v2_find_key(
@@ -64,15 +62,13 @@ efx_lic_v1v2_find_key(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__out			uint32_t *startp,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 	__checkReturn	__success(return != B_FALSE)	boolean_t
 efx_lic_v1v2_validate_key(
 	__in			efx_nic_t *enp,
 	__in_bcount(length)	caddr_t keyp,
-	__in			uint32_t length
-	);
+	__in			uint32_t length);
 
 	__checkReturn		efx_rc_t
 efx_lic_v1v2_read_key(
@@ -85,8 +81,7 @@ efx_lic_v1v2_read_key(
 	__out_bcount_part(key_max_size, *lengthp)
 				caddr_t keyp,
 	__in			size_t key_max_size,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 	__checkReturn		efx_rc_t
 efx_lic_v1v2_write_key(
@@ -97,8 +92,7 @@ efx_lic_v1v2_write_key(
 	__in			uint32_t offset,
 	__in_bcount(length)	caddr_t keyp,
 	__in			uint32_t length,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 	__checkReturn		efx_rc_t
 efx_lic_v1v2_delete_key(
@@ -109,24 +103,21 @@ efx_lic_v1v2_delete_key(
 	__in			uint32_t offset,
 	__in			uint32_t length,
 	__in			uint32_t end,
-	__out			uint32_t *deltap
-	);
+	__out			uint32_t *deltap);
 
 	__checkReturn		efx_rc_t
 efx_lic_v1v2_create_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	);
+	__in			size_t buffer_size);
 
 	__checkReturn		efx_rc_t
 efx_lic_v1v2_finish_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	);
+	__in			size_t buffer_size);
 
 #endif	/* EFSYS_OPT_HUNTINGTON | EFSYS_OPT_SIENA */
 
@@ -227,8 +218,7 @@ efx_lic_v3_find_start(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
 	__in			size_t buffer_size,
-	__out			uint32_t *startp
-	);
+	__out			uint32_t *startp);
 
 	__checkReturn		efx_rc_t
 efx_lic_v3_find_end(
@@ -237,8 +227,7 @@ efx_lic_v3_find_end(
 				caddr_t bufferp,
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
-	__out			uint32_t *endp
-	);
+	__out			uint32_t *endp);
 
 	__checkReturn	__success(return != B_FALSE)	boolean_t
 efx_lic_v3_find_key(
@@ -248,15 +237,13 @@ efx_lic_v3_find_key(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__out			uint32_t *startp,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 	__checkReturn	__success(return != B_FALSE)	boolean_t
 efx_lic_v3_validate_key(
 	__in			efx_nic_t *enp,
 	__in_bcount(length)	caddr_t keyp,
-	__in			uint32_t length
-	);
+	__in			uint32_t length);
 
 	__checkReturn		efx_rc_t
 efx_lic_v3_read_key(
@@ -269,8 +256,7 @@ efx_lic_v3_read_key(
 	__out_bcount_part(key_max_size, *lengthp)
 				caddr_t keyp,
 	__in			size_t key_max_size,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 	__checkReturn		efx_rc_t
 efx_lic_v3_write_key(
@@ -281,8 +267,7 @@ efx_lic_v3_write_key(
 	__in			uint32_t offset,
 	__in_bcount(length)	caddr_t keyp,
 	__in			uint32_t length,
-	__out			uint32_t *lengthp
-	);
+	__out			uint32_t *lengthp);
 
 	__checkReturn		efx_rc_t
 efx_lic_v3_delete_key(
@@ -293,31 +278,28 @@ efx_lic_v3_delete_key(
 	__in			uint32_t offset,
 	__in			uint32_t length,
 	__in			uint32_t end,
-	__out			uint32_t *deltap
-	);
+	__out			uint32_t *deltap);
 
 	__checkReturn		efx_rc_t
 efx_lic_v3_create_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	);
+	__in			size_t buffer_size);
 
 	__checkReturn		efx_rc_t
 efx_lic_v3_finish_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	);
+	__in			size_t buffer_size);
 
 static const efx_lic_ops_t	__efx_lic_v3_ops = {
 	efx_mcdi_licensing_v3_update_licenses,	/* elo_update_licenses */
 	efx_mcdi_licensing_v3_report_license,	/* elo_get_key_stats */
 	efx_mcdi_licensing_v3_app_state,	/* elo_app_state */
 	efx_mcdi_licensing_v3_get_id,		/* elo_get_id */
-	efx_lic_v3_find_start,			/* elo_find_start*/
+	efx_lic_v3_find_start,			/* elo_find_start */
 	efx_lic_v3_find_end,			/* elo_find_end */
 	efx_lic_v3_find_key,			/* elo_find_key */
 	efx_lic_v3_validate_key,		/* elo_validate_key */
@@ -452,8 +434,8 @@ efx_mcdi_fc_license_get_key_stats(
  *  Length (L): 16bit - value length in bytes
  *  Value (V):  L bytes - payload
  */
-#define EFX_LICENSE_V1V2_PAYLOAD_LENGTH_MAX    (256)
-#define EFX_LICENSE_V1V2_HEADER_LENGTH         (2 * sizeof(uint16_t))
+#define	EFX_LICENSE_V1V2_PAYLOAD_LENGTH_MAX	(256)
+#define	EFX_LICENSE_V1V2_HEADER_LENGTH		(2 * sizeof (uint16_t))
 
 	__checkReturn		efx_rc_t
 efx_lic_v1v2_find_start(
@@ -461,8 +443,7 @@ efx_lic_v1v2_find_start(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
 	__in			size_t buffer_size,
-	__out			uint32_t *startp
-	)
+	__out			uint32_t *startp)
 {
 	_NOTE(ARGUNUSED(enp, bufferp, buffer_size))
 
@@ -477,8 +458,7 @@ efx_lic_v1v2_find_end(
 				caddr_t bufferp,
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
-	__out			uint32_t *endp
-	)
+	__out			uint32_t *endp)
 {
 	_NOTE(ARGUNUSED(enp, bufferp, buffer_size))
 
@@ -494,8 +474,7 @@ efx_lic_v1v2_find_key(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__out			uint32_t *startp,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	boolean_t found;
 	uint16_t tlv_type;
@@ -528,8 +507,7 @@ efx_lic_v1v2_find_key(
 efx_lic_v1v2_validate_key(
 	__in			efx_nic_t *enp,
 	__in_bcount(length)	caddr_t keyp,
-	__in			uint32_t length
-	)
+	__in			uint32_t length)
 {
 	uint16_t tlv_type;
 	uint16_t tlv_length;
@@ -579,8 +557,7 @@ efx_lic_v1v2_read_key(
 	__out_bcount_part(key_max_size, *lengthp)
 				caddr_t keyp,
 	__in			size_t key_max_size,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	efx_rc_t rc;
 
@@ -613,8 +590,7 @@ efx_lic_v1v2_write_key(
 	__in			uint32_t offset,
 	__in_bcount(length)	caddr_t keyp,
 	__in			uint32_t length,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	efx_rc_t rc;
 
@@ -650,8 +626,7 @@ efx_lic_v1v2_delete_key(
 	__in			uint32_t offset,
 	__in			uint32_t length,
 	__in			uint32_t end,
-	__out			uint32_t *deltap
-	)
+	__out			uint32_t *deltap)
 {
 	uint32_t move_start = offset + length;
 	uint32_t move_length = end - move_start;
@@ -672,8 +647,7 @@ efx_lic_v1v2_create_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	)
+	__in			size_t buffer_size)
 {
 	_NOTE(ARGUNUSED(enp))
 	EFSYS_ASSERT(EFX_LICENSE_V1V2_HEADER_LENGTH <= buffer_size);
@@ -689,8 +663,7 @@ efx_lic_v1v2_finish_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	)
+	__in			size_t buffer_size)
 {
 	_NOTE(ARGUNUSED(enp, bufferp, buffer_size))
 
@@ -1002,7 +975,8 @@ efx_mcdi_licensing_v3_app_state(
 		goto fail1;
 	}
 
-	if (req.emr_out_length_used < MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN) {
+	if (req.emr_out_length_used <
+	    MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN) {
 		rc = EMSGSIZE;
 		goto fail2;
 	}
@@ -1052,7 +1026,8 @@ efx_mcdi_licensing_v3_get_id(
 		req.emr_in_buf = bufferp;
 		req.emr_in_length = MC_CMD_LICENSING_GET_ID_V3_IN_LEN;
 		req.emr_out_buf = bufferp;
-		req.emr_out_length = MIN(buffer_size, MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX);
+		req.emr_out_length =
+		    MIN(buffer_size, MC_CMD_LICENSING_GET_ID_V3_OUT_LENMAX);
 		(void) memset(bufferp, 0, req.emr_out_length);
 	}
 
@@ -1069,12 +1044,14 @@ efx_mcdi_licensing_v3_get_id(
 	}
 
 	*typep = MCDI_OUT_DWORD(req, LICENSING_GET_ID_V3_OUT_LICENSE_TYPE);
-	*lengthp = MCDI_OUT_DWORD(req, LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH);
+	*lengthp =
+	    MCDI_OUT_DWORD(req, LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH);
 
 	if (bufferp == NULL) {
-		/* modify length requirements to indicate to caller the extra buffering
-		** needed to read the complete output.
-		*/
+		/*
+		 * Modify length requirements to indicate to caller the extra
+		 * buffering needed to read the complete output.
+		 */
 		*lengthp += MC_CMD_LICENSING_GET_ID_V3_OUT_LENMIN;
 	} else {
 		/* Shift ID down to start of buffer */
@@ -1096,8 +1073,8 @@ efx_mcdi_licensing_v3_get_id(
 }
 
 /* V3 format uses Huntington TLV format partition. See SF-108797-SW */
-#define EFX_LICENSE_V3_KEY_LENGTH_MIN    (64)
-#define EFX_LICENSE_V3_KEY_LENGTH_MAX    (160)
+#define	EFX_LICENSE_V3_KEY_LENGTH_MIN	(64)
+#define	EFX_LICENSE_V3_KEY_LENGTH_MAX	(160)
 
 	__checkReturn		efx_rc_t
 efx_lic_v3_find_start(
@@ -1105,12 +1082,12 @@ efx_lic_v3_find_start(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
 	__in			size_t buffer_size,
-	__out			uint32_t *startp
-	)
+	__out			uint32_t *startp)
 {
 	_NOTE(ARGUNUSED(enp))
 
-	return ef10_nvram_buffer_find_item_start(bufferp, buffer_size, startp);
+	return (ef10_nvram_buffer_find_item_start(bufferp, buffer_size,
+	    startp));
 }
 
 	__checkReturn		efx_rc_t
@@ -1120,12 +1097,11 @@ efx_lic_v3_find_end(
 				caddr_t bufferp,
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
-	__out			uint32_t *endp
-	)
+	__out			uint32_t *endp)
 {
 	_NOTE(ARGUNUSED(enp))
 
-	return ef10_nvram_buffer_find_end(bufferp, buffer_size, offset, endp);
+	return (ef10_nvram_buffer_find_end(bufferp, buffer_size, offset, endp));
 }
 
 	__checkReturn	__success(return != B_FALSE)	boolean_t
@@ -1136,8 +1112,7 @@ efx_lic_v3_find_key(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__out			uint32_t *startp,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	_NOTE(ARGUNUSED(enp))
 
@@ -1149,8 +1124,7 @@ efx_lic_v3_find_key(
 efx_lic_v3_validate_key(
 	__in			efx_nic_t *enp,
 	__in_bcount(length)	caddr_t keyp,
-	__in			uint32_t length
-	)
+	__in			uint32_t length)
 {
 	/* Check key is a valid V3 key */
 	uint8_t key_type;
@@ -1200,8 +1174,7 @@ efx_lic_v3_read_key(
 	__out_bcount_part(key_max_size, *lengthp)
 				caddr_t keyp,
 	__in			size_t key_max_size,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	_NOTE(ARGUNUSED(enp))
 
@@ -1218,8 +1191,7 @@ efx_lic_v3_write_key(
 	__in			uint32_t offset,
 	__in_bcount(length)	caddr_t keyp,
 	__in			uint32_t length,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	_NOTE(ARGUNUSED(enp))
 	EFSYS_ASSERT(length <= EFX_LICENSE_V3_KEY_LENGTH_MAX);
@@ -1237,8 +1209,7 @@ efx_lic_v3_delete_key(
 	__in			uint32_t offset,
 	__in			uint32_t length,
 	__in			uint32_t end,
-	__out			uint32_t *deltap
-	)
+	__out			uint32_t *deltap)
 {
 	efx_rc_t rc;
 
@@ -1264,8 +1235,7 @@ efx_lic_v3_create_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	)
+	__in			size_t buffer_size)
 {
 	efx_rc_t rc;
 
@@ -1290,8 +1260,7 @@ efx_lic_v3_finish_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	)
+	__in			size_t buffer_size)
 {
 	efx_rc_t rc;
 
@@ -1383,7 +1352,7 @@ efx_lic_check_support(
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_LIC);
 
-	return enp->en_licensing_supported;
+	return (enp->en_licensing_supported);
 }
 
 				void
@@ -1474,8 +1443,7 @@ efx_lic_get_id(
 	__in		size_t buffer_size,
 	__out		uint32_t *typep,
 	__out		size_t *lengthp,
-	__out_opt	uint8_t *bufferp
-	)
+	__out_opt	uint8_t *bufferp)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
@@ -1498,7 +1466,10 @@ efx_lic_get_id(
 	return (rc);
 }
 
-/* Buffer management API - abstracts varying TLV format used for License partition */
+/*
+ * Buffer management API - abstracts varying TLV format used for License
+ * partition.
+ */
 
 	__checkReturn		efx_rc_t
 efx_lic_find_start(
@@ -1506,8 +1477,7 @@ efx_lic_find_start(
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
 	__in			size_t buffer_size,
-	__out			uint32_t *startp
-	)
+	__out			uint32_t *startp)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
@@ -1533,8 +1503,7 @@ efx_lic_find_end(
 				caddr_t bufferp,
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
-	__out			uint32_t *endp
-	)
+	__out			uint32_t *endp)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
@@ -1542,7 +1511,8 @@ efx_lic_find_end(
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_LIC);
 
-	if ((rc = elop->elo_find_end(enp, bufferp, buffer_size, offset, endp)) != 0)
+	rc = elop->elo_find_end(enp, bufferp, buffer_size, offset, endp);
+	if (rc != 0)
 		goto fail1;
 
 	return (0);
@@ -1561,8 +1531,7 @@ efx_lic_find_key(
 	__in			size_t buffer_size,
 	__in			uint32_t offset,
 	__out			uint32_t *startp,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 
@@ -1578,15 +1547,15 @@ efx_lic_find_key(
 }
 
 
-/* Validate that the buffer contains a single key in a recognised format.
-** An empty or terminator buffer is not accepted as a valid key.
-*/
+/*
+ * Validate that the buffer contains a single key in a recognised format.
+ * An empty or terminator buffer is not accepted as a valid key.
+ */
 	__checkReturn	__success(return != B_FALSE)	boolean_t
 efx_lic_validate_key(
 	__in			efx_nic_t *enp,
 	__in_bcount(length)	caddr_t keyp,
-	__in			uint32_t length
-	)
+	__in			uint32_t length)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	boolean_t rc;
@@ -1616,8 +1585,7 @@ efx_lic_read_key(
 	__out_bcount_part(key_max_size, *lengthp)
 				caddr_t keyp,
 	__in			size_t key_max_size,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
@@ -1646,8 +1614,7 @@ efx_lic_write_key(
 	__in			uint32_t offset,
 	__in_bcount(length)	caddr_t keyp,
 	__in			uint32_t length,
-	__out			uint32_t *lengthp
-	)
+	__out			uint32_t *lengthp)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
@@ -1676,8 +1643,7 @@ efx_lic_delete_key(
 	__in			uint32_t offset,
 	__in			uint32_t length,
 	__in			uint32_t end,
-	__out			uint32_t *deltap
-	)
+	__out			uint32_t *deltap)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
@@ -1702,8 +1668,7 @@ efx_lic_create_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	)
+	__in			size_t buffer_size)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
@@ -1728,8 +1693,7 @@ efx_lic_finish_partition(
 	__in			efx_nic_t *enp,
 	__in_bcount(buffer_size)
 				caddr_t bufferp,
-	__in			size_t buffer_size
-	)
+	__in			size_t buffer_size)
 {
 	const efx_lic_ops_t *elop = enp->en_elop;
 	efx_rc_t rc;
diff --git a/drivers/net/sfc/base/efx_mcdi.h b/drivers/net/sfc/base/efx_mcdi.h
index 2172771..fba807a 100644
--- a/drivers/net/sfc/base/efx_mcdi.h
+++ b/drivers/net/sfc/base/efx_mcdi.h
@@ -51,7 +51,7 @@ struct efx_mcdi_req_s {
 	unsigned int	emr_cmd;
 	uint8_t		*emr_in_buf;
 	size_t		emr_in_length;
-	/* Outputs: retcode, buffer, length, and length used*/
+	/* Outputs: retcode, buffer, length, and length used */
 	efx_rc_t	emr_rc;
 	uint8_t		*emr_out_buf;
 	size_t		emr_out_length;
diff --git a/drivers/net/sfc/base/efx_nic.c b/drivers/net/sfc/base/efx_nic.c
index 76caa74..4896619 100644
--- a/drivers/net/sfc/base/efx_nic.c
+++ b/drivers/net/sfc/base/efx_nic.c
@@ -637,9 +637,9 @@ efx_nic_get_fw_version(
 		goto fail2;
 
 	rc = efx_mcdi_get_capabilities(enp, NULL,
-				       &enfip->enfi_rx_dpcpu_fw_id,
-				       &enfip->enfi_tx_dpcpu_fw_id,
-				       NULL, NULL);
+	    &enfip->enfi_rx_dpcpu_fw_id,
+	    &enfip->enfi_tx_dpcpu_fw_id,
+	    NULL, NULL);
 	if (rc == 0) {
 		enfip->enfi_dpcpu_fw_ids_valid = B_TRUE;
 	} else if (rc == ENOTSUP) {
@@ -650,7 +650,8 @@ efx_nic_get_fw_version(
 		goto fail3;
 	}
 
-	memcpy(enfip->enfi_mc_fw_version, mc_fw_version, sizeof(mc_fw_version));
+	memcpy(enfip->enfi_mc_fw_version, mc_fw_version,
+	    sizeof (mc_fw_version));
 
 	return (0);
 
diff --git a/drivers/net/sfc/base/efx_types.h b/drivers/net/sfc/base/efx_types.h
index b8ee14a..4afa8de 100644
--- a/drivers/net/sfc/base/efx_types.h
+++ b/drivers/net/sfc/base/efx_types.h
@@ -116,7 +116,8 @@ extern "C" {
 #define	EFX_DWORD_3_LBN 96
 #define	EFX_DWORD_3_WIDTH 32
 
-/* There are intentionally no EFX_QWORD_0 or EFX_QWORD_1 field definitions
+/*
+ * There are intentionally no EFX_QWORD_0 or EFX_QWORD_1 field definitions
  * here as the implementaion of EFX_QWORD_FIELD and EFX_OWORD_FIELD do not
  * support field widths larger than 32 bits.
  */
diff --git a/drivers/net/sfc/base/medford_nic.c b/drivers/net/sfc/base/medford_nic.c
index d361d65..94ba70c 100644
--- a/drivers/net/sfc/base/medford_nic.c
+++ b/drivers/net/sfc/base/medford_nic.c
@@ -178,7 +178,8 @@ medford_board_cfg(
 	if (EFX_PCI_FUNCTION_IS_PF(encp)) {
 		rc = efx_mcdi_get_mac_address_pf(enp, mac_addr);
 #if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC
-		/* Disable static config checking for Medford NICs, ONLY
+		/*
+		 * Disable static config checking for Medford NICs, ONLY
 		 * for manufacturing test and setup at the factory, to
 		 * allow the static config to be installed.
 		 */
-- 
2.7.4

[PATCH 40/53] net/sfc/base: allow to use PHY stats on Huntington/Medford

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

EFSYS_OPT_PHY_STATS can be used with Huntington or Medford, not just Siena.

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_check.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sfc/base/efx_check.h b/drivers/net/sfc/base/efx_check.h
index 4ed7148..33c16a6 100644
--- a/drivers/net/sfc/base/efx_check.h
+++ b/drivers/net/sfc/base/efx_check.h
@@ -259,8 +259,8 @@
 
 #if EFSYS_OPT_PHY_STATS
 /* Support PHY statistics */
-# if !EFSYS_OPT_SIENA
-#  error "PHY_STATS requires SIENA"
+# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)
+#  error "PHY_STATS requires SIENA or HUNTINGTON or MEDFORD"
 # endif
 #endif /* EFSYS_OPT_PHY_STATS */
 
-- 
2.7.4

[PATCH 41/53] net/sfc/base: fix diagnostics support build without Siena

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

The compilation failed because __efx_sram_pattern_fns was used in
efx_nic.c, but defined in efx_sram.c which is only needed when
supporting Siena.

To fix it move all the code using __efx_sram_pattern_fns into
Siena-specific files (except for the definition in efx_sram.c itself,
as that file only needs to be included in Siena-supporting builds
anyway).

The functions to test registers and tables are unlikely to apply to any
new hardware and so can be moved into Siena files. Since Huntington
such tests have been implemented in firmware.

Fixes: 7571c3168798 ("net/sfc/base: import diagnostics support")
Cc: stable@dpdk.org

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_impl.h   |  26 -------
 drivers/net/sfc/base/efx_nic.c    | 133 ----------------------------------
 drivers/net/sfc/base/siena_impl.h |   9 +++
 drivers/net/sfc/base/siena_nic.c  | 148 ++++++++++++++++++++++++++++++++++++--
 4 files changed, 150 insertions(+), 166 deletions(-)

diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index 255a6af..fa976eb 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -1145,32 +1145,6 @@ efx_vpd_hunk_set(
 
 #endif	/* EFSYS_OPT_VPD */
 
-#if EFSYS_OPT_DIAG
-
-extern	efx_sram_pattern_fn_t	__efx_sram_pattern_fns[];
-
-typedef struct efx_register_set_s {
-	unsigned int		address;
-	unsigned int		step;
-	unsigned int		rows;
-	efx_oword_t		mask;
-} efx_register_set_t;
-
-extern	__checkReturn	efx_rc_t
-efx_nic_test_registers(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		size_t count);
-
-extern	__checkReturn	efx_rc_t
-efx_nic_test_tables(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		efx_pattern_type_t pattern,
-	__in		size_t count);
-
-#endif	/* EFSYS_OPT_DIAG */
-
 #if EFSYS_OPT_MCDI
 
 extern	__checkReturn		efx_rc_t
diff --git a/drivers/net/sfc/base/efx_nic.c b/drivers/net/sfc/base/efx_nic.c
index 4896619..65eed6e 100644
--- a/drivers/net/sfc/base/efx_nic.c
+++ b/drivers/net/sfc/base/efx_nic.c
@@ -689,139 +689,6 @@ efx_nic_register_test(
 	return (rc);
 }
 
-	__checkReturn	efx_rc_t
-efx_nic_test_registers(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		size_t count)
-{
-	unsigned int bit;
-	efx_oword_t original;
-	efx_oword_t reg;
-	efx_oword_t buf;
-	efx_rc_t rc;
-
-	while (count > 0) {
-		/* This function is only suitable for registers */
-		EFSYS_ASSERT(rsp->rows == 1);
-
-		/* bit sweep on and off */
-		EFSYS_BAR_READO(enp->en_esbp, rsp->address, &original,
-			    B_TRUE);
-		for (bit = 0; bit < 128; bit++) {
-			/* Is this bit in the mask? */
-			if (~(rsp->mask.eo_u32[bit >> 5]) & (1 << bit))
-				continue;
-
-			/* Test this bit can be set in isolation */
-			reg = original;
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFX_SET_OWORD_BIT(reg, bit);
-
-			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
-				    B_TRUE);
-			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
-				    B_TRUE);
-
-			EFX_AND_OWORD(buf, rsp->mask);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail1;
-			}
-
-			/* Test this bit can be cleared in isolation */
-			EFX_OR_OWORD(reg, rsp->mask);
-			EFX_CLEAR_OWORD_BIT(reg, bit);
-
-			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
-				    B_TRUE);
-			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
-				    B_TRUE);
-
-			EFX_AND_OWORD(buf, rsp->mask);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail2;
-			}
-		}
-
-		/* Restore the old value */
-		EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original,
-			    B_TRUE);
-
-		--count;
-		++rsp;
-	}
-
-	return (0);
-
-fail2:
-	EFSYS_PROBE(fail2);
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	/* Restore the old value */
-	EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original, B_TRUE);
-
-	return (rc);
-}
-
-	__checkReturn	efx_rc_t
-efx_nic_test_tables(
-	__in		efx_nic_t *enp,
-	__in		efx_register_set_t *rsp,
-	__in		efx_pattern_type_t pattern,
-	__in		size_t count)
-{
-	efx_sram_pattern_fn_t func;
-	unsigned int index;
-	unsigned int address;
-	efx_oword_t reg;
-	efx_oword_t buf;
-	efx_rc_t rc;
-
-	EFSYS_ASSERT(pattern < EFX_PATTERN_NTYPES);
-	func = __efx_sram_pattern_fns[pattern];
-
-	while (count > 0) {
-		/* Write */
-		address = rsp->address;
-		for (index = 0; index < rsp->rows; ++index) {
-			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
-			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFSYS_BAR_WRITEO(enp->en_esbp, address, &reg, B_TRUE);
-
-			address += rsp->step;
-		}
-
-		/* Read */
-		address = rsp->address;
-		for (index = 0; index < rsp->rows; ++index) {
-			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
-			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
-			EFX_AND_OWORD(reg, rsp->mask);
-			EFSYS_BAR_READO(enp->en_esbp, address, &buf, B_TRUE);
-			if (memcmp(&reg, &buf, sizeof (reg))) {
-				rc = EIO;
-				goto fail1;
-			}
-
-			address += rsp->step;
-		}
-
-		++rsp;
-		--count;
-	}
-
-	return (0);
-
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	return (rc);
-}
-
 #endif	/* EFSYS_OPT_DIAG */
 
 #if EFSYS_OPT_LOOPBACK
diff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h
index 654baa5..2e3d390 100644
--- a/drivers/net/sfc/base/siena_impl.h
+++ b/drivers/net/sfc/base/siena_impl.h
@@ -65,6 +65,15 @@ siena_nic_init(
 
 #if EFSYS_OPT_DIAG
 
+extern	efx_sram_pattern_fn_t	__efx_sram_pattern_fns[];
+
+typedef struct siena_register_set_s {
+	unsigned int		address;
+	unsigned int		step;
+	unsigned int		rows;
+	efx_oword_t		mask;
+} siena_register_set_t;
+
 extern	__checkReturn	efx_rc_t
 siena_nic_register_test(
 	__in		efx_nic_t *enp);
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index 5216cc6..f9cda34 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -457,7 +457,7 @@ siena_nic_unprobe(
 
 #if EFSYS_OPT_DIAG
 
-static efx_register_set_t __siena_registers[] = {
+static siena_register_set_t __siena_registers[] = {
 	{ FR_AZ_ADR_REGION_REG_OFST, 0, 1 },
 	{ FR_CZ_USR_EV_CFG_OFST, 0, 1 },
 	{ FR_AZ_RX_CFG_REG_OFST, 0, 1 },
@@ -489,7 +489,7 @@ static const uint32_t __siena_register_masks[] = {
 	0xFFFFFFFF, 0xFFFFFFFF, 0x00000007, 0x00000000
 };
 
-static efx_register_set_t __siena_tables[] = {
+static siena_register_set_t __siena_tables[] = {
 	{ FR_AZ_RX_FILTER_TBL0_OFST, FR_AZ_RX_FILTER_TBL0_STEP,
 	    FR_AZ_RX_FILTER_TBL0_ROWS },
 	{ FR_CZ_RX_MAC_FILTER_TBL0_OFST, FR_CZ_RX_MAC_FILTER_TBL0_STEP,
@@ -516,10 +516,144 @@ static const uint32_t __siena_table_masks[] = {
 };
 
 	__checkReturn	efx_rc_t
+siena_nic_test_registers(
+	__in		efx_nic_t *enp,
+	__in		siena_register_set_t *rsp,
+	__in		size_t count)
+{
+	unsigned int bit;
+	efx_oword_t original;
+	efx_oword_t reg;
+	efx_oword_t buf;
+	efx_rc_t rc;
+
+	while (count > 0) {
+		/* This function is only suitable for registers */
+		EFSYS_ASSERT(rsp->rows == 1);
+
+		/* bit sweep on and off */
+		EFSYS_BAR_READO(enp->en_esbp, rsp->address, &original,
+			    B_TRUE);
+		for (bit = 0; bit < 128; bit++) {
+			/* Is this bit in the mask? */
+			if (~(rsp->mask.eo_u32[bit >> 5]) & (1 << bit))
+				continue;
+
+			/* Test this bit can be set in isolation */
+			reg = original;
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFX_SET_OWORD_BIT(reg, bit);
+
+			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
+				    B_TRUE);
+			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
+				    B_TRUE);
+
+			EFX_AND_OWORD(buf, rsp->mask);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail1;
+			}
+
+			/* Test this bit can be cleared in isolation */
+			EFX_OR_OWORD(reg, rsp->mask);
+			EFX_CLEAR_OWORD_BIT(reg, bit);
+
+			EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &reg,
+				    B_TRUE);
+			EFSYS_BAR_READO(enp->en_esbp, rsp->address, &buf,
+				    B_TRUE);
+
+			EFX_AND_OWORD(buf, rsp->mask);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail2;
+			}
+		}
+
+		/* Restore the old value */
+		EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original,
+			    B_TRUE);
+
+		--count;
+		++rsp;
+	}
+
+	return (0);
+
+fail2:
+	EFSYS_PROBE(fail2);
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	/* Restore the old value */
+	EFSYS_BAR_WRITEO(enp->en_esbp, rsp->address, &original, B_TRUE);
+
+	return (rc);
+}
+
+	__checkReturn	efx_rc_t
+siena_nic_test_tables(
+	__in		efx_nic_t *enp,
+	__in		siena_register_set_t *rsp,
+	__in		efx_pattern_type_t pattern,
+	__in		size_t count)
+{
+	efx_sram_pattern_fn_t func;
+	unsigned int index;
+	unsigned int address;
+	efx_oword_t reg;
+	efx_oword_t buf;
+	efx_rc_t rc;
+
+	EFSYS_ASSERT(pattern < EFX_PATTERN_NTYPES);
+	func = __efx_sram_pattern_fns[pattern];
+
+	while (count > 0) {
+		/* Write */
+		address = rsp->address;
+		for (index = 0; index < rsp->rows; ++index) {
+			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
+			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFSYS_BAR_WRITEO(enp->en_esbp, address, &reg, B_TRUE);
+
+			address += rsp->step;
+		}
+
+		/* Read */
+		address = rsp->address;
+		for (index = 0; index < rsp->rows; ++index) {
+			func(2 * index + 0, B_FALSE, &reg.eo_qword[0]);
+			func(2 * index + 1, B_FALSE, &reg.eo_qword[1]);
+			EFX_AND_OWORD(reg, rsp->mask);
+			EFSYS_BAR_READO(enp->en_esbp, address, &buf, B_TRUE);
+			if (memcmp(&reg, &buf, sizeof (reg))) {
+				rc = EIO;
+				goto fail1;
+			}
+
+			address += rsp->step;
+		}
+
+		++rsp;
+		--count;
+	}
+
+	return (0);
+
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	return (rc);
+}
+
+
+	__checkReturn	efx_rc_t
 siena_nic_register_test(
 	__in		efx_nic_t *enp)
 {
-	efx_register_set_t *rsp;
+	siena_register_set_t *rsp;
 	const uint32_t *dwordp;
 	unsigned int nitems;
 	unsigned int count;
@@ -553,21 +687,21 @@ siena_nic_register_test(
 		rsp->mask.eo_u32[3] = *dwordp++;
 	}
 
-	if ((rc = efx_nic_test_registers(enp, __siena_registers,
+	if ((rc = siena_nic_test_registers(enp, __siena_registers,
 	    EFX_ARRAY_SIZE(__siena_registers))) != 0)
 		goto fail1;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BYTE_ALTERNATE,
 	    EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail2;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BYTE_CHANGING,
 	    EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail3;
 
-	if ((rc = efx_nic_test_tables(enp, __siena_tables,
+	if ((rc = siena_nic_test_tables(enp, __siena_tables,
 	    EFX_PATTERN_BIT_SWEEP, EFX_ARRAY_SIZE(__siena_tables))) != 0)
 		goto fail4;
 
-- 
2.7.4

[PATCH 42/53] net/sfc/base: fix probes in licensing support

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

Fixes: 05fce2ce8451 ("net/sfc/base: import libefx licensing")
Cc: stable@dpdk.org

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_lic.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sfc/base/efx_lic.c b/drivers/net/sfc/base/efx_lic.c
index de25c5c..cfff51a 100644
--- a/drivers/net/sfc/base/efx_lic.c
+++ b/drivers/net/sfc/base/efx_lic.c
@@ -498,7 +498,7 @@ efx_lic_v1v2_find_key(
 	return (found);
 
 fail1:
-	EFSYS_PROBE(fail1);
+	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
 
 	return (B_FALSE);
 }
@@ -540,7 +540,7 @@ efx_lic_v1v2_validate_key(
 fail2:
 	EFSYS_PROBE(fail2);
 fail1:
-	EFSYS_PROBE(fail1);
+	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
 
 	return (B_FALSE);
 }
@@ -1158,7 +1158,7 @@ efx_lic_v3_validate_key(
 fail2:
 	EFSYS_PROBE(fail2);
 fail1:
-	EFSYS_PROBE(fail1);
+	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
 
 	return (B_FALSE);
 }
-- 
2.7.4

Re: [dpdk-stable] [PATCH 42/53] net/sfc/base: fix probes in licensing support

[Ferruh Yigit]

On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
> From: Mark Spender <mspender@solarflare.com>
> 

What has been fixed here?
If you can provide more details I can amend the commit later.

> Fixes: 05fce2ce8451 ("net/sfc/base: import libefx licensing")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Mark Spender <mspender@solarflare.com>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> ---
>  drivers/net/sfc/base/efx_lic.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/sfc/base/efx_lic.c b/drivers/net/sfc/base/efx_lic.c
> index de25c5c..cfff51a 100644
> --- a/drivers/net/sfc/base/efx_lic.c
> +++ b/drivers/net/sfc/base/efx_lic.c
> @@ -498,7 +498,7 @@ efx_lic_v1v2_find_key(
>  	return (found);
>  
>  fail1:
> -	EFSYS_PROBE(fail1);
> +	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
>  
>  	return (B_FALSE);
>  }
> @@ -540,7 +540,7 @@ efx_lic_v1v2_validate_key(
>  fail2:
>  	EFSYS_PROBE(fail2);
>  fail1:
> -	EFSYS_PROBE(fail1);
> +	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
>  
>  	return (B_FALSE);
>  }
> @@ -1158,7 +1158,7 @@ efx_lic_v3_validate_key(
>  fail2:
>  	EFSYS_PROBE(fail2);
>  fail1:
> -	EFSYS_PROBE(fail1);
> +	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
>  
>  	return (B_FALSE);
>  }
> 

Re: [dpdk-stable] [PATCH 42/53] net/sfc/base: fix probes in licensing support

[Andrew Rybchenko]

On 11/27/2017 10:58 PM, Ferruh Yigit wrote:
> On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
>> From: Mark Spender <mspender@solarflare.com>
>>
> What has been fixed here?
> If you can provide more details I can amend the commit later.

EFSYS_PROBE1 takes one typed value (in addition to the probe name),
whereas EFSYS_PROBE has just the probe name.

Which to use is determined by the probe name – “fail1” probes are
expected to include the function result.

Thanks,
Andrew.

>> Fixes: 05fce2ce8451 ("net/sfc/base: import libefx licensing")
>> Cc: stable@dpdk.org
>>
>> Signed-off-by: Mark Spender <mspender@solarflare.com>
>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
>> ---
>>   drivers/net/sfc/base/efx_lic.c | 6 +++---
>>   1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/net/sfc/base/efx_lic.c b/drivers/net/sfc/base/efx_lic.c
>> index de25c5c..cfff51a 100644
>> --- a/drivers/net/sfc/base/efx_lic.c
>> +++ b/drivers/net/sfc/base/efx_lic.c
>> @@ -498,7 +498,7 @@ efx_lic_v1v2_find_key(
>>   	return (found);
>>   
>>   fail1:
>> -	EFSYS_PROBE(fail1);
>> +	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
>>   
>>   	return (B_FALSE);
>>   }
>> @@ -540,7 +540,7 @@ efx_lic_v1v2_validate_key(
>>   fail2:
>>   	EFSYS_PROBE(fail2);
>>   fail1:
>> -	EFSYS_PROBE(fail1);
>> +	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
>>   
>>   	return (B_FALSE);
>>   }
>> @@ -1158,7 +1158,7 @@ efx_lic_v3_validate_key(
>>   fail2:
>>   	EFSYS_PROBE(fail2);
>>   fail1:
>> -	EFSYS_PROBE(fail1);
>> +	EFSYS_PROBE1(fail1, boolean_t, B_FALSE);
>>   
>>   	return (B_FALSE);
>>   }
>>

Re: [dpdk-stable] [PATCH 42/53] net/sfc/base: fix probes in licensing support

[Ferruh Yigit]

On 11/28/2017 2:17 AM, Andrew Rybchenko wrote:
> On 11/27/2017 10:58 PM, Ferruh Yigit wrote:
>> On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
>>> From: Mark Spender <mspender@solarflare.com>
>>>
>> What has been fixed here?
>> If you can provide more details I can amend the commit later.
> 
> EFSYS_PROBE1 takes one typed value (in addition to the probe name),
> whereas EFSYS_PROBE has just the probe name.
> 
> Which to use is determined by the probe name – “fail1” probes are
> expected to include the function result.

Commits are amended with shared updates and pushed, this and other ones.

Thanks,
ferruh

> 
> Thanks,
> Andrew.
> 
>>> Fixes: 05fce2ce8451 ("net/sfc/base: import libefx licensing")
>>> Cc: stable@dpdk.org
>>>
>>> Signed-off-by: Mark Spender <mspender@solarflare.com>
>>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
<...>

Re: [dpdk-stable] [PATCH 42/53] net/sfc/base: fix probes in licensing support

[Andrew Rybchenko]

On 11/29/2017 12:38 AM, Ferruh Yigit wrote:
> On 11/28/2017 2:17 AM, Andrew Rybchenko wrote:
>> On 11/27/2017 10:58 PM, Ferruh Yigit wrote:
>>> On 11/16/2017 12:04 AM, Andrew Rybchenko wrote:
>>>> From: Mark Spender <mspender@solarflare.com>
>>>>
>>> What has been fixed here?
>>> If you can provide more details I can amend the commit later.
>> EFSYS_PROBE1 takes one typed value (in addition to the probe name),
>> whereas EFSYS_PROBE has just the probe name.
>>
>> Which to use is determined by the probe name – “fail1” probes are
>> expected to include the function result.
> Commits are amended with shared updates and pushed, this and other ones.

Ferruh, many thanks for review and your notes/questions.

> Thanks,
> ferruh
>
>> Thanks,
>> Andrew.
>>
>>>> Fixes: 05fce2ce8451 ("net/sfc/base: import libefx licensing")
>>>> Cc: stable@dpdk.org
>>>>
>>>> Signed-off-by: Mark Spender <mspender@solarflare.com>
>>>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
> <...>

[PATCH 43/53] net/sfc/base: fix warnings from VS2015 C compiler (C4310)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix level 4 warning
"C4310: cast truncates constant value";
no functional changes.

Fixes: 354df7eadf66 ("net/sfc/base: import bootrom configuration")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_bootcfg.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/sfc/base/efx_bootcfg.c b/drivers/net/sfc/base/efx_bootcfg.c
index c47d16b..660d000 100644
--- a/drivers/net/sfc/base/efx_bootcfg.c
+++ b/drivers/net/sfc/base/efx_bootcfg.c
@@ -356,7 +356,7 @@ efx_bootcfg_read(
 	rc = efx_bootcfg_verify(enp, (caddr_t)payload, sector_length,
 	    &used_bytes);
 	if (rc != 0 || used_bytes == 0) {
-		payload[0] = (uint8_t)~DHCP_END;
+		payload[0] = (uint8_t)(~DHCP_END & 0xff);
 		payload[1] = DHCP_END;
 		used_bytes = 2;
 	}
-- 
2.7.4

[PATCH 44/53] net/sfc/base: fix warnings from VS2015 C compiler (C4244)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix level 4 warning
"C4244: '+=': conversion from 'unsigned int' to 'uint16_t', possible loss
of data"; no functional changes.

Fixes: 946ba3b6941a ("net/sfc/base: import VPD support")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_vpd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/sfc/base/efx_vpd.c b/drivers/net/sfc/base/efx_vpd.c
index 1e47df2..956460f 100644
--- a/drivers/net/sfc/base/efx_vpd.c
+++ b/drivers/net/sfc/base/efx_vpd.c
@@ -928,7 +928,7 @@ efx_vpd_hunk_set(
 		}
 
 		/* Modify tag length (large resource type) */
-		taglen += (dest - source);
+		taglen += (uint16_t)(dest - source);
 		EFX_POPULATE_WORD_1(word, EFX_WORD_0, taglen);
 		data[offset - 2] = EFX_WORD_FIELD(word, EFX_BYTE_0);
 		data[offset - 1] = EFX_WORD_FIELD(word, EFX_BYTE_1);
-- 
2.7.4

[PATCH 45/53] net/sfc/base: fix warnings from VS2015 C compiler (C4245)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix level 4 warning
"C4245: 'initializing': conversion from 'int' to 'uint32_t',
signed/unsigned mismatch" warning; no functional changes.

Fixes: f9565517ff4f ("net/sfc/base: import filters support")
Fixes: daa007afd04b ("net/sfc/base: split local MAC I/G back into separate flags")
Fixes: 23c6d0dbac80 ("net/sfc/base: improve API to get supported filter matches")
Fixes: 457beb2c4d3e ("net/sfc/base: support filters for encapsulated packets")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_filter.c |  2 +-
 drivers/net/sfc/base/efx.h         | 54 ++++++++++++++++++++++----------------
 2 files changed, 32 insertions(+), 24 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_filter.c b/drivers/net/sfc/base/ef10_filter.c
index 2dd823b..9e16243 100644
--- a/drivers/net/sfc/base/ef10_filter.c
+++ b/drivers/net/sfc/base/ef10_filter.c
@@ -995,7 +995,7 @@ ef10_filter_supported_filters(
 	size_t list_length;
 	uint32_t i;
 	efx_rc_t rc;
-	uint32_t all_filter_flags =
+	efx_filter_match_flags_t all_filter_flags =
 	    (EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_LOC_HOST |
 	    EFX_FILTER_MATCH_REM_MAC | EFX_FILTER_MATCH_REM_PORT |
 	    EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_PORT |
diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index eb44279..151aae8 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2278,29 +2278,37 @@ typedef unsigned int efx_filter_flags_t;
  * Flags which specify the fields to match on. The values are the same as in the
  * MC_CMD_FILTER_OP/MC_CMD_FILTER_OP_EXT commands.
  */
-typedef enum efx_filter_match_flags_e {
-	EFX_FILTER_MATCH_REM_HOST = 0x0001,	/* Match by remote IP host
-						 * address */
-	EFX_FILTER_MATCH_LOC_HOST = 0x0002,	/* Match by local IP host
-						 * address */
-	EFX_FILTER_MATCH_REM_MAC = 0x0004,	/* Match by remote MAC address */
-	EFX_FILTER_MATCH_REM_PORT = 0x0008,	/* Match by remote TCP/UDP port */
-	EFX_FILTER_MATCH_LOC_MAC = 0x0010,	/* Match by remote TCP/UDP port */
-	EFX_FILTER_MATCH_LOC_PORT = 0x0020,	/* Match by local TCP/UDP port */
-	EFX_FILTER_MATCH_ETHER_TYPE = 0x0040,	/* Match by Ether-type */
-	EFX_FILTER_MATCH_INNER_VID = 0x0080,	/* Match by inner VLAN ID */
-	EFX_FILTER_MATCH_OUTER_VID = 0x0100,	/* Match by outer VLAN ID */
-	EFX_FILTER_MATCH_IP_PROTO = 0x0200,	/* Match by IP transport
-						 * protocol */
-	/* For encapsulated packets, match all multicast inner frames */
-	EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST = 0x01000000,
-	/* For encapsulated packets, match all unicast inner frames */
-	EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST = 0x02000000,
-	/* Match otherwise-unmatched multicast and broadcast packets */
-	EFX_FILTER_MATCH_UNKNOWN_MCAST_DST = 0x40000000,
-	/* Match otherwise-unmatched unicast packets */
-	EFX_FILTER_MATCH_UNKNOWN_UCAST_DST = 0x80000000,
-} efx_filter_match_flags_t;
+
+/* Match by remote IP host address */
+#define	EFX_FILTER_MATCH_REM_HOST		0x00000001
+/* Match by local IP host address */
+#define	EFX_FILTER_MATCH_LOC_HOST		0x00000002
+/* Match by remote MAC address */
+#define	EFX_FILTER_MATCH_REM_MAC		0x00000004
+/* Match by remote TCP/UDP port */
+#define	EFX_FILTER_MATCH_REM_PORT		0x00000008
+/* Match by remote TCP/UDP port */
+#define	EFX_FILTER_MATCH_LOC_MAC		0x00000010
+/* Match by local TCP/UDP port */
+#define	EFX_FILTER_MATCH_LOC_PORT		0x00000020
+/* Match by Ether-type */
+#define	EFX_FILTER_MATCH_ETHER_TYPE		0x00000040
+/* Match by inner VLAN ID */
+#define	EFX_FILTER_MATCH_INNER_VID		0x00000080
+/* Match by outer VLAN ID */
+#define	EFX_FILTER_MATCH_OUTER_VID		0x00000100
+/* Match by IP transport protocol */
+#define	EFX_FILTER_MATCH_IP_PROTO		0x00000200
+/* For encapsulated packets, match all multicast inner frames */
+#define	EFX_FILTER_MATCH_IFRM_UNKNOWN_MCAST_DST	0x01000000
+/* For encapsulated packets, match all unicast inner frames */
+#define	EFX_FILTER_MATCH_IFRM_UNKNOWN_UCAST_DST	0x02000000
+/* Match otherwise-unmatched multicast and broadcast packets */
+#define	EFX_FILTER_MATCH_UNKNOWN_MCAST_DST	0x40000000
+/* Match otherwise-unmatched unicast packets */
+#define	EFX_FILTER_MATCH_UNKNOWN_UCAST_DST	0x80000000
+
+typedef uint32_t efx_filter_match_flags_t;
 
 typedef enum efx_filter_priority_s {
 	EFX_FILTER_PRI_HINT = 0,	/* Performance hint */
-- 
2.7.4

[PATCH 46/53] net/sfc/base: fix warnings from VS2015 C compiler (C4100)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix multiple level 4 warnings
"C4100: 'xxx': unreferenced formal parameter"
no functional changes.

The _NOTE(ARGUNUSED(xxx)) annotations are being exposed to the Visual
Studio 2015 C compiler with the following:

    #define _NOTE_ARGUNUSED(...) UNREFERENCED_PARAMETER((__VA_ARGS__));
    #define _NOTE(_annotation)   _NOTE_ ## _annotation

Fixes: 099c33bef343 ("net/sfc/base: import MCDI proxy authorization")
Fixes: e7cd430c864f ("net/sfc/base: import SFN7xxx family support")
Fixes: 7243cc0869f8 ("net/sfc/base: import software per-queue statistics")
Fixes: d96a34d165b1 ("net/sfc/base: import NVRAM support")
Fixes: 05fce2ce8451 ("net/sfc/base: import libefx licensing")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_nvram.c | 3 +++
 drivers/net/sfc/base/ef10_rx.c    | 2 ++
 drivers/net/sfc/base/ef10_tx.c    | 8 ++++++++
 drivers/net/sfc/base/efx_ev.c     | 2 ++
 drivers/net/sfc/base/efx_lic.c    | 6 +++---
 drivers/net/sfc/base/efx_mcdi.c   | 2 ++
 6 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_nvram.c b/drivers/net/sfc/base/ef10_nvram.c
index d0ee1be..8b99bd5 100644
--- a/drivers/net/sfc/base/ef10_nvram.c
+++ b/drivers/net/sfc/base/ef10_nvram.c
@@ -672,6 +672,7 @@ ef10_nvram_buffer_validate(
 	int pos;
 	efx_rc_t rc;
 
+	_NOTE(ARGUNUSED(enp, partn))
 	EFX_STATIC_ASSERT(sizeof (*header) <= EF10_NVRAM_CHUNK);
 
 	if ((partn_data == NULL) || (partn_size == 0)) {
@@ -1282,6 +1283,8 @@ ef10_nvram_buf_read_tlv(
 	caddr_t value;
 	efx_rc_t rc;
 
+	_NOTE(ARGUNUSED(enp))
+
 	if ((seg_data == NULL) || (max_seg_size == 0)) {
 		rc = EINVAL;
 		goto fail1;
diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index cebc34f..5cf5910 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -749,6 +749,8 @@ ef10_rx_qpost(
 	unsigned int offset;
 	unsigned int id;
 
+	_NOTE(ARGUNUSED(completed))
+
 #if EFSYS_OPT_RX_PACKED_STREAM
 	/*
 	 * Real size of the buffer does not fit into ESF_DZ_RX_KER_BYTE_CNT
diff --git a/drivers/net/sfc/base/ef10_tx.c b/drivers/net/sfc/base/ef10_tx.c
index 14b23d0..8f84f80 100644
--- a/drivers/net/sfc/base/ef10_tx.c
+++ b/drivers/net/sfc/base/ef10_tx.c
@@ -606,6 +606,8 @@ ef10_tx_qdesc_dma_create(
 	__in	boolean_t eop,
 	__out	efx_desc_t *edp)
 {
+	_NOTE(ARGUNUSED(etp))
+
 	/* No limitations on boundary crossing */
 	EFSYS_ASSERT(size <= etp->et_enp->en_nic_cfg.enc_tx_dma_desc_size_max);
 
@@ -629,6 +631,8 @@ ef10_tx_qdesc_tso_create(
 	__in	uint8_t  tcp_flags,
 	__out	efx_desc_t *edp)
 {
+	_NOTE(ARGUNUSED(etp))
+
 	EFSYS_PROBE4(tx_desc_tso_create, unsigned int, etp->et_index,
 		    uint16_t, ipv4_id, uint32_t, tcp_seq,
 		    uint8_t, tcp_flags);
@@ -651,6 +655,8 @@ ef10_tx_qdesc_tso2_create(
 	__out_ecount(count)	efx_desc_t *edp,
 	__in			int count)
 {
+	_NOTE(ARGUNUSED(etp, count))
+
 	EFSYS_PROBE4(tx_desc_tso2_create, unsigned int, etp->et_index,
 		    uint16_t, ipv4_id, uint32_t, tcp_seq,
 		    uint16_t, tcp_mss);
@@ -680,6 +686,8 @@ ef10_tx_qdesc_vlantci_create(
 	__in	uint16_t  tci,
 	__out	efx_desc_t *edp)
 {
+	_NOTE(ARGUNUSED(etp))
+
 	EFSYS_PROBE2(tx_desc_vlantci_create, unsigned int, etp->et_index,
 		    uint16_t, tci);
 
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index e7f49d7..e0f6ba2 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -1417,6 +1417,8 @@ efx_ev_qstat_name(
 	__in	efx_nic_t *enp,
 	__in	unsigned int id)
 {
+	_NOTE(ARGUNUSED(enp))
+
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(id, <, EV_NQSTATS);
 
diff --git a/drivers/net/sfc/base/efx_lic.c b/drivers/net/sfc/base/efx_lic.c
index cfff51a..15405f9 100644
--- a/drivers/net/sfc/base/efx_lic.c
+++ b/drivers/net/sfc/base/efx_lic.c
@@ -561,7 +561,7 @@ efx_lic_v1v2_read_key(
 {
 	efx_rc_t rc;
 
-	_NOTE(ARGUNUSED(enp))
+	_NOTE(ARGUNUSED(enp, buffer_size))
 	EFSYS_ASSERT(length <= (EFX_LICENSE_V1V2_PAYLOAD_LENGTH_MAX +
 	    EFX_LICENSE_V1V2_HEADER_LENGTH));
 
@@ -631,7 +631,7 @@ efx_lic_v1v2_delete_key(
 	uint32_t move_start = offset + length;
 	uint32_t move_length = end - move_start;
 
-	_NOTE(ARGUNUSED(enp))
+	_NOTE(ARGUNUSED(enp, buffer_size))
 	EFSYS_ASSERT(end <= buffer_size);
 
 	/* Shift everything after the key down */
@@ -649,7 +649,7 @@ efx_lic_v1v2_create_partition(
 				caddr_t bufferp,
 	__in			size_t buffer_size)
 {
-	_NOTE(ARGUNUSED(enp))
+	_NOTE(ARGUNUSED(enp, buffer_size))
 	EFSYS_ASSERT(EFX_LICENSE_V1V2_HEADER_LENGTH <= buffer_size);
 
 	/* Write terminator */
diff --git a/drivers/net/sfc/base/efx_mcdi.c b/drivers/net/sfc/base/efx_mcdi.c
index 936ad25..3799b05 100644
--- a/drivers/net/sfc/base/efx_mcdi.c
+++ b/drivers/net/sfc/base/efx_mcdi.c
@@ -809,6 +809,8 @@ efx_mcdi_get_proxy_handle(
 {
 	efx_rc_t rc;
 
+	_NOTE(ARGUNUSED(enp))
+
 	/*
 	 * Return proxy handle from MCDI request that returned with error
 	 * MC_MCD_ERR_PROXY_PENDING. This handle is used to wait for a matching
-- 
2.7.4

[PATCH 47/53] net/sfc/base: fix warnings from VS2015 C compiler (C4189)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix multiple level 4 warnings
"C4189: 'xxx': local variable is initialized but not referenced";
no functional changes.

Fixes: 19b64c6ac35f ("net/sfc/base: import libefx base")
Fixes: dfb3b1ce15f6 ("net/sfc/base: import monitors access via MCDI")
Fixes: e7cd430c864f ("net/sfc/base: import SFN7xxx family support")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_ev.c  |  7 ++++---
 drivers/net/sfc/base/efx_ev.c   |  4 ++--
 drivers/net/sfc/base/efx_tx.c   |  4 ++--
 drivers/net/sfc/base/mcdi_mon.c | 11 ++++++-----
 4 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/drivers/net/sfc/base/ef10_ev.c b/drivers/net/sfc/base/ef10_ev.c
index e3a91c2..ee576a0 100644
--- a/drivers/net/sfc/base/ef10_ev.c
+++ b/drivers/net/sfc/base/ef10_ev.c
@@ -575,7 +575,7 @@ ef10_ev_qdestroy(
 	EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
 	    enp->en_family == EFX_FAMILY_MEDFORD);
 
-	(void) efx_mcdi_fini_evq(eep->ee_enp, eep->ee_index);
+	(void) efx_mcdi_fini_evq(enp, eep->ee_index);
 }
 
 	__checkReturn	efx_rc_t
@@ -1346,9 +1346,12 @@ ef10_ev_rxlabel_init(
 	__in		efx_rxq_type_t type)
 {
 	efx_evq_rxq_state_t *eersp;
+#if EFSYS_OPT_RX_PACKED_STREAM
 	boolean_t packed_stream = (type >= EFX_RXQ_TYPE_PACKED_STREAM_1M) &&
 	    (type <= EFX_RXQ_TYPE_PACKED_STREAM_64K);
+#endif
 
+	_NOTE(ARGUNUSED(type))
 	EFSYS_ASSERT3U(label, <, EFX_ARRAY_SIZE(eep->ee_rxq_state));
 	eersp = &eep->ee_rxq_state[label];
 
@@ -1386,8 +1389,6 @@ ef10_ev_rxlabel_init(
 		EFSYS_ASSERT3U(eersp->eers_rx_packed_stream_credits, <=,
 		    EFX_RX_PACKED_STREAM_MAX_CREDITS);
 	}
-#else
-	EFSYS_ASSERT(!packed_stream);
 #endif
 }
 
diff --git a/drivers/net/sfc/base/efx_ev.c b/drivers/net/sfc/base/efx_ev.c
index e0f6ba2..7515aae 100644
--- a/drivers/net/sfc/base/efx_ev.c
+++ b/drivers/net/sfc/base/efx_ev.c
@@ -223,14 +223,14 @@ efx_ev_qcreate(
 	__deref_out	efx_evq_t **eepp)
 {
 	const efx_ev_ops_t *eevop = enp->en_eevop;
-	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 	efx_evq_t *eep;
 	efx_rc_t rc;
 
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 
-	EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <, encp->enc_evq_limit);
+	EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <,
+	    enp->en_nic_cfg.enc_evq_limit);
 
 	switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) {
 	case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT:
diff --git a/drivers/net/sfc/base/efx_tx.c b/drivers/net/sfc/base/efx_tx.c
index a68babc..0cdf7e1 100644
--- a/drivers/net/sfc/base/efx_tx.c
+++ b/drivers/net/sfc/base/efx_tx.c
@@ -298,14 +298,14 @@ efx_tx_qcreate(
 	__out		unsigned int *addedp)
 {
 	const efx_tx_ops_t *etxop = enp->en_etxop;
-	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 	efx_txq_t *etp;
 	efx_rc_t rc;
 
 	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_TX);
 
-	EFSYS_ASSERT3U(enp->en_tx_qcount + 1, <, encp->enc_txq_limit);
+	EFSYS_ASSERT3U(enp->en_tx_qcount + 1, <,
+	    enp->en_nic_cfg.enc_txq_limit);
 
 	/* Allocate an TXQ object */
 	EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_txq_t), etp);
diff --git a/drivers/net/sfc/base/mcdi_mon.c b/drivers/net/sfc/base/mcdi_mon.c
index a083eac..8ea4216 100644
--- a/drivers/net/sfc/base/mcdi_mon.c
+++ b/drivers/net/sfc/base/mcdi_mon.c
@@ -264,7 +264,6 @@ mcdi_mon_ev(
 	__out				efx_mon_stat_value_t *valuep)
 {
 	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
-	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 	uint16_t port_mask;
 	uint16_t sensor;
 	uint16_t state;
@@ -280,11 +279,13 @@ mcdi_mon_ev(
 	value = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_VALUE);
 
 	/* Hardware must support this MCDI sensor */
-	EFSYS_ASSERT3U(sensor, <, (8 * encp->enc_mcdi_sensor_mask_size));
+	EFSYS_ASSERT3U(sensor, <,
+	    (8 * enp->en_nic_cfg.enc_mcdi_sensor_mask_size));
 	EFSYS_ASSERT((sensor % MCDI_MON_PAGE_SIZE) != MC_CMD_SENSOR_PAGE0_NEXT);
-	EFSYS_ASSERT(encp->enc_mcdi_sensor_maskp != NULL);
-	EFSYS_ASSERT((encp->enc_mcdi_sensor_maskp[sensor / MCDI_MON_PAGE_SIZE] &
-		(1U << (sensor % MCDI_MON_PAGE_SIZE))) != 0);
+	EFSYS_ASSERT(enp->en_nic_cfg.enc_mcdi_sensor_maskp != NULL);
+	EFSYS_ASSERT(
+	    (enp->en_nic_cfg.enc_mcdi_sensor_maskp[sensor/MCDI_MON_PAGE_SIZE] &
+	    (1U << (sensor % MCDI_MON_PAGE_SIZE))) != 0);
 
 	/* But we don't have to understand it */
 	if (sensor >= EFX_ARRAY_SIZE(mcdi_sensor_map)) {
-- 
2.7.4

[PATCH 48/53] net/sfc/base: fix warnings from VS2015 C compiler (C4057)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix two level 4 warnings
"C4057: 'function': 'const uint8_t *' differs in indirection to
slightly different base types from 'caddr_t'"; no functional changes.

Fixes: 354df7eadf66 ("net/sfc/base: import bootrom configuration")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx.h         | 4 ++--
 drivers/net/sfc/base/efx_bootcfg.c | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 151aae8..1b1be82 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -1506,13 +1506,13 @@ efx_bootcfg_copy_sector(
 extern				efx_rc_t
 efx_bootcfg_read(
 	__in			efx_nic_t *enp,
-	__out_bcount(size)	caddr_t data,
+	__out_bcount(size)	uint8_t *data,
 	__in			size_t size);
 
 extern				efx_rc_t
 efx_bootcfg_write(
 	__in			efx_nic_t *enp,
-	__in_bcount(size)	caddr_t data,
+	__in_bcount(size)	uint8_t *data,
 	__in			size_t size);
 
 #endif	/* EFSYS_OPT_BOOTCFG */
diff --git a/drivers/net/sfc/base/efx_bootcfg.c b/drivers/net/sfc/base/efx_bootcfg.c
index 660d000..75f7388 100644
--- a/drivers/net/sfc/base/efx_bootcfg.c
+++ b/drivers/net/sfc/base/efx_bootcfg.c
@@ -290,7 +290,7 @@ efx_bootcfg_copy_sector(
 				efx_rc_t
 efx_bootcfg_read(
 	__in			efx_nic_t *enp,
-	__out_bcount(size)	caddr_t data,
+	__out_bcount(size)	uint8_t *data,
 	__in			size_t size)
 {
 	uint8_t *payload = NULL;
@@ -353,7 +353,7 @@ efx_bootcfg_read(
 		goto fail7;
 
 	/* Verify that the area is correctly formatted and checksummed */
-	rc = efx_bootcfg_verify(enp, (caddr_t)payload, sector_length,
+	rc = efx_bootcfg_verify(enp, payload, sector_length,
 	    &used_bytes);
 	if (rc != 0 || used_bytes == 0) {
 		payload[0] = (uint8_t)(~DHCP_END & 0xff);
@@ -430,7 +430,7 @@ efx_bootcfg_read(
 				efx_rc_t
 efx_bootcfg_write(
 	__in			efx_nic_t *enp,
-	__in_bcount(size)	caddr_t data,
+	__in_bcount(size)	uint8_t *data,
 	__in			size_t size)
 {
 	uint8_t *partn_data;
-- 
2.7.4

[PATCH 49/53] net/sfc/base: fix warnings from VS2015 C compiler (C4214)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix multiple level 4 warnings
"C4214: nonstandard extension used: bit field types other than int";
no functional changes.

Fixes: f9565517ff4f ("net/sfc/base: import filters support")
Fixes: 457beb2c4d3e ("net/sfc/base: support filters for encapsulated packets")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx.h | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h
index 1b1be82..93accd7 100644
--- a/drivers/net/sfc/base/efx.h
+++ b/drivers/net/sfc/base/efx.h
@@ -2272,7 +2272,7 @@ efx_tx_qdestroy(
 /* Filter is for TX */
 #define	EFX_FILTER_FLAG_TX		0x10
 
-typedef unsigned int efx_filter_flags_t;
+typedef uint8_t efx_filter_flags_t;
 
 /*
  * Flags which specify the fields to match on. The values are the same as in the
@@ -2329,22 +2329,22 @@ typedef enum efx_filter_priority_s {
  */
 
 typedef struct efx_filter_spec_s {
-	uint32_t		efs_match_flags;
-	uint32_t		efs_priority:2;
-	uint32_t		efs_flags:6;
-	uint32_t		efs_dmaq_id:12;
-	uint32_t		efs_rss_context;
-	uint16_t		efs_outer_vid;
-	uint16_t		efs_inner_vid;
-	uint8_t			efs_loc_mac[EFX_MAC_ADDR_LEN];
-	uint8_t			efs_rem_mac[EFX_MAC_ADDR_LEN];
-	uint16_t		efs_ether_type;
-	uint8_t			efs_ip_proto;
-	efx_tunnel_protocol_t	efs_encap_type;
-	uint16_t		efs_loc_port;
-	uint16_t		efs_rem_port;
-	efx_oword_t		efs_rem_host;
-	efx_oword_t		efs_loc_host;
+	efx_filter_match_flags_t	efs_match_flags;
+	uint8_t				efs_priority;
+	efx_filter_flags_t		efs_flags;
+	uint16_t			efs_dmaq_id;
+	uint32_t			efs_rss_context;
+	uint16_t			efs_outer_vid;
+	uint16_t			efs_inner_vid;
+	uint8_t				efs_loc_mac[EFX_MAC_ADDR_LEN];
+	uint8_t				efs_rem_mac[EFX_MAC_ADDR_LEN];
+	uint16_t			efs_ether_type;
+	uint8_t				efs_ip_proto;
+	efx_tunnel_protocol_t		efs_encap_type;
+	uint16_t			efs_loc_port;
+	uint16_t			efs_rem_port;
+	efx_oword_t			efs_rem_host;
+	efx_oword_t			efs_loc_host;
 } efx_filter_spec_t;
 
 
-- 
2.7.4

[PATCH 50/53] net/sfc/base: remove obsolete check for pre-Siena hardware

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

The fail4 label was used twice, so it doesn't need removing.

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_rx.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c
index 1a3b6a5..f922b59 100644
--- a/drivers/net/sfc/base/efx_rx.c
+++ b/drivers/net/sfc/base/efx_rx.c
@@ -1350,10 +1350,6 @@ siena_rx_qcreate(
 
 #if EFSYS_OPT_RX_SCATTER
 	case EFX_RXQ_TYPE_SCATTER:
-		if (enp->en_family < EFX_FAMILY_SIENA) {
-			rc = EINVAL;
-			goto fail4;
-		}
 		jumbo = B_TRUE;
 		break;
 #endif	/* EFSYS_OPT_RX_SCATTER */
-- 
2.7.4

[PATCH 51/53] net/sfc/base: expand on comment on number of queues field

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

Expand on comment on RSS_CONTEXT_ALLOC_IN_NUM_QUEUES field.

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/ef10_rx.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c
index 5cf5910..9b0e1ee 100644
--- a/drivers/net/sfc/base/ef10_rx.c
+++ b/drivers/net/sfc/base/ef10_rx.c
@@ -217,7 +217,13 @@ efx_mcdi_rss_context_alloc(
 	MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
 	    EVB_PORT_ID_ASSIGNED);
 	MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, context_type);
-	/* NUM_QUEUES is only used to validate indirection table offsets */
+
+	/*
+	 * For exclusive contexts, NUM_QUEUES is only used to validate
+	 * indirection table offsets.
+	 * For shared contexts, the provided context will spread traffic over
+	 * NUM_QUEUES many queues.
+	 */
 	MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, num_queues);
 
 	efx_mcdi_execute(enp, &req);
-- 
2.7.4

[PATCH 52/53] net/sfc/base: fix PreFAST static analysis warning (C6001)

[Andrew Rybchenko]

From: Andrew Lee <alee@solarflare.com>

Fix warning
"C6001: Using uninitialized memory '*sensor_maskp'"
which could occur when the npages argument to efx_mcdi_sensor_info()
is less than or equal to zero.

Fixes: dfb3b1ce15f6 ("net/sfc/base: import monitors access via MCDI")
Cc: stable@dpdk.org

Signed-off-by: Andrew Lee <alee@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/mcdi_mon.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/net/sfc/base/mcdi_mon.c b/drivers/net/sfc/base/mcdi_mon.c
index 8ea4216..7e4264a 100644
--- a/drivers/net/sfc/base/mcdi_mon.c
+++ b/drivers/net/sfc/base/mcdi_mon.c
@@ -396,6 +396,11 @@ efx_mcdi_sensor_info(
 
 	EFSYS_ASSERT(sensor_maskp != NULL);
 
+	if (npages < 1) {
+		rc = EINVAL;
+		goto fail1;
+	}
+
 	for (page = 0; page < npages; page++) {
 		uint32_t mask;
 
@@ -412,7 +417,7 @@ efx_mcdi_sensor_info(
 
 		if (req.emr_rc != 0) {
 			rc = req.emr_rc;
-			goto fail1;
+			goto fail2;
 		}
 
 		mask = MCDI_OUT_DWORD(req, SENSOR_INFO_OUT_MASK);
@@ -420,18 +425,20 @@ efx_mcdi_sensor_info(
 		if ((page != (npages - 1)) &&
 		    ((mask & (1U << MC_CMD_SENSOR_PAGE0_NEXT)) == 0)) {
 			rc = EINVAL;
-			goto fail2;
+			goto fail3;
 		}
 		sensor_maskp[page] = mask;
 	}
 
 	if (sensor_maskp[npages - 1] & (1U << MC_CMD_SENSOR_PAGE0_NEXT)) {
 		rc = EINVAL;
-		goto fail3;
+		goto fail4;
 	}
 
 	return (0);
 
+fail4:
+	EFSYS_PROBE(fail4);
 fail3:
 	EFSYS_PROBE(fail3);
 fail2:
-- 
2.7.4

[PATCH 53/53] net/sfc/base: move BIU test code into Siena-specific file

[Andrew Rybchenko]

From: Mark Spender <mspender@solarflare.com>

Signed-off-by: Mark Spender <mspender@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
 drivers/net/sfc/base/efx_impl.h  |  4 ---
 drivers/net/sfc/base/efx_nic.c   | 72 ---------------------------------------
 drivers/net/sfc/base/siena_nic.c | 73 +++++++++++++++++++++++++++++++++++++++-
 3 files changed, 72 insertions(+), 77 deletions(-)

diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h
index fa976eb..eaa53df 100644
--- a/drivers/net/sfc/base/efx_impl.h
+++ b/drivers/net/sfc/base/efx_impl.h
@@ -1074,10 +1074,6 @@ struct efx_txq_s {
 	} while (B_FALSE)
 
 extern	__checkReturn	efx_rc_t
-efx_nic_biu_test(
-	__in		efx_nic_t *enp);
-
-extern	__checkReturn	efx_rc_t
 efx_mac_select(
 	__in		efx_nic_t *enp);
 
diff --git a/drivers/net/sfc/base/efx_nic.c b/drivers/net/sfc/base/efx_nic.c
index 65eed6e..4a31bca 100644
--- a/drivers/net/sfc/base/efx_nic.c
+++ b/drivers/net/sfc/base/efx_nic.c
@@ -102,78 +102,6 @@ efx_family(
 	return (ENOTSUP);
 }
 
-
-#define	EFX_BIU_MAGIC0	0x01234567
-#define	EFX_BIU_MAGIC1	0xfedcba98
-
-	__checkReturn	efx_rc_t
-efx_nic_biu_test(
-	__in		efx_nic_t *enp)
-{
-	efx_oword_t oword;
-	efx_rc_t rc;
-
-	/*
-	 * Write magic values to scratch registers 0 and 1, then
-	 * verify that the values were written correctly.  Interleave
-	 * the accesses to ensure that the BIU is not just reading
-	 * back the cached value that was last written.
-	 */
-	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC0);
-	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
-
-	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC1);
-	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
-
-	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
-	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC0) {
-		rc = EIO;
-		goto fail1;
-	}
-
-	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
-	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC1) {
-		rc = EIO;
-		goto fail2;
-	}
-
-	/*
-	 * Perform the same test, with the values swapped.  This
-	 * ensures that subsequent tests don't start with the correct
-	 * values already written into the scratch registers.
-	 */
-	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC1);
-	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
-
-	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, EFX_BIU_MAGIC0);
-	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
-
-	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
-	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC1) {
-		rc = EIO;
-		goto fail3;
-	}
-
-	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
-	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != EFX_BIU_MAGIC0) {
-		rc = EIO;
-		goto fail4;
-	}
-
-	return (0);
-
-fail4:
-	EFSYS_PROBE(fail4);
-fail3:
-	EFSYS_PROBE(fail3);
-fail2:
-	EFSYS_PROBE(fail2);
-fail1:
-	EFSYS_PROBE1(fail1, efx_rc_t, rc);
-
-	return (rc);
-}
-
 #if EFSYS_OPT_SIENA
 
 static const efx_nic_ops_t	__efx_nic_siena_ops = {
diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c
index f9cda34..a9793a1 100644
--- a/drivers/net/sfc/base/siena_nic.c
+++ b/drivers/net/sfc/base/siena_nic.c
@@ -213,6 +213,77 @@ siena_phy_cfg(
 	return (rc);
 }
 
+#define	SIENA_BIU_MAGIC0	0x01234567
+#define	SIENA_BIU_MAGIC1	0xfedcba98
+
+static	__checkReturn	efx_rc_t
+siena_nic_biu_test(
+	__in		efx_nic_t *enp)
+{
+	efx_oword_t oword;
+	efx_rc_t rc;
+
+	/*
+	 * Write magic values to scratch registers 0 and 1, then
+	 * verify that the values were written correctly.  Interleave
+	 * the accesses to ensure that the BIU is not just reading
+	 * back the cached value that was last written.
+	 */
+	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, SIENA_BIU_MAGIC0);
+	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
+
+	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, SIENA_BIU_MAGIC1);
+	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
+
+	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
+	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != SIENA_BIU_MAGIC0) {
+		rc = EIO;
+		goto fail1;
+	}
+
+	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
+	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != SIENA_BIU_MAGIC1) {
+		rc = EIO;
+		goto fail2;
+	}
+
+	/*
+	 * Perform the same test, with the values swapped.  This
+	 * ensures that subsequent tests don't start with the correct
+	 * values already written into the scratch registers.
+	 */
+	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, SIENA_BIU_MAGIC1);
+	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
+
+	EFX_POPULATE_OWORD_1(oword, FRF_AZ_DRIVER_DW0, SIENA_BIU_MAGIC0);
+	EFX_BAR_TBL_WRITEO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
+
+	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 0, &oword, B_TRUE);
+	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != SIENA_BIU_MAGIC1) {
+		rc = EIO;
+		goto fail3;
+	}
+
+	EFX_BAR_TBL_READO(enp, FR_AZ_DRIVER_REG, 1, &oword, B_TRUE);
+	if (EFX_OWORD_FIELD(oword, FRF_AZ_DRIVER_DW0) != SIENA_BIU_MAGIC0) {
+		rc = EIO;
+		goto fail4;
+	}
+
+	return (0);
+
+fail4:
+	EFSYS_PROBE(fail4);
+fail3:
+	EFSYS_PROBE(fail3);
+fail2:
+	EFSYS_PROBE(fail2);
+fail1:
+	EFSYS_PROBE1(fail1, efx_rc_t, rc);
+
+	return (rc);
+}
+
 	__checkReturn	efx_rc_t
 siena_nic_probe(
 	__in		efx_nic_t *enp)
@@ -227,7 +298,7 @@ siena_nic_probe(
 	EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
 
 	/* Test BIU */
-	if ((rc = efx_nic_biu_test(enp)) != 0)
+	if ((rc = siena_nic_biu_test(enp)) != 0)
 		goto fail1;
 
 	/* Clear the region register */
-- 
2.7.4

Re: [PATCH 00/53] net/sfc: base driver update

[Ferruh Yigit]

On 11/16/2017 12:03 AM, Andrew Rybchenko wrote:
> The series updates sfc base driver.
> 
> There are a number of check patch warnings and errors because of
> coding style differencies.
> 
> Andrew Jackson (2):
>   net/sfc/base: copy new header from firmwaresrc
>   net/sfc/base: add support for new sensors
> 
> Andrew Lee (9):
>   net/sfc/base: add support for MUM/SUC firmware partitions
>   net/sfc/base: fix warnings from VS2015 C compiler (C4310)
>   net/sfc/base: fix warnings from VS2015 C compiler (C4244)
>   net/sfc/base: fix warnings from VS2015 C compiler (C4245)
>   net/sfc/base: fix warnings from VS2015 C compiler (C4100)
>   net/sfc/base: fix warnings from VS2015 C compiler (C4189)
>   net/sfc/base: fix warnings from VS2015 C compiler (C4057)
>   net/sfc/base: fix warnings from VS2015 C compiler (C4214)
>   net/sfc/base: fix PreFAST static analysis warning (C6001)
> 
> Andrew Rybchenko (9):
>   net/sfc/base: improve PS credits push function name
>   net/sfc/base: improve RxQ label init prototype
>   net/sfc/base: add description of the PS packets layout
>   net/sfc/base: clarify meaning of Rx desc lbits in PS mode
>   net/sfc/base: optimize credits overflow check
>   net/sfc/base: provide simple access to RxQ state in EvQ
>   net/sfc/base: enforce packed stream fake buffer size
>   net/sfc/base: more accurately calculate number of PS credits
>   net/sfc/base: support inner checksum offload on transmit
> 
> Andy Moreton (21):
>   net/sfc/base: fix result code in MCDI NVRAM update finish
>   net/sfc/base: simplify verify result handling
>   net/sfc/base: report verify result from RW finish callback
>   net/sfc/base: extend NVRAM RW finish to return verify result
>   net/sfc/base: rename firmware update verify result cap field
>   net/sfc/base: simplify NVRAM type to partition mappings
>   net/sfc/base: check NVRAM locking by partition ID
>   net/sfc/base: report correct partition write chunk size
>   net/sfc/base: fix check in NVRAM validate
>   net/sfc/base: precheck and verify flash writes
>   net/sfc/base: remove duplicate NVRAM asserts
>   net/sfc/base: quieten get version methods
>   net/sfc/base: fix PreFAST issues
>   net/sfc/base: make MAC naming consistent with other modules
>   net/sfc/base: improve names for EVQ descriptor counts
>   net/sfc/base: improve names for RXQ descriptor counts
>   net/sfc/base: improve names for TXQ descriptor counts
>   net/sfc/base: move Siena-specific defs to right header
>   net/sfc/base: run mkconfig.py to add a new sensors
>   net/sfc/base: remove unused defined for WPTR alignment
>   net/sfc/base: cstyle fixes
> 
> Mark Spender (11):
>   net/sfc/base: do not use Tx desc push with TSO descriptors
>   net/sfc/base: use MCDIv2 for requests with too long response
>   net/sfc/base: ignore error in completion event on MCDIv2 HW
>   net/sfc/base: request info about outer frame in Rx events
>   net/sfc/base: remove assertion on no longer used define
>   net/sfc/base: allow to use PHY stats on Huntington/Medford
>   net/sfc/base: fix diagnostics support build without Siena
>   net/sfc/base: fix probes in licensing support
>   net/sfc/base: remove obsolete check for pre-Siena hardware
>   net/sfc/base: expand on comment on number of queues field
>   net/sfc/base: move BIU test code into Siena-specific file
> 
> Vijay Srivastava (1):
>   net/sfc/base: fix build issue with PHY LED control enabled

Series applied to dpdk-next-net/master, thanks.