* [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers
@ 2016-09-30 2:32 wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h' wei.guo.simon
` (14 more replies)
0 siblings, 15 replies; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Simon Guo <wei.guo.simon@gmail.com>
This selftest suite is for PPC register ptrace functionality. It
is also useful for Transaction Memory functionality verification.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Test Result (All tests pass on both BE and LE)
----------------------------------------------
ptrace-ebb PASS
ptrace-gpr PASS
ptrace-tm-gpr PASS
ptrace-tm-spd-gpr PASS
ptrace-tar PASS
ptrace-tm-tar PASS
ptrace-tm-spd-tar PASS
ptrace-vsx PASS
ptrace-tm-vsx PASS
ptrace-tm-spd-vsx PASS
ptrace-tm-spr PASS
Previous versions:
==================
RFC: https://lkml.org/lkml/2014/4/1/292
V1: https://lkml.org/lkml/2014/4/2/43
V2: https://lkml.org/lkml/2014/5/5/88
V3: https://lkml.org/lkml/2014/5/23/486
V4: https://lkml.org/lkml/2014/11/11/6
V5: https://lkml.org/lkml/2014/11/25/134
V6: https://lkml.org/lkml/2014/12/2/98
V7: https://lkml.org/lkml/2015/1/14/19
V8: https://lkml.org/lkml/2015/5/19/700
V9: https://lkml.org/lkml/2015/10/8/522
V10: https://lkml.org/lkml/2016/2/16/219
V11: https://lkml.org/lkml/2016/7/16/231
V12: https://lkml.org/lkml/2016/7/27/134
V13: https://lkml.org/lkml/2016/7/27/656
V14: https://lkml.org/lkml/2016/9/12/57
Changes in V15:
---------------
- Squash patch 1 and 2 to avoid compile error after patch 1.
- Reorganize some code across patch 3 and 4 to avoid compile error
- Created a new directory utility under tools/testing/selftesting/powerpc
to organize common APIs across selftests.
- Use "tbegin." instead of TBEGIN macro. The same for other TM instructions.
- Correct while(ptr); loop without memory barrier.
- Remove an invalid checking on TEXASR in tm-spd-spr.c.
- Use FAIL_IF() as possible to indicate failure line conveniently.
- Consolidate some asm code on GPR/FPR load/save into reg.h/reg.S
- rebased to recent ppc git tree.
Changes in V14:
---------------
- Remove duplicated NT_PPC_xxx register macro in
tools/testing/selftests/powerpc/ptrace/ptrace.h
- Clean some coding style warning
Changes in V13:
---------------
- Remove Cc lines from changelog
- Add more Signed-off-by lines of Simon Guo
Changes in V12:
---------------
- Revert change which is trying to incoporate following patch:
[PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live registers
- Release share memory resource in all self test cases
- Optimize tfhar usage in ptrace-tm-spr.c
Changes in V11:
---------------
- Rework based on following patch:
[PATCH 3/5] powerpc: tm: Always use fp_state and vr_state to store live registers
- Split EBB/PMU register ptrace implementation.
- Clean some coding style warning
- Added more shared memory based sync between parent and child during TM tests
- Re worded some of the commit messages and cleaned them up
- selftests/powerpc/ebb/reg.h has already moved as selftests/powerpc/reg.h
Dropped the previous patch doing the same thing
- Combined the definitions of SPRN_DSCR from dscr/ test cases
- Fixed dscr/ test cases for new SPRN_DSCR_PRIV definition available
Changes in V10:
---------------
- Rebased against the latest mainline
- Fixed couple of build failures in the test cases related to aux vector
Changes in V9:
--------------
- Fixed static build check failure after tm_orig_msr got dropped
- Fixed asm volatile construct for used registers set
- Fixed EBB, VSX, VMX tests for LE
- Fixed TAR test which was failing because of system calls
- Added checks for PPC_FEATURE2_HTM aux feature in the tests
- Fixed copyright statements
Changes in V8:
--------------
- Split the misc register set into individual ELF core notes
- Implemented support for VSX register set (on and off TM)
- Implemented support for EBB register set
- Implemented review comments on previous versions
- Some code re-arrangements, re-writes and documentation
- Added comprehensive list of test cases into selftests
Changes in V7:
--------------
- Fixed a config directive in the MISC code
- Merged the two gitignore patches into a single one
Changes in V6:
--------------
- Added two git ignore patches for powerpc selftests
- Re-formatted all in-code function definitions in kernel-doc format
Changes in V5:
--------------
- Changed flush_tmregs_to_thread, so not to take into account self tracing
- Dropped the 3rd patch in the series which had merged two functions
- Fixed one build problem for the misc debug register patch
- Accommodated almost all the review comments from Suka on the 6th patch
- Minor changes to the self test program
- Changed commit messages for some of the patches
Changes in V4:
--------------
- Added one test program into the powerpc selftest bucket in this regard
- Split the 2nd patch in the previous series into four different patches
- Accommodated most of the review comments on the previous patch series
- Added a patch to merge functions __switch_to_tm and tm_reclaim_task
Changes in V3:
--------------
- Added two new error paths in every TM related get/set functions when regset
support is not present on the system (ENODEV) or when the process does not
have any transaction active (ENODATA) in the context
- Installed the active hooks for all the newly added regset core note
types
Changes in V2:
--------------
- Removed all the power specific ptrace requests corresponding to new
NT_PPC_*
elf core note types. Now all the register sets can be accessed from
ptrace
through PTRACE_GETREGSET/PTRACE_SETREGSET using the individual
NT_PPC* core
note type instead
- Fixed couple of attribute values for REGSET_TM_CGPR register set
- Renamed flush_tmreg_to_thread as flush_tmregs_to_thread
- Fixed 32 bit checkpointed GPR support
- Changed commit messages accordingly
-------------
Anshuman Khandual (14):
selftests/powerpc: Add more SPR numbers, TM & VMX instructions to
'reg.h'/'instructions.h'
selftests/powerpc: Add ptrace tests for EBB
selftests/powerpc: Add ptrace tests for GPR/FPR registers
selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM
selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended
TM
selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers
selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM
selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM
selftests/powerpc: Add ptrace tests for VSX, VMX registers
selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM
selftests/powerpc: Add ptrace tests for VSX, VMX registers in
suspended TM
selftests/powerpc: Add ptrace tests for TM SPR registers
selftests/powerpc: Add .gitignore file for ptrace executables
selftests/powerpc: Fix a build issue
Simon Guo (1):
selftests/powerpc: move shared utility files into new utility/ dir
tools/testing/selftests/powerpc/Makefile | 5 +-
tools/testing/selftests/powerpc/alignment/Makefile | 2 +-
tools/testing/selftests/powerpc/basic_asm.h | 70 --
.../testing/selftests/powerpc/benchmarks/Makefile | 2 +-
.../selftests/powerpc/benchmarks/context_switch.c | 2 +-
.../selftests/powerpc/context_switch/Makefile | 2 +-
.../selftests/powerpc/context_switch/cp_abort.c | 6 +-
.../testing/selftests/powerpc/copyloops/validate.c | 2 +-
tools/testing/selftests/powerpc/dscr/dscr.h | 10 +-
tools/testing/selftests/powerpc/instructions.h | 68 --
tools/testing/selftests/powerpc/math/fpu_asm.S | 44 +-
tools/testing/selftests/powerpc/math/vmx_asm.S | 2 +-
tools/testing/selftests/powerpc/mm/Makefile | 2 +-
tools/testing/selftests/powerpc/pmu/Makefile | 4 +-
tools/testing/selftests/powerpc/pmu/ebb/Makefile | 2 +-
tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +
tools/testing/selftests/powerpc/ptrace/Makefile | 14 +
.../testing/selftests/powerpc/ptrace/ptrace-ebb.c | 187 +++++
.../testing/selftests/powerpc/ptrace/ptrace-ebb.h | 99 +++
.../testing/selftests/powerpc/ptrace/ptrace-gpr.c | 123 ++++
.../testing/selftests/powerpc/ptrace/ptrace-gpr.h | 74 ++
.../testing/selftests/powerpc/ptrace/ptrace-tar.c | 135 ++++
.../testing/selftests/powerpc/ptrace/ptrace-tar.h | 50 ++
.../selftests/powerpc/ptrace/ptrace-tm-gpr.c | 158 +++++
.../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c | 169 +++++
.../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c | 174 +++++
.../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c | 185 +++++
.../selftests/powerpc/ptrace/ptrace-tm-spr.c | 168 +++++
.../selftests/powerpc/ptrace/ptrace-tm-tar.c | 160 +++++
.../selftests/powerpc/ptrace/ptrace-tm-vsx.c | 168 +++++
.../testing/selftests/powerpc/ptrace/ptrace-vsx.c | 117 ++++
.../testing/selftests/powerpc/ptrace/ptrace-vsx.h | 127 ++++
tools/testing/selftests/powerpc/ptrace/ptrace.h | 771 +++++++++++++++++++++
tools/testing/selftests/powerpc/reg.h | 60 --
.../testing/selftests/powerpc/stringloops/memcmp.c | 2 +-
tools/testing/selftests/powerpc/tm/Makefile | 2 +-
tools/testing/selftests/powerpc/tm/tm.h | 2 +-
.../testing/selftests/powerpc/utility/basic_asm.h | 73 ++
.../selftests/powerpc/utility/instructions.h | 68 ++
tools/testing/selftests/powerpc/utility/reg.S | 397 +++++++++++
tools/testing/selftests/powerpc/utility/reg.h | 190 +++++
tools/testing/selftests/powerpc/utility/utils.c | 87 +++
tools/testing/selftests/powerpc/utility/utils.h | 70 ++
tools/testing/selftests/powerpc/utils.c | 87 ---
tools/testing/selftests/powerpc/utils.h | 70 --
45 files changed, 3801 insertions(+), 420 deletions(-)
delete mode 100644 tools/testing/selftests/powerpc/basic_asm.h
delete mode 100644 tools/testing/selftests/powerpc/instructions.h
create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore
create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h
delete mode 100644 tools/testing/selftests/powerpc/reg.h
create mode 100644 tools/testing/selftests/powerpc/utility/basic_asm.h
create mode 100644 tools/testing/selftests/powerpc/utility/instructions.h
create mode 100644 tools/testing/selftests/powerpc/utility/reg.S
create mode 100644 tools/testing/selftests/powerpc/utility/reg.h
create mode 100644 tools/testing/selftests/powerpc/utility/utils.c
create mode 100644 tools/testing/selftests/powerpc/utility/utils.h
delete mode 100644 tools/testing/selftests/powerpc/utils.c
delete mode 100644 tools/testing/selftests/powerpc/utils.h
--
1.8.3.1
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 02/15] selftests/powerpc: move shared utility files into new utility/ dir wei.guo.simon
` (13 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.
Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
SPRN_DSCR) are defined outside this directory, use them instead.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/dscr/dscr.h | 10 ++++-----
tools/testing/selftests/powerpc/reg.h | 35 ++++++++++++++++++++++++++---
2 files changed, 36 insertions(+), 9 deletions(-)
diff --git a/tools/testing/selftests/powerpc/dscr/dscr.h b/tools/testing/selftests/powerpc/dscr/dscr.h
index a36af1b..18ea223b 100644
--- a/tools/testing/selftests/powerpc/dscr/dscr.h
+++ b/tools/testing/selftests/powerpc/dscr/dscr.h
@@ -28,8 +28,6 @@
#include "utils.h"
-#define SPRN_DSCR 0x11 /* Privilege state SPR */
-#define SPRN_DSCR_USR 0x03 /* Problem state SPR */
#define THREADS 100 /* Max threads */
#define COUNT 100 /* Max iterations */
#define DSCR_MAX 16 /* Max DSCR value */
@@ -48,14 +46,14 @@ inline unsigned long get_dscr(void)
{
unsigned long ret;
- asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR));
+ asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR_PRIV));
return ret;
}
inline void set_dscr(unsigned long val)
{
- asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
+ asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_PRIV));
}
/* Problem state DSCR access */
@@ -63,14 +61,14 @@ inline unsigned long get_dscr_usr(void)
{
unsigned long ret;
- asm volatile("mfspr %0,%1" : "=r" (ret): "i" (SPRN_DSCR_USR));
+ asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_DSCR));
return ret;
}
inline void set_dscr_usr(unsigned long val)
{
- asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR_USR));
+ asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
}
/* Default DSCR access */
diff --git a/tools/testing/selftests/powerpc/reg.h b/tools/testing/selftests/powerpc/reg.h
index fddf368..f5d33db 100644
--- a/tools/testing/selftests/powerpc/reg.h
+++ b/tools/testing/selftests/powerpc/reg.h
@@ -51,10 +51,39 @@
#define SPRN_SDAR 781
#define SPRN_SIER 768
-#define SPRN_TEXASR 0x82
+#define SPRN_TEXASR 0x82 /* Transaction Exception and Status Register */
#define SPRN_TFIAR 0x81 /* Transaction Failure Inst Addr */
#define SPRN_TFHAR 0x80 /* Transaction Failure Handler Addr */
-#define TEXASR_FS 0x08000000
-#define SPRN_TAR 0x32f
+#define SPRN_TAR 0x32f /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11 /* Privilege State DSCR */
+#define SPRN_DSCR 0x03 /* Data Stream Control Register */
+#define SPRN_PPR 896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC 0xFE00000000000000
+#define TEXASR_FP 0x0100000000000000
+#define TEXASR_DA 0x0080000000000000
+#define TEXASR_NO 0x0040000000000000
+#define TEXASR_FO 0x0020000000000000
+#define TEXASR_SIC 0x0010000000000000
+#define TEXASR_NTC 0x0008000000000000
+#define TEXASR_TC 0x0004000000000000
+#define TEXASR_TIC 0x0002000000000000
+#define TEXASR_IC 0x0001000000000000
+#define TEXASR_IFC 0x0000800000000000
+#define TEXASR_ABT 0x0000000100000000
+#define TEXASR_SPD 0x0000000080000000
+#define TEXASR_HV 0x0000000020000000
+#define TEXASR_PR 0x0000000010000000
+#define TEXASR_FS 0x0000000008000000
+#define TEXASR_TE 0x0000000004000000
+#define TEXASR_ROT 0x0000000002000000
+
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \
+ ((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
#endif /* _SELFTESTS_POWERPC_REG_H */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 02/15] selftests/powerpc: move shared utility files into new utility/ dir
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h' wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB wei.guo.simon
` (12 subsequent siblings)
14 siblings, 0 replies; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Simon Guo <wei.guo.simon@gmail.com>
There are some functions, especially register related, which can
be shared across multiple selftests/powerpc test directories.
This patch creates a new utility directory to store those shared
functionalities, so that the file layout becomes more neat.
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/Makefile | 2 +-
tools/testing/selftests/powerpc/alignment/Makefile | 2 +-
tools/testing/selftests/powerpc/basic_asm.h | 70 -----------------
.../testing/selftests/powerpc/benchmarks/Makefile | 2 +-
.../selftests/powerpc/benchmarks/context_switch.c | 2 +-
.../selftests/powerpc/context_switch/Makefile | 2 +-
.../testing/selftests/powerpc/copyloops/validate.c | 2 +-
tools/testing/selftests/powerpc/instructions.h | 68 -----------------
tools/testing/selftests/powerpc/math/fpu_asm.S | 2 +-
tools/testing/selftests/powerpc/math/vmx_asm.S | 2 +-
tools/testing/selftests/powerpc/mm/Makefile | 2 +-
tools/testing/selftests/powerpc/pmu/Makefile | 4 +-
tools/testing/selftests/powerpc/pmu/ebb/Makefile | 2 +-
tools/testing/selftests/powerpc/reg.h | 89 ----------------------
.../testing/selftests/powerpc/stringloops/memcmp.c | 2 +-
tools/testing/selftests/powerpc/tm/Makefile | 2 +-
tools/testing/selftests/powerpc/tm/tm.h | 2 +-
.../testing/selftests/powerpc/utility/basic_asm.h | 73 ++++++++++++++++++
.../selftests/powerpc/utility/instructions.h | 68 +++++++++++++++++
tools/testing/selftests/powerpc/utility/reg.h | 89 ++++++++++++++++++++++
tools/testing/selftests/powerpc/utility/utils.c | 87 +++++++++++++++++++++
tools/testing/selftests/powerpc/utility/utils.h | 70 +++++++++++++++++
tools/testing/selftests/powerpc/utils.c | 87 ---------------------
tools/testing/selftests/powerpc/utils.h | 70 -----------------
24 files changed, 402 insertions(+), 399 deletions(-)
delete mode 100644 tools/testing/selftests/powerpc/basic_asm.h
delete mode 100644 tools/testing/selftests/powerpc/instructions.h
delete mode 100644 tools/testing/selftests/powerpc/reg.h
create mode 100644 tools/testing/selftests/powerpc/utility/basic_asm.h
create mode 100644 tools/testing/selftests/powerpc/utility/instructions.h
create mode 100644 tools/testing/selftests/powerpc/utility/reg.h
create mode 100644 tools/testing/selftests/powerpc/utility/utils.c
create mode 100644 tools/testing/selftests/powerpc/utility/utils.h
delete mode 100644 tools/testing/selftests/powerpc/utils.c
delete mode 100644 tools/testing/selftests/powerpc/utils.h
diff --git a/tools/testing/selftests/powerpc/Makefile b/tools/testing/selftests/powerpc/Makefile
index 1cc6d64..b6eb817 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -8,7 +8,7 @@ ifeq ($(ARCH),powerpc)
GIT_VERSION = $(shell git describe --always --long --dirty || echo "unknown")
-CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' -I$(CURDIR) $(CFLAGS)
+CFLAGS := -std=gnu99 -Wall -O2 -Wall -Werror -DGIT_VERSION='"$(GIT_VERSION)"' -I$(CURDIR) -I$(CURDIR)/utility $(CFLAGS)
export CFLAGS
diff --git a/tools/testing/selftests/powerpc/alignment/Makefile b/tools/testing/selftests/powerpc/alignment/Makefile
index ad6a4e4..b61e5e7 100644
--- a/tools/testing/selftests/powerpc/alignment/Makefile
+++ b/tools/testing/selftests/powerpc/alignment/Makefile
@@ -2,7 +2,7 @@ TEST_PROGS := copy_unaligned copy_first_unaligned paste_unaligned paste_last_una
all: $(TEST_PROGS)
-$(TEST_PROGS): ../harness.c ../utils.c copy_paste_unaligned_common.c
+$(TEST_PROGS): ../harness.c ../utility/utils.c copy_paste_unaligned_common.c
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/basic_asm.h b/tools/testing/selftests/powerpc/basic_asm.h
deleted file mode 100644
index 3349a07..0000000
--- a/tools/testing/selftests/powerpc/basic_asm.h
+++ /dev/null
@@ -1,70 +0,0 @@
-#ifndef _SELFTESTS_POWERPC_BASIC_ASM_H
-#define _SELFTESTS_POWERPC_BASIC_ASM_H
-
-#include <ppc-asm.h>
-#include <asm/unistd.h>
-
-#define LOAD_REG_IMMEDIATE(reg,expr) \
- lis reg,(expr)@highest; \
- ori reg,reg,(expr)@higher; \
- rldicr reg,reg,32,31; \
- oris reg,reg,(expr)@high; \
- ori reg,reg,(expr)@l;
-
-/*
- * Note: These macros assume that variables being stored on the stack are
- * doublewords, while this is usually the case it may not always be the
- * case for each use case.
- */
-#if defined(_CALL_ELF) && _CALL_ELF == 2
-#define STACK_FRAME_MIN_SIZE 32
-#define STACK_FRAME_TOC_POS 24
-#define __STACK_FRAME_PARAM(_param) (32 + ((_param)*8))
-#define __STACK_FRAME_LOCAL(_num_params,_var_num) ((STACK_FRAME_PARAM(_num_params)) + ((_var_num)*8))
-#else
-#define STACK_FRAME_MIN_SIZE 112
-#define STACK_FRAME_TOC_POS 40
-#define __STACK_FRAME_PARAM(i) (48 + ((i)*8))
-
-/*
- * Caveat: if a function passed more than 8 doublewords, the caller will have
- * made more space... which would render the 112 incorrect.
- */
-#define __STACK_FRAME_LOCAL(_num_params,_var_num) (112 + ((_var_num)*8))
-#endif
-
-/* Parameter x saved to the stack */
-#define STACK_FRAME_PARAM(var) __STACK_FRAME_PARAM(var)
-
-/* Local variable x saved to the stack after x parameters */
-#define STACK_FRAME_LOCAL(num_params,var) __STACK_FRAME_LOCAL(num_params,var)
-#define STACK_FRAME_LR_POS 16
-#define STACK_FRAME_CR_POS 8
-
-/*
- * It is very important to note here that _extra is the extra amount of
- * stack space needed. This space can be accessed using STACK_FRAME_PARAM()
- * or STACK_FRAME_LOCAL() macros.
- *
- * r1 and r2 are not defined in ppc-asm.h (instead they are defined as sp
- * and toc). Kernel programmers tend to prefer rX even for r1 and r2, hence
- * %1 and %r2. r0 is defined in ppc-asm.h and therefore %r0 gets
- * preprocessed incorrectly, hence r0.
- */
-#define PUSH_BASIC_STACK(_extra) \
- mflr r0; \
- std r0,STACK_FRAME_LR_POS(%r1); \
- stdu %r1,-(_extra + STACK_FRAME_MIN_SIZE)(%r1); \
- mfcr r0; \
- stw r0,STACK_FRAME_CR_POS(%r1); \
- std %r2,STACK_FRAME_TOC_POS(%r1);
-
-#define POP_BASIC_STACK(_extra) \
- ld %r2,STACK_FRAME_TOC_POS(%r1); \
- lwz r0,STACK_FRAME_CR_POS(%r1); \
- mtcr r0; \
- addi %r1,%r1,(_extra + STACK_FRAME_MIN_SIZE); \
- ld r0,STACK_FRAME_LR_POS(%r1); \
- mtlr r0;
-
-#endif /* _SELFTESTS_POWERPC_BASIC_ASM_H */
diff --git a/tools/testing/selftests/powerpc/benchmarks/Makefile b/tools/testing/selftests/powerpc/benchmarks/Makefile
index a9adfb7..fc55d2b 100644
--- a/tools/testing/selftests/powerpc/benchmarks/Makefile
+++ b/tools/testing/selftests/powerpc/benchmarks/Makefile
@@ -6,7 +6,7 @@ all: $(TEST_PROGS)
$(TEST_PROGS): ../harness.c
-context_switch: ../utils.c
+context_switch: ../utility/utils.c
context_switch: CFLAGS += -maltivec -mvsx -mabi=altivec
context_switch: LDLIBS += -lpthread
diff --git a/tools/testing/selftests/powerpc/benchmarks/context_switch.c b/tools/testing/selftests/powerpc/benchmarks/context_switch.c
index a36883a..778f5fb 100644
--- a/tools/testing/selftests/powerpc/benchmarks/context_switch.c
+++ b/tools/testing/selftests/powerpc/benchmarks/context_switch.c
@@ -28,7 +28,7 @@
#ifdef __powerpc__
#include <altivec.h>
#endif
-#include "../utils.h"
+#include "utils.h"
static unsigned int timeout = 30;
diff --git a/tools/testing/selftests/powerpc/context_switch/Makefile b/tools/testing/selftests/powerpc/context_switch/Makefile
index e164d14..48b558f 100644
--- a/tools/testing/selftests/powerpc/context_switch/Makefile
+++ b/tools/testing/selftests/powerpc/context_switch/Makefile
@@ -2,7 +2,7 @@ TEST_PROGS := cp_abort
all: $(TEST_PROGS)
-$(TEST_PROGS): ../harness.c ../utils.c
+$(TEST_PROGS): ../harness.c ../utility/utils.c
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/copyloops/validate.c b/tools/testing/selftests/powerpc/copyloops/validate.c
index 1750ff5..7fb436f 100644
--- a/tools/testing/selftests/powerpc/copyloops/validate.c
+++ b/tools/testing/selftests/powerpc/copyloops/validate.c
@@ -3,7 +3,7 @@
#include <stdlib.h>
#include <stdbool.h>
-#include "../utils.h"
+#include "utils.h"
#define MAX_LEN 8192
#define MAX_OFFSET 16
diff --git a/tools/testing/selftests/powerpc/instructions.h b/tools/testing/selftests/powerpc/instructions.h
deleted file mode 100644
index 0fb0bd3..0000000
--- a/tools/testing/selftests/powerpc/instructions.h
+++ /dev/null
@@ -1,68 +0,0 @@
-#ifndef _SELFTESTS_POWERPC_INSTRUCTIONS_H
-#define _SELFTESTS_POWERPC_INSTRUCTIONS_H
-
-#include <stdio.h>
-#include <stdlib.h>
-
-/* This defines the "copy" instruction from Power ISA 3.0 Book II, section 4.4. */
-#define __COPY(RA, RB, L) \
- (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10))
-#define COPY(RA, RB, L) \
- .long __COPY((RA), (RB), (L))
-
-static inline void copy(void *i)
-{
- asm volatile(str(COPY(0, %0, 0))";"
- :
- : "b" (i)
- : "memory"
- );
-}
-
-static inline void copy_first(void *i)
-{
- asm volatile(str(COPY(0, %0, 1))";"
- :
- : "b" (i)
- : "memory"
- );
-}
-
-/* This defines the "paste" instruction from Power ISA 3.0 Book II, section 4.4. */
-#define __PASTE(RA, RB, L, RC) \
- (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
-#define PASTE(RA, RB, L, RC) \
- .long __PASTE((RA), (RB), (L), (RC))
-
-static inline int paste(void *i)
-{
- int cr;
-
- asm volatile(str(PASTE(0, %1, 0, 0))";"
- "mfcr %0;"
- : "=r" (cr)
- : "b" (i)
- : "memory"
- );
- return cr;
-}
-
-static inline int paste_last(void *i)
-{
- int cr;
-
- asm volatile(str(PASTE(0, %1, 1, 1))";"
- "mfcr %0;"
- : "=r" (cr)
- : "b" (i)
- : "memory"
- );
- return cr;
-}
-
-#define PPC_INST_COPY __COPY(0, 0, 0)
-#define PPC_INST_COPY_FIRST __COPY(0, 0, 1)
-#define PPC_INST_PASTE __PASTE(0, 0, 0, 0)
-#define PPC_INST_PASTE_LAST __PASTE(0, 0, 1, 1)
-
-#endif /* _SELFTESTS_POWERPC_INSTRUCTIONS_H */
diff --git a/tools/testing/selftests/powerpc/math/fpu_asm.S b/tools/testing/selftests/powerpc/math/fpu_asm.S
index f3711d8..8d4eb96 100644
--- a/tools/testing/selftests/powerpc/math/fpu_asm.S
+++ b/tools/testing/selftests/powerpc/math/fpu_asm.S
@@ -7,7 +7,7 @@
* 2 of the License, or (at your option) any later version.
*/
-#include "../basic_asm.h"
+#include "basic_asm.h"
#define PUSH_FPU(pos) \
stfd f14,pos(sp); \
diff --git a/tools/testing/selftests/powerpc/math/vmx_asm.S b/tools/testing/selftests/powerpc/math/vmx_asm.S
index 1b8c248..1b6fd53 100644
--- a/tools/testing/selftests/powerpc/math/vmx_asm.S
+++ b/tools/testing/selftests/powerpc/math/vmx_asm.S
@@ -7,7 +7,7 @@
* 2 of the License, or (at your option) any later version.
*/
-#include "../basic_asm.h"
+#include "basic_asm.h"
# POS MUST BE 16 ALIGNED!
#define PUSH_VMX(pos,reg) \
diff --git a/tools/testing/selftests/powerpc/mm/Makefile b/tools/testing/selftests/powerpc/mm/Makefile
index 3bdb96e..813797b 100644
--- a/tools/testing/selftests/powerpc/mm/Makefile
+++ b/tools/testing/selftests/powerpc/mm/Makefile
@@ -8,7 +8,7 @@ all: $(TEST_PROGS) $(TEST_FILES)
$(TEST_PROGS): ../harness.c
-prot_sao: ../utils.c
+prot_sao: ../utility/utils.c
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/pmu/Makefile b/tools/testing/selftests/powerpc/pmu/Makefile
index ac41a71..5ca77af 100644
--- a/tools/testing/selftests/powerpc/pmu/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/Makefile
@@ -2,7 +2,7 @@ noarg:
$(MAKE) -C ../
TEST_PROGS := count_instructions l3_bank_test per_event_excludes
-EXTRA_SOURCES := ../harness.c event.c lib.c ../utils.c
+EXTRA_SOURCES := ../harness.c event.c lib.c ../utility/utils.c
all: $(TEST_PROGS) ebb
@@ -12,7 +12,7 @@ $(TEST_PROGS): $(EXTRA_SOURCES)
count_instructions: loop.S count_instructions.c $(EXTRA_SOURCES)
$(CC) $(CFLAGS) -m64 -o $@ $^
-per_event_excludes: ../utils.c
+per_event_excludes: ../utility/utils.c
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/pmu/ebb/Makefile b/tools/testing/selftests/powerpc/pmu/ebb/Makefile
index 6b0453e..db4a64f 100644
--- a/tools/testing/selftests/powerpc/pmu/ebb/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/ebb/Makefile
@@ -18,7 +18,7 @@ TEST_PROGS := reg_access_test event_attributes_test cycles_test \
all: $(TEST_PROGS)
-$(TEST_PROGS): ../../harness.c ../../utils.c ../event.c ../lib.c \
+$(TEST_PROGS): ../../harness.c ../../utility/utils.c ../event.c ../lib.c \
ebb.c ebb_handler.S trace.c busy_loop.S
instruction_count_test: ../loop.S
diff --git a/tools/testing/selftests/powerpc/reg.h b/tools/testing/selftests/powerpc/reg.h
deleted file mode 100644
index f5d33db..0000000
--- a/tools/testing/selftests/powerpc/reg.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright 2014, Michael Ellerman, IBM Corp.
- * Licensed under GPLv2.
- */
-
-#ifndef _SELFTESTS_POWERPC_REG_H
-#define _SELFTESTS_POWERPC_REG_H
-
-#define __stringify_1(x) #x
-#define __stringify(x) __stringify_1(x)
-
-#define mfspr(rn) ({unsigned long rval; \
- asm volatile("mfspr %0," _str(rn) \
- : "=r" (rval)); rval; })
-#define mtspr(rn, v) asm volatile("mtspr " _str(rn) ",%0" : \
- : "r" ((unsigned long)(v)) \
- : "memory")
-
-#define mb() asm volatile("sync" : : : "memory");
-
-#define SPRN_MMCR2 769
-#define SPRN_MMCRA 770
-#define SPRN_MMCR0 779
-#define MMCR0_PMAO 0x00000080
-#define MMCR0_PMAE 0x04000000
-#define MMCR0_FC 0x80000000
-#define SPRN_EBBHR 804
-#define SPRN_EBBRR 805
-#define SPRN_BESCR 806 /* Branch event status & control register */
-#define SPRN_BESCRS 800 /* Branch event status & control set (1 bits set to 1) */
-#define SPRN_BESCRSU 801 /* Branch event status & control set upper */
-#define SPRN_BESCRR 802 /* Branch event status & control REset (1 bits set to 0) */
-#define SPRN_BESCRRU 803 /* Branch event status & control REset upper */
-
-#define BESCR_PMEO 0x1 /* PMU Event-based exception Occurred */
-#define BESCR_PME (0x1ul << 32) /* PMU Event-based exception Enable */
-#define BESCR_LME (0x1ul << 34) /* Load Monitor Enable */
-#define BESCR_LMEO (0x1ul << 2) /* Load Monitor Exception Occurred */
-
-#define SPRN_LMRR 813 /* Load Monitor Region Register */
-#define SPRN_LMSER 814 /* Load Monitor Section Enable Register */
-
-#define SPRN_PMC1 771
-#define SPRN_PMC2 772
-#define SPRN_PMC3 773
-#define SPRN_PMC4 774
-#define SPRN_PMC5 775
-#define SPRN_PMC6 776
-
-#define SPRN_SIAR 780
-#define SPRN_SDAR 781
-#define SPRN_SIER 768
-
-#define SPRN_TEXASR 0x82 /* Transaction Exception and Status Register */
-#define SPRN_TFIAR 0x81 /* Transaction Failure Inst Addr */
-#define SPRN_TFHAR 0x80 /* Transaction Failure Handler Addr */
-#define SPRN_TAR 0x32f /* Target Address Register */
-
-#define SPRN_DSCR_PRIV 0x11 /* Privilege State DSCR */
-#define SPRN_DSCR 0x03 /* Data Stream Control Register */
-#define SPRN_PPR 896 /* Program Priority Register */
-
-/* TEXASR register bits */
-#define TEXASR_FC 0xFE00000000000000
-#define TEXASR_FP 0x0100000000000000
-#define TEXASR_DA 0x0080000000000000
-#define TEXASR_NO 0x0040000000000000
-#define TEXASR_FO 0x0020000000000000
-#define TEXASR_SIC 0x0010000000000000
-#define TEXASR_NTC 0x0008000000000000
-#define TEXASR_TC 0x0004000000000000
-#define TEXASR_TIC 0x0002000000000000
-#define TEXASR_IC 0x0001000000000000
-#define TEXASR_IFC 0x0000800000000000
-#define TEXASR_ABT 0x0000000100000000
-#define TEXASR_SPD 0x0000000080000000
-#define TEXASR_HV 0x0000000020000000
-#define TEXASR_PR 0x0000000010000000
-#define TEXASR_FS 0x0000000008000000
-#define TEXASR_TE 0x0000000004000000
-#define TEXASR_ROT 0x0000000002000000
-
-/* Vector Instructions */
-#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \
- ((rb) << 11) | (((xs) >> 5)))
-#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
-#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
-
-#endif /* _SELFTESTS_POWERPC_REG_H */
diff --git a/tools/testing/selftests/powerpc/stringloops/memcmp.c b/tools/testing/selftests/powerpc/stringloops/memcmp.c
index 17417dd..30b1222 100644
--- a/tools/testing/selftests/powerpc/stringloops/memcmp.c
+++ b/tools/testing/selftests/powerpc/stringloops/memcmp.c
@@ -1,7 +1,7 @@
#include <malloc.h>
#include <stdlib.h>
#include <string.h>
-#include "../utils.h"
+#include "utils.h"
#define SIZE 256
#define ITERATIONS 10000
diff --git a/tools/testing/selftests/powerpc/tm/Makefile b/tools/testing/selftests/powerpc/tm/Makefile
index 9d301d7..8b69f1f 100644
--- a/tools/testing/selftests/powerpc/tm/Makefile
+++ b/tools/testing/selftests/powerpc/tm/Makefile
@@ -3,7 +3,7 @@ TEST_PROGS := tm-resched-dscr tm-syscall tm-signal-msr-resv tm-signal-stack \
all: $(TEST_PROGS)
-$(TEST_PROGS): ../harness.c ../utils.c
+$(TEST_PROGS): ../harness.c ../utility/utils.c
CFLAGS += -mhtm
diff --git a/tools/testing/selftests/powerpc/tm/tm.h b/tools/testing/selftests/powerpc/tm/tm.h
index 60318ba..5cafbc3 100644
--- a/tools/testing/selftests/powerpc/tm/tm.h
+++ b/tools/testing/selftests/powerpc/tm/tm.h
@@ -10,7 +10,7 @@
#include <asm/cputable.h>
#include <stdbool.h>
-#include "../utils.h"
+#include "utils.h"
static inline bool have_htm(void)
{
diff --git a/tools/testing/selftests/powerpc/utility/basic_asm.h b/tools/testing/selftests/powerpc/utility/basic_asm.h
new file mode 100644
index 0000000..12eaddf
--- /dev/null
+++ b/tools/testing/selftests/powerpc/utility/basic_asm.h
@@ -0,0 +1,73 @@
+#ifndef _SELFTESTS_POWERPC_BASIC_ASM_H
+#define _SELFTESTS_POWERPC_BASIC_ASM_H
+
+#include <ppc-asm.h>
+#include <asm/unistd.h>
+
+#define LOAD_REG_IMMEDIATE(reg, expr) \
+ lis reg, (expr)@highest; \
+ ori reg, reg, (expr)@higher; \
+ rldicr reg, reg, 32, 31; \
+ oris reg, reg, (expr)@high; \
+ ori reg, reg, (expr)@l;
+
+/*
+ * Note: These macros assume that variables being stored on the stack are
+ * doublewords, while this is usually the case it may not always be the
+ * case for each use case.
+ */
+#if defined(_CALL_ELF) && _CALL_ELF == 2
+#define STACK_FRAME_MIN_SIZE 32
+#define STACK_FRAME_TOC_POS 24
+#define __STACK_FRAME_PARAM(_param) (32 + ((_param)*8))
+#define __STACK_FRAME_LOCAL(_num_params, _var_num) \
+ ((STACK_FRAME_PARAM(_num_params)) + ((_var_num)*8))
+#else
+#define STACK_FRAME_MIN_SIZE 112
+#define STACK_FRAME_TOC_POS 40
+#define __STACK_FRAME_PARAM(i) (48 + ((i)*8))
+
+/*
+ * Caveat: if a function passed more than 8 doublewords, the caller will have
+ * made more space... which would render the 112 incorrect.
+ */
+#define __STACK_FRAME_LOCAL(_num_params, _var_num) \
+ (112 + ((_var_num)*8))
+#endif
+
+/* Parameter x saved to the stack */
+#define STACK_FRAME_PARAM(var) __STACK_FRAME_PARAM(var)
+
+/* Local variable x saved to the stack after x parameters */
+#define STACK_FRAME_LOCAL(num_params, var) \
+ __STACK_FRAME_LOCAL(num_params, var)
+#define STACK_FRAME_LR_POS 16
+#define STACK_FRAME_CR_POS 8
+
+/*
+ * It is very important to note here that _extra is the extra amount of
+ * stack space needed. This space can be accessed using STACK_FRAME_PARAM()
+ * or STACK_FRAME_LOCAL() macros.
+ *
+ * r1 and r2 are not defined in ppc-asm.h (instead they are defined as sp
+ * and toc). Kernel programmers tend to prefer rX even for r1 and r2, hence
+ * %1 and %r2. r0 is defined in ppc-asm.h and therefore %r0 gets
+ * preprocessed incorrectly, hence r0.
+ */
+#define PUSH_BASIC_STACK(_extra) \
+ mflr r0; \
+ std r0, STACK_FRAME_LR_POS(%r1); \
+ stdu %r1, -(_extra + STACK_FRAME_MIN_SIZE)(%r1); \
+ mfcr r0; \
+ stw r0, STACK_FRAME_CR_POS(%r1); \
+ std %r2, STACK_FRAME_TOC_POS(%r1);
+
+#define POP_BASIC_STACK(_extra) \
+ ld %r2, STACK_FRAME_TOC_POS(%r1); \
+ lwz r0, STACK_FRAME_CR_POS(%r1); \
+ mtcr r0; \
+ addi %r1, %r1, (_extra + STACK_FRAME_MIN_SIZE); \
+ ld r0, STACK_FRAME_LR_POS(%r1); \
+ mtlr r0;
+
+#endif /* _SELFTESTS_POWERPC_BASIC_ASM_H */
diff --git a/tools/testing/selftests/powerpc/utility/instructions.h b/tools/testing/selftests/powerpc/utility/instructions.h
new file mode 100644
index 0000000..0fb0bd3
--- /dev/null
+++ b/tools/testing/selftests/powerpc/utility/instructions.h
@@ -0,0 +1,68 @@
+#ifndef _SELFTESTS_POWERPC_INSTRUCTIONS_H
+#define _SELFTESTS_POWERPC_INSTRUCTIONS_H
+
+#include <stdio.h>
+#include <stdlib.h>
+
+/* This defines the "copy" instruction from Power ISA 3.0 Book II, section 4.4. */
+#define __COPY(RA, RB, L) \
+ (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10))
+#define COPY(RA, RB, L) \
+ .long __COPY((RA), (RB), (L))
+
+static inline void copy(void *i)
+{
+ asm volatile(str(COPY(0, %0, 0))";"
+ :
+ : "b" (i)
+ : "memory"
+ );
+}
+
+static inline void copy_first(void *i)
+{
+ asm volatile(str(COPY(0, %0, 1))";"
+ :
+ : "b" (i)
+ : "memory"
+ );
+}
+
+/* This defines the "paste" instruction from Power ISA 3.0 Book II, section 4.4. */
+#define __PASTE(RA, RB, L, RC) \
+ (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
+#define PASTE(RA, RB, L, RC) \
+ .long __PASTE((RA), (RB), (L), (RC))
+
+static inline int paste(void *i)
+{
+ int cr;
+
+ asm volatile(str(PASTE(0, %1, 0, 0))";"
+ "mfcr %0;"
+ : "=r" (cr)
+ : "b" (i)
+ : "memory"
+ );
+ return cr;
+}
+
+static inline int paste_last(void *i)
+{
+ int cr;
+
+ asm volatile(str(PASTE(0, %1, 1, 1))";"
+ "mfcr %0;"
+ : "=r" (cr)
+ : "b" (i)
+ : "memory"
+ );
+ return cr;
+}
+
+#define PPC_INST_COPY __COPY(0, 0, 0)
+#define PPC_INST_COPY_FIRST __COPY(0, 0, 1)
+#define PPC_INST_PASTE __PASTE(0, 0, 0, 0)
+#define PPC_INST_PASTE_LAST __PASTE(0, 0, 1, 1)
+
+#endif /* _SELFTESTS_POWERPC_INSTRUCTIONS_H */
diff --git a/tools/testing/selftests/powerpc/utility/reg.h b/tools/testing/selftests/powerpc/utility/reg.h
new file mode 100644
index 0000000..f5d33db
--- /dev/null
+++ b/tools/testing/selftests/powerpc/utility/reg.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2014, Michael Ellerman, IBM Corp.
+ * Licensed under GPLv2.
+ */
+
+#ifndef _SELFTESTS_POWERPC_REG_H
+#define _SELFTESTS_POWERPC_REG_H
+
+#define __stringify_1(x) #x
+#define __stringify(x) __stringify_1(x)
+
+#define mfspr(rn) ({unsigned long rval; \
+ asm volatile("mfspr %0," _str(rn) \
+ : "=r" (rval)); rval; })
+#define mtspr(rn, v) asm volatile("mtspr " _str(rn) ",%0" : \
+ : "r" ((unsigned long)(v)) \
+ : "memory")
+
+#define mb() asm volatile("sync" : : : "memory");
+
+#define SPRN_MMCR2 769
+#define SPRN_MMCRA 770
+#define SPRN_MMCR0 779
+#define MMCR0_PMAO 0x00000080
+#define MMCR0_PMAE 0x04000000
+#define MMCR0_FC 0x80000000
+#define SPRN_EBBHR 804
+#define SPRN_EBBRR 805
+#define SPRN_BESCR 806 /* Branch event status & control register */
+#define SPRN_BESCRS 800 /* Branch event status & control set (1 bits set to 1) */
+#define SPRN_BESCRSU 801 /* Branch event status & control set upper */
+#define SPRN_BESCRR 802 /* Branch event status & control REset (1 bits set to 0) */
+#define SPRN_BESCRRU 803 /* Branch event status & control REset upper */
+
+#define BESCR_PMEO 0x1 /* PMU Event-based exception Occurred */
+#define BESCR_PME (0x1ul << 32) /* PMU Event-based exception Enable */
+#define BESCR_LME (0x1ul << 34) /* Load Monitor Enable */
+#define BESCR_LMEO (0x1ul << 2) /* Load Monitor Exception Occurred */
+
+#define SPRN_LMRR 813 /* Load Monitor Region Register */
+#define SPRN_LMSER 814 /* Load Monitor Section Enable Register */
+
+#define SPRN_PMC1 771
+#define SPRN_PMC2 772
+#define SPRN_PMC3 773
+#define SPRN_PMC4 774
+#define SPRN_PMC5 775
+#define SPRN_PMC6 776
+
+#define SPRN_SIAR 780
+#define SPRN_SDAR 781
+#define SPRN_SIER 768
+
+#define SPRN_TEXASR 0x82 /* Transaction Exception and Status Register */
+#define SPRN_TFIAR 0x81 /* Transaction Failure Inst Addr */
+#define SPRN_TFHAR 0x80 /* Transaction Failure Handler Addr */
+#define SPRN_TAR 0x32f /* Target Address Register */
+
+#define SPRN_DSCR_PRIV 0x11 /* Privilege State DSCR */
+#define SPRN_DSCR 0x03 /* Data Stream Control Register */
+#define SPRN_PPR 896 /* Program Priority Register */
+
+/* TEXASR register bits */
+#define TEXASR_FC 0xFE00000000000000
+#define TEXASR_FP 0x0100000000000000
+#define TEXASR_DA 0x0080000000000000
+#define TEXASR_NO 0x0040000000000000
+#define TEXASR_FO 0x0020000000000000
+#define TEXASR_SIC 0x0010000000000000
+#define TEXASR_NTC 0x0008000000000000
+#define TEXASR_TC 0x0004000000000000
+#define TEXASR_TIC 0x0002000000000000
+#define TEXASR_IC 0x0001000000000000
+#define TEXASR_IFC 0x0000800000000000
+#define TEXASR_ABT 0x0000000100000000
+#define TEXASR_SPD 0x0000000080000000
+#define TEXASR_HV 0x0000000020000000
+#define TEXASR_PR 0x0000000010000000
+#define TEXASR_FS 0x0000000008000000
+#define TEXASR_TE 0x0000000004000000
+#define TEXASR_ROT 0x0000000002000000
+
+/* Vector Instructions */
+#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \
+ ((rb) << 11) | (((xs) >> 5)))
+#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
+
+#endif /* _SELFTESTS_POWERPC_REG_H */
diff --git a/tools/testing/selftests/powerpc/utility/utils.c b/tools/testing/selftests/powerpc/utility/utils.c
new file mode 100644
index 0000000..dcf7418
--- /dev/null
+++ b/tools/testing/selftests/powerpc/utility/utils.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright 2013-2015, Michael Ellerman, IBM Corp.
+ * Licensed under GPLv2.
+ */
+
+#define _GNU_SOURCE /* For CPU_ZERO etc. */
+
+#include <elf.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <link.h>
+#include <sched.h>
+#include <stdio.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include "utils.h"
+
+static char auxv[4096];
+
+void *get_auxv_entry(int type)
+{
+ ElfW(auxv_t) *p;
+ void *result;
+ ssize_t num;
+ int fd;
+
+ fd = open("/proc/self/auxv", O_RDONLY);
+ if (fd == -1) {
+ perror("open");
+ return NULL;
+ }
+
+ result = NULL;
+
+ num = read(fd, auxv, sizeof(auxv));
+ if (num < 0) {
+ perror("read");
+ goto out;
+ }
+
+ if (num > sizeof(auxv)) {
+ printf("Overflowed auxv buffer\n");
+ goto out;
+ }
+
+ p = (ElfW(auxv_t) *)auxv;
+
+ while (p->a_type != AT_NULL) {
+ if (p->a_type == type) {
+ result = (void *)p->a_un.a_val;
+ break;
+ }
+
+ p++;
+ }
+out:
+ close(fd);
+ return result;
+}
+
+int pick_online_cpu(void)
+{
+ cpu_set_t mask;
+ int cpu;
+
+ CPU_ZERO(&mask);
+
+ if (sched_getaffinity(0, sizeof(mask), &mask)) {
+ perror("sched_getaffinity");
+ return -1;
+ }
+
+ /* We prefer a primary thread, but skip 0 */
+ for (cpu = 8; cpu < CPU_SETSIZE; cpu += 8)
+ if (CPU_ISSET(cpu, &mask))
+ return cpu;
+
+ /* Search for anything, but in reverse */
+ for (cpu = CPU_SETSIZE - 1; cpu >= 0; cpu--)
+ if (CPU_ISSET(cpu, &mask))
+ return cpu;
+
+ printf("No cpus in affinity mask?!\n");
+ return -1;
+}
diff --git a/tools/testing/selftests/powerpc/utility/utils.h b/tools/testing/selftests/powerpc/utility/utils.h
new file mode 100644
index 0000000..fbd33e5
--- /dev/null
+++ b/tools/testing/selftests/powerpc/utility/utils.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2013, Michael Ellerman, IBM Corp.
+ * Licensed under GPLv2.
+ */
+
+#ifndef _SELFTESTS_POWERPC_UTILS_H
+#define _SELFTESTS_POWERPC_UTILS_H
+
+#define __cacheline_aligned __attribute__((aligned(128)))
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <linux/auxvec.h>
+#include "reg.h"
+
+/* Avoid headaches with PRI?64 - just use %ll? always */
+typedef unsigned long long u64;
+typedef signed long long s64;
+
+/* Just for familiarity */
+typedef uint32_t u32;
+typedef uint16_t u16;
+typedef uint8_t u8;
+
+
+int test_harness(int (test_function)(void), char *name);
+extern void *get_auxv_entry(int type);
+int pick_online_cpu(void);
+
+static inline bool have_hwcap(unsigned long ftr)
+{
+ return ((unsigned long)get_auxv_entry(AT_HWCAP) & ftr) == ftr;
+}
+
+static inline bool have_hwcap2(unsigned long ftr2)
+{
+ return ((unsigned long)get_auxv_entry(AT_HWCAP2) & ftr2) == ftr2;
+}
+
+/* Yes, this is evil */
+#define FAIL_IF(x) \
+do { \
+ if ((x)) { \
+ fprintf(stderr, \
+ "[FAIL] Test FAILED on line %d\n", __LINE__); \
+ return 1; \
+ } \
+} while (0)
+
+/* The test harness uses this, yes it's gross */
+#define MAGIC_SKIP_RETURN_VALUE 99
+
+#define SKIP_IF(x) \
+do { \
+ if ((x)) { \
+ fprintf(stderr, \
+ "[SKIP] Test skipped on line %d\n", __LINE__); \
+ return MAGIC_SKIP_RETURN_VALUE; \
+ } \
+} while (0)
+
+#define _str(s) #s
+#define str(s) _str(s)
+
+/* POWER9 feature */
+#ifndef PPC_FEATURE2_ARCH_3_00
+#define PPC_FEATURE2_ARCH_3_00 0x00800000
+#endif
+
+#endif /* _SELFTESTS_POWERPC_UTILS_H */
diff --git a/tools/testing/selftests/powerpc/utils.c b/tools/testing/selftests/powerpc/utils.c
deleted file mode 100644
index dcf7418..0000000
--- a/tools/testing/selftests/powerpc/utils.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * Copyright 2013-2015, Michael Ellerman, IBM Corp.
- * Licensed under GPLv2.
- */
-
-#define _GNU_SOURCE /* For CPU_ZERO etc. */
-
-#include <elf.h>
-#include <errno.h>
-#include <fcntl.h>
-#include <link.h>
-#include <sched.h>
-#include <stdio.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <unistd.h>
-
-#include "utils.h"
-
-static char auxv[4096];
-
-void *get_auxv_entry(int type)
-{
- ElfW(auxv_t) *p;
- void *result;
- ssize_t num;
- int fd;
-
- fd = open("/proc/self/auxv", O_RDONLY);
- if (fd == -1) {
- perror("open");
- return NULL;
- }
-
- result = NULL;
-
- num = read(fd, auxv, sizeof(auxv));
- if (num < 0) {
- perror("read");
- goto out;
- }
-
- if (num > sizeof(auxv)) {
- printf("Overflowed auxv buffer\n");
- goto out;
- }
-
- p = (ElfW(auxv_t) *)auxv;
-
- while (p->a_type != AT_NULL) {
- if (p->a_type == type) {
- result = (void *)p->a_un.a_val;
- break;
- }
-
- p++;
- }
-out:
- close(fd);
- return result;
-}
-
-int pick_online_cpu(void)
-{
- cpu_set_t mask;
- int cpu;
-
- CPU_ZERO(&mask);
-
- if (sched_getaffinity(0, sizeof(mask), &mask)) {
- perror("sched_getaffinity");
- return -1;
- }
-
- /* We prefer a primary thread, but skip 0 */
- for (cpu = 8; cpu < CPU_SETSIZE; cpu += 8)
- if (CPU_ISSET(cpu, &mask))
- return cpu;
-
- /* Search for anything, but in reverse */
- for (cpu = CPU_SETSIZE - 1; cpu >= 0; cpu--)
- if (CPU_ISSET(cpu, &mask))
- return cpu;
-
- printf("No cpus in affinity mask?!\n");
- return -1;
-}
diff --git a/tools/testing/selftests/powerpc/utils.h b/tools/testing/selftests/powerpc/utils.h
deleted file mode 100644
index fbd33e5..0000000
--- a/tools/testing/selftests/powerpc/utils.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright 2013, Michael Ellerman, IBM Corp.
- * Licensed under GPLv2.
- */
-
-#ifndef _SELFTESTS_POWERPC_UTILS_H
-#define _SELFTESTS_POWERPC_UTILS_H
-
-#define __cacheline_aligned __attribute__((aligned(128)))
-
-#include <stdint.h>
-#include <stdbool.h>
-#include <linux/auxvec.h>
-#include "reg.h"
-
-/* Avoid headaches with PRI?64 - just use %ll? always */
-typedef unsigned long long u64;
-typedef signed long long s64;
-
-/* Just for familiarity */
-typedef uint32_t u32;
-typedef uint16_t u16;
-typedef uint8_t u8;
-
-
-int test_harness(int (test_function)(void), char *name);
-extern void *get_auxv_entry(int type);
-int pick_online_cpu(void);
-
-static inline bool have_hwcap(unsigned long ftr)
-{
- return ((unsigned long)get_auxv_entry(AT_HWCAP) & ftr) == ftr;
-}
-
-static inline bool have_hwcap2(unsigned long ftr2)
-{
- return ((unsigned long)get_auxv_entry(AT_HWCAP2) & ftr2) == ftr2;
-}
-
-/* Yes, this is evil */
-#define FAIL_IF(x) \
-do { \
- if ((x)) { \
- fprintf(stderr, \
- "[FAIL] Test FAILED on line %d\n", __LINE__); \
- return 1; \
- } \
-} while (0)
-
-/* The test harness uses this, yes it's gross */
-#define MAGIC_SKIP_RETURN_VALUE 99
-
-#define SKIP_IF(x) \
-do { \
- if ((x)) { \
- fprintf(stderr, \
- "[SKIP] Test skipped on line %d\n", __LINE__); \
- return MAGIC_SKIP_RETURN_VALUE; \
- } \
-} while (0)
-
-#define _str(s) #s
-#define str(s) _str(s)
-
-/* POWER9 feature */
-#ifndef PPC_FEATURE2_ARCH_3_00
-#define PPC_FEATURE2_ARCH_3_00 0x00800000
-#endif
-
-#endif /* _SELFTESTS_POWERPC_UTILS_H */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h' wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 02/15] selftests/powerpc: move shared utility files into new utility/ dir wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-10-06 21:44 ` Michael Ellerman
2016-11-17 12:03 ` [v15,03/15] " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers wei.guo.simon
` (11 subsequent siblings)
14 siblings, 2 replies; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for EBB/PMU specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/Makefile | 3 +-
tools/testing/selftests/powerpc/ptrace/Makefile | 11 +
.../testing/selftests/powerpc/ptrace/ptrace-ebb.c | 187 +++++++++++++++++
.../testing/selftests/powerpc/ptrace/ptrace-ebb.h | 99 +++++++++
tools/testing/selftests/powerpc/ptrace/ptrace.h | 225 +++++++++++++++++++++
5 files changed, 524 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/Makefile
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace.h
diff --git a/tools/testing/selftests/powerpc/Makefile b/tools/testing/selftests/powerpc/Makefile
index b6eb817..2fe383c 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -25,7 +25,8 @@ SUB_DIRS = alignment \
syscalls \
tm \
vphn \
- math
+ math \
+ ptrace
endif
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
new file mode 100644
index 0000000..84c1c01
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -0,0 +1,11 @@
+TEST_PROGS := ptrace-ebb
+
+include ../../lib.mk
+
+all: $(TEST_PROGS)
+CFLAGS += -m64
+$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S ../pmu/ebb/busy_loop.S
+ptrace-ebb: CFLAGS += -I../pmu/ebb
+clean:
+ rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
new file mode 100644
index 0000000..1ec4a6b
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.c
@@ -0,0 +1,187 @@
+/*
+ * Ptrace interface test for EBB
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ebb.h"
+#include "ptrace.h"
+#include "ptrace-ebb.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+void ebb(void)
+{
+ struct event event;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+ event_init_named(&event, 0x1001e, "cycles");
+ event.attr.config |= (1ull << 63);
+ event.attr.exclusive = 1;
+ event.attr.pinned = 1;
+ event.attr.exclude_kernel = 1;
+ event.attr.exclude_hv = 1;
+ event.attr.exclude_idle = 1;
+
+ if (event_open(&event)) {
+ perror("event_open() failed");
+ exit(1);
+ }
+
+ setup_ebb_handler(standard_ebb_callee);
+ mtspr(SPRN_BESCR, 0x8000000100000000ull);
+
+ /*
+ * make sure BESCR has been set before continue
+ */
+ mb();
+
+ if (ebb_event_enable(&event)) {
+ perror("ebb_event_handler() failed");
+ exit(1);
+ }
+
+ mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+ core_busy_loop();
+ cptr[0] = 1;
+ while (1)
+ asm volatile("" : : : "memory");
+
+ exit(0);
+}
+
+int validate_ebb(struct ebb_regs *regs)
+{
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ struct opd *opd = (struct opd *) ebb_handler;
+ #endif
+
+ printf("EBBRR: %lx\n", regs->ebbrr);
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ printf("EBBHR: %lx; expected: %lx\n",
+ regs->ebbhr, (unsigned long)opd->entry);
+ #else
+ printf("EBBHR: %lx; expected: %lx\n",
+ regs->ebbhr, (unsigned long)ebb_handler);
+ #endif
+ printf("BESCR: %lx\n", regs->bescr);
+
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ if (regs->ebbhr != opd->entry)
+ return TEST_FAIL;
+ #else
+ if (regs->ebbhr != (unsigned long) ebb_handler)
+ return TEST_FAIL;
+ #endif
+
+ return TEST_PASS;
+}
+
+int validate_pmu(struct pmu_regs *regs)
+{
+ printf("SIAR: %lx\n", regs->siar);
+ printf("SDAR: %lx\n", regs->sdar);
+ printf("SIER: %lx; expected: %lx\n",
+ regs->sier, (unsigned long)SIER_EXP);
+ printf("MMCR2: %lx; expected: %lx\n",
+ regs->mmcr2, (unsigned long)MMCR2_EXP);
+ printf("MMCR0: %lx; expected: %lx\n",
+ regs->mmcr0, (unsigned long)MMCR0_EXP);
+
+ /* Validate SIER */
+ if (regs->sier != SIER_EXP)
+ return TEST_FAIL;
+
+ /* Validate MMCR2 */
+ if (regs->mmcr2 != MMCR2_EXP)
+ return TEST_FAIL;
+
+ /* Validate MMCR0 */
+ if (regs->mmcr0 != MMCR0_EXP)
+ return TEST_FAIL;
+
+ return TEST_PASS;
+}
+
+int trace_ebb_pmu(pid_t child)
+{
+ struct ebb_regs ebb_regs;
+ struct pmu_regs pmu_regs;
+ int ret;
+
+ ret = start_trace(child);
+ if (ret)
+ return TEST_FAIL;
+
+ ret = show_ebb_registers(child, &ebb_regs);
+ if (ret)
+ return TEST_FAIL;
+
+ ret = validate_ebb(&ebb_regs);
+ if (ret)
+ return TEST_FAIL;
+
+ ret = show_pmu_registers(child, &pmu_regs);
+ if (ret)
+ return TEST_FAIL;
+
+ ret = validate_pmu(&pmu_regs);
+ if (ret)
+ return TEST_FAIL;
+
+ ret = stop_trace(child);
+ if (ret)
+ return TEST_FAIL;
+
+ return TEST_PASS;
+}
+
+int ptrace_ebb_pmu(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 1, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ ebb();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ while (!pptr[0])
+ asm volatile("" : : : "memory");
+
+ ret = trace_ebb_pmu(pid);
+ if (ret)
+ return TEST_FAIL;
+
+ shmctl(shm_id, IPC_RMID, NULL);
+ kill(pid, SIGKILL);
+ ret = wait(&status);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_ebb_pmu, "ptrace_ebb_pmu");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
new file mode 100644
index 0000000..740848a
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-ebb.h
@@ -0,0 +1,99 @@
+/*
+ * Inspired mostly from the EBB selftest
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#define SAMPLE_PERIOD 100 /* EBB event sample persiod */
+
+/* Standard expected values */
+#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+#define MMCR0_EXP 0x8000008000000001
+#else
+#define MMCR0_EXP 0x180000080
+#endif
+
+#define MMCR2_EXP 0
+#define SIER_EXP 0x2000000
+
+struct opd {
+ u64 entry;
+ u64 toc;
+};
+
+void (*ebb_user_func)(void);
+extern void ebb_handler(void); /* Defined in ebb_handle.S */
+
+void ebb_hook(void) /* Called by ebb_handler */
+{
+ if (ebb_user_func)
+ ebb_user_func();
+}
+
+void setup_ebb_handler(void (*callee)(void))
+{
+ u64 entry;
+
+#if defined(_CALL_ELF) && _CALL_ELF == 2
+ entry = (u64)ebb_handler;
+#else
+ struct opd *opd;
+
+ opd = (struct opd *)ebb_handler;
+ entry = opd->entry;
+#endif
+ ebb_user_func = callee;
+
+ /* Ensure ebb_user_func is set before we set the handler */
+ mb();
+ mtspr(SPRN_EBBHR, entry);
+
+ /* Make sure the handler is set before we return */
+ mb();
+}
+
+void reset_ebb_with_clear_mask(unsigned long mmcr0_clear_mask)
+{
+ u64 val;
+
+ /* 2) clear MMCR0[PMAO] - docs say BESCR[PMEO] should do this */
+ /* 3) set MMCR0[PMAE] - docs say BESCR[PME] should do this */
+ val = mfspr(SPRN_MMCR0);
+ mtspr(SPRN_MMCR0, (val & ~mmcr0_clear_mask) | MMCR0_PMAE);
+
+ /* 4) clear BESCR[PMEO] */
+ mtspr(SPRN_BESCRR, BESCR_PMEO);
+
+ /* 5) set BESCR[PME] */
+ mtspr(SPRN_BESCRS, BESCR_PME);
+
+ /* 6) rfebb 1 - done in our caller */
+}
+
+void standard_ebb_callee(void)
+{
+ u64 val;
+
+ val = mfspr(SPRN_BESCR);
+ if (!(val & BESCR_PMEO))
+ printf("Spurious interrupt\n");
+
+ mtspr(SPRN_PMC1, pmc_sample_period(SAMPLE_PERIOD));
+ reset_ebb_with_clear_mask(MMCR0_PMAO | MMCR0_FC);
+}
+
+int ebb_event_enable(struct event *e)
+{
+ int rc;
+
+ rc = ioctl(e->fd, PERF_EVENT_IOC_ENABLE);
+ if (rc)
+ return rc;
+ rc = event_read(e);
+
+ return rc;
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace.h b/tools/testing/selftests/powerpc/ptrace/ptrace.h
new file mode 100644
index 0000000..96d2179
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace.h
@@ -0,0 +1,225 @@
+/*
+ * Ptrace interface test helper functions
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <inttypes.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <string.h>
+#include <malloc.h>
+#include <errno.h>
+#include <time.h>
+#include <sys/ptrace.h>
+#include <sys/ioctl.h>
+#include <sys/uio.h>
+#include <sys/types.h>
+#include <sys/wait.h>
+#include <sys/signal.h>
+#include <sys/ipc.h>
+#include <sys/shm.h>
+#include <sys/user.h>
+#include <linux/elf.h>
+#include <linux/types.h>
+#include <linux/auxvec.h>
+#include "reg.h"
+#include "utils.h"
+
+#define TEST_PASS 0
+#define TEST_FAIL 1
+
+struct ebb_regs {
+ unsigned long ebbrr;
+ unsigned long ebbhr;
+ unsigned long bescr;
+};
+
+struct pmu_regs {
+ unsigned long siar;
+ unsigned long sdar;
+ unsigned long sier;
+ unsigned long mmcr2;
+ unsigned long mmcr0;
+};
+
+struct fpr_regs {
+ unsigned long fpr[32];
+ unsigned long fpscr;
+};
+
+
+/* Basic ptrace operations */
+int start_trace(pid_t child)
+{
+ int ret;
+
+ ret = ptrace(PTRACE_ATTACH, child, NULL, NULL);
+ if (ret) {
+ perror("ptrace(PTRACE_ATTACH) failed");
+ return TEST_FAIL;
+ }
+ ret = waitpid(child, NULL, 0);
+ if (ret != child) {
+ perror("waitpid() failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int stop_trace(pid_t child)
+{
+ int ret;
+
+ ret = ptrace(PTRACE_DETACH, child, NULL, NULL);
+ if (ret) {
+ perror("ptrace(PTRACE_DETACH) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int cont_trace(pid_t child)
+{
+ int ret;
+
+ ret = ptrace(PTRACE_CONT, child, NULL, NULL);
+ if (ret) {
+ perror("ptrace(PTRACE_CONT) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+/* PMU */
+int show_pmu_registers(pid_t child, struct pmu_regs *regs)
+{
+ struct pmu_regs *pmu;
+ struct iovec iov;
+ int ret;
+
+ pmu = malloc(sizeof(struct pmu_regs));
+ if (!pmu) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ iov.iov_base = (struct pmu_regs *) pmu;
+ iov.iov_len = sizeof(struct pmu_regs);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_PMU, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+
+ if (regs)
+ memcpy(regs, pmu, sizeof(struct pmu_regs));
+
+ free(pmu);
+ return TEST_PASS;
+fail:
+ free(pmu);
+ return TEST_FAIL;
+}
+
+/* EBB */
+int show_ebb_registers(pid_t child, struct ebb_regs *regs)
+{
+ struct ebb_regs *ebb;
+ struct iovec iov;
+ int ret;
+
+ ebb = malloc(sizeof(struct ebb_regs));
+ if (!ebb) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ iov.iov_base = (struct ebb_regs *) ebb;
+ iov.iov_len = sizeof(struct ebb_regs);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_EBB, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+
+ if (regs)
+ memcpy(regs, ebb, sizeof(struct ebb_regs));
+
+ free(ebb);
+ return TEST_PASS;
+fail:
+ free(ebb);
+ return TEST_FAIL;
+}
+
+/* Analyse TEXASR after TM failure */
+inline unsigned long get_tfiar(void)
+{
+ unsigned long ret;
+
+ asm volatile("mfspr %0,%1" : "=r" (ret) : "i" (SPRN_TFIAR));
+ return ret;
+}
+
+void analyse_texasr(unsigned long texasr)
+{
+ printf("TEXASR: %16lx\t", texasr);
+
+ if (texasr & TEXASR_FP)
+ printf("TEXASR_FP ");
+
+ if (texasr & TEXASR_DA)
+ printf("TEXASR_DA ");
+
+ if (texasr & TEXASR_NO)
+ printf("TEXASR_NO ");
+
+ if (texasr & TEXASR_FO)
+ printf("TEXASR_FO ");
+
+ if (texasr & TEXASR_SIC)
+ printf("TEXASR_SIC ");
+
+ if (texasr & TEXASR_NTC)
+ printf("TEXASR_NTC ");
+
+ if (texasr & TEXASR_TC)
+ printf("TEXASR_TC ");
+
+ if (texasr & TEXASR_TIC)
+ printf("TEXASR_TIC ");
+
+ if (texasr & TEXASR_IC)
+ printf("TEXASR_IC ");
+
+ if (texasr & TEXASR_IFC)
+ printf("TEXASR_IFC ");
+
+ if (texasr & TEXASR_ABT)
+ printf("TEXASR_ABT ");
+
+ if (texasr & TEXASR_SPD)
+ printf("TEXASR_SPD ");
+
+ if (texasr & TEXASR_HV)
+ printf("TEXASR_HV ");
+
+ if (texasr & TEXASR_PR)
+ printf("TEXASR_PR ");
+
+ if (texasr & TEXASR_FS)
+ printf("TEXASR_FS ");
+
+ if (texasr & TEXASR_TE)
+ printf("TEXASR_TE ");
+
+ if (texasr & TEXASR_ROT)
+ printf("TEXASR_ROT ");
+
+ printf("TFIAR :%lx\n", get_tfiar());
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (2 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM wei.guo.simon
` (10 subsequent siblings)
14 siblings, 0 replies; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/math/fpu_asm.S | 42 +---
tools/testing/selftests/powerpc/ptrace/Makefile | 4 +-
.../testing/selftests/powerpc/ptrace/ptrace-gpr.c | 123 ++++++++++++
.../testing/selftests/powerpc/ptrace/ptrace-gpr.h | 74 ++++++++
tools/testing/selftests/powerpc/ptrace/ptrace.h | 211 +++++++++++++++++++++
tools/testing/selftests/powerpc/utility/reg.S | 132 +++++++++++++
tools/testing/selftests/powerpc/utility/reg.h | 101 ++++++++++
7 files changed, 645 insertions(+), 42 deletions(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
create mode 100644 tools/testing/selftests/powerpc/utility/reg.S
diff --git a/tools/testing/selftests/powerpc/math/fpu_asm.S b/tools/testing/selftests/powerpc/math/fpu_asm.S
index 8d4eb96..6e423fa 100644
--- a/tools/testing/selftests/powerpc/math/fpu_asm.S
+++ b/tools/testing/selftests/powerpc/math/fpu_asm.S
@@ -8,49 +8,11 @@
*/
#include "basic_asm.h"
-
-#define PUSH_FPU(pos) \
- stfd f14,pos(sp); \
- stfd f15,pos+8(sp); \
- stfd f16,pos+16(sp); \
- stfd f17,pos+24(sp); \
- stfd f18,pos+32(sp); \
- stfd f19,pos+40(sp); \
- stfd f20,pos+48(sp); \
- stfd f21,pos+56(sp); \
- stfd f22,pos+64(sp); \
- stfd f23,pos+72(sp); \
- stfd f24,pos+80(sp); \
- stfd f25,pos+88(sp); \
- stfd f26,pos+96(sp); \
- stfd f27,pos+104(sp); \
- stfd f28,pos+112(sp); \
- stfd f29,pos+120(sp); \
- stfd f30,pos+128(sp); \
- stfd f31,pos+136(sp);
-
-#define POP_FPU(pos) \
- lfd f14,pos(sp); \
- lfd f15,pos+8(sp); \
- lfd f16,pos+16(sp); \
- lfd f17,pos+24(sp); \
- lfd f18,pos+32(sp); \
- lfd f19,pos+40(sp); \
- lfd f20,pos+48(sp); \
- lfd f21,pos+56(sp); \
- lfd f22,pos+64(sp); \
- lfd f23,pos+72(sp); \
- lfd f24,pos+80(sp); \
- lfd f25,pos+88(sp); \
- lfd f26,pos+96(sp); \
- lfd f27,pos+104(sp); \
- lfd f28,pos+112(sp); \
- lfd f29,pos+120(sp); \
- lfd f30,pos+128(sp); \
- lfd f31,pos+136(sp);
+#include "reg.h"
# Careful calling this, it will 'clobber' fpu (by design)
# Don't call this from C
+# double precision
FUNC_START(load_fpu)
lfd f14,0(r3)
lfd f15,8(r3)
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index 84c1c01..e9b8e7d 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,10 +1,10 @@
-TEST_PROGS := ptrace-ebb
+TEST_PROGS := ptrace-ebb ptrace-gpr
include ../../lib.mk
all: $(TEST_PROGS)
CFLAGS += -m64
-$(TEST_PROGS): ../harness.c ../utility/utils.c ptrace.h
+$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S ../pmu/ebb/busy_loop.S
ptrace-ebb: CFLAGS += -I../pmu/ebb
clean:
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
new file mode 100644
index 0000000..0b4ebcc
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c
@@ -0,0 +1,123 @@
+/*
+ * Ptrace test for GPR/FPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "reg.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void gpr(void)
+{
+ unsigned long gpr_buf[18];
+ float fpr_buf[32];
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+ asm __volatile__(
+ ASM_LOAD_GPR_IMMED(gpr_1)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+ :
+ : [gpr_1]"i"(GPR_1), [flt_1] "r" (&a)
+ : "memory", "r6", "r7", "r8", "r9", "r10",
+ "r11", "r12", "r13", "r14", "r15", "r16", "r17",
+ "r18", "r19", "r20", "r21", "r22", "r23", "r24",
+ "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ );
+
+ cptr[1] = 1;
+
+ while (!cptr[0])
+ asm volatile("" : : : "memory");
+
+ shmdt((void *)cptr);
+ store_gpr(gpr_buf);
+ store_fpr_single_precision(fpr_buf);
+
+ if (validate_gpr(gpr_buf, GPR_3))
+ exit(1);
+
+ if (validate_fpr_float(fpr_buf, c))
+ exit(1);
+
+ exit(0);
+}
+
+int trace_gpr(pid_t child)
+{
+ unsigned long gpr[18];
+ unsigned long fpr[32];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_1));
+ FAIL_IF(show_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+ FAIL_IF(write_gpr(child, GPR_3));
+ FAIL_IF(write_fpr(child, FPR_3_REP));
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_gpr(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+ if (pid == 0)
+ gpr();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+
+ ret = trace_gpr(pid);
+ if (ret) {
+ kill(pid, SIGTERM);
+ shmdt((void *)pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ pptr[0] = 1;
+ shmdt((void *)pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_gpr, "ptrace_gpr");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
new file mode 100644
index 0000000..e30fef6
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-gpr.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#define GPR_1 1
+#define GPR_2 2
+#define GPR_3 3
+#define GPR_4 4
+
+#define FPR_1 0.001
+#define FPR_2 0.002
+#define FPR_3 0.003
+#define FPR_4 0.004
+
+#define FPR_1_REP 0x3f50624de0000000
+#define FPR_2_REP 0x3f60624de0000000
+#define FPR_3_REP 0x3f689374c0000000
+#define FPR_4_REP 0x3f70624de0000000
+
+/* Buffer must have 18 elements */
+int validate_gpr(unsigned long *gpr, unsigned long val)
+{
+ int i, found = 1;
+
+ for (i = 0; i < 18; i++) {
+ if (gpr[i] != val) {
+ printf("GPR[%d]: %lx Expected: %lx\n",
+ i+14, gpr[i], val);
+ found = 0;
+ }
+ }
+
+ if (!found)
+ return TEST_FAIL;
+ return TEST_PASS;
+}
+
+/* Buffer must have 32 elements */
+int validate_fpr(unsigned long *fpr, unsigned long val)
+{
+ int i, found = 1;
+
+ for (i = 0; i < 32; i++) {
+ if (fpr[i] != val) {
+ printf("FPR[%d]: %lx Expected: %lx\n", i, fpr[i], val);
+ found = 0;
+ }
+ }
+
+ if (!found)
+ return TEST_FAIL;
+ return TEST_PASS;
+}
+
+/* Buffer must have 32 elements */
+int validate_fpr_float(float *fpr, float val)
+{
+ int i, found = 1;
+
+ for (i = 0; i < 32; i++) {
+ if (fpr[i] != val) {
+ printf("FPR[%d]: %f Expected: %f\n", i, fpr[i], val);
+ found = 0;
+ }
+ }
+
+ if (!found)
+ return TEST_FAIL;
+ return TEST_PASS;
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace.h b/tools/testing/selftests/powerpc/ptrace/ptrace.h
index 96d2179..87fe437 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace.h
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace.h
@@ -157,6 +157,214 @@ fail:
return TEST_FAIL;
}
+/* FPR */
+int show_fpr(pid_t child, unsigned long *fpr)
+{
+ struct fpr_regs *regs;
+ int ret, i;
+
+ regs = (struct fpr_regs *) malloc(sizeof(struct fpr_regs));
+ ret = ptrace(PTRACE_GETFPREGS, child, NULL, regs);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ if (fpr) {
+ for (i = 0; i < 32; i++)
+ fpr[i] = regs->fpr[i];
+ }
+ return TEST_PASS;
+}
+
+int write_fpr(pid_t child, unsigned long val)
+{
+ struct fpr_regs *regs;
+ int ret, i;
+
+ regs = (struct fpr_regs *) malloc(sizeof(struct fpr_regs));
+ ret = ptrace(PTRACE_GETFPREGS, child, NULL, regs);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ for (i = 0; i < 32; i++)
+ regs->fpr[i] = val;
+
+ ret = ptrace(PTRACE_SETFPREGS, child, NULL, regs);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int show_ckpt_fpr(pid_t child, unsigned long *fpr)
+{
+ struct fpr_regs *regs;
+ struct iovec iov;
+ int ret, i;
+
+ regs = (struct fpr_regs *) malloc(sizeof(struct fpr_regs));
+ iov.iov_base = regs;
+ iov.iov_len = sizeof(struct fpr_regs);
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CFPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ if (fpr) {
+ for (i = 0; i < 32; i++)
+ fpr[i] = regs->fpr[i];
+ }
+
+ return TEST_PASS;
+}
+
+int write_ckpt_fpr(pid_t child, unsigned long val)
+{
+ struct fpr_regs *regs;
+ struct iovec iov;
+ int ret, i;
+
+ regs = (struct fpr_regs *) malloc(sizeof(struct fpr_regs));
+ iov.iov_base = regs;
+ iov.iov_len = sizeof(struct fpr_regs);
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CFPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ for (i = 0; i < 32; i++)
+ regs->fpr[i] = val;
+
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CFPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+/* GPR */
+int show_gpr(pid_t child, unsigned long *gpr)
+{
+ struct pt_regs *regs;
+ int ret, i;
+
+ regs = (struct pt_regs *) malloc(sizeof(struct pt_regs));
+ if (!regs) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ ret = ptrace(PTRACE_GETREGS, child, NULL, regs);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ if (gpr) {
+ for (i = 14; i < 32; i++)
+ gpr[i-14] = regs->gpr[i];
+ }
+
+ return TEST_PASS;
+}
+
+int write_gpr(pid_t child, unsigned long val)
+{
+ struct pt_regs *regs;
+ int i, ret;
+
+ regs = (struct pt_regs *) malloc(sizeof(struct pt_regs));
+ if (!regs) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ ret = ptrace(PTRACE_GETREGS, child, NULL, regs);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ for (i = 14; i < 32; i++)
+ regs->gpr[i] = val;
+
+ ret = ptrace(PTRACE_SETREGS, child, NULL, regs);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int show_ckpt_gpr(pid_t child, unsigned long *gpr)
+{
+ struct pt_regs *regs;
+ struct iovec iov;
+ int ret, i;
+
+ regs = (struct pt_regs *) malloc(sizeof(struct pt_regs));
+ if (!regs) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ iov.iov_base = (u64 *) regs;
+ iov.iov_len = sizeof(struct pt_regs);
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CGPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ if (gpr) {
+ for (i = 14; i < 32; i++)
+ gpr[i-14] = regs->gpr[i];
+ }
+
+ return TEST_PASS;
+}
+
+int write_ckpt_gpr(pid_t child, unsigned long val)
+{
+ struct pt_regs *regs;
+ struct iovec iov;
+ int ret, i;
+
+ regs = (struct pt_regs *) malloc(sizeof(struct pt_regs));
+ if (!regs) {
+ perror("malloc() failed\n");
+ return TEST_FAIL;
+ }
+ iov.iov_base = (u64 *) regs;
+ iov.iov_len = sizeof(struct pt_regs);
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CGPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ for (i = 14; i < 32; i++)
+ regs->gpr[i] = val;
+
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CGPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
/* Analyse TEXASR after TM failure */
inline unsigned long get_tfiar(void)
{
@@ -223,3 +431,6 @@ void analyse_texasr(unsigned long texasr)
printf("TFIAR :%lx\n", get_tfiar());
}
+
+void store_gpr(unsigned long *addr);
+void store_fpr(float *addr);
diff --git a/tools/testing/selftests/powerpc/utility/reg.S b/tools/testing/selftests/powerpc/utility/reg.S
new file mode 100644
index 0000000..b6aee2f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/utility/reg.S
@@ -0,0 +1,132 @@
+/*
+ * test helper assembly functions
+ *
+ * Copyright (C) 2016 Simon Guo, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <ppc-asm.h>
+#include "reg.h"
+
+
+/* Non volatile GPR - unsigned long buf[18] */
+FUNC_START(load_gpr)
+ ld 14, 0*8(3)
+ ld 15, 1*8(3)
+ ld 16, 2*8(3)
+ ld 17, 3*8(3)
+ ld 18, 4*8(3)
+ ld 19, 5*8(3)
+ ld 20, 6*8(3)
+ ld 21, 7*8(3)
+ ld 22, 8*8(3)
+ ld 23, 9*8(3)
+ ld 24, 10*8(3)
+ ld 25, 11*8(3)
+ ld 26, 12*8(3)
+ ld 27, 13*8(3)
+ ld 28, 14*8(3)
+ ld 29, 15*8(3)
+ ld 30, 16*8(3)
+ ld 31, 17*8(3)
+ blr
+FUNC_END(load_gpr)
+
+FUNC_START(store_gpr)
+ std 14, 0*8(3)
+ std 15, 1*8(3)
+ std 16, 2*8(3)
+ std 17, 3*8(3)
+ std 18, 4*8(3)
+ std 19, 5*8(3)
+ std 20, 6*8(3)
+ std 21, 7*8(3)
+ std 22, 8*8(3)
+ std 23, 9*8(3)
+ std 24, 10*8(3)
+ std 25, 11*8(3)
+ std 26, 12*8(3)
+ std 27, 13*8(3)
+ std 28, 14*8(3)
+ std 29, 15*8(3)
+ std 30, 16*8(3)
+ std 31, 17*8(3)
+ blr
+FUNC_END(store_gpr)
+
+/* Single Precision Float - float buf[32] */
+FUNC_START(load_fpr_single_precision)
+ lfs 0, 0*4(3)
+ lfs 1, 1*4(3)
+ lfs 2, 2*4(3)
+ lfs 3, 3*4(3)
+ lfs 4, 4*4(3)
+ lfs 5, 5*4(3)
+ lfs 6, 6*4(3)
+ lfs 7, 7*4(3)
+ lfs 8, 8*4(3)
+ lfs 9, 9*4(3)
+ lfs 10, 10*4(3)
+ lfs 11, 11*4(3)
+ lfs 12, 12*4(3)
+ lfs 13, 13*4(3)
+ lfs 14, 14*4(3)
+ lfs 15, 15*4(3)
+ lfs 16, 16*4(3)
+ lfs 17, 17*4(3)
+ lfs 18, 18*4(3)
+ lfs 19, 19*4(3)
+ lfs 20, 20*4(3)
+ lfs 21, 21*4(3)
+ lfs 22, 22*4(3)
+ lfs 23, 23*4(3)
+ lfs 24, 24*4(3)
+ lfs 25, 25*4(3)
+ lfs 26, 26*4(3)
+ lfs 27, 27*4(3)
+ lfs 28, 28*4(3)
+ lfs 29, 29*4(3)
+ lfs 30, 30*4(3)
+ lfs 31, 31*4(3)
+ blr
+FUNC_END(load_fpr_single_precision)
+
+/* Single Precision Float - float buf[32] */
+FUNC_START(store_fpr_single_precision)
+ stfs 0, 0*4(3)
+ stfs 1, 1*4(3)
+ stfs 2, 2*4(3)
+ stfs 3, 3*4(3)
+ stfs 4, 4*4(3)
+ stfs 5, 5*4(3)
+ stfs 6, 6*4(3)
+ stfs 7, 7*4(3)
+ stfs 8, 8*4(3)
+ stfs 9, 9*4(3)
+ stfs 10, 10*4(3)
+ stfs 11, 11*4(3)
+ stfs 12, 12*4(3)
+ stfs 13, 13*4(3)
+ stfs 14, 14*4(3)
+ stfs 15, 15*4(3)
+ stfs 16, 16*4(3)
+ stfs 17, 17*4(3)
+ stfs 18, 18*4(3)
+ stfs 19, 19*4(3)
+ stfs 20, 20*4(3)
+ stfs 21, 21*4(3)
+ stfs 22, 22*4(3)
+ stfs 23, 23*4(3)
+ stfs 24, 24*4(3)
+ stfs 25, 25*4(3)
+ stfs 26, 26*4(3)
+ stfs 27, 27*4(3)
+ stfs 28, 28*4(3)
+ stfs 29, 29*4(3)
+ stfs 30, 30*4(3)
+ stfs 31, 31*4(3)
+ blr
+FUNC_END(store_fpr_single_precision)
diff --git a/tools/testing/selftests/powerpc/utility/reg.h b/tools/testing/selftests/powerpc/utility/reg.h
index f5d33db..2cd7409 100644
--- a/tools/testing/selftests/powerpc/utility/reg.h
+++ b/tools/testing/selftests/powerpc/utility/reg.h
@@ -86,4 +86,105 @@
#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
+#define ASM_LOAD_GPR_IMMED(_asm_symbol_name_immed) \
+ "li 14, %[" #_asm_symbol_name_immed "];" \
+ "li 15, %[" #_asm_symbol_name_immed "];" \
+ "li 16, %[" #_asm_symbol_name_immed "];" \
+ "li 17, %[" #_asm_symbol_name_immed "];" \
+ "li 18, %[" #_asm_symbol_name_immed "];" \
+ "li 19, %[" #_asm_symbol_name_immed "];" \
+ "li 20, %[" #_asm_symbol_name_immed "];" \
+ "li 21, %[" #_asm_symbol_name_immed "];" \
+ "li 22, %[" #_asm_symbol_name_immed "];" \
+ "li 23, %[" #_asm_symbol_name_immed "];" \
+ "li 24, %[" #_asm_symbol_name_immed "];" \
+ "li 25, %[" #_asm_symbol_name_immed "];" \
+ "li 26, %[" #_asm_symbol_name_immed "];" \
+ "li 27, %[" #_asm_symbol_name_immed "];" \
+ "li 28, %[" #_asm_symbol_name_immed "];" \
+ "li 29, %[" #_asm_symbol_name_immed "];" \
+ "li 30, %[" #_asm_symbol_name_immed "];" \
+ "li 31, %[" #_asm_symbol_name_immed "];"
+
+#define ASM_LOAD_FPR_SINGLE_PRECISION(_asm_symbol_name_addr) \
+ "lfs 0, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 1, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 2, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 3, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 4, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 5, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 6, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 7, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 8, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 9, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 10, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 11, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 12, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 13, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 14, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 15, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 16, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 17, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 18, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 19, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 20, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 21, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 22, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 23, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 24, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 25, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 26, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 27, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 28, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 29, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 30, 0(%[" #_asm_symbol_name_addr "]);" \
+ "lfs 31, 0(%[" #_asm_symbol_name_addr "]);"
+
+#define PUSH_FPU(pos) \
+ stfd f14, pos(sp); \
+ stfd f15, pos+8(sp); \
+ stfd f16, pos+16(sp); \
+ stfd f17, pos+24(sp); \
+ stfd f18, pos+32(sp); \
+ stfd f19, pos+40(sp); \
+ stfd f20, pos+48(sp); \
+ stfd f21, pos+56(sp); \
+ stfd f22, pos+64(sp); \
+ stfd f23, pos+72(sp); \
+ stfd f24, pos+80(sp); \
+ stfd f25, pos+88(sp); \
+ stfd f26, pos+96(sp); \
+ stfd f27, pos+104(sp); \
+ stfd f28, pos+112(sp); \
+ stfd f29, pos+120(sp); \
+ stfd f30, pos+128(sp); \
+ stfd f31, pos+136(sp);
+
+#define POP_FPU(pos) \
+ lfd f14, pos(sp); \
+ lfd f15, pos+8(sp); \
+ lfd f16, pos+16(sp); \
+ lfd f17, pos+24(sp); \
+ lfd f18, pos+32(sp); \
+ lfd f19, pos+40(sp); \
+ lfd f20, pos+48(sp); \
+ lfd f21, pos+56(sp); \
+ lfd f22, pos+64(sp); \
+ lfd f23, pos+72(sp); \
+ lfd f24, pos+80(sp); \
+ lfd f25, pos+88(sp); \
+ lfd f26, pos+96(sp); \
+ lfd f27, pos+104(sp); \
+ lfd f28, pos+112(sp); \
+ lfd f29, pos+120(sp); \
+ lfd f30, pos+128(sp); \
+ lfd f31, pos+136(sp);
+
+#ifndef __ASSEMBLER__
+void store_gpr(unsigned long *addr);
+void load_gpr(unsigned long *addr);
+void load_fpr_single_precision(float *addr);
+void store_fpr_single_precision(float *addr);
+#endif /* end of __ASSEMBLER__ */
+
#endif /* _SELFTESTS_POWERPC_REG_H */
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (3 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM wei.guo.simon
` (9 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 5 +-
.../selftests/powerpc/ptrace/ptrace-tm-gpr.c | 158 +++++++++++++++++++++
2 files changed, 161 insertions(+), 2 deletions(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index e9b8e7d..bb958a8 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,11 +1,12 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
include ../../lib.mk
all: $(TEST_PROGS)
-CFLAGS += -m64
+CFLAGS += -m64 -I../tm -mhtm
$(TEST_PROGS): ../harness.c ../utility/reg.S ../utility/utils.c ptrace.h
ptrace-ebb: ../pmu/event.c ../pmu/lib.c ../pmu/ebb/ebb_handler.S ../pmu/ebb/busy_loop.S
ptrace-ebb: CFLAGS += -I../pmu/ebb
+
clean:
rm -f $(TEST_PROGS) *.o
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
new file mode 100644
index 0000000..59206b9
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c
@@ -0,0 +1,158 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+unsigned long *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+
+void tm_gpr(void)
+{
+ unsigned long gpr_buf[18];
+ unsigned long result, texasr;
+ float fpr_buf[32];
+
+ printf("Starting the child\n");
+ cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[1] = 0;
+ asm __volatile__(
+ ASM_LOAD_GPR_IMMED(gpr_1)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+ ASM_LOAD_GPR_IMMED(gpr_2)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_2)
+ "tsuspend.;"
+ "li 7, 1;"
+ "stw 7, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2),
+ [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (&a),
+ [flt_2] "r" (&b), [cptr1] "r" (&cptr[1])
+ : "memory", "r7", "r8", "r9", "r10",
+ "r11", "r12", "r13", "r14", "r15", "r16",
+ "r17", "r18", "r19", "r20", "r21", "r22",
+ "r23", "r24", "r25", "r26", "r27", "r28",
+ "r29", "r30", "r31"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ shmdt((void *)cptr);
+ store_gpr(gpr_buf);
+ store_fpr_single_precision(fpr_buf);
+
+ if (validate_gpr(gpr_buf, GPR_3))
+ exit(1);
+
+ if (validate_fpr_float(fpr_buf, c))
+ exit(1);
+
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_gpr(pid_t child)
+{
+ unsigned long gpr[18];
+ unsigned long fpr[32];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_2));
+ FAIL_IF(show_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_2_REP));
+ FAIL_IF(show_ckpt_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+ FAIL_IF(show_ckpt_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_1));
+ FAIL_IF(write_ckpt_gpr(child, GPR_3));
+ FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+ pptr[0] = 1;
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_tm_gpr(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+ if (pid == 0)
+ tm_gpr();
+
+ if (pid) {
+ pptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+ ret = trace_tm_gpr(pid);
+ if (ret) {
+ kill(pid, SIGTERM);
+ return TEST_FAIL;
+ }
+
+ shmdt((void *)pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tm_gpr, "ptrace_tm_gpr");
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (4 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers wei.guo.simon
` (8 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c | 169 +++++++++++++++++++++
2 files changed, 170 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index bb958a8..9f3ed2b 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,4 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
new file mode 100644
index 0000000..327fa94
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c
@@ -0,0 +1,169 @@
+/*
+ * Ptrace test for GPR/FPR registers in TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-gpr.h"
+#include "tm.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+float a = FPR_1;
+float b = FPR_2;
+float c = FPR_3;
+float d = FPR_4;
+
+__attribute__((used)) void wait_parent(void)
+{
+ cptr[2] = 1;
+ while (!cptr[1])
+ asm volatile("" : : : "memory");
+}
+
+void tm_spd_gpr(void)
+{
+ unsigned long gpr_buf[18];
+ unsigned long result, texasr;
+ float fpr_buf[32];
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[2] = 0;
+ asm __volatile__(
+ ASM_LOAD_GPR_IMMED(gpr_1)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_1)
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ ASM_LOAD_GPR_IMMED(gpr_2)
+ "tsuspend.;"
+ ASM_LOAD_GPR_IMMED(gpr_4)
+ ASM_LOAD_FPR_SINGLE_PRECISION(flt_4)
+
+ "bl wait_parent;"
+ "tresume.;"
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [gpr_1]"i"(GPR_1), [gpr_2]"i"(GPR_2), [gpr_4]"i"(GPR_4),
+ [sprn_texasr] "i" (SPRN_TEXASR), [flt_1] "r" (&a),
+ [flt_2] "r" (&b), [flt_4] "r" (&d)
+ : "memory", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ shmdt((void *)cptr);
+ store_gpr(gpr_buf);
+ store_fpr_single_precision(fpr_buf);
+
+ if (validate_gpr(gpr_buf, GPR_3))
+ exit(1);
+
+ if (validate_fpr_float(fpr_buf, c))
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_spd_gpr(pid_t child)
+{
+ unsigned long gpr[18];
+ unsigned long fpr[32];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_4));
+ FAIL_IF(show_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_4_REP));
+ FAIL_IF(show_ckpt_fpr(child, fpr));
+ FAIL_IF(validate_fpr(fpr, FPR_1_REP));
+ FAIL_IF(show_ckpt_gpr(child, gpr));
+ FAIL_IF(validate_gpr(gpr, GPR_1));
+ FAIL_IF(write_ckpt_gpr(child, GPR_3));
+ FAIL_IF(write_ckpt_fpr(child, FPR_3_REP));
+
+ pptr[0] = 1;
+ pptr[1] = 1;
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tm_spd_gpr(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tm_spd_gpr();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ pptr[0] = 0;
+ pptr[1] = 0;
+
+ while (!pptr[2])
+ asm volatile("" : : : "memory");
+ ret = trace_tm_spd_gpr(pid);
+ if (ret) {
+ kill(pid, SIGTERM);
+ shmdt((void *)pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ shmdt((void *)pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tm_spd_gpr, "ptrace_tm_spd_gpr");
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (5 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM wei.guo.simon
` (7 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 3 +-
.../testing/selftests/powerpc/ptrace/ptrace-tar.c | 135 +++++++++++++++
.../testing/selftests/powerpc/ptrace/ptrace-tar.h | 50 ++++++
tools/testing/selftests/powerpc/ptrace/ptrace.h | 181 +++++++++++++++++++++
4 files changed, 368 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tar.h
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9f3ed2b..dfb0847 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,4 +1,5 @@
-TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr
+TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
+ptrace-tar
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
new file mode 100644
index 0000000..f9b5069
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.c
@@ -0,0 +1,135 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-tar.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr;
+int *pptr;
+
+void tar(void)
+{
+ unsigned long reg[3];
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+ printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+ user_write, TAR_1, PPR_1, DSCR_1);
+
+ mtspr(SPRN_TAR, TAR_1);
+ mtspr(SPRN_PPR, PPR_1);
+ mtspr(SPRN_DSCR, DSCR_1);
+
+ cptr[2] = 1;
+
+ /* Wait on parent */
+ while (!cptr[0])
+ asm volatile("" : : : "memory");
+
+ reg[0] = mfspr(SPRN_TAR);
+ reg[1] = mfspr(SPRN_PPR);
+ reg[2] = mfspr(SPRN_DSCR);
+
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ user_read, reg[0], reg[1], reg[2]);
+
+ /* Unblock the parent now */
+ cptr[1] = 1;
+ shmdt((int *)cptr);
+
+ ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
+ if (ret)
+ exit(1);
+ exit(0);
+}
+
+int trace_tar(pid_t child)
+{
+ unsigned long reg[3];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tar_registers(child, reg));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_running, reg[0], reg[1], reg[2]);
+
+ FAIL_IF(validate_tar_registers(reg, TAR_1, PPR_1, DSCR_1));
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int trace_tar_write(pid_t child)
+{
+ FAIL_IF(start_trace(child));
+ FAIL_IF(write_tar_registers(child, TAR_2, PPR_2, DSCR_2));
+ printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+ ptrace_write_running, TAR_2, PPR_2, DSCR_2);
+
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tar(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tar();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ pptr[0] = 0;
+ pptr[1] = 0;
+
+ while (!pptr[2])
+ asm volatile("" : : : "memory");
+ ret = trace_tar(pid);
+ if (ret)
+ return ret;
+
+ ret = trace_tar_write(pid);
+ if (ret)
+ return ret;
+
+ /* Unblock the child now */
+ pptr[0] = 1;
+
+ /* Wait on child */
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+
+ shmdt((int *)pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_PASS;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tar, "ptrace_tar");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tar.h b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.h
new file mode 100644
index 0000000..aed0aac
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tar.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#define TAR_1 10
+#define TAR_2 20
+#define TAR_3 30
+#define TAR_4 40
+#define TAR_5 50
+
+#define DSCR_1 100
+#define DSCR_2 200
+#define DSCR_3 300
+#define DSCR_4 400
+#define DSCR_5 500
+
+#define PPR_1 0x4000000000000 /* or 31,31,31*/
+#define PPR_2 0x8000000000000 /* or 1,1,1 */
+#define PPR_3 0xc000000000000 /* or 6,6,6 */
+#define PPR_4 0x10000000000000 /* or 2,2,2 */
+
+char *user_read = "[User Read (Running)]";
+char *user_write = "[User Write (Running)]";
+char *ptrace_read_running = "[Ptrace Read (Running)]";
+char *ptrace_write_running = "[Ptrace Write (Running)]";
+char *ptrace_read_ckpt = "[Ptrace Read (Checkpointed)]";
+char *ptrace_write_ckpt = "[Ptrace Write (Checkpointed)]";
+
+int validate_tar_registers(unsigned long *reg, unsigned long tar,
+ unsigned long ppr, unsigned long dscr)
+{
+ int match = 1;
+
+ if (reg[0] != tar)
+ match = 0;
+
+ if (reg[1] != ppr)
+ match = 0;
+
+ if (reg[2] != dscr)
+ match = 0;
+
+ if (!match)
+ return TEST_FAIL;
+ return TEST_PASS;
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace.h b/tools/testing/selftests/powerpc/ptrace/ptrace.h
index 87fe437..babf8695f2 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace.h
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace.h
@@ -157,6 +157,187 @@ fail:
return TEST_FAIL;
}
+/* TAR, PPR, DSCR */
+int show_tar_registers(pid_t child, unsigned long *out)
+{
+ struct iovec iov;
+ unsigned long *reg;
+ int ret;
+
+ reg = malloc(sizeof(unsigned long));
+ if (!reg) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+ iov.iov_base = (u64 *) reg;
+ iov.iov_len = sizeof(unsigned long);
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TAR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+ if (out)
+ out[0] = *reg;
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_PPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+ if (out)
+ out[1] = *reg;
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_DSCR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+ if (out)
+ out[2] = *reg;
+
+ free(reg);
+ return TEST_PASS;
+fail:
+ free(reg);
+ return TEST_FAIL;
+}
+
+int write_tar_registers(pid_t child, unsigned long tar,
+ unsigned long ppr, unsigned long dscr)
+{
+ struct iovec iov;
+ unsigned long *reg;
+ int ret;
+
+ reg = malloc(sizeof(unsigned long));
+ if (!reg) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ iov.iov_base = (u64 *) reg;
+ iov.iov_len = sizeof(unsigned long);
+
+ *reg = tar;
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TAR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_SETREGSET) failed");
+ goto fail;
+ }
+
+ *reg = ppr;
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_PPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_SETREGSET) failed");
+ goto fail;
+ }
+
+ *reg = dscr;
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_DSCR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_SETREGSET) failed");
+ goto fail;
+ }
+
+ free(reg);
+ return TEST_PASS;
+fail:
+ free(reg);
+ return TEST_FAIL;
+}
+
+int show_tm_checkpointed_state(pid_t child, unsigned long *out)
+{
+ struct iovec iov;
+ unsigned long *reg;
+ int ret;
+
+ reg = malloc(sizeof(unsigned long));
+ if (!reg) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ iov.iov_base = (u64 *) reg;
+ iov.iov_len = sizeof(unsigned long);
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CTAR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+ if (out)
+ out[0] = *reg;
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CPPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+ if (out)
+ out[1] = *reg;
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CDSCR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+ if (out)
+ out[2] = *reg;
+
+ free(reg);
+ return TEST_PASS;
+
+fail:
+ free(reg);
+ return TEST_FAIL;
+}
+
+int write_ckpt_tar_registers(pid_t child, unsigned long tar,
+ unsigned long ppr, unsigned long dscr)
+{
+ struct iovec iov;
+ unsigned long *reg;
+ int ret;
+
+ reg = malloc(sizeof(unsigned long));
+ if (!reg) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ iov.iov_base = (u64 *) reg;
+ iov.iov_len = sizeof(unsigned long);
+
+ *reg = tar;
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CTAR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+
+ *reg = ppr;
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CPPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+
+ *reg = dscr;
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CDSCR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ goto fail;
+ }
+
+ free(reg);
+ return TEST_PASS;
+fail:
+ free(reg);
+ return TEST_FAIL;
+}
+
/* FPR */
int show_fpr(pid_t child, unsigned long *fpr)
{
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (6 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM wei.guo.simon
` (6 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-tar.c | 160 +++++++++++++++++++++
2 files changed, 161 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index dfb0847..9af9ad5 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar
+ptrace-tar ptrace-tm-tar
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
new file mode 100644
index 0000000..48b462f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-tar.c
@@ -0,0 +1,160 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+
+void tm_tar(void)
+{
+ unsigned long result, texasr;
+ unsigned long regs[3];
+ int ret;
+
+ cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[1] = 0;
+ asm __volatile__(
+ "li 4, %[tar_1];"
+ "mtspr %[sprn_tar], 4;" /* TAR_1 */
+ "li 4, %[dscr_1];"
+ "mtspr %[sprn_dscr], 4;" /* DSCR_1 */
+ "or 31,31,31;" /* PPR_1*/
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "li 4, %[tar_2];"
+ "mtspr %[sprn_tar], 4;" /* TAR_2 */
+ "li 4, %[dscr_2];"
+ "mtspr %[sprn_dscr], 4;" /* DSCR_2 */
+ "or 1,1,1;" /* PPR_2 */
+ "tsuspend.;"
+ "li 0, 1;"
+ "stw 0, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [sprn_dscr]"i"(SPRN_DSCR), [sprn_tar]"i"(SPRN_TAR),
+ [sprn_ppr]"i"(SPRN_PPR), [sprn_texasr]"i"(SPRN_TEXASR),
+ [tar_1]"i"(TAR_1), [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2),
+ [dscr_2]"i"(DSCR_2), [cptr1] "r" (&cptr[1])
+ : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+ );
+
+ /* TM failed, analyse */
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ regs[0] = mfspr(SPRN_TAR);
+ regs[1] = mfspr(SPRN_PPR);
+ regs[2] = mfspr(SPRN_DSCR);
+
+ shmdt(&cptr);
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ user_read, regs[0], regs[1], regs[2]);
+
+ ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt(&cptr);
+ exit(1);
+}
+
+int trace_tm_tar(pid_t child)
+{
+ unsigned long regs[3];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tar_registers(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_running, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs, TAR_2, PPR_2, DSCR_2));
+ FAIL_IF(show_tm_checkpointed_state(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
+ FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
+ printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+ ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
+
+ pptr[0] = 1;
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tm_tar(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid == 0)
+ tm_tar();
+
+ pptr = (unsigned long *)shmat(shm_id, NULL, 0);
+ pptr[0] = 0;
+
+ if (pid) {
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+ ret = trace_tm_tar(pid);
+ if (ret) {
+ kill(pid, SIGTERM);
+ shmdt(&pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+ shmdt(&pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tm_tar, "ptrace_tm_tar");
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (7 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers wei.guo.simon
` (5 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c | 174 +++++++++++++++++++++
2 files changed, 175 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9af9ad5..19e4a7c 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
new file mode 100644
index 0000000..b3c061d
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c
@@ -0,0 +1,174 @@
+/*
+ * Ptrace test for TAR, PPR, DSCR registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-tar.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+__attribute__((used)) void wait_parent(void)
+{
+ cptr[2] = 1;
+ while (!cptr[1])
+ asm volatile("" : : : "memory");
+}
+
+void tm_spd_tar(void)
+{
+ unsigned long result, texasr;
+ unsigned long regs[3];
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[2] = 0;
+ asm __volatile__(
+ "li 4, %[tar_1];"
+ "mtspr %[sprn_tar], 4;" /* TAR_1 */
+ "li 4, %[dscr_1];"
+ "mtspr %[sprn_dscr], 4;" /* DSCR_1 */
+ "or 31,31,31;" /* PPR_1*/
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "li 4, %[tar_2];"
+ "mtspr %[sprn_tar], 4;" /* TAR_2 */
+ "li 4, %[dscr_2];"
+ "mtspr %[sprn_dscr], 4;" /* DSCR_2 */
+ "or 1,1,1;" /* PPR_2 */
+
+ "tsuspend.;"
+ "li 4, %[tar_3];"
+ "mtspr %[sprn_tar], 4;" /* TAR_3 */
+ "li 4, %[dscr_3];"
+ "mtspr %[sprn_dscr], 4;" /* DSCR_3 */
+ "or 6,6,6;" /* PPR_3 */
+ "bl wait_parent;"
+ "tresume.;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ /* Transaction abort handler */
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [val] "r" (cptr[1]), [sprn_dscr]"i"(SPRN_DSCR),
+ [sprn_tar]"i"(SPRN_TAR), [sprn_ppr]"i"(SPRN_PPR),
+ [sprn_texasr]"i"(SPRN_TEXASR), [tar_1]"i"(TAR_1),
+ [dscr_1]"i"(DSCR_1), [tar_2]"i"(TAR_2), [dscr_2]"i"(DSCR_2),
+ [tar_3]"i"(TAR_3), [dscr_3]"i"(DSCR_3)
+ : "memory", "r0", "r1", "r3", "r4", "r5", "r6"
+ );
+
+ /* TM failed, analyse */
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ regs[0] = mfspr(SPRN_TAR);
+ regs[1] = mfspr(SPRN_PPR);
+ regs[2] = mfspr(SPRN_DSCR);
+
+ shmdt(&cptr);
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ user_read, regs[0], regs[1], regs[2]);
+
+ ret = validate_tar_registers(regs, TAR_4, PPR_4, DSCR_4);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt(&cptr);
+ exit(1);
+}
+
+int trace_tm_spd_tar(pid_t child)
+{
+ unsigned long regs[3];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tar_registers(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_running, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs, TAR_3, PPR_3, DSCR_3));
+ FAIL_IF(show_tm_checkpointed_state(child, regs));
+ printf("%-30s TAR: %lu PPR: %lx DSCR: %lu\n",
+ ptrace_read_ckpt, regs[0], regs[1], regs[2]);
+
+ FAIL_IF(validate_tar_registers(regs, TAR_1, PPR_1, DSCR_1));
+ FAIL_IF(write_ckpt_tar_registers(child, TAR_4, PPR_4, DSCR_4));
+ printf("%-30s TAR: %u PPR: %lx DSCR: %u\n",
+ ptrace_write_ckpt, TAR_4, PPR_4, DSCR_4);
+
+ pptr[0] = 1;
+ pptr[1] = 1;
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tm_spd_tar(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+ pid = fork();
+ if (pid == 0)
+ tm_spd_tar();
+
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ pptr[0] = 0;
+ pptr[1] = 0;
+
+ if (pid) {
+ while (!pptr[2])
+ asm volatile("" : : : "memory");
+ ret = trace_tm_spd_tar(pid);
+ if (ret) {
+ kill(pid, SIGTERM);
+ shmdt(&pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ shmdt(&pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tm_spd_tar, "ptrace_tm_spd_tar");
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (8 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM wei.guo.simon
@ 2016-09-30 2:32 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM wei.guo.simon
` (4 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:32 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 2 +-
.../testing/selftests/powerpc/ptrace/ptrace-vsx.c | 117 +++++++++
.../testing/selftests/powerpc/ptrace/ptrace-vsx.h | 127 ++++++++++
tools/testing/selftests/powerpc/ptrace/ptrace.h | 119 +++++++++
tools/testing/selftests/powerpc/utility/reg.S | 265 +++++++++++++++++++++
5 files changed, 629 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index 19e4a7c..9d9f658 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,5 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
new file mode 100644
index 0000000..04084ee
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.c
@@ -0,0 +1,117 @@
+/*
+ * Ptrace test for VMX/VSX registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "ptrace-vsx.h"
+
+/* Tracer and Tracee Shared Data */
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+
+void vsx(void)
+{
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+ loadvsx(fp_load, 0);
+ cptr[1] = 1;
+
+ while (!cptr[0])
+ asm volatile("" : : : "memory");
+ shmdt((void *) cptr);
+
+ storevsx(fp_store, 0);
+ ret = compare_vsx_vmx(fp_store, fp_load_new);
+ if (ret)
+ exit(1);
+ exit(0);
+}
+
+int trace_vsx(pid_t child)
+{
+ unsigned long vsx[VSX_MAX];
+ unsigned long vmx[VMX_MAX + 2][2];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_vsx(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load));
+ FAIL_IF(show_vmx(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load));
+
+ memset(vsx, 0, sizeof(vsx));
+ memset(vmx, 0, sizeof(vmx));
+ load_vsx_vmx(fp_load_new, vsx, vmx);
+
+ FAIL_IF(write_vsx(child, vsx));
+ FAIL_IF(write_vmx(child, vmx));
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_vsx(void)
+{
+ pid_t pid;
+ int ret, status, i;
+
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+ for (i = 0; i < VEC_MAX; i++)
+ fp_load[i] = i + rand();
+
+ for (i = 0; i < VEC_MAX; i++)
+ fp_load_new[i] = i + 2 * rand();
+
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ vsx();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+
+ ret = trace_vsx(pid);
+ if (ret) {
+ kill(pid, SIGTERM);
+ shmdt((void *)pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ pptr[0] = 1;
+ shmdt((void *)pptr);
+
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_vsx, "ptrace_vsx");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
new file mode 100644
index 0000000..f4e4b42
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-vsx.h
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#define VEC_MAX 128
+#define VSX_MAX 32
+#define VMX_MAX 32
+
+/*
+ * unsigned long vsx[32]
+ * unsigned long load[128]
+ */
+int validate_vsx(unsigned long *vsx, unsigned long *load)
+{
+ int i;
+
+ for (i = 0; i < VSX_MAX; i++) {
+ if (vsx[i] != load[2 * i + 1]) {
+ printf("vsx[%d]: %lx load[%d] %lx\n",
+ i, vsx[i], 2 * i + 1, load[2 * i + 1]);
+ return TEST_FAIL;
+ }
+ }
+ return TEST_PASS;
+}
+
+/*
+ * unsigned long vmx[32][2]
+ * unsigned long load[128]
+ */
+int validate_vmx(unsigned long vmx[][2], unsigned long *load)
+{
+ int i;
+
+ for (i = 0; i < VMX_MAX; i++) {
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ if ((vmx[i][0] != load[64 + 2 * i]) ||
+ (vmx[i][1] != load[65 + 2 * i])) {
+ printf("vmx[%d][0]: %lx load[%d] %lx\n",
+ i, vmx[i][0], 64 + 2 * i,
+ load[64 + 2 * i]);
+ printf("vmx[%d][1]: %lx load[%d] %lx\n",
+ i, vmx[i][1], 65 + 2 * i,
+ load[65 + 2 * i]);
+ return TEST_FAIL;
+ }
+ #else /*
+ * In LE each value pair is stored in an
+ * alternate manner.
+ */
+ if ((vmx[i][0] != load[65 + 2 * i]) ||
+ (vmx[i][1] != load[64 + 2 * i])) {
+ printf("vmx[%d][0]: %lx load[%d] %lx\n",
+ i, vmx[i][0], 65 + 2 * i,
+ load[65 + 2 * i]);
+ printf("vmx[%d][1]: %lx load[%d] %lx\n",
+ i, vmx[i][1], 64 + 2 * i,
+ load[64 + 2 * i]);
+ return TEST_FAIL;
+ }
+ #endif
+ }
+ return TEST_PASS;
+}
+
+/*
+ * unsigned long store[128]
+ * unsigned long load[128]
+ */
+int compare_vsx_vmx(unsigned long *store, unsigned long *load)
+{
+ int i;
+
+ for (i = 0; i < VSX_MAX; i++) {
+ if (store[1 + 2 * i] != load[1 + 2 * i]) {
+ printf("store[%d]: %lx load[%d] %lx\n",
+ 1 + 2 * i, store[i],
+ 1 + 2 * i, load[i]);
+ return TEST_FAIL;
+ }
+ }
+
+ #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+ for (i = 64; i < VEC_MAX; i++) {
+ if (store[i] != load[i]) {
+ printf("store[%d]: %lx load[%d] %lx\n",
+ i, store[i], i, load[i]);
+ return TEST_FAIL;
+ }
+ }
+ #else /* In LE each value pair is stored in an alternate manner */
+ for (i = 64; i < VEC_MAX; i++) {
+ if (!(i % 2) && (store[i] != load[i+1])) {
+ printf("store[%d]: %lx load[%d] %lx\n",
+ i, store[i], i+1, load[i+1]);
+ return TEST_FAIL;
+ }
+ if ((i % 2) && (store[i] != load[i-1])) {
+ printf("here store[%d]: %lx load[%d] %lx\n",
+ i, store[i], i-1, load[i-1]);
+ return TEST_FAIL;
+ }
+ }
+ #endif
+ return TEST_PASS;
+}
+
+void load_vsx_vmx(unsigned long *load, unsigned long *vsx,
+ unsigned long vmx[][2])
+{
+ int i;
+
+ for (i = 0; i < VSX_MAX; i++)
+ vsx[i] = load[1 + 2 * i];
+
+ for (i = 0; i < VMX_MAX; i++) {
+ vmx[i][0] = load[64 + 2 * i];
+ vmx[i][1] = load[65 + 2 * i];
+ }
+}
+
+void loadvsx(void *p, int tmp);
+void storevsx(void *p, int tmp);
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace.h b/tools/testing/selftests/powerpc/ptrace/ptrace.h
index babf8695f2..7dea180 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace.h
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace.h
@@ -546,6 +546,125 @@ int write_ckpt_gpr(pid_t child, unsigned long val)
return TEST_PASS;
}
+/* VMX */
+int show_vmx(pid_t child, unsigned long vmx[][2])
+{
+ int ret;
+
+ ret = ptrace(PTRACE_GETVRREGS, child, 0, vmx);
+ if (ret) {
+ perror("ptrace(PTRACE_GETVRREGS) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int show_vmx_ckpt(pid_t child, unsigned long vmx[][2])
+{
+ unsigned long regs[34][2];
+ struct iovec iov;
+ int ret;
+
+ iov.iov_base = (u64 *) regs;
+ iov.iov_len = sizeof(regs);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CVMX, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET, NT_PPC_TM_CVMX) failed");
+ return TEST_FAIL;
+ }
+ memcpy(vmx, regs, sizeof(regs));
+ return TEST_PASS;
+}
+
+
+int write_vmx(pid_t child, unsigned long vmx[][2])
+{
+ int ret;
+
+ ret = ptrace(PTRACE_SETVRREGS, child, 0, vmx);
+ if (ret) {
+ perror("ptrace(PTRACE_SETVRREGS) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int write_vmx_ckpt(pid_t child, unsigned long vmx[][2])
+{
+ unsigned long regs[34][2];
+ struct iovec iov;
+ int ret;
+
+ memcpy(regs, vmx, sizeof(regs));
+ iov.iov_base = (u64 *) regs;
+ iov.iov_len = sizeof(regs);
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CVMX, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_SETREGSET, NT_PPC_TM_CVMX) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+/* VSX */
+int show_vsx(pid_t child, unsigned long *vsx)
+{
+ int ret;
+
+ ret = ptrace(PTRACE_GETVSRREGS, child, 0, vsx);
+ if (ret) {
+ perror("ptrace(PTRACE_GETVSRREGS) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int show_vsx_ckpt(pid_t child, unsigned long *vsx)
+{
+ unsigned long regs[32];
+ struct iovec iov;
+ int ret;
+
+ iov.iov_base = (u64 *) regs;
+ iov.iov_len = sizeof(regs);
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_CVSX, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET, NT_PPC_TM_CVSX) failed");
+ return TEST_FAIL;
+ }
+ memcpy(vsx, regs, sizeof(regs));
+ return TEST_PASS;
+}
+
+int write_vsx(pid_t child, unsigned long *vsx)
+{
+ int ret;
+
+ ret = ptrace(PTRACE_SETVSRREGS, child, 0, vsx);
+ if (ret) {
+ perror("ptrace(PTRACE_SETVSRREGS) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
+int write_vsx_ckpt(pid_t child, unsigned long *vsx)
+{
+ unsigned long regs[32];
+ struct iovec iov;
+ int ret;
+
+ memcpy(regs, vsx, sizeof(regs));
+ iov.iov_base = (u64 *) regs;
+ iov.iov_len = sizeof(regs);
+ ret = ptrace(PTRACE_SETREGSET, child, NT_PPC_TM_CVSX, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_SETREGSET, NT_PPC_TM_CVSX) failed");
+ return TEST_FAIL;
+ }
+ return TEST_PASS;
+}
+
/* Analyse TEXASR after TM failure */
inline unsigned long get_tfiar(void)
{
diff --git a/tools/testing/selftests/powerpc/utility/reg.S b/tools/testing/selftests/powerpc/utility/reg.S
index b6aee2f..0dc44f0d 100644
--- a/tools/testing/selftests/powerpc/utility/reg.S
+++ b/tools/testing/selftests/powerpc/utility/reg.S
@@ -130,3 +130,268 @@ FUNC_START(store_fpr_single_precision)
stfs 31, 31*4(3)
blr
FUNC_END(store_fpr_single_precision)
+
+/* VMX/VSX registers - unsigned long buf[128] */
+FUNC_START(loadvsx)
+ lis 4, 0
+ LXVD2X (0,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (1,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (2,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (3,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (4,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (5,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (6,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (7,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (8,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (9,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (10,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (11,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (12,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (13,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (14,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (15,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (16,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (17,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (18,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (19,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (20,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (21,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (22,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (23,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (24,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (25,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (26,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (27,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (28,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (29,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (30,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (31,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (32,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (33,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (34,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (35,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (36,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (37,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (38,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (39,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (40,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (41,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (42,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (43,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (44,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (45,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (46,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (47,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (48,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (49,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (50,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (51,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (52,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (53,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (54,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (55,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (56,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (57,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (58,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (59,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (60,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (61,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (62,(4),(3))
+ addi 4, 4, 16
+ LXVD2X (63,(4),(3))
+ blr
+FUNC_END(loadvsx)
+
+FUNC_START(storevsx)
+ lis 4, 0
+ STXVD2X (0,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (1,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (2,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (3,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (4,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (5,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (6,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (7,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (8,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (9,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (10,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (11,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (12,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (13,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (14,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (15,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (16,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (17,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (18,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (19,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (20,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (21,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (22,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (23,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (24,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (25,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (26,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (27,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (28,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (29,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (30,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (31,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (32,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (33,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (34,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (35,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (36,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (37,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (38,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (39,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (40,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (41,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (42,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (43,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (44,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (45,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (46,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (47,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (48,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (49,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (50,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (51,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (52,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (53,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (54,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (55,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (56,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (57,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (58,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (59,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (60,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (61,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (62,(4),(3))
+ addi 4, 4, 16
+ STXVD2X (63,(4),(3))
+ blr
+FUNC_END(storevsx)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (9 preceding siblings ...)
2016-09-30 2:32 ` [PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers wei.guo.simon
@ 2016-09-30 2:33 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM wei.guo.simon
` (3 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:33 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-vsx.c | 168 +++++++++++++++++++++
2 files changed, 170 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index 9d9f658..a518fbd 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
new file mode 100644
index 0000000..b4081e2
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+unsigned long *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+ loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+ loadvsx(fp_load_ckpt, 0);
+}
+
+void tm_vsx(void)
+{
+ unsigned long result, texasr;
+ int ret;
+
+ cptr = (unsigned long *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[1] = 0;
+ asm __volatile__(
+ "bl load_vsx_ckpt;"
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "bl load_vsx;"
+ "tsuspend.;"
+ "li 7, 1;"
+ "stw 7, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+ [sprn_texasr] "i" (SPRN_TEXASR), [cptr1] "r" (&cptr[1])
+ : "memory", "r0", "r1", "r2", "r3", "r4",
+ "r7", "r8", "r9", "r10", "r11"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+
+ shmdt((void *)cptr);
+ storevsx(fp_store, 0);
+ ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_vsx(pid_t child)
+{
+ unsigned long vsx[VSX_MAX];
+ unsigned long vmx[VMX_MAX + 2][2];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_vsx(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load));
+ FAIL_IF(show_vmx(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load));
+ FAIL_IF(show_vsx_ckpt(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+ FAIL_IF(show_vmx_ckpt(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+ memset(vsx, 0, sizeof(vsx));
+ memset(vmx, 0, sizeof(vmx));
+
+ load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+ FAIL_IF(write_vsx_ckpt(child, vsx));
+ FAIL_IF(write_vmx_ckpt(child, vmx));
+ pptr[0] = 1;
+ FAIL_IF(stop_trace(child));
+ return TEST_PASS;
+}
+
+int ptrace_tm_vsx(void)
+{
+ pid_t pid;
+ int ret, status, i;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
+
+ for (i = 0; i < 128; i++) {
+ fp_load[i] = 1 + rand();
+ fp_load_ckpt[i] = 1 + 2 * rand();
+ fp_load_ckpt_new[i] = 1 + 3 * rand();
+ }
+
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tm_vsx();
+
+ if (pid) {
+ pptr = (unsigned long *)shmat(shm_id, NULL, 0);
+ while (!pptr[1])
+ asm volatile("" : : : "memory");
+
+ ret = trace_tm_vsx(pid);
+ if (ret) {
+ kill(pid, SIGKILL);
+ shmdt((void *)pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ shmdt((void *)pptr);
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tm_vsx, "ptrace_tm_vsx");
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (10 preceding siblings ...)
2016-09-30 2:33 ` [PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM wei.guo.simon
@ 2016-09-30 2:33 ` wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers wei.guo.simon
` (2 subsequent siblings)
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:33 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c | 185 +++++++++++++++++++++
2 files changed, 187 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index a518fbd..b5b097a 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,5 +1,6 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
-ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx
+ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
+ptrace-tm-spd-vsx
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
new file mode 100644
index 0000000..0df3c23
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
@@ -0,0 +1,185 @@
+/*
+ * Ptrace test for VMX/VSX registers in the TM Suspend context
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+#include "ptrace-vsx.h"
+
+int shm_id;
+int *cptr, *pptr;
+
+unsigned long fp_load[VEC_MAX];
+unsigned long fp_load_new[VEC_MAX];
+unsigned long fp_store[VEC_MAX];
+unsigned long fp_load_ckpt[VEC_MAX];
+unsigned long fp_load_ckpt_new[VEC_MAX];
+
+__attribute__((used)) void load_vsx(void)
+{
+ loadvsx(fp_load, 0);
+}
+
+__attribute__((used)) void load_vsx_new(void)
+{
+ loadvsx(fp_load_new, 0);
+}
+
+__attribute__((used)) void load_vsx_ckpt(void)
+{
+ loadvsx(fp_load_ckpt, 0);
+}
+
+__attribute__((used)) void wait_parent(void)
+{
+ cptr[2] = 1;
+ while (!cptr[1])
+ asm volatile("" : : : "memory");
+}
+
+void tm_spd_vsx(void)
+{
+ unsigned long result, texasr;
+ int ret;
+
+ cptr = (int *)shmat(shm_id, NULL, 0);
+
+trans:
+ cptr[2] = 0;
+ asm __volatile__(
+ "bl load_vsx_ckpt;"
+
+ "1: ;"
+ "tbegin.;"
+ "beq 2f;"
+
+ "bl load_vsx_new;"
+ "tsuspend.;"
+ "bl load_vsx;"
+ "bl wait_parent;"
+ "tresume.;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ "2: ;"
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [res] "=r" (result), [texasr] "=r" (texasr)
+ : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
+ [sprn_texasr] "i" (SPRN_TEXASR)
+ : "memory", "r0", "r1", "r2", "r3", "r4",
+ "r8", "r9", "r10", "r11"
+ );
+
+ if (result) {
+ if (!cptr[0])
+ goto trans;
+ shmdt((void *)cptr);
+
+ storevsx(fp_store, 0);
+ ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ exit(1);
+}
+
+int trace_tm_spd_vsx(pid_t child)
+{
+ unsigned long vsx[VSX_MAX];
+ unsigned long vmx[VMX_MAX + 2][2];
+
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_vsx(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load));
+ FAIL_IF(show_vmx(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load));
+ FAIL_IF(show_vsx_ckpt(child, vsx));
+ FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
+ FAIL_IF(show_vmx_ckpt(child, vmx));
+ FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
+
+ memset(vsx, 0, sizeof(vsx));
+ memset(vmx, 0, sizeof(vmx));
+
+ load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
+
+ FAIL_IF(write_vsx_ckpt(child, vsx));
+ FAIL_IF(write_vmx_ckpt(child, vmx));
+
+ pptr[0] = 1;
+ pptr[1] = 1;
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_tm_spd_vsx(void)
+{
+ pid_t pid;
+ int ret, status, i;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
+
+ for (i = 0; i < 128; i++) {
+ fp_load[i] = 1 + rand();
+ fp_load_new[i] = 1 + 2 * rand();
+ fp_load_ckpt[i] = 1 + 3 * rand();
+ fp_load_ckpt_new[i] = 1 + 4 * rand();
+ }
+
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tm_spd_vsx();
+
+ if (pid) {
+ pptr = (int *)shmat(shm_id, NULL, 0);
+ while (!pptr[2])
+ asm volatile("" : : : "memory");
+
+ ret = trace_tm_spd_vsx(pid);
+ if (ret) {
+ kill(pid, SIGKILL);
+ shmdt((void *)pptr);
+ shmctl(shm_id, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ shmdt((void *)pptr);
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tm_spd_vsx, "ptrace_tm_spd_vsx");
+}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (11 preceding siblings ...)
2016-09-30 2:33 ` [PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM wei.guo.simon
@ 2016-09-30 2:33 ` wei.guo.simon
2016-11-17 12:03 ` [v15, 13/15] " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 14/15] selftests/powerpc: Add .gitignore file for ptrace executables wei.guo.simon
2016-09-30 2:33 ` [PATCH v15 15/15] selftests/powerpc: Fix a build issue wei.guo.simon
14 siblings, 1 reply; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:33 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/Makefile | 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-spr.c | 168 +++++++++++++++++++++
tools/testing/selftests/powerpc/ptrace/ptrace.h | 35 +++++
3 files changed, 204 insertions(+), 2 deletions(-)
create mode 100644 tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
diff --git a/tools/testing/selftests/powerpc/ptrace/Makefile b/tools/testing/selftests/powerpc/ptrace/Makefile
index b5b097a..ec2a9b0 100644
--- a/tools/testing/selftests/powerpc/ptrace/Makefile
+++ b/tools/testing/selftests/powerpc/ptrace/Makefile
@@ -1,7 +1,6 @@
TEST_PROGS := ptrace-ebb ptrace-gpr ptrace-tm-gpr ptrace-tm-spd-gpr \
ptrace-tar ptrace-tm-tar ptrace-tm-spd-tar ptrace-vsx ptrace-tm-vsx \
-ptrace-tm-spd-vsx
-
+ptrace-tm-spd-vsx ptrace-tm-spr
include ../../lib.mk
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
new file mode 100644
index 0000000..94e57cb
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr.c
@@ -0,0 +1,168 @@
+/*
+ * Ptrace test TM SPR registers
+ *
+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include "ptrace.h"
+#include "tm.h"
+
+/* Tracee and tracer shared data */
+struct shared {
+ int flag;
+ struct tm_spr_regs regs;
+};
+unsigned long tfhar;
+
+int shm_id;
+struct shared *cptr, *pptr;
+
+int shm_id1;
+int *cptr1, *pptr1;
+
+#define TM_KVM_SCHED 0xe0000001ac000001
+int validate_tm_spr(struct tm_spr_regs *regs)
+{
+ FAIL_IF(regs->tm_tfhar != tfhar);
+ FAIL_IF((regs->tm_texasr == TM_KVM_SCHED) && (regs->tm_tfiar != 0));
+
+ return TEST_PASS;
+}
+
+void tm_spr(void)
+{
+ unsigned long result, texasr;
+ int ret;
+
+ cptr = (struct shared *)shmat(shm_id, NULL, 0);
+ cptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+trans:
+ cptr1[0] = 0;
+ asm __volatile__(
+ "1: ;"
+ /* TM failover handler should follow "tbegin.;" */
+ "mflr 31;"
+ "bl 4f;" /* $ = TFHAR - 12 */
+ "4: ;"
+ "mflr %[tfhar];"
+ "mtlr 31;"
+
+ "tbegin.;"
+ "beq 2f;"
+
+ "tsuspend.;"
+ "li 8, 1;"
+ "sth 8, 0(%[cptr1]);"
+ "tresume.;"
+ "b .;"
+
+ "tend.;"
+ "li 0, 0;"
+ "ori %[res], 0, 0;"
+ "b 3f;"
+
+ "2: ;"
+
+ "li 0, 1;"
+ "ori %[res], 0, 0;"
+ "mfspr %[texasr], %[sprn_texasr];"
+
+ "3: ;"
+ : [tfhar] "=r" (tfhar), [res] "=r" (result),
+ [texasr] "=r" (texasr), [cptr1] "=r" (cptr1)
+ : [sprn_texasr] "i" (SPRN_TEXASR)
+ : "memory", "r0", "r1", "r2", "r3", "r4",
+ "r8", "r9", "r10", "r11", "r31"
+ );
+
+ /* There are 2 32bit instructions before tbegin. */
+ tfhar += 12;
+
+ if (result) {
+ if (!cptr->flag)
+ goto trans;
+
+ ret = validate_tm_spr((struct tm_spr_regs *)&cptr->regs);
+ shmdt((void *)cptr);
+ shmdt((void *)cptr1);
+ if (ret)
+ exit(1);
+ exit(0);
+ }
+ shmdt((void *)cptr);
+ shmdt((void *)cptr1);
+ exit(1);
+}
+
+int trace_tm_spr(pid_t child)
+{
+ FAIL_IF(start_trace(child));
+ FAIL_IF(show_tm_spr(child, (struct tm_spr_regs *)&pptr->regs));
+
+ printf("TFHAR: %lx TEXASR: %lx TFIAR: %lx\n", pptr->regs.tm_tfhar,
+ pptr->regs.tm_texasr, pptr->regs.tm_tfiar);
+
+ pptr->flag = 1;
+ FAIL_IF(stop_trace(child));
+
+ return TEST_PASS;
+}
+
+int ptrace_tm_spr(void)
+{
+ pid_t pid;
+ int ret, status;
+
+ SKIP_IF(!have_htm());
+ shm_id = shmget(IPC_PRIVATE, sizeof(struct shared), 0777|IPC_CREAT);
+ shm_id1 = shmget(IPC_PRIVATE, sizeof(int), 0777|IPC_CREAT);
+ pid = fork();
+ if (pid < 0) {
+ perror("fork() failed");
+ return TEST_FAIL;
+ }
+
+ if (pid == 0)
+ tm_spr();
+
+ if (pid) {
+ pptr = (struct shared *)shmat(shm_id, NULL, 0);
+ pptr1 = (int *)shmat(shm_id1, NULL, 0);
+
+ while (!pptr1[0])
+ asm volatile("" : : : "memory");
+ ret = trace_tm_spr(pid);
+ if (ret) {
+ kill(pid, SIGKILL);
+ shmdt((void *)pptr);
+ shmdt((void *)pptr1);
+ shmctl(shm_id, IPC_RMID, NULL);
+ shmctl(shm_id1, IPC_RMID, NULL);
+ return TEST_FAIL;
+ }
+
+ shmdt((void *)pptr);
+ shmdt((void *)pptr1);
+ ret = wait(&status);
+ shmctl(shm_id, IPC_RMID, NULL);
+ shmctl(shm_id1, IPC_RMID, NULL);
+ if (ret != pid) {
+ printf("Child's exit status not captured\n");
+ return TEST_FAIL;
+ }
+
+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
+ TEST_PASS;
+ }
+ return TEST_PASS;
+}
+
+int main(int argc, char *argv[])
+{
+ return test_harness(ptrace_tm_spr, "ptrace_tm_spr");
+}
diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace.h b/tools/testing/selftests/powerpc/ptrace/ptrace.h
index 7dea180..ed7a199 100644
--- a/tools/testing/selftests/powerpc/ptrace/ptrace.h
+++ b/tools/testing/selftests/powerpc/ptrace/ptrace.h
@@ -52,6 +52,11 @@ struct fpr_regs {
unsigned long fpscr;
};
+struct tm_spr_regs {
+ unsigned long tm_tfhar;
+ unsigned long tm_texasr;
+ unsigned long tm_tfiar;
+};
/* Basic ptrace operations */
int start_trace(pid_t child)
@@ -665,6 +670,36 @@ int write_vsx_ckpt(pid_t child, unsigned long *vsx)
return TEST_PASS;
}
+/* TM SPR */
+int show_tm_spr(pid_t child, struct tm_spr_regs *out)
+{
+ struct tm_spr_regs *regs;
+ struct iovec iov;
+ int ret;
+
+ regs = (struct tm_spr_regs *) malloc(sizeof(struct tm_spr_regs));
+ if (!regs) {
+ perror("malloc() failed");
+ return TEST_FAIL;
+ }
+
+ iov.iov_base = (u64 *) regs;
+ iov.iov_len = sizeof(struct tm_spr_regs);
+
+ ret = ptrace(PTRACE_GETREGSET, child, NT_PPC_TM_SPR, &iov);
+ if (ret) {
+ perror("ptrace(PTRACE_GETREGSET) failed");
+ return TEST_FAIL;
+ }
+
+ if (out)
+ memcpy(out, regs, sizeof(struct tm_spr_regs));
+
+ return TEST_PASS;
+}
+
+
+
/* Analyse TEXASR after TM failure */
inline unsigned long get_tfiar(void)
{
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 14/15] selftests/powerpc: Add .gitignore file for ptrace executables
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (12 preceding siblings ...)
2016-09-30 2:33 ` [PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers wei.guo.simon
@ 2016-09-30 2:33 ` wei.guo.simon
2016-09-30 2:33 ` [PATCH v15 15/15] selftests/powerpc: Fix a build issue wei.guo.simon
14 siblings, 0 replies; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:33 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
---
tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++++++++++
1 file changed, 11 insertions(+)
create mode 100644 tools/testing/selftests/powerpc/ptrace/.gitignore
diff --git a/tools/testing/selftests/powerpc/ptrace/.gitignore b/tools/testing/selftests/powerpc/ptrace/.gitignore
new file mode 100644
index 0000000..bdf3566
--- /dev/null
+++ b/tools/testing/selftests/powerpc/ptrace/.gitignore
@@ -0,0 +1,11 @@
+ptrace-ebb
+ptrace-gpr
+ptrace-tm-gpr
+ptrace-tm-spd-gpr
+ptrace-tar
+ptrace-tm-tar
+ptrace-tm-spd-tar
+ptrace-vsx
+ptrace-tm-vsx
+ptrace-tm-spd-vsx
+ptrace-tm-spr
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v15 15/15] selftests/powerpc: Fix a build issue
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
` (13 preceding siblings ...)
2016-09-30 2:33 ` [PATCH v15 14/15] selftests/powerpc: Add .gitignore file for ptrace executables wei.guo.simon
@ 2016-09-30 2:33 ` wei.guo.simon
14 siblings, 0 replies; 30+ messages in thread
From: wei.guo.simon @ 2016-09-30 2:33 UTC (permalink / raw)
To: linuxppc-dev
Cc: Shuah Khan, Michael Ellerman, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Simon Guo, Jack Miller, Rashmica Gupta, linux-kernel,
linux-kselftest
From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Fixes the following build failure -
cp_abort.c:90:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
for (int i = 0; i < NUM_LOOPS; i++) {
^
cp_abort.c:90:3: note: use option -std=c99, -std=gnu99, -std=c11 or
-std=gnu11 to compile your code
cp_abort.c:97:3: error: ‘for’ loop initial declarations are only
allowed in C99 or C11 mode
for (int i = 0; i < NUM_LOOPS; i++) {
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Reviewed-by: Cyril Bur <cyrilbur@gmail.com>
---
tools/testing/selftests/powerpc/context_switch/cp_abort.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/powerpc/context_switch/cp_abort.c b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
index 5a5b55a..1ce7dce 100644
--- a/tools/testing/selftests/powerpc/context_switch/cp_abort.c
+++ b/tools/testing/selftests/powerpc/context_switch/cp_abort.c
@@ -67,7 +67,7 @@ int test_cp_abort(void)
/* 128 bytes for a full cache line */
char buf[128] __cacheline_aligned;
cpu_set_t cpuset;
- int fd1[2], fd2[2], pid;
+ int fd1[2], fd2[2], pid, i;
char c;
/* only run this test on a P9 or later */
@@ -87,14 +87,14 @@ int test_cp_abort(void)
FAIL_IF(pid < 0);
if (!pid) {
- for (int i = 0; i < NUM_LOOPS; i++) {
+ for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((write(fd1[WRITE_FD], &c, 1)) != 1);
FAIL_IF((read(fd2[READ_FD], &c, 1)) != 1);
/* A paste succeeds if CR0 EQ bit is set */
FAIL_IF(paste(buf) & 0x20000000);
}
} else {
- for (int i = 0; i < NUM_LOOPS; i++) {
+ for (i = 0; i < NUM_LOOPS; i++) {
FAIL_IF((read(fd1[READ_FD], &c, 1)) != 1);
copy(buf);
FAIL_IF((write(fd2[WRITE_FD], &c, 1) != 1));
--
1.8.3.1
^ permalink raw reply related [flat|nested] 30+ messages in thread
* Re: [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB
2016-09-30 2:32 ` [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB wei.guo.simon
@ 2016-10-06 21:44 ` Michael Ellerman
2016-10-12 14:06 ` Simon Guo
2016-11-17 12:03 ` [v15,03/15] " Michael Ellerman
1 sibling, 1 reply; 30+ messages in thread
From: Michael Ellerman @ 2016-10-06 21:44 UTC (permalink / raw)
To: wei.guo.simon, linuxppc-dev
Cc: Shuah Khan, Cyril Bur, Chris Smart, Suraj Jitindar Singh,
Michael Neuling, Anshuman Khandual, Simon Guo, Jack Miller,
Rashmica Gupta, linux-kernel, linux-kselftest
wei.guo.simon@gmail.com writes:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for EBB/PMU specific
> registers. This also adds some generic ptrace interface
> based helper functions to be used by other patches later
> on in the series.
This is consistently failing for me on a P8 Tuleta (pvr 004b 0201):
# ./ptrace-ebb
test: ptrace_ebb_pmu
tags: git_version:v4.8-rc5-176-g89cf1de0ae90
EBBRR: 100059f8
EBBHR: 100053cc; expected: 100053cc
BESCR: 8000000100000000
SIAR: 100012d0
SDAR: 3fff7e4cc000
SIER: 3000000; expected: 2000000
MMCR2: 0; expected: 0
MMCR0: 180000080; expected: 180000080
failure: ptrace_ebb_pmu
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB
2016-10-06 21:44 ` Michael Ellerman
@ 2016-10-12 14:06 ` Simon Guo
0 siblings, 0 replies; 30+ messages in thread
From: Simon Guo @ 2016-10-12 14:06 UTC (permalink / raw)
To: Michael Ellerman
Cc: linuxppc-dev, Shuah Khan, Cyril Bur, Chris Smart,
Suraj Jitindar Singh, Michael Neuling, Anshuman Khandual,
Jack Miller, Rashmica Gupta, linux-kernel, linux-kselftest
On Fri, Oct 07, 2016 at 08:44:48AM +1100, Michael Ellerman wrote:
> wei.guo.simon@gmail.com writes:
>
> > From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> >
> > This patch adds ptrace interface test for EBB/PMU specific
> > registers. This also adds some generic ptrace interface
> > based helper functions to be used by other patches later
> > on in the series.
>
> This is consistently failing for me on a P8 Tuleta (pvr 004b 0201):
>
> # ./ptrace-ebb
> test: ptrace_ebb_pmu
> tags: git_version:v4.8-rc5-176-g89cf1de0ae90
> EBBRR: 100059f8
> EBBHR: 100053cc; expected: 100053cc
> BESCR: 8000000100000000
> SIAR: 100012d0
> SDAR: 3fff7e4cc000
> SIER: 3000000; expected: 2000000
> MMCR2: 0; expected: 0
> MMCR0: 180000080; expected: 180000080
> failure: ptrace_ebb_pmu
>
> cheers
Michael,
Yes.. SIER has different value in baremetal and virtual machine
due to different MSR[HV] value. I will correct it. Originally I only
tested in virtual BE/LE machines.
Currently all tests cases (with fix) passed on one baremetal P8 machine
with LE OS installed. And I will try to find another baremetal with BE
OS installed to test.
Thanks for indicating it.
BR,
Simon
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h'
2016-09-30 2:32 ` [PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h' wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:50 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds SPR number for TAR, PPR, DSCR special
> purpose registers. It also adds TM, VSX, VMX related
> instructions which will then be used by patches later
> in the series.
>
> Now that the new DSCR register definitions (SPRN_DSCR_PRIV and
> SPRN_DSCR) are defined outside this directory, use them instead.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/efe71a67b5aa89e0348ac862ca92a5
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15,03/15] selftests/powerpc: Add ptrace tests for EBB
2016-09-30 2:32 ` [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB wei.guo.simon
2016-10-06 21:44 ` Michael Ellerman
@ 2016-11-17 12:03 ` Michael Ellerman
1 sibling, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:52 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for EBB/PMU specific
> registers. This also adds some generic ptrace interface
> based helper functions to be used by other patches later
> on in the series.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/f666ad413db6f7fbfaeec6b11ed6f8
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM
2016-09-30 2:32 ` [PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:54 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for GPR/FPR registers
> inside TM context. This adds ptrace interface based helper
> functions related to checkpointed GPR/FPR access.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/509fcfe57b09637a80fe0fcacd052e
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM
2016-09-30 2:32 ` [PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:55 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for GPR/FPR registers
> inside suspended TM context.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/c7096dc0ee02ee7fd885c8010aad2c
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers
2016-09-30 2:32 ` [PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:56 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for TAR, PPR, DSCR
> registers. This also adds ptrace interface based helper
> functions related to TAR, PPR, DSCR register access.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/254dae59af6791f02bad50c70a1e5a
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM
2016-09-30 2:32 ` [PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:57 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for TAR, PPR, DSCR
> registers inside TM context. This also adds ptrace
> interface based helper functions related to checkpointed
> TAR, PPR, DSCR register access.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/fcf73a6bd9cb2b09045307e3ae8844
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM
2016-09-30 2:32 ` [PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:58 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for TAR, PPR, DSCR
> registers inside suspended TM context.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/01f7fdc7b90e5afc3fafa19da970ec
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers
2016-09-30 2:32 ` [PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:32:59 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for VSX, VMX registers.
> This also adds ptrace interface based helper functions related
> to VSX, VMX registers access. This also adds some assembly
> helper functions related to VSX and VMX registers.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/0da535c0844b81111f837670e0b9b3
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM
2016-09-30 2:33 ` [PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:33:00 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for VSX, VMX registers
> inside TM context. This also adds ptrace interface based helper
> functions related to chckpointed VSX, VMX registers access.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/11508074c9a74a00df1aa6cfba81d1
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM
2016-09-30 2:33 ` [PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:33:01 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for VSX, VMX registers
> inside suspended TM context.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/a18b55bf51b32136fb9c5190b1cbf8
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15,13/15] selftests/powerpc: Add ptrace tests for TM SPR registers
2016-09-30 2:33 ` [PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers wei.guo.simon
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:33:02 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for TM SPR registers. This
> also adds ptrace interface based helper functions related to TM
> SPR registers access.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/5bdac52f3c67e1262b1979081a362f
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [v15, 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers
@ 2016-11-17 12:03 ` Michael Ellerman
0 siblings, 0 replies; 30+ messages in thread
From: Michael Ellerman @ 2016-11-17 12:03 UTC (permalink / raw)
To: Simon Guo, linuxppc-dev
Cc: Michael Neuling, linux-kselftest, Jack Miller, Simon Guo,
Chris Smart, Rashmica Gupta, Suraj Jitindar Singh, Shuah Khan,
Cyril Bur, linux-kernel, Anshuman Khandual
On Fri, 2016-30-09 at 02:33:02 UTC, Simon Guo wrote:
> From: Anshuman Khandual <khandual@linux.vnet.ibm.com>
>
> This patch adds ptrace interface test for TM SPR registers. This
> also adds ptrace interface based helper functions related to TM
> SPR registers access.
>
> Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
> Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/5bdac52f3c67e1262b1979081a362f
cheers
^ permalink raw reply [flat|nested] 30+ messages in thread
end of thread, other threads:[~2016-11-17 12:07 UTC | newest]
Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-09-30 2:32 [PATCH v15 00/15] selftests/powerpc: Add ptrace tests for ppc registers wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 01/15] selftests/powerpc: Add more SPR numbers, TM & VMX instructions to 'reg.h'/'instructions.h' wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 02/15] selftests/powerpc: move shared utility files into new utility/ dir wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 03/15] selftests/powerpc: Add ptrace tests for EBB wei.guo.simon
2016-10-06 21:44 ` Michael Ellerman
2016-10-12 14:06 ` Simon Guo
2016-11-17 12:03 ` [v15,03/15] " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 04/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers wei.guo.simon
2016-09-30 2:32 ` [PATCH v15 05/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in TM wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 06/15] selftests/powerpc: Add ptrace tests for GPR/FPR registers in suspended TM wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 07/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR registers wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 08/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in TM wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 09/15] selftests/powerpc: Add ptrace tests for TAR, PPR, DSCR in suspended TM wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:32 ` [PATCH v15 10/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 11/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in TM wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 12/15] selftests/powerpc: Add ptrace tests for VSX, VMX registers in suspended TM wei.guo.simon
2016-11-17 12:03 ` [v15, " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 13/15] selftests/powerpc: Add ptrace tests for TM SPR registers wei.guo.simon
2016-11-17 12:03 ` [v15,13/15] " Michael Ellerman
2016-11-17 12:03 ` [v15, 13/15] " Michael Ellerman
2016-09-30 2:33 ` [PATCH v15 14/15] selftests/powerpc: Add .gitignore file for ptrace executables wei.guo.simon
2016-09-30 2:33 ` [PATCH v15 15/15] selftests/powerpc: Fix a build issue wei.guo.simon
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