* [PATCH] dmaengine: xgene-dma: Fix sparse wannings and coccinelle warnings
@ 2015-04-14 7:04 ` Rameshwar Prasad Sahu
0 siblings, 0 replies; 5+ messages in thread
From: Rameshwar Prasad Sahu @ 2015-04-14 7:04 UTC (permalink / raw)
To: vinod.koul, dan.j.williams
Cc: dmaengine, arnd, linux-kernel, devicetree, linux-arm-kernel, jcm,
patches, Rameshwar Prasad Sahu
This patch fixes compilation sparse warnings like incorrect type in assignment
(different base types), cast to restricted __le64, symbol
'__UNIQUE_ID_author__COUNTER__' has multiple initializers etc and
coccinelle warnings (No need to set .owner here. The core will do it.)
This patch is based on slave-dma / for-linus branch.
(commit: 9f2fd0dfa594d857fbdaeda523ff7a46f16567f5 [26/28]
dmaengine: Add support for APM X-Gene SoC DMA engine driver)
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com>
---
drivers/dma/xgene-dma.c | 44 +++++++++++++++++++++-----------------------
1 file changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index aa61935..59f95db 100755
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c
@@ -238,10 +238,10 @@
dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
struct xgene_dma_desc_hw {
- u64 m0;
- u64 m1;
- u64 m2;
- u64 m3;
+ __le64 m0;
+ __le64 m1;
+ __le64 m2;
+ __le64 m3;
};
enum xgene_dma_ring_cfgsize {
@@ -388,12 +388,12 @@ static bool is_pq_enabled(struct xgene_dma *pdma)
return !(val & XGENE_DMA_PQ_DISABLE_MASK);
}
-static void xgene_dma_cpu_to_le64(u64 *desc, int count)
+static void xgene_dma_cpu_to_le64(struct xgene_dma_desc_hw *desc)
{
- int i;
-
- for (i = 0; i < count; i++)
- desc[i] = cpu_to_le64(desc[i]);
+ desc->m0 = cpu_to_le64(((u64 *)desc)[0]);
+ desc->m1 = cpu_to_le64(((u64 *)desc)[1]);
+ desc->m2 = cpu_to_le64(((u64 *)desc)[2]);
+ desc->m3 = cpu_to_le64(((u64 *)desc)[3]);
}
static u16 xgene_dma_encode_len(u32 len)
@@ -499,9 +499,9 @@ static void xgene_dma_prep_cpy_desc(struct xgene_dma_chan *chan,
skip_additional_src:
/* Hardware stores descriptor in little endian format */
- xgene_dma_cpu_to_le64(desc1, 4);
+ xgene_dma_cpu_to_le64(desc1);
if (desc2)
- xgene_dma_cpu_to_le64(desc2, 4);
+ xgene_dma_cpu_to_le64(desc2);
}
static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
@@ -540,8 +540,8 @@ static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
}
/* Hardware stores descriptor in little endian format */
- xgene_dma_cpu_to_le64(desc1, 4);
- xgene_dma_cpu_to_le64(desc2, 4);
+ xgene_dma_cpu_to_le64(desc1);
+ xgene_dma_cpu_to_le64(desc2);
/* Update meta data */
*nbytes = len;
@@ -1895,9 +1895,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_dma = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_dma)) {
+ if (!pdma->csr_dma) {
dev_err(&pdev->dev, "Failed to ioremap csr region");
- return PTR_ERR(pdma->csr_dma);
+ return -ENOMEM;
}
/* Get DMA ring csr region */
@@ -1909,9 +1909,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_ring = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_ring)) {
+ if (!pdma->csr_ring) {
dev_err(&pdev->dev, "Failed to ioremap ring csr region");
- return PTR_ERR(pdma->csr_ring);
+ return -ENOMEM;
}
/* Get DMA ring cmd csr region */
@@ -1923,9 +1923,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_ring_cmd = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_ring_cmd)) {
+ if (!pdma->csr_ring_cmd) {
dev_err(&pdev->dev, "Failed to ioremap ring cmd csr region");
- return PTR_ERR(pdma->csr_ring_cmd);
+ return -ENOMEM;
}
/* Get efuse csr region */
@@ -1937,9 +1937,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_efuse = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_efuse)) {
+ if (!pdma->csr_efuse) {
dev_err(&pdev->dev, "Failed to ioremap efuse csr region");
- return PTR_ERR(pdma->csr_efuse);
+ return -ENOMEM;
}
/* Get DMA error interrupt */
@@ -2076,7 +2076,6 @@ static struct platform_driver xgene_dma_driver = {
.remove = xgene_dma_remove,
.driver = {
.name = "X-Gene-DMA",
- .owner = THIS_MODULE,
.of_match_table = xgene_dma_of_match_ptr,
},
};
@@ -2085,6 +2084,5 @@ module_platform_driver(xgene_dma_driver);
MODULE_DESCRIPTION("APM X-Gene SoC DMA driver");
MODULE_AUTHOR("Rameshwar Prasad Sahu <rsahu@apm.com>");
-MODULE_AUTHOR("Loc Ho <lho@apm.com>");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");
--
1.8.2.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] dmaengine: xgene-dma: Fix sparse wannings and coccinelle warnings
@ 2015-04-14 7:04 ` Rameshwar Prasad Sahu
0 siblings, 0 replies; 5+ messages in thread
From: Rameshwar Prasad Sahu @ 2015-04-14 7:04 UTC (permalink / raw)
To: vinod.koul-ral2JQCrhuEAvxtiuMwx3w, dan.j.williams-ral2JQCrhuEAvxtiuMwx3w
Cc: dmaengine-u79uwXL29TY76Z2rM5mHXA, arnd-r2nGTMty4D4,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
jcm-H+wXaHxf7aLQT0dZR+AlfA, patches-qTEPVZfXA3Y,
Rameshwar Prasad Sahu
This patch fixes compilation sparse warnings like incorrect type in assignment
(different base types), cast to restricted __le64, symbol
'__UNIQUE_ID_author__COUNTER__' has multiple initializers etc and
coccinelle warnings (No need to set .owner here. The core will do it.)
This patch is based on slave-dma / for-linus branch.
(commit: 9f2fd0dfa594d857fbdaeda523ff7a46f16567f5 [26/28]
dmaengine: Add support for APM X-Gene SoC DMA engine driver)
Reported-by: kbuild test robot <fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
Signed-off-by: Rameshwar Prasad Sahu <rsahu-qTEPVZfXA3Y@public.gmane.org>
---
drivers/dma/xgene-dma.c | 44 +++++++++++++++++++++-----------------------
1 file changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index aa61935..59f95db 100755
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c
@@ -238,10 +238,10 @@
dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
struct xgene_dma_desc_hw {
- u64 m0;
- u64 m1;
- u64 m2;
- u64 m3;
+ __le64 m0;
+ __le64 m1;
+ __le64 m2;
+ __le64 m3;
};
enum xgene_dma_ring_cfgsize {
@@ -388,12 +388,12 @@ static bool is_pq_enabled(struct xgene_dma *pdma)
return !(val & XGENE_DMA_PQ_DISABLE_MASK);
}
-static void xgene_dma_cpu_to_le64(u64 *desc, int count)
+static void xgene_dma_cpu_to_le64(struct xgene_dma_desc_hw *desc)
{
- int i;
-
- for (i = 0; i < count; i++)
- desc[i] = cpu_to_le64(desc[i]);
+ desc->m0 = cpu_to_le64(((u64 *)desc)[0]);
+ desc->m1 = cpu_to_le64(((u64 *)desc)[1]);
+ desc->m2 = cpu_to_le64(((u64 *)desc)[2]);
+ desc->m3 = cpu_to_le64(((u64 *)desc)[3]);
}
static u16 xgene_dma_encode_len(u32 len)
@@ -499,9 +499,9 @@ static void xgene_dma_prep_cpy_desc(struct xgene_dma_chan *chan,
skip_additional_src:
/* Hardware stores descriptor in little endian format */
- xgene_dma_cpu_to_le64(desc1, 4);
+ xgene_dma_cpu_to_le64(desc1);
if (desc2)
- xgene_dma_cpu_to_le64(desc2, 4);
+ xgene_dma_cpu_to_le64(desc2);
}
static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
@@ -540,8 +540,8 @@ static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
}
/* Hardware stores descriptor in little endian format */
- xgene_dma_cpu_to_le64(desc1, 4);
- xgene_dma_cpu_to_le64(desc2, 4);
+ xgene_dma_cpu_to_le64(desc1);
+ xgene_dma_cpu_to_le64(desc2);
/* Update meta data */
*nbytes = len;
@@ -1895,9 +1895,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_dma = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_dma)) {
+ if (!pdma->csr_dma) {
dev_err(&pdev->dev, "Failed to ioremap csr region");
- return PTR_ERR(pdma->csr_dma);
+ return -ENOMEM;
}
/* Get DMA ring csr region */
@@ -1909,9 +1909,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_ring = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_ring)) {
+ if (!pdma->csr_ring) {
dev_err(&pdev->dev, "Failed to ioremap ring csr region");
- return PTR_ERR(pdma->csr_ring);
+ return -ENOMEM;
}
/* Get DMA ring cmd csr region */
@@ -1923,9 +1923,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_ring_cmd = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_ring_cmd)) {
+ if (!pdma->csr_ring_cmd) {
dev_err(&pdev->dev, "Failed to ioremap ring cmd csr region");
- return PTR_ERR(pdma->csr_ring_cmd);
+ return -ENOMEM;
}
/* Get efuse csr region */
@@ -1937,9 +1937,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_efuse = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_efuse)) {
+ if (!pdma->csr_efuse) {
dev_err(&pdev->dev, "Failed to ioremap efuse csr region");
- return PTR_ERR(pdma->csr_efuse);
+ return -ENOMEM;
}
/* Get DMA error interrupt */
@@ -2076,7 +2076,6 @@ static struct platform_driver xgene_dma_driver = {
.remove = xgene_dma_remove,
.driver = {
.name = "X-Gene-DMA",
- .owner = THIS_MODULE,
.of_match_table = xgene_dma_of_match_ptr,
},
};
@@ -2085,6 +2084,5 @@ module_platform_driver(xgene_dma_driver);
MODULE_DESCRIPTION("APM X-Gene SoC DMA driver");
MODULE_AUTHOR("Rameshwar Prasad Sahu <rsahu-qTEPVZfXA3Y@public.gmane.org>");
-MODULE_AUTHOR("Loc Ho <lho-qTEPVZfXA3Y@public.gmane.org>");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");
--
1.8.2.1
--
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] dmaengine: xgene-dma: Fix sparse wannings and coccinelle warnings
@ 2015-04-14 7:04 ` Rameshwar Prasad Sahu
0 siblings, 0 replies; 5+ messages in thread
From: Rameshwar Prasad Sahu @ 2015-04-14 7:04 UTC (permalink / raw)
To: linux-arm-kernel
This patch fixes compilation sparse warnings like incorrect type in assignment
(different base types), cast to restricted __le64, symbol
'__UNIQUE_ID_author__COUNTER__' has multiple initializers etc and
coccinelle warnings (No need to set .owner here. The core will do it.)
This patch is based on slave-dma / for-linus branch.
(commit: 9f2fd0dfa594d857fbdaeda523ff7a46f16567f5 [26/28]
dmaengine: Add support for APM X-Gene SoC DMA engine driver)
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Rameshwar Prasad Sahu <rsahu@apm.com>
---
drivers/dma/xgene-dma.c | 44 +++++++++++++++++++++-----------------------
1 file changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index aa61935..59f95db 100755
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c
@@ -238,10 +238,10 @@
dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
struct xgene_dma_desc_hw {
- u64 m0;
- u64 m1;
- u64 m2;
- u64 m3;
+ __le64 m0;
+ __le64 m1;
+ __le64 m2;
+ __le64 m3;
};
enum xgene_dma_ring_cfgsize {
@@ -388,12 +388,12 @@ static bool is_pq_enabled(struct xgene_dma *pdma)
return !(val & XGENE_DMA_PQ_DISABLE_MASK);
}
-static void xgene_dma_cpu_to_le64(u64 *desc, int count)
+static void xgene_dma_cpu_to_le64(struct xgene_dma_desc_hw *desc)
{
- int i;
-
- for (i = 0; i < count; i++)
- desc[i] = cpu_to_le64(desc[i]);
+ desc->m0 = cpu_to_le64(((u64 *)desc)[0]);
+ desc->m1 = cpu_to_le64(((u64 *)desc)[1]);
+ desc->m2 = cpu_to_le64(((u64 *)desc)[2]);
+ desc->m3 = cpu_to_le64(((u64 *)desc)[3]);
}
static u16 xgene_dma_encode_len(u32 len)
@@ -499,9 +499,9 @@ static void xgene_dma_prep_cpy_desc(struct xgene_dma_chan *chan,
skip_additional_src:
/* Hardware stores descriptor in little endian format */
- xgene_dma_cpu_to_le64(desc1, 4);
+ xgene_dma_cpu_to_le64(desc1);
if (desc2)
- xgene_dma_cpu_to_le64(desc2, 4);
+ xgene_dma_cpu_to_le64(desc2);
}
static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
@@ -540,8 +540,8 @@ static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
}
/* Hardware stores descriptor in little endian format */
- xgene_dma_cpu_to_le64(desc1, 4);
- xgene_dma_cpu_to_le64(desc2, 4);
+ xgene_dma_cpu_to_le64(desc1);
+ xgene_dma_cpu_to_le64(desc2);
/* Update meta data */
*nbytes = len;
@@ -1895,9 +1895,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_dma = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_dma)) {
+ if (!pdma->csr_dma) {
dev_err(&pdev->dev, "Failed to ioremap csr region");
- return PTR_ERR(pdma->csr_dma);
+ return -ENOMEM;
}
/* Get DMA ring csr region */
@@ -1909,9 +1909,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_ring = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_ring)) {
+ if (!pdma->csr_ring) {
dev_err(&pdev->dev, "Failed to ioremap ring csr region");
- return PTR_ERR(pdma->csr_ring);
+ return -ENOMEM;
}
/* Get DMA ring cmd csr region */
@@ -1923,9 +1923,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_ring_cmd = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_ring_cmd)) {
+ if (!pdma->csr_ring_cmd) {
dev_err(&pdev->dev, "Failed to ioremap ring cmd csr region");
- return PTR_ERR(pdma->csr_ring_cmd);
+ return -ENOMEM;
}
/* Get efuse csr region */
@@ -1937,9 +1937,9 @@ static int xgene_dma_get_resources(struct platform_device *pdev,
pdma->csr_efuse = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(pdma->csr_efuse)) {
+ if (!pdma->csr_efuse) {
dev_err(&pdev->dev, "Failed to ioremap efuse csr region");
- return PTR_ERR(pdma->csr_efuse);
+ return -ENOMEM;
}
/* Get DMA error interrupt */
@@ -2076,7 +2076,6 @@ static struct platform_driver xgene_dma_driver = {
.remove = xgene_dma_remove,
.driver = {
.name = "X-Gene-DMA",
- .owner = THIS_MODULE,
.of_match_table = xgene_dma_of_match_ptr,
},
};
@@ -2085,6 +2084,5 @@ module_platform_driver(xgene_dma_driver);
MODULE_DESCRIPTION("APM X-Gene SoC DMA driver");
MODULE_AUTHOR("Rameshwar Prasad Sahu <rsahu@apm.com>");
-MODULE_AUTHOR("Loc Ho <lho@apm.com>");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");
--
1.8.2.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] dmaengine: xgene-dma: Fix sparse wannings and coccinelle warnings
2015-04-14 7:04 ` Rameshwar Prasad Sahu
@ 2015-04-14 8:43 ` Arnd Bergmann
-1 siblings, 0 replies; 5+ messages in thread
From: Arnd Bergmann @ 2015-04-14 8:43 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Rameshwar Prasad Sahu, vinod.koul, dan.j.williams, devicetree,
jcm, patches, linux-kernel, dmaengine
On Tuesday 14 April 2015 12:34:00 Rameshwar Prasad Sahu wrote:
> diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
> index aa61935..59f95db 100755
> --- a/drivers/dma/xgene-dma.c
> +++ b/drivers/dma/xgene-dma.c
> @@ -238,10 +238,10 @@
> dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
>
> struct xgene_dma_desc_hw {
> - u64 m0;
> - u64 m1;
> - u64 m2;
> - u64 m3;
> + __le64 m0;
> + __le64 m1;
> + __le64 m2;
> + __le64 m3;
> };
This part looks good.
> enum xgene_dma_ring_cfgsize {
> @@ -388,12 +388,12 @@ static bool is_pq_enabled(struct xgene_dma *pdma)
> return !(val & XGENE_DMA_PQ_DISABLE_MASK);
> }
>
> -static void xgene_dma_cpu_to_le64(u64 *desc, int count)
> +static void xgene_dma_cpu_to_le64(struct xgene_dma_desc_hw *desc)
> {
> - int i;
> -
> - for (i = 0; i < count; i++)
> - desc[i] = cpu_to_le64(desc[i]);
> + desc->m0 = cpu_to_le64(((u64 *)desc)[0]);
> + desc->m1 = cpu_to_le64(((u64 *)desc)[1]);
> + desc->m2 = cpu_to_le64(((u64 *)desc)[2]);
> + desc->m3 = cpu_to_le64(((u64 *)desc)[3]);
> }
This part does not: you are circumventing the checks that are supposed
to help you here, and make things harder to read in the process.
> static u16 xgene_dma_encode_len(u32 len)
> @@ -499,9 +499,9 @@ static void xgene_dma_prep_cpy_desc(struct xgene_dma_chan *chan,
>
> skip_additional_src:
> /* Hardware stores descriptor in little endian format */
> - xgene_dma_cpu_to_le64(desc1, 4);
> + xgene_dma_cpu_to_le64(desc1);
> if (desc2)
> - xgene_dma_cpu_to_le64(desc2, 4);
> + xgene_dma_cpu_to_le64(desc2);
> }
>
> static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
> @@ -540,8 +540,8 @@ static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
> }
>
> /* Hardware stores descriptor in little endian format */
> - xgene_dma_cpu_to_le64(desc1, 4);
> - xgene_dma_cpu_to_le64(desc2, 4);
> + xgene_dma_cpu_to_le64(desc1);
> + xgene_dma_cpu_to_le64(desc2);
>
> /* Update meta data */
> *nbytes = len;
All these calls should just be removed, and the accesses to the descriptor
get changed to be little-endian. You can use the opportunity to remove
a lot of the macros that make the code harder to understand, and open-code
them like this:
diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index aa61935ee706..3e3854559ecc 100755
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c
@@ -446,12 +446,12 @@ static void *xgene_dma_lookup_ext8(u64 *desc, int idx)
return (idx % 2) ? (desc + idx - 1) : (desc + idx + 1);
}
-static void xgene_dma_init_desc(void *desc, u16 dst_ring_num)
+static void xgene_dma_init_desc(struct xgene_dma_desc_hw *desc, u16 dst_ring_num)
{
- XGENE_DMA_DESC_C_SET(desc); /* Coherent IO */
- XGENE_DMA_DESC_IN_SET(desc);
- XGENE_DMA_DESC_H0ENQ_NUM_SET(desc, dst_ring_num);
- XGENE_DMA_DESC_RTYPE_SET(desc, XGENE_DMA_RING_OWNER_DMA);
+ desc->m1 |= cpu_to_le64(XGENE_DMA_DESC_C_BIT);
+ desc->m0 |= cpu_to_le64(XGENE_DMA_DESC_IN_BIT);
+ desc->m3 |= cpu_to_le64(dst_ring_num << XGENE_DMA_DESC_HOENQ_NUM_POS);
+ desc->m0 |= cpu_to_le64(dst_ring_num << XGENE_DMA_RING_OWNER_DMA);
}
which will store the descriptors in the right format with correct endianess,
make use of the sparse checking and let the reader see what's actually
going on.
Arnd
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH] dmaengine: xgene-dma: Fix sparse wannings and coccinelle warnings
@ 2015-04-14 8:43 ` Arnd Bergmann
0 siblings, 0 replies; 5+ messages in thread
From: Arnd Bergmann @ 2015-04-14 8:43 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 14 April 2015 12:34:00 Rameshwar Prasad Sahu wrote:
> diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
> index aa61935..59f95db 100755
> --- a/drivers/dma/xgene-dma.c
> +++ b/drivers/dma/xgene-dma.c
> @@ -238,10 +238,10 @@
> dev_err(chan->dev, "%s: " fmt, chan->name, ##arg)
>
> struct xgene_dma_desc_hw {
> - u64 m0;
> - u64 m1;
> - u64 m2;
> - u64 m3;
> + __le64 m0;
> + __le64 m1;
> + __le64 m2;
> + __le64 m3;
> };
This part looks good.
> enum xgene_dma_ring_cfgsize {
> @@ -388,12 +388,12 @@ static bool is_pq_enabled(struct xgene_dma *pdma)
> return !(val & XGENE_DMA_PQ_DISABLE_MASK);
> }
>
> -static void xgene_dma_cpu_to_le64(u64 *desc, int count)
> +static void xgene_dma_cpu_to_le64(struct xgene_dma_desc_hw *desc)
> {
> - int i;
> -
> - for (i = 0; i < count; i++)
> - desc[i] = cpu_to_le64(desc[i]);
> + desc->m0 = cpu_to_le64(((u64 *)desc)[0]);
> + desc->m1 = cpu_to_le64(((u64 *)desc)[1]);
> + desc->m2 = cpu_to_le64(((u64 *)desc)[2]);
> + desc->m3 = cpu_to_le64(((u64 *)desc)[3]);
> }
This part does not: you are circumventing the checks that are supposed
to help you here, and make things harder to read in the process.
> static u16 xgene_dma_encode_len(u32 len)
> @@ -499,9 +499,9 @@ static void xgene_dma_prep_cpy_desc(struct xgene_dma_chan *chan,
>
> skip_additional_src:
> /* Hardware stores descriptor in little endian format */
> - xgene_dma_cpu_to_le64(desc1, 4);
> + xgene_dma_cpu_to_le64(desc1);
> if (desc2)
> - xgene_dma_cpu_to_le64(desc2, 4);
> + xgene_dma_cpu_to_le64(desc2);
> }
>
> static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
> @@ -540,8 +540,8 @@ static void xgene_dma_prep_xor_desc(struct xgene_dma_chan *chan,
> }
>
> /* Hardware stores descriptor in little endian format */
> - xgene_dma_cpu_to_le64(desc1, 4);
> - xgene_dma_cpu_to_le64(desc2, 4);
> + xgene_dma_cpu_to_le64(desc1);
> + xgene_dma_cpu_to_le64(desc2);
>
> /* Update meta data */
> *nbytes = len;
All these calls should just be removed, and the accesses to the descriptor
get changed to be little-endian. You can use the opportunity to remove
a lot of the macros that make the code harder to understand, and open-code
them like this:
diff --git a/drivers/dma/xgene-dma.c b/drivers/dma/xgene-dma.c
index aa61935ee706..3e3854559ecc 100755
--- a/drivers/dma/xgene-dma.c
+++ b/drivers/dma/xgene-dma.c
@@ -446,12 +446,12 @@ static void *xgene_dma_lookup_ext8(u64 *desc, int idx)
return (idx % 2) ? (desc + idx - 1) : (desc + idx + 1);
}
-static void xgene_dma_init_desc(void *desc, u16 dst_ring_num)
+static void xgene_dma_init_desc(struct xgene_dma_desc_hw *desc, u16 dst_ring_num)
{
- XGENE_DMA_DESC_C_SET(desc); /* Coherent IO */
- XGENE_DMA_DESC_IN_SET(desc);
- XGENE_DMA_DESC_H0ENQ_NUM_SET(desc, dst_ring_num);
- XGENE_DMA_DESC_RTYPE_SET(desc, XGENE_DMA_RING_OWNER_DMA);
+ desc->m1 |= cpu_to_le64(XGENE_DMA_DESC_C_BIT);
+ desc->m0 |= cpu_to_le64(XGENE_DMA_DESC_IN_BIT);
+ desc->m3 |= cpu_to_le64(dst_ring_num << XGENE_DMA_DESC_HOENQ_NUM_POS);
+ desc->m0 |= cpu_to_le64(dst_ring_num << XGENE_DMA_RING_OWNER_DMA);
}
which will store the descriptors in the right format with correct endianess,
make use of the sparse checking and let the reader see what's actually
going on.
Arnd
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-04-14 8:43 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-04-14 7:04 [PATCH] dmaengine: xgene-dma: Fix sparse wannings and coccinelle warnings Rameshwar Prasad Sahu
2015-04-14 7:04 ` Rameshwar Prasad Sahu
2015-04-14 7:04 ` Rameshwar Prasad Sahu
2015-04-14 8:43 ` Arnd Bergmann
2015-04-14 8:43 ` Arnd Bergmann
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