* [PATCH] drm/amdgpu: update vcn1.0 Non-DPG suspend sequence
@ 2021-05-04 15:10 Sathishkumar S
2021-05-05 19:59 ` Leo Liu
0 siblings, 1 reply; 2+ messages in thread
From: Sathishkumar S @ 2021-05-04 15:10 UTC (permalink / raw)
To: amd-gfx; +Cc: Alexander Deucher, Sathishkumar S, Leo Liu
update suspend register settings in Non-DPG mode.
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 51a773a37a35..0c1beefa3e49 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -1119,10 +1119,10 @@ static int vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev)
UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK;
SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp);
- /* put VCPU into reset */
- WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
- UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
- ~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
+ /* stall UMC channel */
+ WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_CTRL2),
+ UVD_LMI_CTRL2__STALL_ARB_UMC_MASK,
+ ~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
tmp = UVD_LMI_STATUS__UMC_READ_CLEAN_RAW_MASK |
UVD_LMI_STATUS__UMC_WRITE_CLEAN_RAW_MASK;
@@ -1141,6 +1141,11 @@ static int vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev)
UVD_SOFT_RESET__LMI_SOFT_RESET_MASK,
~UVD_SOFT_RESET__LMI_SOFT_RESET_MASK);
+ /* put VCPU into reset */
+ WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
+ UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
+ ~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
+
WREG32_SOC15(UVD, 0, mmUVD_STATUS, 0);
vcn_v1_0_enable_clock_gating(adev);
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm/amdgpu: update vcn1.0 Non-DPG suspend sequence
2021-05-04 15:10 [PATCH] drm/amdgpu: update vcn1.0 Non-DPG suspend sequence Sathishkumar S
@ 2021-05-05 19:59 ` Leo Liu
0 siblings, 0 replies; 2+ messages in thread
From: Leo Liu @ 2021-05-05 19:59 UTC (permalink / raw)
To: Sathishkumar S, amd-gfx; +Cc: Alexander Deucher
Reviewed-by: Leo Liu <leo.liu@amd.com>
On 2021-05-04 11:10 a.m., Sathishkumar S wrote:
> update suspend register settings in Non-DPG mode.
>
> Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 13 +++++++++----
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index 51a773a37a35..0c1beefa3e49 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -1119,10 +1119,10 @@ static int vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev)
> UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK;
> SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp);
>
> - /* put VCPU into reset */
> - WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
> - UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
> - ~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
> + /* stall UMC channel */
> + WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_CTRL2),
> + UVD_LMI_CTRL2__STALL_ARB_UMC_MASK,
> + ~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
>
> tmp = UVD_LMI_STATUS__UMC_READ_CLEAN_RAW_MASK |
> UVD_LMI_STATUS__UMC_WRITE_CLEAN_RAW_MASK;
> @@ -1141,6 +1141,11 @@ static int vcn_v1_0_stop_spg_mode(struct amdgpu_device *adev)
> UVD_SOFT_RESET__LMI_SOFT_RESET_MASK,
> ~UVD_SOFT_RESET__LMI_SOFT_RESET_MASK);
>
> + /* put VCPU into reset */
> + WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_SOFT_RESET),
> + UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK,
> + ~UVD_SOFT_RESET__VCPU_SOFT_RESET_MASK);
> +
> WREG32_SOC15(UVD, 0, mmUVD_STATUS, 0);
>
> vcn_v1_0_enable_clock_gating(adev);
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2021-05-05 19:59 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-04 15:10 [PATCH] drm/amdgpu: update vcn1.0 Non-DPG suspend sequence Sathishkumar S
2021-05-05 19:59 ` Leo Liu
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.