* [PATCH v2] mailbox: tegra-hsp: Flush whole channel
@ 2022-03-02 15:04 Thierry Reding
2022-03-10 16:51 ` Jon Hunter
0 siblings, 1 reply; 5+ messages in thread
From: Thierry Reding @ 2022-03-02 15:04 UTC (permalink / raw)
To: Jassi Brar; +Cc: Jon Hunter, linux-tegra, linux-kernel
From: Pekka Pessi <ppessi@nvidia.com>
The txdone can re-fill the mailbox. Keep polling the mailbox during the
flush until all the messages have been delivered.
This fixes an issue with the Tegra Combined UART (TCU) where output can
get truncated under high traffic load.
Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: 91b1b1c3da8a ("mailbox: tegra-hsp: Add support for shared mailboxes")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- add Fixes: line
- Cc stable
drivers/mailbox/tegra-hsp.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index acd0675da681..78f7265039c6 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -412,6 +412,11 @@ static int tegra_hsp_mailbox_flush(struct mbox_chan *chan,
value = tegra_hsp_channel_readl(ch, HSP_SM_SHRD_MBOX);
if ((value & HSP_SM_SHRD_MBOX_FULL) == 0) {
mbox_chan_txdone(chan, 0);
+
+ /* Wait until channel is empty */
+ if (chan->active_req != NULL)
+ continue;
+
return 0;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v2] mailbox: tegra-hsp: Flush whole channel
2022-03-02 15:04 [PATCH v2] mailbox: tegra-hsp: Flush whole channel Thierry Reding
@ 2022-03-10 16:51 ` Jon Hunter
2022-03-10 17:37 ` Jon Hunter
0 siblings, 1 reply; 5+ messages in thread
From: Jon Hunter @ 2022-03-10 16:51 UTC (permalink / raw)
To: Thierry Reding, Jassi Brar; +Cc: linux-tegra, linux-kernel
Hi Jassi,
On 02/03/2022 15:04, Thierry Reding wrote:
> From: Pekka Pessi <ppessi@nvidia.com>
>
> The txdone can re-fill the mailbox. Keep polling the mailbox during the
> flush until all the messages have been delivered.
>
> This fixes an issue with the Tegra Combined UART (TCU) where output can
> get truncated under high traffic load.
>
> Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
> Tested-by: Jon Hunter <jonathanh@nvidia.com>
> Fixes: 91b1b1c3da8a ("mailbox: tegra-hsp: Add support for shared mailboxes")
> Cc: stable@vger.kernel.org
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> Changes in v2:
> - add Fixes: line
> - Cc stable
>
> drivers/mailbox/tegra-hsp.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
> index acd0675da681..78f7265039c6 100644
> --- a/drivers/mailbox/tegra-hsp.c
> +++ b/drivers/mailbox/tegra-hsp.c
> @@ -412,6 +412,11 @@ static int tegra_hsp_mailbox_flush(struct mbox_chan *chan,
> value = tegra_hsp_channel_readl(ch, HSP_SM_SHRD_MBOX);
> if ((value & HSP_SM_SHRD_MBOX_FULL) == 0) {
> mbox_chan_txdone(chan, 0);
> +
> + /* Wait until channel is empty */
> + if (chan->active_req != NULL)
> + continue;
> +
> return 0;
> }
>
Any feedback on this? Can we queue this up for v5.18?
Thanks
Jon
--
nvpublic
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2] mailbox: tegra-hsp: Flush whole channel
2022-03-10 16:51 ` Jon Hunter
@ 2022-03-10 17:37 ` Jon Hunter
2022-03-22 18:29 ` Jon Hunter
0 siblings, 1 reply; 5+ messages in thread
From: Jon Hunter @ 2022-03-10 17:37 UTC (permalink / raw)
To: Thierry Reding, Jassi Brar; +Cc: linux-tegra, linux-kernel
On 10/03/2022 16:51, Jon Hunter wrote:
> Hi Jassi,
>
> On 02/03/2022 15:04, Thierry Reding wrote:
>> From: Pekka Pessi <ppessi@nvidia.com>
>>
>> The txdone can re-fill the mailbox. Keep polling the mailbox during the
>> flush until all the messages have been delivered.
>>
>> This fixes an issue with the Tegra Combined UART (TCU) where output can
>> get truncated under high traffic load.
>>
>> Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
>> Tested-by: Jon Hunter <jonathanh@nvidia.com>
>> Fixes: 91b1b1c3da8a ("mailbox: tegra-hsp: Add support for shared
>> mailboxes")
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Thierry Reding <treding@nvidia.com>
>> ---
>> Changes in v2:
>> - add Fixes: line
>> - Cc stable
>>
>> drivers/mailbox/tegra-hsp.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
>> index acd0675da681..78f7265039c6 100644
>> --- a/drivers/mailbox/tegra-hsp.c
>> +++ b/drivers/mailbox/tegra-hsp.c
>> @@ -412,6 +412,11 @@ static int tegra_hsp_mailbox_flush(struct
>> mbox_chan *chan,
>> value = tegra_hsp_channel_readl(ch, HSP_SM_SHRD_MBOX);
>> if ((value & HSP_SM_SHRD_MBOX_FULL) == 0) {
>> mbox_chan_txdone(chan, 0);
>> +
>> + /* Wait until channel is empty */
>> + if (chan->active_req != NULL)
>> + continue;
>> +
>> return 0;
>> }
>
>
> Any feedback on this? Can we queue this up for v5.18?
Feel free to add my ...
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Jon
--
nvpublic
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2] mailbox: tegra-hsp: Flush whole channel
2022-03-10 17:37 ` Jon Hunter
@ 2022-03-22 18:29 ` Jon Hunter
2022-03-22 18:50 ` Jassi Brar
0 siblings, 1 reply; 5+ messages in thread
From: Jon Hunter @ 2022-03-22 18:29 UTC (permalink / raw)
To: Thierry Reding, Jassi Brar; +Cc: linux-tegra, linux-kernel
Jassi,
On 10/03/2022 17:37, Jon Hunter wrote:
>
>
> On 10/03/2022 16:51, Jon Hunter wrote:
>> Hi Jassi,
>>
>> On 02/03/2022 15:04, Thierry Reding wrote:
>>> From: Pekka Pessi <ppessi@nvidia.com>
>>>
>>> The txdone can re-fill the mailbox. Keep polling the mailbox during the
>>> flush until all the messages have been delivered.
>>>
>>> This fixes an issue with the Tegra Combined UART (TCU) where output can
>>> get truncated under high traffic load.
>>>
>>> Signed-off-by: Pekka Pessi <ppessi@nvidia.com>
>>> Tested-by: Jon Hunter <jonathanh@nvidia.com>
>>> Fixes: 91b1b1c3da8a ("mailbox: tegra-hsp: Add support for shared
>>> mailboxes")
>>> Cc: stable@vger.kernel.org
>>> Signed-off-by: Thierry Reding <treding@nvidia.com>
>>> ---
>>> Changes in v2:
>>> - add Fixes: line
>>> - Cc stable
>>>
>>> drivers/mailbox/tegra-hsp.c | 5 +++++
>>> 1 file changed, 5 insertions(+)
>>>
>>> diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
>>> index acd0675da681..78f7265039c6 100644
>>> --- a/drivers/mailbox/tegra-hsp.c
>>> +++ b/drivers/mailbox/tegra-hsp.c
>>> @@ -412,6 +412,11 @@ static int tegra_hsp_mailbox_flush(struct
>>> mbox_chan *chan,
>>> value = tegra_hsp_channel_readl(ch, HSP_SM_SHRD_MBOX);
>>> if ((value & HSP_SM_SHRD_MBOX_FULL) == 0) {
>>> mbox_chan_txdone(chan, 0);
>>> +
>>> + /* Wait until channel is empty */
>>> + if (chan->active_req != NULL)
>>> + continue;
>>> +
>>> return 0;
>>> }
>>
>>
>> Any feedback on this? Can we queue this up for v5.18?
>
> Feel free to add my ...
>
> Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Any feedback?
Jon
--
nvpublic
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-03-22 18:51 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-02 15:04 [PATCH v2] mailbox: tegra-hsp: Flush whole channel Thierry Reding
2022-03-10 16:51 ` Jon Hunter
2022-03-10 17:37 ` Jon Hunter
2022-03-22 18:29 ` Jon Hunter
2022-03-22 18:50 ` Jassi Brar
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