* [PATCH 0/2] mtd: spi-nor: add new definitions to chip table
@ 2017-04-19 14:00 Cédric Le Goater
2017-04-19 14:00 ` [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash Cédric Le Goater
2017-04-19 14:00 ` [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices Cédric Le Goater
0 siblings, 2 replies; 8+ messages in thread
From: Cédric Le Goater @ 2017-04-19 14:00 UTC (permalink / raw)
To: linux-mtd
Cc: Cyrille Pitchen, Marek Vasut, Boris Brezillon, David Woodhouse,
Brian Norris, Richard Weinberger, Cédric Le Goater
Hello,
Here are a couple of patches adding new definitions to the spi-nor
chip table.
Thanks,
C.
Cédric Le Goater (2):
mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash
mtd: spi-nor: add Dual and Quad read mode support to some flash
devices
drivers/mtd/spi-nor/spi-nor.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 8+ messages in thread* [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash 2017-04-19 14:00 [PATCH 0/2] mtd: spi-nor: add new definitions to chip table Cédric Le Goater @ 2017-04-19 14:00 ` Cédric Le Goater 2017-04-19 14:04 ` Marek Vasut 2017-04-19 14:00 ` [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices Cédric Le Goater 1 sibling, 1 reply; 8+ messages in thread From: Cédric Le Goater @ 2017-04-19 14:00 UTC (permalink / raw) To: linux-mtd Cc: Cyrille Pitchen, Marek Vasut, Boris Brezillon, David Woodhouse, Brian Norris, Richard Weinberger, Cédric Le Goater These modules are used on the OpenPOWER Witherspoon systems to hold the POWER9 host firmware image. The SPI_NOR_DUAL_READ flags is added for the Aspeed SoCs which do not support QUAD reads. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- The line is over 80 characters but it looks better. drivers/mtd/spi-nor/spi-nor.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 747645c74134..ee777df4466c 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1020,6 +1020,7 @@ static const struct flash_info spi_nor_ids[] = { { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) }, { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, + { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, /* Micron */ -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash 2017-04-19 14:00 ` [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash Cédric Le Goater @ 2017-04-19 14:04 ` Marek Vasut 2017-06-20 22:04 ` Cyrille Pitchen 0 siblings, 1 reply; 8+ messages in thread From: Marek Vasut @ 2017-04-19 14:04 UTC (permalink / raw) To: Cédric Le Goater, linux-mtd Cc: Cyrille Pitchen, Boris Brezillon, David Woodhouse, Brian Norris, Richard Weinberger On 04/19/2017 04:00 PM, Cédric Le Goater wrote: > These modules are used on the OpenPOWER Witherspoon systems to hold > the POWER9 host firmware image. The SPI_NOR_DUAL_READ flags is added > for the Aspeed SoCs which do not support QUAD reads. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> > --- > > The line is over 80 characters but it looks better. > > drivers/mtd/spi-nor/spi-nor.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index 747645c74134..ee777df4466c 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -1020,6 +1020,7 @@ static const struct flash_info spi_nor_ids[] = { > { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) }, > { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, > { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, > + { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, > > /* Micron */ > -- Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash 2017-04-19 14:04 ` Marek Vasut @ 2017-06-20 22:04 ` Cyrille Pitchen 0 siblings, 0 replies; 8+ messages in thread From: Cyrille Pitchen @ 2017-06-20 22:04 UTC (permalink / raw) To: Marek Vasut, Cédric Le Goater, linux-mtd Cc: Boris Brezillon, Cyrille Pitchen, Brian Norris, David Woodhouse, Richard Weinberger Le 19/04/2017 à 16:04, Marek Vasut a écrit : > On 04/19/2017 04:00 PM, Cédric Le Goater wrote: >> These modules are used on the OpenPOWER Witherspoon systems to hold >> the POWER9 host firmware image. The SPI_NOR_DUAL_READ flags is added >> for the Aspeed SoCs which do not support QUAD reads. >> >> Signed-off-by: Cédric Le Goater <clg@kaod.org> > > Reviewed-by: Marek Vasut <marek.vasut@gmail.com> > Applied to the spi-nor/next branch of l2-mtd Thanks! >> --- >> >> The line is over 80 characters but it looks better. >> >> drivers/mtd/spi-nor/spi-nor.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >> index 747645c74134..ee777df4466c 100644 >> --- a/drivers/mtd/spi-nor/spi-nor.c >> +++ b/drivers/mtd/spi-nor/spi-nor.c >> @@ -1020,6 +1020,7 @@ static const struct flash_info spi_nor_ids[] = { >> { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) }, >> { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, >> { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, >> + { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, >> >> /* Micron */ >> > > ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices 2017-04-19 14:00 [PATCH 0/2] mtd: spi-nor: add new definitions to chip table Cédric Le Goater 2017-04-19 14:00 ` [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash Cédric Le Goater @ 2017-04-19 14:00 ` Cédric Le Goater 2017-04-19 14:05 ` Marek Vasut 1 sibling, 1 reply; 8+ messages in thread From: Cédric Le Goater @ 2017-04-19 14:00 UTC (permalink / raw) To: linux-mtd Cc: Cyrille Pitchen, Marek Vasut, Boris Brezillon, David Woodhouse, Brian Norris, Richard Weinberger, Cédric Le Goater These devices are used on OpenPOWER systems. The SPI_NOR_DUAL_READ flags is added for the Aspeed SoCs which do not support QUAD reads. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- The lines are over 80 characters but it looks better. drivers/mtd/spi-nor/spi-nor.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index ee777df4466c..f029fb7a3edc 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -1016,10 +1016,10 @@ static const struct flash_info spi_nor_ids[] = { { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, - { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, + { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) }, { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, - { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, @@ -1031,7 +1031,7 @@ static const struct flash_info spi_nor_ids[] = { { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, - { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) }, + { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, @@ -1150,7 +1150,7 @@ static const struct flash_info spi_nor_ids[] = { { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) }, + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, /* Catalyst / On Semiconductor -- non-JEDEC */ { "cat25c11", CAT25_INFO( 16, 8, 16, 1, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices 2017-04-19 14:00 ` [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices Cédric Le Goater @ 2017-04-19 14:05 ` Marek Vasut 2017-04-19 14:12 ` Cédric Le Goater 2017-06-20 22:20 ` Cyrille Pitchen 0 siblings, 2 replies; 8+ messages in thread From: Marek Vasut @ 2017-04-19 14:05 UTC (permalink / raw) To: Cédric Le Goater, linux-mtd Cc: Cyrille Pitchen, Boris Brezillon, David Woodhouse, Brian Norris, Richard Weinberger On 04/19/2017 04:00 PM, Cédric Le Goater wrote: > These devices are used on OpenPOWER systems. The SPI_NOR_DUAL_READ > flags is added for the Aspeed SoCs which do not support QUAD reads. It's added more like because the chip supports it ;-) Reviewed-by: Marek Vasut <marek.vasut@gmail.com> > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- > > The lines are over 80 characters but it looks better. > > drivers/mtd/spi-nor/spi-nor.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index ee777df4466c..f029fb7a3edc 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -1016,10 +1016,10 @@ static const struct flash_info spi_nor_ids[] = { > { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, > { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, > { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, > - { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, > + { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) }, > { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, > - { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, > + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, > > @@ -1031,7 +1031,7 @@ static const struct flash_info spi_nor_ids[] = { > { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) }, > { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, > { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, > - { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) }, > + { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, > { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, > { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, > @@ -1150,7 +1150,7 @@ static const struct flash_info spi_nor_ids[] = { > { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, > { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, > { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, > - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) }, > + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > > /* Catalyst / On Semiconductor -- non-JEDEC */ > { "cat25c11", CAT25_INFO( 16, 8, 16, 1, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, > -- Best regards, Marek Vasut ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices 2017-04-19 14:05 ` Marek Vasut @ 2017-04-19 14:12 ` Cédric Le Goater 2017-06-20 22:20 ` Cyrille Pitchen 1 sibling, 0 replies; 8+ messages in thread From: Cédric Le Goater @ 2017-04-19 14:12 UTC (permalink / raw) To: Marek Vasut, linux-mtd Cc: Cyrille Pitchen, Boris Brezillon, David Woodhouse, Brian Norris, Richard Weinberger On 04/19/2017 04:05 PM, Marek Vasut wrote: > On 04/19/2017 04:00 PM, Cédric Le Goater wrote: >> These devices are used on OpenPOWER systems. The SPI_NOR_DUAL_READ >> flags is added for the Aspeed SoCs which do not support QUAD reads. > > It's added more like because the chip supports it ;-) yeah, we don't care about the controller here. You can drop that sentence if you want as it is confusing. Thanks, C. > Reviewed-by: Marek Vasut <marek.vasut@gmail.com> > >> Signed-off-by: Cédric Le Goater <clg@kaod.org> >> --- >> >> The lines are over 80 characters but it looks better. >> >> drivers/mtd/spi-nor/spi-nor.c | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >> index ee777df4466c..f029fb7a3edc 100644 >> --- a/drivers/mtd/spi-nor/spi-nor.c >> +++ b/drivers/mtd/spi-nor/spi-nor.c >> @@ -1016,10 +1016,10 @@ static const struct flash_info spi_nor_ids[] = { >> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >> - { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, >> + { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) }, >> { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, >> - { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, >> + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, >> >> @@ -1031,7 +1031,7 @@ static const struct flash_info spi_nor_ids[] = { >> { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) }, >> { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, >> { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, >> - { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) }, >> + { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, >> { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, >> { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, >> @@ -1150,7 +1150,7 @@ static const struct flash_info spi_nor_ids[] = { >> { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, >> { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, >> { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, >> - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) }, >> + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> >> /* Catalyst / On Semiconductor -- non-JEDEC */ >> { "cat25c11", CAT25_INFO( 16, 8, 16, 1, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, >> > > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices 2017-04-19 14:05 ` Marek Vasut 2017-04-19 14:12 ` Cédric Le Goater @ 2017-06-20 22:20 ` Cyrille Pitchen 1 sibling, 0 replies; 8+ messages in thread From: Cyrille Pitchen @ 2017-06-20 22:20 UTC (permalink / raw) To: Marek Vasut, Cédric Le Goater, linux-mtd Cc: Boris Brezillon, Cyrille Pitchen, Brian Norris, David Woodhouse, Richard Weinberger Le 19/04/2017 à 16:05, Marek Vasut a écrit : > On 04/19/2017 04:00 PM, Cédric Le Goater wrote: >> These devices are used on OpenPOWER systems. The SPI_NOR_DUAL_READ >> flags is added for the Aspeed SoCs which do not support QUAD reads. > > It's added more like because the chip supports it ;-) > > Reviewed-by: Marek Vasut <marek.vasut@gmail.com> > Applied to the spi-nor/next branch of l2-mtd Thanks! >> Signed-off-by: Cédric Le Goater <clg@kaod.org> >> --- >> >> The lines are over 80 characters but it looks better. >> >> drivers/mtd/spi-nor/spi-nor.c | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c >> index ee777df4466c..f029fb7a3edc 100644 >> --- a/drivers/mtd/spi-nor/spi-nor.c >> +++ b/drivers/mtd/spi-nor/spi-nor.c >> @@ -1016,10 +1016,10 @@ static const struct flash_info spi_nor_ids[] = { >> { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, >> { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, >> { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, >> - { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, >> + { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) }, >> { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, >> - { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, >> + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "mx66l1g45g", INFO(0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, >> >> @@ -1031,7 +1031,7 @@ static const struct flash_info spi_nor_ids[] = { >> { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) }, >> { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, >> { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, >> - { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) }, >> + { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, >> { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, >> { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, >> @@ -1150,7 +1150,7 @@ static const struct flash_info spi_nor_ids[] = { >> { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) }, >> { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) }, >> { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) }, >> - { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) }, >> + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, >> >> /* Catalyst / On Semiconductor -- non-JEDEC */ >> { "cat25c11", CAT25_INFO( 16, 8, 16, 1, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, >> > > ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-06-20 22:21 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-04-19 14:00 [PATCH 0/2] mtd: spi-nor: add new definitions to chip table Cédric Le Goater 2017-04-19 14:00 ` [PATCH 1/2] mtd: spi-nor: Add support for Macronix mx66l1g45g spi flash Cédric Le Goater 2017-04-19 14:04 ` Marek Vasut 2017-06-20 22:04 ` Cyrille Pitchen 2017-04-19 14:00 ` [PATCH 2/2] mtd: spi-nor: add Dual and Quad read mode support to some flash devices Cédric Le Goater 2017-04-19 14:05 ` Marek Vasut 2017-04-19 14:12 ` Cédric Le Goater 2017-06-20 22:20 ` Cyrille Pitchen
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