From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 2/2] arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode
Date: Sat, 29 Oct 2016 19:49:33 +0200 [thread overview]
Message-ID: <440529e1-f311-3603-b7d0-df8a44e33541@denx.de> (raw)
In-Reply-To: <20161029174743.GP18591@bill-the-cat>
On 10/29/2016 07:47 PM, Tom Rini wrote:
> On Sat, Oct 29, 2016 at 07:44:34PM +0200, Marek Vasut wrote:
>> On 10/29/2016 07:41 PM, Tom Rini wrote:
>>> On Sat, Oct 29, 2016 at 03:19:10PM +0530, Keerthy wrote:
>>>
>>>> While we setup the mmu initially we mark set_section_dcache with
>>>> DCACHE_OFF flag. In case of non-LPAE mode the DCACHE_OFF macro
>>>> is rightly defined with TTB_SECT_XN_MASK set so as to mark all the
>>>> 4GB XN. In case of LPAE mode XN(Execute-never) bit is not set with
>>>> DCACHE_OFF. Hence XN bit is not set by default for DCACHE_OFF which
>>>> keeps all the regions execute okay and this leads to random speculative
>>>> fetches in random memory regions which was eventually caught by kernel
>>>> omap-l3-noc driver.
>>>>
>>>> Fix this to mark the regions as XN by default.
>>>>
>>>> Signed-off-by: Keerthy <j-keerthy@ti.com>
>>>> Reviewed-by: Alexander Graf <agraf@suse.de>
>>>
>>> Reviewed-by: Tom Rini <trini@konsulko.com>
>>>
>> Isn't this patch exactly undoing the following one ?
>>
>> commit 8890c2fbe6ed4c5ca9a61f21e846a55f8f2c38fc
>> Author: Marek Vasut <>
>> Date: Tue Dec 29 19:44:02 2015 +0100
>>
>> arm: Remove S bit from MMU section entry
>>
>> Restore the old behavior of the MMU section entries configuration,
>> which is without the S-bit.
>
> Is it? I guess perhaps you and Keerthy need to chat then as there's
> some other problem they're addressing.
Ummmm, wait a second, I think this one adds XN bit and the previous one
removed S bit. I think I was wrong, but please double-check this. I
recall we had some odd cache issues on V7 back then.
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2016-10-29 17:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-29 9:49 [U-Boot] [PATCH v2 1/2] arm: print the cache config option in hex instead of decimal Keerthy
2016-10-29 9:49 ` [U-Boot] [PATCH v2 2/2] arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode Keerthy
2016-10-29 17:41 ` Tom Rini
2016-10-29 17:44 ` Marek Vasut
2016-10-29 17:47 ` Tom Rini
2016-10-29 17:49 ` Marek Vasut [this message]
2016-10-30 1:59 ` Keerthy
2016-10-30 12:00 ` Marek Vasut
2016-11-07 4:07 ` Keerthy
2016-11-13 20:56 ` [U-Boot] [U-Boot, v2, " Tom Rini
2016-10-29 17:41 ` [U-Boot] [PATCH v2 1/2] arm: print the cache config option in hex instead of decimal Tom Rini
2016-11-13 20:56 ` [U-Boot] [U-Boot, v2, " Tom Rini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=440529e1-f311-3603-b7d0-df8a44e33541@denx.de \
--to=marex@denx.de \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.