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From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Christophe Leroy <christophe.leroy@c-s.fr>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	joakim.tjernlund@infinera.com
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [10/10] powerpc/book3s32: Reorder _PAGE_XXX flags to simplify TLB handling
Date: Fri, 22 Feb 2019 20:47:43 +1100 (AEDT)	[thread overview]
Message-ID: <445RN035Q4z9sBp@ozlabs.org> (raw)
In-Reply-To: <a96a221fb2ce681076b86c27d28ba4ec6b9bbb8d.1548419273.git.christophe.leroy@c-s.fr>

On Fri, 2019-01-25 at 12:34:20 UTC, Christophe Leroy wrote:
> For pages without _PAGE_USER, PP field is 00
> For pages with _PAGE_USER, PP field is 10 for RW and 11 for RO.
> 
> This patch sets _PAGE_USER to 0x002 and _PAGE_RW to 0x001
> is order to simplify TLB handling by reducing amount of shifts.
> 
> The location of _PAGE_PRESENT and _PAGE_HASHPTE doesn't matter
> as they are only SW related flags.
> 
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/78ca1108b10927b3d068c8da91352b0f

cheers

      reply	other threads:[~2019-02-22  9:48 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-25 12:34 [PATCH 00/10] Optimise TLB miss handlers on 603/e300 Christophe Leroy
2019-01-25 12:34 ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 01/10] powerpc: simplify BDI switch Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 02/10] powerpc/603: Store PGDIR physical address in a SPRG Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-02-20 17:39   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 03/10] powerpc/603: use physical address directly in TLB miss handlers Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 04/10] powerpc/hash32: use physical address directly in hash handlers Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 05/10] powerpc/603: Don't handle kernel page TLB misses when not need Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 06/10] powerpc/603: Don't handle _PAGE_RW and _PAGE_DIRTY on ITLB misses Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 07/10] powerpc/603: let's handle PAGE_DIRTY directly Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 08/10] powerpc/603: Don't worry about _PAGE_USER in TLB miss handlers Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 09/10] powerpc/603: don't handle PAGE_ACCESSED " Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-01-25 12:34 ` [PATCH 10/10] powerpc/book3s32: Reorder _PAGE_XXX flags to simplify TLB handling Christophe Leroy
2019-01-25 12:34   ` Christophe Leroy
2019-02-22  9:47   ` Michael Ellerman [this message]

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