* [Qemu-devel] sparc branch to pc+4 issue
@ 2018-02-13 20:57 Steven Seeger
2018-02-14 18:02 ` Mark Cave-Ayland
0 siblings, 1 reply; 2+ messages in thread
From: Steven Seeger @ 2018-02-13 20:57 UTC (permalink / raw)
To: QEMU Developers
Consider pc==0x100:
0x100 b 0x104
The uncondtional not-annulled branch will go to 0x104, which is the next
instruction anyway. do_branch() will leave dc->pc and dc->npc both set to
0x104. This causes gdb to have a problem when single stepping. It will be
stuck. QEMU will execute past this somehow, but I'm not sure with what side
effect. It seems to me the following patch will fix this:
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 71e0853e43..95ca90b51a 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -1464,6 +1464,7 @@ static void do_branch(DisasContext *dc, int32_t offset,
uint32_t insn, int cc)
dc->npc = dc->pc + 4;
} else {
dc->pc = dc->npc;
+ if(target==dc->pc) target += 4;
dc->npc = target;
tcg_gen_mov_tl(cpu_pc, cpu_npc);
}
I apologize if I am missing something with this assessment.
Steven
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] sparc branch to pc+4 issue
2018-02-13 20:57 [Qemu-devel] sparc branch to pc+4 issue Steven Seeger
@ 2018-02-14 18:02 ` Mark Cave-Ayland
0 siblings, 0 replies; 2+ messages in thread
From: Mark Cave-Ayland @ 2018-02-14 18:02 UTC (permalink / raw)
To: steven.seeger, QEMU Developers
On 13/02/18 20:57, Steven Seeger wrote:
> Consider pc==0x100:
>
> 0x100 b 0x104
>
> The uncondtional not-annulled branch will go to 0x104, which is the next
> instruction anyway. do_branch() will leave dc->pc and dc->npc both set to
> 0x104. This causes gdb to have a problem when single stepping. It will be
> stuck. QEMU will execute past this somehow, but I'm not sure with what side
> effect. It seems to me the following patch will fix this:
>
> diff --git a/target/sparc/translate.c b/target/sparc/translate.c
> index 71e0853e43..95ca90b51a 100644
> --- a/target/sparc/translate.c
> +++ b/target/sparc/translate.c
> @@ -1464,6 +1464,7 @@ static void do_branch(DisasContext *dc, int32_t offset,
> uint32_t insn, int cc)
> dc->npc = dc->pc + 4;
> } else {
> dc->pc = dc->npc;
> + if(target==dc->pc) target += 4;
> dc->npc = target;
> tcg_gen_mov_tl(cpu_pc, cpu_npc);
> }
>
> I apologize if I am missing something with this assessment.
Hi Steven,
Thanks for the patch! In principle the patch looks good, although sadly
I don't currently have access to real hardware to verify this. Also
you'll need to add a Signed-off-by tag in order for your patch to be
applied (see https://wiki.qemu.org/Contribute/SubmitAPatch for more
details).
ATB,
Mark.
^ permalink raw reply [flat|nested] 2+ messages in thread
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