* [PATCH v3 0/2] xen/arm: refine vpl011
@ 2022-11-29 2:39 Jiamei Xie
2022-11-29 2:39 ` [PATCH v3 1/2] xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ Jiamei Xie
2022-11-29 2:39 ` [PATCH v3 2/2] xen/arm: vpl011: drop redundancy in mmio_write/read Jiamei Xie
0 siblings, 2 replies; 5+ messages in thread
From: Jiamei Xie @ 2022-11-29 2:39 UTC (permalink / raw)
To: xen-devel
Cc: wei.chen, jiamei.xie, Stefano Stabellini, Julien Grall,
Bertrand Marquis, Volodymyr Babchuk
Hi all,
This patch is the version 3 for "xen/arm: vpl011: Make access to DMACR
write-ignore" [1].
[1] https://patchwork.kernel.org/project/xen-devel/patch/20221122054644.1092173-1-jiamei.xie@arm.com/
Thanks,
Jiamei Xie
v2 -> v3
- emulate non-SBSA registers as WI/RAZ in default case
- update commit message
- add a patch to drop redundancy in mmio_write/read
v1 -> v2
- print a message using XENLOG_G_DEBUG when it's write-ignore
Jiamei Xie (2):
xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ
xen/arm: vpl011: drop redundancy in mmio_write/read
xen/arch/arm/vpl011.c | 59 +++++++++++++++----------------------------
1 file changed, 20 insertions(+), 39 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 1/2] xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ
2022-11-29 2:39 [PATCH v3 0/2] xen/arm: refine vpl011 Jiamei Xie
@ 2022-11-29 2:39 ` Jiamei Xie
2022-11-29 8:46 ` Julien Grall
2022-11-29 2:39 ` [PATCH v3 2/2] xen/arm: vpl011: drop redundancy in mmio_write/read Jiamei Xie
1 sibling, 1 reply; 5+ messages in thread
From: Jiamei Xie @ 2022-11-29 2:39 UTC (permalink / raw)
To: xen-devel
Cc: wei.chen, jiamei.xie, Stefano Stabellini, Julien Grall,
Bertrand Marquis, Volodymyr Babchuk
When the guest kernel enables DMA engine with "CONFIG_DMA_ENGINE=y",
Linux SBSA PL011 driver will access PL011 DMACR register in some
functions. As chapter "B Generic UART" in "ARM Server Base System
Architecture"[1] documentation describes, SBSA UART doesn't support
DMA. In current code, when the kernel tries to access DMACR register,
Xen will inject a data abort:
Unhandled fault at 0xffffffc00944d048
Mem abort info:
ESR = 0x96000000
EC = 0x25: DABT (current EL), IL = 32 bits
SET = 0, FnV = 0
EA = 0, S1PTW = 0
FSC = 0x00: ttbr address size fault
Data abort info:
ISV = 0, ISS = 0x00000000
CM = 0, WnR = 0
swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000020e2e000
[ffffffc00944d048] pgd=100000003ffff803, p4d=100000003ffff803, pud=100000003ffff803, pmd=100000003fffa803, pte=006800009c090f13
Internal error: ttbr address size fault: 96000000 [#1] PREEMPT SMP
...
Call trace:
pl011_stop_rx+0x70/0x80
tty_port_shutdown+0x7c/0xb4
tty_port_close+0x60/0xcc
uart_close+0x34/0x8c
tty_release+0x144/0x4c0
__fput+0x78/0x220
____fput+0x1c/0x30
task_work_run+0x88/0xc0
do_notify_resume+0x8d0/0x123c
el0_svc+0xa8/0xc0
el0t_64_sync_handler+0xa4/0x130
el0t_64_sync+0x1a0/0x1a4
Code: b9000083 b901f001 794038a0 8b000042 (b9000041)
---[ end trace 83dd93df15c3216f ]---
note: bootlogd[132] exited with preempt_count 1
/etc/rcS.d/S07bootlogd: line 47: 132 Segmentation fault start-stop-daemon
As discussed in [2], this commit makes the access to non-SBSA registers
RAZ/WI as an improvement.
[1] https://developer.arm.com/documentation/den0094/c/?lang=en
[2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2211161552420.4020@ubuntu-linux-20-04-desktop/
Signed-off-by: Jiamei Xie <jiamei.xie@arm.com>
---
v2 -> v3
- emulate non-SBSA registers as WI/RAZ in default case
- update commit message
v1 -> v2
- print a message using XENLOG_G_DEBUG when it's write-ignore
---
xen/arch/arm/vpl011.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
index 43522d48fd..1bf803fc1f 100644
--- a/xen/arch/arm/vpl011.c
+++ b/xen/arch/arm/vpl011.c
@@ -414,11 +414,19 @@ static int vpl011_mmio_read(struct vcpu *v,
default:
gprintk(XENLOG_ERR, "vpl011: unhandled read r%d offset %#08x\n",
dabt.reg, vpl011_reg);
- return 0;
+ goto read_as_zero;
}
return 1;
+read_as_zero:
+ if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
+
+ VPL011_LOCK(d, flags);
+ *r = 0;
+ VPL011_UNLOCK(d, flags);
+ return 1;
+
bad_width:
gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n",
dabt.size, dabt.reg, vpl011_reg);
@@ -486,10 +494,11 @@ static int vpl011_mmio_write(struct vcpu *v,
default:
gprintk(XENLOG_ERR, "vpl011: unhandled write r%d offset %#08x\n",
dabt.reg, vpl011_reg);
- return 0;
+ goto write_ignore;
}
write_ignore:
+ if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
return 1;
bad_width:
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 2/2] xen/arm: vpl011: drop redundancy in mmio_write/read
2022-11-29 2:39 [PATCH v3 0/2] xen/arm: refine vpl011 Jiamei Xie
2022-11-29 2:39 ` [PATCH v3 1/2] xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ Jiamei Xie
@ 2022-11-29 2:39 ` Jiamei Xie
2022-11-29 8:54 ` Julien Grall
1 sibling, 1 reply; 5+ messages in thread
From: Jiamei Xie @ 2022-11-29 2:39 UTC (permalink / raw)
To: xen-devel
Cc: wei.chen, jiamei.xie, Stefano Stabellini, Julien Grall,
Bertrand Marquis, Volodymyr Babchuk
This commit is to drop redundancy in the function vpl011_mmio_write
and vpl011_mmio_read:
- In vpl011_mmio_read switch block, all cases have a return. So the
outside one can be removed.
- Each switch case checks access by the same if statments. So we can
just use one and put it before the switch block.
- The goto label bad_width and read_as_zero is used only once, put the
code directly
Signed-off-by: Jiamei Xie <jiamei.xie@arm.com>
---
xen/arch/arm/vpl011.c | 66 +++++++++++++------------------------------
1 file changed, 19 insertions(+), 47 deletions(-)
diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
index 1bf803fc1f..80b859baed 100644
--- a/xen/arch/arm/vpl011.c
+++ b/xen/arch/arm/vpl011.c
@@ -354,11 +354,15 @@ static int vpl011_mmio_read(struct vcpu *v,
struct domain *d = v->domain;
unsigned long flags;
+ if ( !vpl011_reg32_check_access(dabt) ) {
+ gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n",
+ dabt.size, dabt.reg, vpl011_reg);
+ return 0;
+ }
+
switch ( vpl011_reg )
{
case DR:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
if ( vpl011->backend_in_domain )
*r = vreg_reg32_extract(vpl011_read_data(d), info);
else
@@ -366,31 +370,23 @@ static int vpl011_mmio_read(struct vcpu *v,
return 1;
case RSR:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
/* It always returns 0 as there are no physical errors. */
*r = 0;
return 1;
case FR:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
VPL011_LOCK(d, flags);
*r = vreg_reg32_extract(vpl011->uartfr, info);
VPL011_UNLOCK(d, flags);
return 1;
case RIS:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
VPL011_LOCK(d, flags);
*r = vreg_reg32_extract(vpl011->uartris, info);
VPL011_UNLOCK(d, flags);
return 1;
case MIS:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
VPL011_LOCK(d, flags);
*r = vreg_reg32_extract(vpl011->uartris & vpl011->uartimsc,
info);
@@ -398,40 +394,25 @@ static int vpl011_mmio_read(struct vcpu *v,
return 1;
case IMSC:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
VPL011_LOCK(d, flags);
*r = vreg_reg32_extract(vpl011->uartimsc, info);
VPL011_UNLOCK(d, flags);
return 1;
case ICR:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
/* Only write is valid. */
return 0;
default:
gprintk(XENLOG_ERR, "vpl011: unhandled read r%d offset %#08x\n",
dabt.reg, vpl011_reg);
- goto read_as_zero;
- }
-
- return 1;
-
-read_as_zero:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
- VPL011_LOCK(d, flags);
- *r = 0;
- VPL011_UNLOCK(d, flags);
- return 1;
-
-bad_width:
- gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n",
- dabt.size, dabt.reg, vpl011_reg);
- return 0;
+ /* Read as zero */
+ VPL011_LOCK(d, flags);
+ *r = 0;
+ VPL011_UNLOCK(d, flags);
+ return 1;
+ }
}
static int vpl011_mmio_write(struct vcpu *v,
@@ -446,14 +427,18 @@ static int vpl011_mmio_write(struct vcpu *v,
struct domain *d = v->domain;
unsigned long flags;
- switch ( vpl011_reg )
+ if ( !vpl011_reg32_check_access(dabt) ) {
+ gprintk(XENLOG_ERR, "vpl011: bad write width %d r%d offset %#08x\n",
+ dabt.size, dabt.reg, vpl011_reg);
+ return 0;
+ }
+
+ switch ( vpl011_reg )
{
case DR:
{
uint32_t data = 0;
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
vreg_reg32_update(&data, r, info);
data &= 0xFF;
if ( vpl011->backend_in_domain )
@@ -464,8 +449,6 @@ static int vpl011_mmio_write(struct vcpu *v,
}
case RSR: /* Nothing to clear. */
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
return 1;
case FR:
@@ -474,8 +457,6 @@ static int vpl011_mmio_write(struct vcpu *v,
goto write_ignore;
case IMSC:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
VPL011_LOCK(d, flags);
vreg_reg32_update(&vpl011->uartimsc, r, info);
vpl011_update_interrupt_status(v->domain);
@@ -483,8 +464,6 @@ static int vpl011_mmio_write(struct vcpu *v,
return 1;
case ICR:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
-
VPL011_LOCK(d, flags);
vreg_reg32_clearbits(&vpl011->uartris, r, info);
vpl011_update_interrupt_status(d);
@@ -498,14 +477,7 @@ static int vpl011_mmio_write(struct vcpu *v,
}
write_ignore:
- if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
return 1;
-
-bad_width:
- gprintk(XENLOG_ERR, "vpl011: bad write width %d r%d offset %#08x\n",
- dabt.size, dabt.reg, vpl011_reg);
- return 0;
-
}
static const struct mmio_handler_ops vpl011_mmio_handler = {
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3 1/2] xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ
2022-11-29 2:39 ` [PATCH v3 1/2] xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ Jiamei Xie
@ 2022-11-29 8:46 ` Julien Grall
0 siblings, 0 replies; 5+ messages in thread
From: Julien Grall @ 2022-11-29 8:46 UTC (permalink / raw)
To: Jiamei Xie, xen-devel
Cc: wei.chen, Stefano Stabellini, Bertrand Marquis, Volodymyr Babchuk
Hi,
On 29/11/2022 03:39, Jiamei Xie wrote:
> When the guest kernel enables DMA engine with "CONFIG_DMA_ENGINE=y",
> Linux SBSA PL011 driver will access PL011 DMACR register in some
> functions. As chapter "B Generic UART" in "ARM Server Base System
> Architecture"[1] documentation describes, SBSA UART doesn't support
> DMA. In current code, when the kernel tries to access DMACR register,
> Xen will inject a data abort:
> Unhandled fault at 0xffffffc00944d048
> Mem abort info:
> ESR = 0x96000000
> EC = 0x25: DABT (current EL), IL = 32 bits
> SET = 0, FnV = 0
> EA = 0, S1PTW = 0
> FSC = 0x00: ttbr address size fault
> Data abort info:
> ISV = 0, ISS = 0x00000000
> CM = 0, WnR = 0
> swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000020e2e000
> [ffffffc00944d048] pgd=100000003ffff803, p4d=100000003ffff803, pud=100000003ffff803, pmd=100000003fffa803, pte=006800009c090f13
> Internal error: ttbr address size fault: 96000000 [#1] PREEMPT SMP
> ...
> Call trace:
> pl011_stop_rx+0x70/0x80
> tty_port_shutdown+0x7c/0xb4
> tty_port_close+0x60/0xcc
> uart_close+0x34/0x8c
> tty_release+0x144/0x4c0
> __fput+0x78/0x220
> ____fput+0x1c/0x30
> task_work_run+0x88/0xc0
> do_notify_resume+0x8d0/0x123c
> el0_svc+0xa8/0xc0
> el0t_64_sync_handler+0xa4/0x130
> el0t_64_sync+0x1a0/0x1a4
> Code: b9000083 b901f001 794038a0 8b000042 (b9000041)
> ---[ end trace 83dd93df15c3216f ]---
> note: bootlogd[132] exited with preempt_count 1
> /etc/rcS.d/S07bootlogd: line 47: 132 Segmentation fault start-stop-daemon
>
> As discussed in [2], this commit makes the access to non-SBSA registers
> RAZ/WI as an improvement.
>
> [1] https://developer.arm.com/documentation/den0094/c/?lang=en
> [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2211161552420.4020@ubuntu-linux-20-04-desktop/
>
> Signed-off-by: Jiamei Xie <jiamei.xie@arm.com>
> ---
> v2 -> v3
> - emulate non-SBSA registers as WI/RAZ in default case
> - update commit message
> v1 -> v2
> - print a message using XENLOG_G_DEBUG when it's write-ignore
> ---
> xen/arch/arm/vpl011.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
> index 43522d48fd..1bf803fc1f 100644
> --- a/xen/arch/arm/vpl011.c
> +++ b/xen/arch/arm/vpl011.c
> @@ -414,11 +414,19 @@ static int vpl011_mmio_read(struct vcpu *v,
> default:
> gprintk(XENLOG_ERR, "vpl011: unhandled read r%d offset %#08x\n",
> dabt.reg, vpl011_reg);
> - return 0;
> + goto read_as_zero;
> }
>
> return 1;
>
> +read_as_zero:
> + if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
We don't know the registers and therefore I don't think we should check
the size.
> +
> + VPL011_LOCK(d, flags);
> + *r = 0;
> + VPL011_UNLOCK(d, flags);
There is no need to lock/unlock here.
> + return 1;
> +
> bad_width:
> gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n",
> dabt.size, dabt.reg, vpl011_reg);
> @@ -486,10 +494,11 @@ static int vpl011_mmio_write(struct vcpu *v,
> default:
> gprintk(XENLOG_ERR, "vpl011: unhandled write r%d offset %#08x\n",
> dabt.reg, vpl011_reg);
> - return 0;
> + goto write_ignore;
> }
>
> write_ignore:
> + if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
Same as for the read_as_zero, the size is unknown and shouldn't be checked.
Cheers,
--
Julien Grall
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/2] xen/arm: vpl011: drop redundancy in mmio_write/read
2022-11-29 2:39 ` [PATCH v3 2/2] xen/arm: vpl011: drop redundancy in mmio_write/read Jiamei Xie
@ 2022-11-29 8:54 ` Julien Grall
0 siblings, 0 replies; 5+ messages in thread
From: Julien Grall @ 2022-11-29 8:54 UTC (permalink / raw)
To: Jiamei Xie, xen-devel
Cc: wei.chen, Stefano Stabellini, Bertrand Marquis, Volodymyr Babchuk
Hi,
On 29/11/2022 03:39, Jiamei Xie wrote:
> This commit is to drop redundancy in the function vpl011_mmio_write
> and vpl011_mmio_read:
> - In vpl011_mmio_read switch block, all cases have a return. So the
> outside one can be removed.
> - Each switch case checks access by the same if statments. So we can
> just use one and put it before the switch block.
> - The goto label bad_width and read_as_zero is used only once, put the
> code directly
>
> Signed-off-by: Jiamei Xie <jiamei.xie@arm.com>
> ---
> xen/arch/arm/vpl011.c | 66 +++++++++++++------------------------------
> 1 file changed, 19 insertions(+), 47 deletions(-)
>
> diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c
> index 1bf803fc1f..80b859baed 100644
> --- a/xen/arch/arm/vpl011.c
> +++ b/xen/arch/arm/vpl011.c
> @@ -354,11 +354,15 @@ static int vpl011_mmio_read(struct vcpu *v,
> struct domain *d = v->domain;
> unsigned long flags;
>
> + if ( !vpl011_reg32_check_access(dabt) ) {
As I pointed out in the previous version, we don't know the size of the
registers for the one not described in the SBSA UART. So I don't think
this check should be consolidated.
Also, coding style:
if ( .... )
{
> + gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n",
> + dabt.size, dabt.reg, vpl011_reg);
> + return 0;
> + }
> +
> switch ( vpl011_reg )
> {
> case DR:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> if ( vpl011->backend_in_domain )
> *r = vreg_reg32_extract(vpl011_read_data(d), info);
> else
> @@ -366,31 +370,23 @@ static int vpl011_mmio_read(struct vcpu *v,
> return 1;
>
> case RSR:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> /* It always returns 0 as there are no physical errors. */
> *r = 0;
> return 1;
>
> case FR:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> VPL011_LOCK(d, flags);
> *r = vreg_reg32_extract(vpl011->uartfr, info);
> VPL011_UNLOCK(d, flags);
> return 1;
>
> case RIS:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> VPL011_LOCK(d, flags);
> *r = vreg_reg32_extract(vpl011->uartris, info);
> VPL011_UNLOCK(d, flags);
> return 1;
>
> case MIS:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> VPL011_LOCK(d, flags);
> *r = vreg_reg32_extract(vpl011->uartris & vpl011->uartimsc,
> info);
> @@ -398,40 +394,25 @@ static int vpl011_mmio_read(struct vcpu *v,
> return 1;
>
> case IMSC:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> VPL011_LOCK(d, flags);
> *r = vreg_reg32_extract(vpl011->uartimsc, info);
> VPL011_UNLOCK(d, flags);
> return 1;
>
> case ICR:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> /* Only write is valid. */
> return 0;
>
> default:
> gprintk(XENLOG_ERR, "vpl011: unhandled read r%d offset %#08x\n",
> dabt.reg, vpl011_reg);
> - goto read_as_zero;
> - }
> -
> - return 1;
> -
> -read_as_zero:
In general, we don't want to introduce and remove the same code within a
series. If you don't want to keep read_as_zero, then you should not
introduce it.
However... I think using the read_as_zero label could still be
beneficial to reduce the numbers of lines where the registers are RAZ
(e.g. default, RSR...).
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> - VPL011_LOCK(d, flags);
> - *r = 0;
> - VPL011_UNLOCK(d, flags);
> - return 1;
> -
> -bad_width:
> - gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n",
> - dabt.size, dabt.reg, vpl011_reg);
> - return 0;
>
> + /* Read as zero */
> + VPL011_LOCK(d, flags);
> + *r = 0;
> + VPL011_UNLOCK(d, flags);
> + return 1;
> + }
> }
>
> static int vpl011_mmio_write(struct vcpu *v,
> @@ -446,14 +427,18 @@ static int vpl011_mmio_write(struct vcpu *v,
> struct domain *d = v->domain;
> unsigned long flags;
>
> - switch ( vpl011_reg )
> + if ( !vpl011_reg32_check_access(dabt) ) {
> + gprintk(XENLOG_ERR, "vpl011: bad write width %d r%d offset %#08x\n",
> + dabt.size, dabt.reg, vpl011_reg);
> + return 0;
> + }
Same remarks as for the read part.
> +
> + switch ( vpl011_reg )
> {
> case DR:
> {
> uint32_t data = 0;
>
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> vreg_reg32_update(&data, r, info);
> data &= 0xFF;
> if ( vpl011->backend_in_domain )
> @@ -464,8 +449,6 @@ static int vpl011_mmio_write(struct vcpu *v,
> }
>
> case RSR: /* Nothing to clear. */
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> return 1;
>
> case FR:
> @@ -474,8 +457,6 @@ static int vpl011_mmio_write(struct vcpu *v,
> goto write_ignore;
>
> case IMSC:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> VPL011_LOCK(d, flags);
> vreg_reg32_update(&vpl011->uartimsc, r, info);
> vpl011_update_interrupt_status(v->domain);
> @@ -483,8 +464,6 @@ static int vpl011_mmio_write(struct vcpu *v,
> return 1;
>
> case ICR:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> -
> VPL011_LOCK(d, flags);
> vreg_reg32_clearbits(&vpl011->uartris, r, info);
> vpl011_update_interrupt_status(d);
> @@ -498,14 +477,7 @@ static int vpl011_mmio_write(struct vcpu *v,
> }
>
> write_ignore:
> - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width;
> return 1;
> -
> -bad_width:
> - gprintk(XENLOG_ERR, "vpl011: bad write width %d r%d offset %#08x\n",
> - dabt.size, dabt.reg, vpl011_reg);
> - return 0;
> -
> }
>
> static const struct mmio_handler_ops vpl011_mmio_handler = {
--
Julien Grall
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-11-29 8:55 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-29 2:39 [PATCH v3 0/2] xen/arm: refine vpl011 Jiamei Xie
2022-11-29 2:39 ` [PATCH v3 1/2] xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ Jiamei Xie
2022-11-29 8:46 ` Julien Grall
2022-11-29 2:39 ` [PATCH v3 2/2] xen/arm: vpl011: drop redundancy in mmio_write/read Jiamei Xie
2022-11-29 8:54 ` Julien Grall
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