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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	npiggin@gmail.com
Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH v2 19/43] powerpc/32: Use START_EXCEPTION() as much as possible
Date: Tue,  9 Mar 2021 12:09:45 +0000 (UTC)	[thread overview]
Message-ID: <45106885c9002b4191a68b37d12e76a29c4cad50.1615291472.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1615291471.git.christophe.leroy@csgroup.eu>

Everywhere where it is possible, use START_EXCEPTION().

This will help for proper exception init in future patches.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/kernel/head_40x.S       | 12 +++++------
 arch/powerpc/kernel/head_8xx.S       | 27 +++++++++----------------
 arch/powerpc/kernel/head_book3s_32.S | 30 ++++++++--------------------
 3 files changed, 22 insertions(+), 47 deletions(-)

diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 55fa99c5085c..c14a71e0d6d3 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -247,17 +247,15 @@ _ENTRY(crit_esr)
 	EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_STD)
 
 /* 0x1000 - Programmable Interval Timer (PIT) Exception */
-	. = 0x1000
+	START_EXCEPTION(0x1000, DecrementerTrap)
 	b Decrementer
 
-/* 0x1010 - Fixed Interval Timer (FIT) Exception
-*/
-	. = 0x1010
+/* 0x1010 - Fixed Interval Timer (FIT) Exception */
+	START_EXCEPTION(0x1010, FITExceptionTrap)
 	b FITException
 
-/* 0x1020 - Watchdog Timer (WDT) Exception
-*/
-	. = 0x1020
+/* 0x1020 - Watchdog Timer (WDT) Exception */
+	START_EXCEPTION(0x1020, WDTExceptionTrap)
 	b WDTException
 
 /* 0x1100 - Data TLB Miss Exception
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index b63445c55f4d..11789a077d76 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -121,8 +121,7 @@ instruction_counter:
 	EXCEPTION(0x100, Reset, system_reset_exception, EXC_XFER_STD)
 
 /* Machine check */
-	. = 0x200
-MachineCheck:
+	START_EXCEPTION(0x200, MachineCheck)
 	EXCEPTION_PROLOG handle_dar_dsisr=1
 	addi r3,r1,STACK_FRAME_OVERHEAD
 	EXC_XFER_STD(0x200, machine_check_exception)
@@ -131,8 +130,7 @@ MachineCheck:
 	EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
 
 /* Alignment exception */
-	. = 0x600
-Alignment:
+	START_EXCEPTION(0x600, Alignment)
 	EXCEPTION_PROLOG handle_dar_dsisr=1
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	b	.Lalignment_exception_ool
@@ -149,8 +147,7 @@ Alignment:
 	EXC_XFER_STD(0x600, alignment_exception)
 
 /* System call */
-	. = 0xc00
-SystemCall:
+	START_EXCEPTION(0xc00, SystemCall)
 	SYSCALL_ENTRY	0xc00
 
 /* Single step - not used on 601 */
@@ -161,7 +158,6 @@ SystemCall:
  */
 	EXCEPTION(0x1000, SoftEmu, emulation_assist_interrupt, EXC_XFER_STD)
 
-	. = 0x1100
 /*
  * For the MPC8xx, this is a software tablewalk to load the instruction
  * TLB.  The task switch loads the M_TWB register with the pointer to the first
@@ -183,7 +179,7 @@ SystemCall:
 #define INVALIDATE_ADJACENT_PAGES_CPU15(addr, tmp)
 #endif
 
-InstructionTLBMiss:
+	START_EXCEPTION(0x1100, InstructionTLBMiss)
 	mtspr	SPRN_SPRG_SCRATCH2, r10
 	mtspr	SPRN_M_TW, r11
 
@@ -239,8 +235,7 @@ InstructionTLBMiss:
 	rfi
 #endif
 
-	. = 0x1200
-DataStoreTLBMiss:
+	START_EXCEPTION(0x1200, DataStoreTLBMiss)
 	mtspr	SPRN_SPRG_SCRATCH2, r10
 	mtspr	SPRN_M_TW, r11
 	mfcr	r11
@@ -303,8 +298,7 @@ DataStoreTLBMiss:
  * to many reasons, such as executing guarded memory or illegal instruction
  * addresses.  There is nothing to do but handle a big time error fault.
  */
-	. = 0x1300
-InstructionTLBError:
+	START_EXCEPTION(0x1300, InstructionTLBError)
 	EXCEPTION_PROLOG
 	andis.	r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
 	andis.	r10,r9,SRR1_ISI_NOPT@h
@@ -320,8 +314,7 @@ InstructionTLBError:
  * many reasons, including a dirty update to a pte.  We bail out to
  * a higher level function that can handle it.
  */
-	. = 0x1400
-DataTLBError:
+	START_EXCEPTION(0x1400, DataTLBError)
 	EXCEPTION_PROLOG_0 handle_dar_dsisr=1
 	mfspr	r11, SPRN_DAR
 	cmpwi	cr1, r11, RPN_PATTERN
@@ -354,8 +347,7 @@ do_databreakpoint:
 	stw	r4,_DAR(r11)
 	EXC_XFER_STD(0x1c00, do_break)
 
-	. = 0x1c00
-DataBreakpoint:
+	START_EXCEPTION(0x1c00, DataBreakpoint)
 	EXCEPTION_PROLOG_0 handle_dar_dsisr=1
 	mfspr	r11, SPRN_SRR0
 	cmplwi	cr1, r11, (.Ldtlbie - PAGE_OFFSET)@l
@@ -368,8 +360,7 @@ DataBreakpoint:
 	rfi
 
 #ifdef CONFIG_PERF_EVENTS
-	. = 0x1d00
-InstructionBreakpoint:
+	START_EXCEPTION(0x1d00, InstructionBreakpoint)
 	mtspr	SPRN_SPRG_SCRATCH0, r10
 	lwz	r10, (instruction_counter - PAGE_OFFSET)@l(0)
 	addi	r10, r10, -1
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 9dc05890477d..8f5c8c8da63d 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -255,9 +255,7 @@ __secondary_hold_acknowledge:
  * pointer when we take an exception from supervisor mode.)
  *	-- paulus.
  */
-	. = 0x200
-	DO_KVM  0x200
-MachineCheck:
+	START_EXCEPTION(0x200, MachineCheck)
 	EXCEPTION_PROLOG_0
 #ifdef CONFIG_PPC_CHRP
 	mtspr	SPRN_SPRG_SCRATCH2,r1
@@ -278,9 +276,7 @@ MachineCheck:
 #endif
 
 /* Data access exception. */
-	. = 0x300
-	DO_KVM  0x300
-DataAccess:
+	START_EXCEPTION(0x300, DataAccess)
 #ifdef CONFIG_PPC_BOOK3S_604
 BEGIN_MMU_FTR_SECTION
 	mtspr	SPRN_SPRG_SCRATCH2,r10
@@ -304,9 +300,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
 	b	handle_page_fault_tramp_1
 
 /* Instruction access exception. */
-	. = 0x400
-	DO_KVM  0x400
-InstructionAccess:
+	START_EXCEPTION(0x400, InstructionAccess)
 	mtspr	SPRN_SPRG_SCRATCH0,r10
 	mtspr	SPRN_SPRG_SCRATCH1,r11
 	mfspr	r10, SPRN_SPRG_THREAD
@@ -336,9 +330,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 	EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
 
 /* Alignment exception */
-	. = 0x600
-	DO_KVM  0x600
-Alignment:
+	START_EXCEPTION(0x600, Alignment)
 	EXCEPTION_PROLOG handle_dar_dsisr=1
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	b	alignment_exception_tramp
@@ -347,9 +339,7 @@ Alignment:
 	EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
 
 /* Floating-point unavailable */
-	. = 0x800
-	DO_KVM  0x800
-FPUnavailable:
+	START_EXCEPTION(0x800, FPUnavailable)
 #ifdef CONFIG_PPC_FPU
 BEGIN_FTR_SECTION
 /*
@@ -375,9 +365,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE)
 	EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_STD)
 
 /* System call */
-	. = 0xc00
-	DO_KVM  0xc00
-SystemCall:
+	START_EXCEPTION(0xc00, SystemCall)
 	SYSCALL_ENTRY	0xc00
 
 	EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
@@ -391,12 +379,10 @@ SystemCall:
  * non-altivec kernel running on a machine with altivec just
  * by executing an altivec instruction.
  */
-	. = 0xf00
-	DO_KVM  0xf00
+	START_EXCEPTION(0xf00, PerformanceMonitorTrap)
 	b	PerformanceMonitor
 
-	. = 0xf20
-	DO_KVM  0xf20
+	START_EXCEPTION(0xf20, AltiVecUnavailableTrap)
 	b	AltiVecUnavailable
 
 /*
-- 
2.25.0


WARNING: multiple messages have this Message-ID (diff)
From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	 npiggin@gmail.com
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 19/43] powerpc/32: Use START_EXCEPTION() as much as possible
Date: Tue,  9 Mar 2021 12:09:45 +0000 (UTC)	[thread overview]
Message-ID: <45106885c9002b4191a68b37d12e76a29c4cad50.1615291472.git.christophe.leroy@csgroup.eu> (raw)
In-Reply-To: <cover.1615291471.git.christophe.leroy@csgroup.eu>

Everywhere where it is possible, use START_EXCEPTION().

This will help for proper exception init in future patches.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
 arch/powerpc/kernel/head_40x.S       | 12 +++++------
 arch/powerpc/kernel/head_8xx.S       | 27 +++++++++----------------
 arch/powerpc/kernel/head_book3s_32.S | 30 ++++++++--------------------
 3 files changed, 22 insertions(+), 47 deletions(-)

diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 55fa99c5085c..c14a71e0d6d3 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -247,17 +247,15 @@ _ENTRY(crit_esr)
 	EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_STD)
 
 /* 0x1000 - Programmable Interval Timer (PIT) Exception */
-	. = 0x1000
+	START_EXCEPTION(0x1000, DecrementerTrap)
 	b Decrementer
 
-/* 0x1010 - Fixed Interval Timer (FIT) Exception
-*/
-	. = 0x1010
+/* 0x1010 - Fixed Interval Timer (FIT) Exception */
+	START_EXCEPTION(0x1010, FITExceptionTrap)
 	b FITException
 
-/* 0x1020 - Watchdog Timer (WDT) Exception
-*/
-	. = 0x1020
+/* 0x1020 - Watchdog Timer (WDT) Exception */
+	START_EXCEPTION(0x1020, WDTExceptionTrap)
 	b WDTException
 
 /* 0x1100 - Data TLB Miss Exception
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index b63445c55f4d..11789a077d76 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -121,8 +121,7 @@ instruction_counter:
 	EXCEPTION(0x100, Reset, system_reset_exception, EXC_XFER_STD)
 
 /* Machine check */
-	. = 0x200
-MachineCheck:
+	START_EXCEPTION(0x200, MachineCheck)
 	EXCEPTION_PROLOG handle_dar_dsisr=1
 	addi r3,r1,STACK_FRAME_OVERHEAD
 	EXC_XFER_STD(0x200, machine_check_exception)
@@ -131,8 +130,7 @@ MachineCheck:
 	EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
 
 /* Alignment exception */
-	. = 0x600
-Alignment:
+	START_EXCEPTION(0x600, Alignment)
 	EXCEPTION_PROLOG handle_dar_dsisr=1
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	b	.Lalignment_exception_ool
@@ -149,8 +147,7 @@ Alignment:
 	EXC_XFER_STD(0x600, alignment_exception)
 
 /* System call */
-	. = 0xc00
-SystemCall:
+	START_EXCEPTION(0xc00, SystemCall)
 	SYSCALL_ENTRY	0xc00
 
 /* Single step - not used on 601 */
@@ -161,7 +158,6 @@ SystemCall:
  */
 	EXCEPTION(0x1000, SoftEmu, emulation_assist_interrupt, EXC_XFER_STD)
 
-	. = 0x1100
 /*
  * For the MPC8xx, this is a software tablewalk to load the instruction
  * TLB.  The task switch loads the M_TWB register with the pointer to the first
@@ -183,7 +179,7 @@ SystemCall:
 #define INVALIDATE_ADJACENT_PAGES_CPU15(addr, tmp)
 #endif
 
-InstructionTLBMiss:
+	START_EXCEPTION(0x1100, InstructionTLBMiss)
 	mtspr	SPRN_SPRG_SCRATCH2, r10
 	mtspr	SPRN_M_TW, r11
 
@@ -239,8 +235,7 @@ InstructionTLBMiss:
 	rfi
 #endif
 
-	. = 0x1200
-DataStoreTLBMiss:
+	START_EXCEPTION(0x1200, DataStoreTLBMiss)
 	mtspr	SPRN_SPRG_SCRATCH2, r10
 	mtspr	SPRN_M_TW, r11
 	mfcr	r11
@@ -303,8 +298,7 @@ DataStoreTLBMiss:
  * to many reasons, such as executing guarded memory or illegal instruction
  * addresses.  There is nothing to do but handle a big time error fault.
  */
-	. = 0x1300
-InstructionTLBError:
+	START_EXCEPTION(0x1300, InstructionTLBError)
 	EXCEPTION_PROLOG
 	andis.	r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
 	andis.	r10,r9,SRR1_ISI_NOPT@h
@@ -320,8 +314,7 @@ InstructionTLBError:
  * many reasons, including a dirty update to a pte.  We bail out to
  * a higher level function that can handle it.
  */
-	. = 0x1400
-DataTLBError:
+	START_EXCEPTION(0x1400, DataTLBError)
 	EXCEPTION_PROLOG_0 handle_dar_dsisr=1
 	mfspr	r11, SPRN_DAR
 	cmpwi	cr1, r11, RPN_PATTERN
@@ -354,8 +347,7 @@ do_databreakpoint:
 	stw	r4,_DAR(r11)
 	EXC_XFER_STD(0x1c00, do_break)
 
-	. = 0x1c00
-DataBreakpoint:
+	START_EXCEPTION(0x1c00, DataBreakpoint)
 	EXCEPTION_PROLOG_0 handle_dar_dsisr=1
 	mfspr	r11, SPRN_SRR0
 	cmplwi	cr1, r11, (.Ldtlbie - PAGE_OFFSET)@l
@@ -368,8 +360,7 @@ DataBreakpoint:
 	rfi
 
 #ifdef CONFIG_PERF_EVENTS
-	. = 0x1d00
-InstructionBreakpoint:
+	START_EXCEPTION(0x1d00, InstructionBreakpoint)
 	mtspr	SPRN_SPRG_SCRATCH0, r10
 	lwz	r10, (instruction_counter - PAGE_OFFSET)@l(0)
 	addi	r10, r10, -1
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 9dc05890477d..8f5c8c8da63d 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -255,9 +255,7 @@ __secondary_hold_acknowledge:
  * pointer when we take an exception from supervisor mode.)
  *	-- paulus.
  */
-	. = 0x200
-	DO_KVM  0x200
-MachineCheck:
+	START_EXCEPTION(0x200, MachineCheck)
 	EXCEPTION_PROLOG_0
 #ifdef CONFIG_PPC_CHRP
 	mtspr	SPRN_SPRG_SCRATCH2,r1
@@ -278,9 +276,7 @@ MachineCheck:
 #endif
 
 /* Data access exception. */
-	. = 0x300
-	DO_KVM  0x300
-DataAccess:
+	START_EXCEPTION(0x300, DataAccess)
 #ifdef CONFIG_PPC_BOOK3S_604
 BEGIN_MMU_FTR_SECTION
 	mtspr	SPRN_SPRG_SCRATCH2,r10
@@ -304,9 +300,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)
 	b	handle_page_fault_tramp_1
 
 /* Instruction access exception. */
-	. = 0x400
-	DO_KVM  0x400
-InstructionAccess:
+	START_EXCEPTION(0x400, InstructionAccess)
 	mtspr	SPRN_SPRG_SCRATCH0,r10
 	mtspr	SPRN_SPRG_SCRATCH1,r11
 	mfspr	r10, SPRN_SPRG_THREAD
@@ -336,9 +330,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 	EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
 
 /* Alignment exception */
-	. = 0x600
-	DO_KVM  0x600
-Alignment:
+	START_EXCEPTION(0x600, Alignment)
 	EXCEPTION_PROLOG handle_dar_dsisr=1
 	addi	r3,r1,STACK_FRAME_OVERHEAD
 	b	alignment_exception_tramp
@@ -347,9 +339,7 @@ Alignment:
 	EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
 
 /* Floating-point unavailable */
-	. = 0x800
-	DO_KVM  0x800
-FPUnavailable:
+	START_EXCEPTION(0x800, FPUnavailable)
 #ifdef CONFIG_PPC_FPU
 BEGIN_FTR_SECTION
 /*
@@ -375,9 +365,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE)
 	EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_STD)
 
 /* System call */
-	. = 0xc00
-	DO_KVM  0xc00
-SystemCall:
+	START_EXCEPTION(0xc00, SystemCall)
 	SYSCALL_ENTRY	0xc00
 
 	EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
@@ -391,12 +379,10 @@ SystemCall:
  * non-altivec kernel running on a machine with altivec just
  * by executing an altivec instruction.
  */
-	. = 0xf00
-	DO_KVM  0xf00
+	START_EXCEPTION(0xf00, PerformanceMonitorTrap)
 	b	PerformanceMonitor
 
-	. = 0xf20
-	DO_KVM  0xf20
+	START_EXCEPTION(0xf20, AltiVecUnavailableTrap)
 	b	AltiVecUnavailable
 
 /*
-- 
2.25.0


  parent reply	other threads:[~2021-03-09 12:10 UTC|newest]

Thread overview: 120+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-09 12:09 [PATCH v2 00/43] powerpc/32: Switch to interrupt entry/exit in C Christophe Leroy
2021-03-09 12:09 ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 01/43] powerpc/traps: unrecoverable_exception() is not an interrupt handler Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-10  1:16   ` Nicholas Piggin
2021-03-10  1:16     ` Nicholas Piggin
2021-03-09 12:09 ` [PATCH v2 02/43] powerpc/traps: Declare unrecoverable_exception() as __noreturn Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-10  1:22   ` Nicholas Piggin
2021-03-10  1:22     ` Nicholas Piggin
2021-03-12  8:40     ` Christophe Leroy
2021-03-12  8:40       ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 03/43] powerpc/40x: Don't use SPRN_SPRG_SCRATCH0/1 in TLB miss handlers Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 04/43] powerpc/40x: Change CRITICAL_EXCEPTION_PROLOG macro to a gas macro Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 05/43] powerpc/40x: Save SRR0/SRR1 and r10/r11 earlier in critical exception Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 06/43] powerpc/40x: Reorder a few instructions in critical exception prolog Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 07/43] powerpc/40x: Prepare for enabling MMU " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 08/43] powerpc/40x: Prepare normal exception handler for enabling MMU early Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 09/43] powerpc/32: Reconcile interrupts in C Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 10/43] powerpc/32: Entry cpu time accounting " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 11/43] powerpc/32: Handle bookE debugging in C in exception entry Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 12/43] powerpc/32: Use fast instruction to set MSR RI in exception prolog on 8xx Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 13/43] powerpc/32: Remove ksp_limit Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 14/43] powerpc/32: Always enable data translation in exception prolog Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 15/43] powerpc/32: Tag DAR in EXCEPTION_PROLOG_2 for the 8xx Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 16/43] powerpc/32: Enable instruction translation at the same time as data translation Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 17/43] powerpc/32: Statically initialise first emergency context Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 18/43] powerpc/32: Add vmap_stack_overflow label inside the macro Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` Christophe Leroy [this message]
2021-03-09 12:09   ` [PATCH v2 19/43] powerpc/32: Use START_EXCEPTION() as much as possible Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 20/43] powerpc/32: Move exception prolog code into .text once MMU is back on Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 21/43] powerpc/32: Provide a name to exception prolog continuation in virtual mode Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 22/43] powerpc/32: Refactor booke critical registers saving Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 23/43] powerpc/32: Perform normal function call in exception entry Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 24/43] powerpc/32: Always save non volatile registers on " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 25/43] powerpc/32: Replace ASM exception exit by C exception exit from ppc64 Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-11 13:46   ` Michael Ellerman
2021-03-11 13:46     ` Michael Ellerman
2021-03-11 19:39     ` Christophe Leroy
2021-03-11 19:39       ` Christophe Leroy
2021-03-11 23:26       ` Michael Ellerman
2021-03-11 23:26         ` Michael Ellerman
2021-03-12  8:28         ` Christophe Leroy
2021-03-12  8:28           ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 26/43] powerpc/32: Set regs parameter in r3 in transfer_to_handler Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 27/43] powerpc/32: Call bad_page_fault() from do_page_fault() Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 28/43] powerpc/64e: " Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-10  1:29   ` Nicholas Piggin
2021-03-10  1:29     ` Nicholas Piggin
2021-03-12  8:39     ` Christophe Leroy
2021-03-12  8:39       ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 29/43] powerpc/32: Save trap number on stack in exception prolog Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 30/43] powerpc/32: Add a prepare_transfer_to_handler macro for exception prologs Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 31/43] powerpc/32: Only restore non volatile registers when required Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 32/43] powerpc/32: Dismantle EXC_XFER_STD/LITE/TEMPLATE Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:09 ` [PATCH v2 33/43] powerpc/32: Remove the xfer parameter in EXCEPTION() macro Christophe Leroy
2021-03-09 12:09   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 34/43] powerpc/32: Refactor saving of volatile registers in exception prologs Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 35/43] powerpc/32: Save remaining registers in exception prolog Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 36/43] powerpc/32: Set current->thread.regs in C interrupt entry Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-10  1:33   ` Nicholas Piggin
2021-03-10  1:33     ` Nicholas Piggin
2021-03-11 10:38     ` Christophe Leroy
2021-03-11 10:38       ` Christophe Leroy
2021-03-11 12:38       ` Christophe Leroy
2021-03-11 12:38         ` Christophe Leroy
2021-03-12  1:00         ` Nicholas Piggin
2021-03-12  1:00           ` Nicholas Piggin
2021-03-09 12:10 ` [PATCH v2 37/43] powerpc/32: Return directly from power_save_ppc32_restore() Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 38/43] powerpc/32: Only use prepare_transfer_to_handler function on book3s/32 and e500 Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 39/43] powerpc/32s: Move KUEP locking/unlocking in C Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 40/43] powerpc/64s: Make kuap_check_amr() and kuap_get_and_check_amr() generic Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-10  1:37   ` Nicholas Piggin
2021-03-10  1:37     ` Nicholas Piggin
2021-03-12  8:37     ` Christophe Leroy
2021-03-12  8:37       ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 41/43] powerpc/32s: Create C version of kuap save/restore/check helpers Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 42/43] powerpc/8xx: " Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-09 12:10 ` [PATCH v2 43/43] powerpc/32: Manage KUAP in C Christophe Leroy
2021-03-09 12:10   ` Christophe Leroy
2021-03-14 10:01 ` [PATCH v2 00/43] powerpc/32: Switch to interrupt entry/exit " Michael Ellerman
2021-03-14 10:01   ` Michael Ellerman

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