From: Sergei Shtylyov <sshtylyov@ru.mvista.com> To: u-boot-users@lists.sourceforge.net Cc: linuxppc-embedded@ozlabs.org Subject: Re: [U-Boot-Users] U-Boot allocating PCI I/O space from 0 (Was: pata_sl82c105 can not reserve IO region) Date: Tue, 26 Dec 2006 23:53:34 +0300 [thread overview] Message-ID: <45918BCE.1010209@ru.mvista.com> (raw) In-Reply-To: <4571AAE1.1020609@ru.mvista.com> Hello, I wrote: >> Well, I'm having a very related issue with the U-Boot on MPC85xx: recently >>I've noticed that it started allocating PCI I/O space from 0 (while the older >>versions started from 0x1000). The IDE core can't tolerate this, giving me >>such messages on bootup: >>PDC20269: inconsistent baseregs (BIOS) for port 0, skipping This is due to U-Boot assigning the PCI resources fram address 0 (which is BTW illegal according to PCI 2.1). I have a patch for drivers/pci_auto.c which I'm going to post tomorrow... >>when I have Promise Ultra133TX2 card inserted into PCI alone. I've looked thru >>the U-Boot sources and commit history but failed to locate the change that led >>to this... > It's actually much worse than just that. When I also plug in some other > PCI card so Ultra133TX2 doesn't get the zero addresses anymore, I'm getting this: > eepro100.c: $Revision: 1.36 $ 2000/11/17 Modified by Andrey V. Savochkin > <saw@saw.sw.com.sg> and others > eth3: Invalid EEPROM checksum 0xfffe, check settings before activating this > device! > eth3: OEM i82557/i82558 10/100 Ethernet, 00:00:00:00:FF:FF, IRQ 52. > [...] > PDC20269: 100% native mode on irq 51 > ide2: BM-DMA at 0x0060-0x0067, BIOS settings: hde:pio, hdf:pio > PDC20269: simplex device: DMA disabled > ide3: PDC20269 Bus-Master DMA disabled (BIOS) > I've just verified that both these cards are working OK in x86 box > As for the simplex message, I've encountered this some months ago and it was > caused by invalid programming of the MPC85xx bridge PCI/X outbound translation > address register for the I/O space No, the programming was valid. I've finally found the ultimate reason of breakage -- it lies in board/*/init.S files. The patch tomorrow... > or at least by the non-zero value of the > bus I/O address in the "ranges" property of the bridge device node in the > device tree... It was the real reason -- the arch/powerpc/ kernel just ignores ranges with non-zero I/O port address. > I'm somewhat confused now since I know that the relevant U-Boot > code has been fixed but it looks like that made it only worse -- I was using > the custom patched version of U-Boot before which missed that fix: > http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commitdiff;h=97074ed9655309b64231bc2cee69fe85399f8055 It was actually the following patch that broke PCI: http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commit;h=52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc There were other places relying on CFG_PCI1_IO_BASE and those weren't changed... sigh. :-/ WBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sshtylyov@ru.mvista.com> To: u-boot@lists.denx.de Subject: [U-Boot-Users] U-Boot allocating PCI I/O space from 0 (Was: pata_sl82c105 can not reserve IO region) Date: Tue, 26 Dec 2006 23:53:34 +0300 [thread overview] Message-ID: <45918BCE.1010209@ru.mvista.com> (raw) In-Reply-To: <4571AAE1.1020609@ru.mvista.com> Hello, I wrote: >> Well, I'm having a very related issue with the U-Boot on MPC85xx: recently >>I've noticed that it started allocating PCI I/O space from 0 (while the older >>versions started from 0x1000). The IDE core can't tolerate this, giving me >>such messages on bootup: >>PDC20269: inconsistent baseregs (BIOS) for port 0, skipping This is due to U-Boot assigning the PCI resources fram address 0 (which is BTW illegal according to PCI 2.1). I have a patch for drivers/pci_auto.c which I'm going to post tomorrow... >>when I have Promise Ultra133TX2 card inserted into PCI alone. I've looked thru >>the U-Boot sources and commit history but failed to locate the change that led >>to this... > It's actually much worse than just that. When I also plug in some other > PCI card so Ultra133TX2 doesn't get the zero addresses anymore, I'm getting this: > eepro100.c: $Revision: 1.36 $ 2000/11/17 Modified by Andrey V. Savochkin > <saw@saw.sw.com.sg> and others > eth3: Invalid EEPROM checksum 0xfffe, check settings before activating this > device! > eth3: OEM i82557/i82558 10/100 Ethernet, 00:00:00:00:FF:FF, IRQ 52. > [...] > PDC20269: 100% native mode on irq 51 > ide2: BM-DMA at 0x0060-0x0067, BIOS settings: hde:pio, hdf:pio > PDC20269: simplex device: DMA disabled > ide3: PDC20269 Bus-Master DMA disabled (BIOS) > I've just verified that both these cards are working OK in x86 box > As for the simplex message, I've encountered this some months ago and it was > caused by invalid programming of the MPC85xx bridge PCI/X outbound translation > address register for the I/O space No, the programming was valid. I've finally found the ultimate reason of breakage -- it lies in board/*/init.S files. The patch tomorrow... > or at least by the non-zero value of the > bus I/O address in the "ranges" property of the bridge device node in the > device tree... It was the real reason -- the arch/powerpc/ kernel just ignores ranges with non-zero I/O port address. > I'm somewhat confused now since I know that the relevant U-Boot > code has been fixed but it looks like that made it only worse -- I was using > the custom patched version of U-Boot before which missed that fix: > http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commitdiff;h=97074ed9655309b64231bc2cee69fe85399f8055 It was actually the following patch that broke PCI: http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commit;h=52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc There were other places relying on CFG_PCI1_IO_BASE and those weren't changed... sigh. :-/ WBR, Sergei
next prev parent reply other threads:[~2006-12-26 20:53 UTC|newest] Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top 2006-11-30 16:52 pata_sl82c105 can not reserve IO region Olaf Hering 2006-11-30 17:10 ` Alan 2006-11-30 18:47 ` Olaf Hering 2006-12-01 18:34 ` Olaf Hering 2006-12-01 18:58 ` Alan 2006-12-01 19:05 ` Sergei Shtylyov 2006-12-01 19:05 ` Sergei Shtylyov 2006-12-01 21:53 ` Benjamin Herrenschmidt 2006-12-01 21:53 ` Benjamin Herrenschmidt 2006-12-01 22:15 ` Alan 2006-12-01 22:15 ` Alan 2006-12-01 22:19 ` Benjamin Herrenschmidt 2006-12-01 22:19 ` Benjamin Herrenschmidt 2006-12-02 14:36 ` U-Boot allocating PCI I/O space from 0 (Was: pata_sl82c105 can not reserve IO region) Sergei Shtylyov 2006-12-02 14:36 ` [U-Boot-Users] " Sergei Shtylyov 2006-12-02 16:33 ` Sergei Shtylyov 2006-12-02 16:33 ` [U-Boot-Users] " Sergei Shtylyov 2006-12-26 20:53 ` Sergei Shtylyov [this message] 2006-12-26 20:53 ` Sergei Shtylyov 2006-12-03 23:39 ` pata_sl82c105 can not reserve IO region Alan 2006-12-03 23:39 ` Alan 2006-12-03 17:12 ` Olaf Hering 2006-12-03 22:24 ` Olaf Hering 2006-12-03 23:23 ` Alan 2006-12-04 0:30 ` Olaf Hering 2006-12-04 9:21 ` Olaf Hering 2006-12-03 23:07 ` Alan 2006-12-04 12:38 ` [PATCH] mark PCI resource with start 0 as unassigned Olaf Hering 2006-12-04 12:44 ` Segher Boessenkool 2006-12-04 12:50 ` Sergei Shtylyov 2006-12-04 12:50 ` Sergei Shtylyov 2006-12-04 12:54 ` Segher Boessenkool 2006-12-04 12:54 ` Segher Boessenkool 2006-12-04 13:08 ` Sergei Shtylyov 2006-12-04 13:08 ` Sergei Shtylyov 2006-12-04 13:21 ` Alan 2006-12-04 13:25 ` Segher Boessenkool 2006-12-04 13:25 ` Segher Boessenkool 2006-12-04 14:15 ` Alan 2007-08-01 14:22 ` Sergei Shtylyov 2007-08-01 14:22 ` Sergei Shtylyov 2007-08-01 15:51 ` Alan Cox 2007-08-01 15:51 ` Alan Cox 2007-08-06 18:04 ` Segher Boessenkool 2007-08-06 18:04 ` Segher Boessenkool 2007-08-06 19:52 ` Alan Cox 2007-08-06 19:52 ` Alan Cox 2007-08-06 22:14 ` Benjamin Herrenschmidt 2007-08-06 22:14 ` Benjamin Herrenschmidt 2006-12-04 13:27 ` Sergei Shtylyov 2006-12-04 13:27 ` Sergei Shtylyov 2006-12-04 14:22 ` What is the correct way to indicate an unassigned PCI resource ? Alan 2006-12-04 14:34 ` Sergei Shtylyov 2006-12-04 14:34 ` Sergei Shtylyov 2006-12-04 14:44 ` Alan 2006-12-04 15:40 ` Sergei Shtylyov 2006-12-04 15:40 ` Sergei Shtylyov 2006-12-04 15:55 ` Sergei Shtylyov 2006-12-04 15:55 ` Sergei Shtylyov 2006-12-04 20:53 ` Guennadi Liakhovetski 2006-12-04 20:53 ` Guennadi Liakhovetski 2006-12-05 4:43 ` Benjamin Herrenschmidt 2006-12-05 4:43 ` Benjamin Herrenschmidt 2006-12-05 4:41 ` Benjamin Herrenschmidt 2006-12-05 4:41 ` Benjamin Herrenschmidt 2006-12-05 8:15 ` Olaf Hering 2006-12-05 8:15 ` Olaf Hering 2006-12-05 20:19 ` Benjamin Herrenschmidt 2006-12-05 20:19 ` Benjamin Herrenschmidt 2006-12-05 21:26 ` Sergei Shtylyov 2006-12-05 21:26 ` Sergei Shtylyov 2007-01-04 17:49 ` Olaf Hering 2007-01-04 21:30 ` Benjamin Herrenschmidt 2007-01-05 10:26 ` Olaf Hering 2007-01-05 10:26 ` Olaf Hering 2007-01-05 12:05 ` Benjamin Herrenschmidt 2007-01-05 12:05 ` Benjamin Herrenschmidt 2006-12-05 10:51 ` Gabriel Paubert 2006-12-05 10:51 ` Gabriel Paubert 2006-12-05 12:38 ` Sergei Shtylyov 2006-12-05 12:38 ` Sergei Shtylyov 2006-12-05 17:37 ` Grant Grundler 2006-12-05 17:37 ` Grant Grundler 2006-12-05 19:22 ` Sergei Shtylyov 2006-12-05 19:22 ` Sergei Shtylyov 2006-12-04 12:56 ` [PATCH] mark PCI resource with start 0 as unassigned Olaf Hering 2006-12-04 13:05 ` Segher Boessenkool 2006-12-04 12:47 ` Sergei Shtylyov 2006-12-04 12:40 ` [PATCH] add delay around sl82c105_reset_engine calls Olaf Hering 2006-12-04 13:02 ` Alan 2006-12-04 13:12 ` Olaf Hering 2007-01-04 6:42 ` Olaf Hering 2007-01-04 10:53 ` Alan
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