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* [PATCH v5 00/31] Unified CPU type check
@ 2023-11-14 23:55 Gavin Shan
  2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
                   ` (32 more replies)
  0 siblings, 33 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:55 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

There are two places where the user specified CPU type is checked to see
if it's supported or allowed by the board: machine_run_board_init() and
mc->init(). We don't have to maintain two duplicate sets of logic. This
series intends to move the check to machine_run_board_init() so that we
have unified CPU type check.

PATCH[01-04] consolidate CPUClass::class_by_name() so that the returned
             CPU class is checked for once in cpu_class_by_name()
PATCH[05]    add generic helper cpu_model_from_type() to extract the CPU
             model name from the CPU type name
PATCH[06]    add generic cpu_list(), to be reused by most of the targets
PATCH[07-21] switch to generic cpu_list() for most of the targets
PATCH[22]    use generic helper cpu_model_from_type() for several targets
PATCH[23-31] validate the CPU type in machine_run_board_init() for the
             individual board

v1: https://lists.nongnu.org/archive/html/qemu-arm/2023-07/msg00302.html
v2: https://lists.nongnu.org/archive/html/qemu-arm/2023-07/msg00528.html
v3: https://lists.nongnu.org/archive/html/qemu-arm/2023-09/msg00157.html
v4: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00005.html

Testing
=======

With the following command lines, the output messages are varied before
and after the series is applied.

  ./build/qemu-system-aarch64            \
  -accel tcg -machine virt,gic-version=3 \
  -cpu cortex-a8 -smp maxcpus=2,cpus=1

Before the series is applied:

  qemu-system-aarch64: mach-virt: CPU type cortex-a8-arm-cpu not supported

After the series is applied:

  qemu-system-aarch64: Invalid CPU type: cortex-a8-arm-cpu
  The valid models are: cortex-a7, cortex-a15, cortex-a35, cortex-a55,
                        cortex-a72, cortex-a76, a64fx, neoverse-n1,
                        neoverse-v1, cortex-a53, cortex-a57, max

Changelog
=========
v5:
  * PATCH[v5 01] to remove CPU class 'ev67' for alpha            (Ricard/Igor)
  * PATCH[v5 02] to remove object_class_is_abstract() for hppa   (Gavin)
  * Don't move cpu_class_by_name()                               (Richard)
  * PATCH[v5 04] to remove 'oc == NULL' since the check has
    been covered in object_class_dynamic_cast()                  (Igor)
  * Introduce generic cpu_list(), shared by most of the targets  (Richard)
  * Use g_str_has_suffix and g_auto_free                         (Richard)
  * Collect r-bs from Igor and Richard                           (Gavin)
v4:
  * Integrate Philippe's patches where cpu_class_by_name()
    is consolidated and my duplicate code is dropped            (Philippe)
  * Simplified changelog and improvements                       (Thomas)
  * g_assert() on the return value from cpu_model_from_type()
    in is_cpu_type_supported()                                  (Philippe)
  * Collected r-bs from Philippe Mathieu-Daudé, Leif Lindholm,
    Bastian Koppelmann, Daniel Henrique Barboza, Cédric Le Goater,
    Gavin Shan                                                  (Gavin)
v3:
  * Generic helper cpu_model_from_type()                        (Igor)
  * Apply cpu_model_from_type() to the individual targets       (Igor)
  * Implement cpu_list() for the missed targets                 (Gavin)
  * Remove mc->valid_cpu_models                                 (Richard)
  * Separate patch to constify mc->validate_cpu_types           (Gavin)
v2:
  * Constify mc->valid_cpu_types                                (Richard)
  * Print the supported CPU models, instead of typenames        (Peter)
  * Misc improvements for the hleper to do the check            (Igor)
  * More patches to move the check                              (Marcin)

Gavin Shan (30):
  target/alpha: Remove 'ev67' CPU class
  target/hppa: Remove object_class_is_abstract()
  target: Remove 'oc == NULL' check
  cpu: Add helper cpu_model_from_type()
  cpu: Add generic cpu_list()
  target/alpha: Use generic cpu_list()
  target/arm: Use generic cpu_list()
  target/avr: Use generic cpu_list()
  target/cris: Use generic cpu_list()
  target/hexagon: Use generic cpu_list()
  target/hppa: Use generic cpu_list()
  target/loongarch: Use generic cpu_list()
  target/m68k: Use generic cpu_list()
  target/mips: Use generic cpu_list()
  target/openrisc: Use generic cpu_list()
  target/riscv: Use generic cpu_list()
  target/rx: Use generic cpu_list()
  target/sh4: Use generic cpu_list()
  target/tricore: Use generic cpu_list()
  target/xtensa: Use generic cpu_list()
  target: Use generic cpu_model_from_type()
  machine: Constify MachineClass::valid_cpu_types[i]
  machine: Use error handling when CPU type is checked
  machine: Introduce helper is_cpu_type_supported()
  machine: Print CPU model name instead of CPU type name
  hw/arm/virt: Hide host CPU model for tcg
  hw/arm/virt: Check CPU type in machine_run_board_init()
  hw/arm/sbsa-ref: Check CPU type in machine_run_board_init()
  hw/arm: Check CPU type in machine_run_board_init()
  hw/riscv/shakti_c: Check CPU type in machine_run_board_init()

Philippe Mathieu-Daudé (1):
  cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()

 bsd-user/main.c                       |  5 +-
 cpu-target.c                          | 44 ++++++++++++-
 hw/arm/bananapi_m2u.c                 | 12 ++--
 hw/arm/cubieboard.c                   | 12 ++--
 hw/arm/mps2-tz.c                      | 20 ++++--
 hw/arm/mps2.c                         | 25 +++++--
 hw/arm/msf2-som.c                     | 12 ++--
 hw/arm/musca.c                        | 13 ++--
 hw/arm/npcm7xx_boards.c               | 13 ++--
 hw/arm/orangepi.c                     | 12 ++--
 hw/arm/sbsa-ref.c                     | 21 +-----
 hw/arm/virt.c                         | 23 ++-----
 hw/core/cpu-common.c                  |  8 ++-
 hw/core/machine.c                     | 93 ++++++++++++++++-----------
 hw/m68k/q800.c                        |  2 +-
 hw/riscv/shakti_c.c                   | 11 ++--
 include/hw/boards.h                   |  2 +-
 include/hw/core/cpu.h                 | 12 ++++
 target/alpha/cpu.c                    | 26 +-------
 target/alpha/cpu.h                    |  3 -
 target/arm/arm-qmp-cmds.c             |  3 +-
 target/arm/cpu.c                      |  4 +-
 target/arm/cpu.h                      |  3 -
 target/arm/helper.c                   | 46 -------------
 target/avr/cpu.c                      | 23 +------
 target/avr/cpu.h                      |  2 -
 target/cris/cpu.c                     | 42 +-----------
 target/cris/cpu.h                     |  3 -
 target/hexagon/cpu.c                  | 24 +------
 target/hexagon/cpu.h                  |  3 -
 target/hppa/cpu.c                     | 32 +--------
 target/hppa/cpu.h                     |  3 -
 target/i386/cpu.c                     |  3 +-
 target/loongarch/cpu.c                | 23 +------
 target/loongarch/cpu.h                |  4 --
 target/loongarch/loongarch-qmp-cmds.c |  3 +-
 target/m68k/cpu.c                     |  4 +-
 target/m68k/cpu.h                     |  4 --
 target/m68k/helper.c                  | 40 ------------
 target/mips/cpu-defs.c.inc            |  9 ---
 target/mips/cpu.h                     |  4 --
 target/mips/sysemu/mips-qmp-cmds.c    |  3 +-
 target/openrisc/cpu.c                 | 46 +------------
 target/openrisc/cpu.h                 |  3 -
 target/ppc/cpu_init.c                 |  3 +-
 target/ppc/ppc-qmp-cmds.c             |  3 +-
 target/riscv/cpu.c                    | 36 +----------
 target/riscv/cpu.h                    |  2 -
 target/riscv/riscv-qmp-cmds.c         |  3 +-
 target/rx/cpu.c                       | 20 +-----
 target/rx/cpu.h                       |  3 -
 target/sh4/cpu.c                      | 17 -----
 target/sh4/cpu.h                      |  3 -
 target/tricore/cpu.c                  |  4 +-
 target/tricore/cpu.h                  |  4 --
 target/tricore/helper.c               | 22 -------
 target/xtensa/cpu.c                   |  4 +-
 target/xtensa/cpu.h                   | 10 +--
 target/xtensa/helper.c                | 19 +-----
 target/xtensa/overlay_tool.h          |  7 +-
 60 files changed, 229 insertions(+), 634 deletions(-)

-- 
2.41.0



^ permalink raw reply	[flat|nested] 102+ messages in thread

* [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
@ 2023-11-14 23:55 ` Gavin Shan
  2023-11-15  0:22   ` Richard Henderson
  2024-01-04 17:58   ` Philippe Mathieu-Daudé
  2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
                   ` (31 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:55 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

'ev67' CPU class will be returned to match everything, which makes
no sense as mentioned in the comments. Remove the logic to fall
back to 'ev67' CPU class to match everything.

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/alpha/cpu.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 39cf841b3e..91fe8ae095 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -141,11 +141,8 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
     typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-
-    /* TODO: remove match everything nonsense */
-    if (!oc || object_class_is_abstract(oc)) {
-        /* Default to ev67; no reason not to emulate insns by default. */
-        oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
+    if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
+        return NULL;
     }
 
     return oc;
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
  2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
@ 2023-11-14 23:55 ` Gavin Shan
  2023-11-15  0:26   ` Richard Henderson
                     ` (2 more replies)
  2023-11-14 23:56 ` [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Gavin Shan
                   ` (30 subsequent siblings)
  32 siblings, 3 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:55 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

No need to check if @oc is abstract because it has been covered
by cpu_class_by_name().

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/hppa/cpu.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 04de1689d7..fc4d2abad7 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -163,7 +163,6 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
     ObjectClass *oc = object_class_by_name(typename);
 
     if (oc &&
-        !object_class_is_abstract(oc) &&
         object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
         return oc;
     }
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
  2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
  2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:30   ` Richard Henderson
  2023-11-16 16:08   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 04/31] target: Remove 'oc == NULL' check Gavin Shan
                   ` (29 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

From: Philippe Mathieu-Daudé <philmd@linaro.org>

For all targets, the CPU class returned from CPUClass::class_by_name()
and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
compatible. Lets apply the check in cpu_class_by_name() for once,
instead of having the check in CPUClass::class_by_name() for individual
target.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
 hw/core/cpu-common.c   | 8 +++++---
 target/alpha/cpu.c     | 3 ---
 target/arm/cpu.c       | 4 +---
 target/avr/cpu.c       | 8 +-------
 target/cris/cpu.c      | 4 +---
 target/hexagon/cpu.c   | 4 +---
 target/hppa/cpu.c      | 7 +------
 target/loongarch/cpu.c | 8 +-------
 target/m68k/cpu.c      | 4 +---
 target/openrisc/cpu.c  | 4 +---
 target/riscv/cpu.c     | 4 +---
 target/tricore/cpu.c   | 4 +---
 target/xtensa/cpu.c    | 4 +---
 13 files changed, 16 insertions(+), 50 deletions(-)

diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c
index 82dae51a55..d0e7bbdf06 100644
--- a/hw/core/cpu-common.c
+++ b/hw/core/cpu-common.c
@@ -154,10 +154,12 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
     assert(cc->class_by_name);
     assert(cpu_model);
     oc = cc->class_by_name(cpu_model);
-    if (oc == NULL || object_class_is_abstract(oc)) {
-        return NULL;
+    if (object_class_dynamic_cast(oc, typename) &&
+        !object_class_is_abstract(oc)) {
+        return oc;
     }
-    return oc;
+
+    return NULL;
 }
 
 static void cpu_common_parse_features(const char *typename, char *features,
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 91fe8ae095..83345c5c7d 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -141,9 +141,6 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
     typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-    if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
-        return NULL;
-    }
 
     return oc;
 }
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 25e9d2ae7b..4af33b9ada 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2401,9 +2401,7 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
     oc = object_class_by_name(typename);
     g_strfreev(cpuname);
     g_free(typename);
-    if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU)) {
-        return NULL;
-    }
+
     return oc;
 }
 
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 44de1e18d1..a36cc48aae 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -154,13 +154,7 @@ static void avr_cpu_initfn(Object *obj)
 
 static ObjectClass *avr_cpu_class_by_name(const char *cpu_model)
 {
-    ObjectClass *oc;
-
-    oc = object_class_by_name(cpu_model);
-    if (object_class_dynamic_cast(oc, TYPE_AVR_CPU) == NULL) {
-        oc = NULL;
-    }
-    return oc;
+    return object_class_by_name(cpu_model);
 }
 
 static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags)
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 675b73ac04..a5083a0077 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -95,9 +95,7 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
     typename = g_strdup_printf(CRIS_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-    if (oc != NULL && !object_class_dynamic_cast(oc, TYPE_CRIS_CPU)) {
-        oc = NULL;
-    }
+
     return oc;
 }
 
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 9d1ffc3b4b..aa48f5fe89 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -63,9 +63,7 @@ static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
     oc = object_class_by_name(typename);
     g_strfreev(cpuname);
     g_free(typename);
-    if (!oc || !object_class_dynamic_cast(oc, TYPE_HEXAGON_CPU)) {
-        return NULL;
-    }
+
     return oc;
 }
 
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index fc4d2abad7..1a5fb6c65b 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -160,13 +160,8 @@ static void hppa_cpu_initfn(Object *obj)
 static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
 {
     g_autofree char *typename = g_strconcat(cpu_model, "-cpu", NULL);
-    ObjectClass *oc = object_class_by_name(typename);
 
-    if (oc &&
-        object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
-        return oc;
-    }
-    return NULL;
+    return object_class_by_name(typename);
 }
 
 static void hppa_cpu_list_entry(gpointer data, gpointer user_data)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index fc075952e6..6fdf5e60f5 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -716,15 +716,9 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)
         g_autofree char *typename
             = g_strdup_printf(LOONGARCH_CPU_TYPE_NAME("%s"), cpu_model);
         oc = object_class_by_name(typename);
-        if (!oc) {
-            return NULL;
-        }
     }
 
-    if (object_class_dynamic_cast(oc, TYPE_LOONGARCH_CPU)) {
-        return oc;
-    }
-    return NULL;
+    return oc;
 }
 
 void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 11c7e0a790..6cd5b56d6f 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -111,9 +111,7 @@ static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
     typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL) {
-        return NULL;
-    }
+
     return oc;
 }
 
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 1173260017..f7d53c592a 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -164,9 +164,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
     typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-    if (oc != NULL && !object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU)) {
-        return NULL;
-    }
+
     return oc;
 }
 
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 83c7c0cf07..523e9a16ea 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -646,9 +646,7 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
     oc = object_class_by_name(typename);
     g_strfreev(cpuname);
     g_free(typename);
-    if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU)) {
-        return NULL;
-    }
+
     return oc;
 }
 
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index 034e01c189..8acacdf0c0 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -132,9 +132,7 @@ static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
     typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-    if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU)) {
-        return NULL;
-    }
+
     return oc;
 }
 
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index e20fe87bf2..93e782a6e0 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -141,9 +141,7 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
     typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-    if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU)) {
-        return NULL;
-    }
+
     return oc;
 }
 
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 04/31] target: Remove 'oc == NULL' check
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (2 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:34   ` Richard Henderson
  2023-11-14 23:56 ` [PATCH v5 05/31] cpu: Add helper cpu_model_from_type() Gavin Shan
                   ` (28 subsequent siblings)
  32 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

No need to have 'oc == NULL' since object_class_dynamic_cast()
covers it. Besides, we don't expect an abstrat CPU class returned
from CPUClass::cpu_class_by_name() in the middle on alpha and rx.

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/alpha/cpu.c | 3 ++-
 target/rx/cpu.c    | 4 +++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 83345c5c7d..c19257d765 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -126,7 +126,8 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
     int i;
 
     oc = object_class_by_name(cpu_model);
-    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL) {
+    if (object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) &&
+        !object_class_is_abstract(oc)) {
         return oc;
     }
 
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 9cc9d9d15e..dd5561c8eb 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -111,9 +111,11 @@ static ObjectClass *rx_cpu_class_by_name(const char *cpu_model)
     char *typename;
 
     oc = object_class_by_name(cpu_model);
-    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_RX_CPU) != NULL) {
+    if (object_class_dynamic_cast(oc, TYPE_RX_CPU) &&
+        !object_class_is_abstract(oc)) {
         return oc;
     }
+
     typename = g_strdup_printf(RX_CPU_TYPE_NAME("%s"), cpu_model);
     oc = object_class_by_name(typename);
     g_free(typename);
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 05/31] cpu: Add helper cpu_model_from_type()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (3 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 04/31] target: Remove 'oc == NULL' check Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:35   ` Richard Henderson
  2023-11-16  7:45   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 06/31] cpu: Add generic cpu_list() Gavin Shan
                   ` (27 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Add helper cpu_model_from_type() to extract the CPU model name from
the CPU type name in two circumstances: (1) The CPU type name is the
combination of the CPU model name and suffix. (2) The CPU type name
is same to the CPU model name.

The helper will be used in the subsequent commits to conver the
CPU type name to the CPU model name.

Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 cpu-target.c          | 15 +++++++++++++++
 include/hw/core/cpu.h | 12 ++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/cpu-target.c b/cpu-target.c
index 508013e23d..c078c0e91b 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -241,6 +241,21 @@ void cpu_exec_initfn(CPUState *cpu)
 #endif
 }
 
+char *cpu_model_from_type(const char *typename)
+{
+    const char *suffix = "-" CPU_RESOLVING_TYPE;
+
+    if (!object_class_by_name(typename)) {
+        return NULL;
+    }
+
+    if (g_str_has_suffix(typename, suffix)) {
+        return g_strndup(typename, strlen(typename) - strlen(suffix));
+    }
+
+    return g_strdup(typename);
+}
+
 const char *parse_cpu_option(const char *cpu_option)
 {
     ObjectClass *oc;
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index c0c8320413..57ceb46bc1 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -779,6 +779,18 @@ void cpu_reset(CPUState *cpu);
  */
 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
 
+/**
+ * cpu_model_from_type:
+ * @typename: The CPU type name
+ *
+ * Extract the CPU model name from the CPU type name. The
+ * CPU type name is either the combination of the CPU model
+ * name and suffix, or same to the CPU model name.
+ *
+ * Returns: CPU model name or NULL if the CPU class doesn't exist
+ */
+char *cpu_model_from_type(const char *typename);
+
 /**
  * cpu_create:
  * @typename: The CPU type.
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (4 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 05/31] cpu: Add helper cpu_model_from_type() Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:37   ` Richard Henderson
  2023-11-16  7:39   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 07/31] target/alpha: Use " Gavin Shan
                   ` (26 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Add generic cpu_list() to replace the individual target's implementation
in the subsequent commits. Currently, there are 3 targets with no cpu_list()
implementation: microblaze and nios2. With this applied, those two targets
switch to the generic cpu_list().

[gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
Available CPUs:
  microblaze-cpu

[gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
Available CPUs:
  nios2-cpu

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 bsd-user/main.c |  5 +----
 cpu-target.c    | 29 ++++++++++++++++++++++++++---
 2 files changed, 27 insertions(+), 7 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index e6014f517e..4de226d211 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -378,10 +378,7 @@ int main(int argc, char **argv)
         } else if (!strcmp(r, "cpu")) {
             cpu_model = argv[optind++];
             if (is_help_option(cpu_model)) {
-                /* XXX: implement xxx_cpu_list for targets that still miss it */
-#if defined(cpu_list)
-                cpu_list();
-#endif
+                list_cpus();
                 exit(1);
             }
         } else if (!strcmp(r, "B")) {
diff --git a/cpu-target.c b/cpu-target.c
index c078c0e91b..acfc654b95 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -24,6 +24,7 @@
 #include "hw/qdev-core.h"
 #include "hw/qdev-properties.h"
 #include "qemu/error-report.h"
+#include "qemu/qemu-print.h"
 #include "migration/vmstate.h"
 #ifdef CONFIG_USER_ONLY
 #include "qemu.h"
@@ -283,12 +284,34 @@ const char *parse_cpu_option(const char *cpu_option)
     return cpu_type;
 }
 
+#ifndef cpu_list
+static void cpu_list_entry(gpointer data, gpointer user_data)
+{
+    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
+    const char *typename = object_class_get_name(OBJECT_CLASS(data));
+    g_autofree char *model = cpu_model_from_type(typename);
+
+    if (cc->deprecation_note) {
+        qemu_printf("  %s (deprecated)\n", model);
+    } else {
+        qemu_printf("  %s\n", model);
+    }
+}
+
+static void cpu_list(void)
+{
+    GSList *list;
+
+    list = object_class_get_list_sorted(TYPE_CPU, false);
+    qemu_printf("Available CPUs:\n");
+    g_slist_foreach(list, cpu_list_entry, NULL);
+    g_slist_free(list);
+}
+#endif
+
 void list_cpus(void)
 {
-    /* XXX: implement xxx_cpu_list for targets that still miss it */
-#if defined(cpu_list)
     cpu_list();
-#endif
 }
 
 #if defined(CONFIG_USER_ONLY)
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 07/31] target/alpha: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (5 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 06/31] cpu: Add generic cpu_list() Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:38   ` Richard Henderson
  2023-11-16  7:47   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 08/31] target/arm: " Gavin Shan
                   ` (25 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Available CPUs:
  ev4-alpha-cpu
  ev5-alpha-cpu
  ev56-alpha-cpu
  ev6-alpha-cpu
  ev67-alpha-cpu
  ev68-alpha-cpu
  pca56-alpha-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
Available CPUs:
  ev4
  ev5
  ev56
  ev6
  ev67
  ev68
  pca56

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/alpha/cpu.c | 17 -----------------
 target/alpha/cpu.h |  3 ---
 2 files changed, 20 deletions(-)

diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index c19257d765..cece69bfa6 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -87,23 +87,6 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error **errp)
     acc->parent_realize(dev, errp);
 }
 
-static void alpha_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-
-    qemu_printf("  %s\n", object_class_get_name(oc));
-}
-
-void alpha_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list_sorted(TYPE_ALPHA_CPU, false);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, alpha_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 /* Models */
 typedef struct AlphaCPUAlias {
     const char *alias;
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index d672e911dd..ce806587ca 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -292,8 +292,6 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
 int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 
-#define cpu_list alpha_cpu_list
-
 #include "exec/cpu-all.h"
 
 enum {
@@ -441,7 +439,6 @@ void alpha_translate_init(void);
 
 #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
 
-void alpha_cpu_list(void);
 G_NORETURN void dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
 G_NORETURN void arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
 
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 08/31] target/arm: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (6 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 07/31] target/alpha: Use " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:41   ` Richard Henderson
  2023-11-16  7:51   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 09/31] target/avr: " Gavin Shan
                   ` (24 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

No changes of the output from the following command before and
after it's applied.

[gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ?
Available CPUs:
  a64fx
  arm1026
  arm1136
  arm1136-r2
  arm1176
  arm11mpcore
  arm926
  arm946
  cortex-a15
  cortex-a35
  cortex-a53
  cortex-a55
  cortex-a57
  cortex-a7
  cortex-a710
  cortex-a72
  cortex-a76
  cortex-a8
  cortex-a9
  cortex-m0
  cortex-m3
  cortex-m33
  cortex-m4
  cortex-m55
  cortex-m7
  cortex-r5
  cortex-r52
  cortex-r5f
  max
  neoverse-n1
  neoverse-n2
  neoverse-v1
  pxa250
  pxa255
  pxa260
  pxa261
  pxa262
  pxa270-a0
  pxa270-a1
  pxa270
  pxa270-b0
  pxa270-b1
  pxa270-c0
  pxa270-c5
  sa1100
  sa1110
  ti925t

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/arm/cpu.h    |  3 ---
 target/arm/helper.c | 46 ---------------------------------------------
 2 files changed, 49 deletions(-)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a0282e0d28..8c3ca2e231 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2737,7 +2737,6 @@ static inline bool access_secure_reg(CPUARMState *env)
                        (arm_is_secure(_env) && !arm_el_is_aa64((_env), 3)), \
                        (_val))
 
-void arm_cpu_list(void);
 uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
                                  uint32_t cur_el, bool secure);
 
@@ -2840,8 +2839,6 @@ bool write_cpustate_to_list(ARMCPU *cpu, bool kvm_sync);
 
 #define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU
 
-#define cpu_list arm_cpu_list
-
 /* ARM has the following "translation regimes" (as the ARM ARM calls them):
  *
  * If EL3 is 64-bit:
diff --git a/target/arm/helper.c b/target/arm/helper.c
index ff1970981e..c9a8baefc6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9421,52 +9421,6 @@ void register_cp_regs_for_features(ARMCPU *cpu)
 #endif
 }
 
-/* Sort alphabetically by type name, except for "any". */
-static gint arm_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
-    ObjectClass *class_a = (ObjectClass *)a;
-    ObjectClass *class_b = (ObjectClass *)b;
-    const char *name_a, *name_b;
-
-    name_a = object_class_get_name(class_a);
-    name_b = object_class_get_name(class_b);
-    if (strcmp(name_a, "any-" TYPE_ARM_CPU) == 0) {
-        return 1;
-    } else if (strcmp(name_b, "any-" TYPE_ARM_CPU) == 0) {
-        return -1;
-    } else {
-        return strcmp(name_a, name_b);
-    }
-}
-
-static void arm_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-    CPUClass *cc = CPU_CLASS(oc);
-    const char *typename;
-    char *name;
-
-    typename = object_class_get_name(oc);
-    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU));
-    if (cc->deprecation_note) {
-        qemu_printf("  %s (deprecated)\n", name);
-    } else {
-        qemu_printf("  %s\n", name);
-    }
-    g_free(name);
-}
-
-void arm_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list(TYPE_ARM_CPU, false);
-    list = g_slist_sort(list, arm_cpu_list_compare);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, arm_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 /*
  * Private utility function for define_one_arm_cp_reg_with_opaque():
  * add a single reginfo struct to the hash table.
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 09/31] target/avr: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (7 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 08/31] target/arm: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:42   ` Richard Henderson
  2023-11-16  7:51   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 10/31] target/cris: " Gavin Shan
                   ` (23 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
avr5-avr-cpu
avr51-avr-cpu
avr6-avr-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
Available CPUs:
  avr5
  avr51
  avr6

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/avr/cpu.c | 15 ---------------
 target/avr/cpu.h |  2 --
 2 files changed, 17 deletions(-)

diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index a36cc48aae..76fc4cdaf2 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -354,21 +354,6 @@ typedef struct AVRCPUInfo {
 } AVRCPUInfo;
 
 
-static void avr_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    const char *typename = object_class_get_name(OBJECT_CLASS(data));
-
-    qemu_printf("%s\n", typename);
-}
-
-void avr_cpu_list(void)
-{
-    GSList *list;
-    list = object_class_get_list_sorted(TYPE_AVR_CPU, false);
-    g_slist_foreach(list, avr_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 #define DEFINE_AVR_CPU_TYPE(model, initfn) \
     { \
         .parent = TYPE_AVR_CPU, \
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 8a17862737..02750a7ccd 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -181,7 +181,6 @@ static inline void set_avr_feature(CPUAVRState *env, int feature)
     env->features |= (1U << feature);
 }
 
-#define cpu_list avr_cpu_list
 #define cpu_mmu_index avr_cpu_mmu_index
 
 static inline int avr_cpu_mmu_index(CPUAVRState *env, bool ifetch)
@@ -191,7 +190,6 @@ static inline int avr_cpu_mmu_index(CPUAVRState *env, bool ifetch)
 
 void avr_cpu_tcg_init(void);
 
-void avr_cpu_list(void);
 int cpu_avr_exec(CPUState *cpu);
 
 enum {
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 10/31] target/cris: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (8 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 09/31] target/avr: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:44   ` Richard Henderson
  2023-11-16  7:52   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 11/31] target/hexagon: " Gavin Shan
                   ` (22 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
  crisv8
  crisv9
  crisv10
  crisv11
  crisv17
  crisv32

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
Available CPUs:
  crisv10
  crisv11
  crisv17
  crisv32
  crisv8
  crisv9

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/cris/cpu.c | 38 --------------------------------------
 target/cris/cpu.h |  3 ---
 2 files changed, 41 deletions(-)

diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index a5083a0077..9ba08e8b0c 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -99,44 +99,6 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model)
     return oc;
 }
 
-/* Sort alphabetically by VR. */
-static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
-    CRISCPUClass *ccc_a = CRIS_CPU_CLASS(a);
-    CRISCPUClass *ccc_b = CRIS_CPU_CLASS(b);
-
-    /*  */
-    if (ccc_a->vr > ccc_b->vr) {
-        return 1;
-    } else if (ccc_a->vr < ccc_b->vr) {
-        return -1;
-    } else {
-        return 0;
-    }
-}
-
-static void cris_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-    const char *typename = object_class_get_name(oc);
-    char *name;
-
-    name = g_strndup(typename, strlen(typename) - strlen(CRIS_CPU_TYPE_SUFFIX));
-    qemu_printf("  %s\n", name);
-    g_free(name);
-}
-
-void cris_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list(TYPE_CRIS_CPU, false);
-    list = g_slist_sort(list, cris_cpu_list_compare);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, cris_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 static void cris_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 1be7f90319..d830dcac5b 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -287,7 +287,4 @@ static inline void cpu_get_tb_cpu_state(CPUCRISState *env, vaddr *pc,
 				     | X_FLAG | PFIX_FLAG));
 }
 
-#define cpu_list cris_cpu_list
-void cris_cpu_list(void);
-
 #endif
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 11/31] target/hexagon: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (9 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 10/31] target/cris: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:46   ` Richard Henderson
  2023-11-16  7:52   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 12/31] target/hppa: " Gavin Shan
                   ` (21 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

No changes in the output from the following command.

[gshan@gshan q]$ ./build/qemu-hexagon -cpu ?
Available CPUs:
  v67
  v68
  v69
  v71
  v73

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/hexagon/cpu.c | 20 --------------------
 target/hexagon/cpu.h |  3 ---
 2 files changed, 23 deletions(-)

diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index aa48f5fe89..c0cd739e15 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -32,26 +32,6 @@ static void hexagon_v69_cpu_init(Object *obj) { }
 static void hexagon_v71_cpu_init(Object *obj) { }
 static void hexagon_v73_cpu_init(Object *obj) { }
 
-static void hexagon_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-    char *name = g_strdup(object_class_get_name(oc));
-    if (g_str_has_suffix(name, HEXAGON_CPU_TYPE_SUFFIX)) {
-        name[strlen(name) - strlen(HEXAGON_CPU_TYPE_SUFFIX)] = '\0';
-    }
-    qemu_printf("  %s\n", name);
-    g_free(name);
-}
-
-void hexagon_cpu_list(void)
-{
-    GSList *list;
-    list = object_class_get_list_sorted(TYPE_HEXAGON_CPU, false);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, hexagon_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index 7d16083c6a..5c11ae3445 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -37,9 +37,6 @@
 
 #define CPU_RESOLVING_TYPE TYPE_HEXAGON_CPU
 
-void hexagon_cpu_list(void);
-#define cpu_list hexagon_cpu_list
-
 #define MMU_USER_IDX 0
 
 typedef struct {
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 12/31] target/hppa: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (10 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 11/31] target/hexagon: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:57   ` Richard Henderson
  2023-11-16  7:52   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 13/31] target/loongarch: " Gavin Shan
                   ` (20 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

No changes in the output from the following command.

[gshan@gshan q]$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
  hppa
  hppa64

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/hppa/cpu.c | 24 ------------------------
 target/hppa/cpu.h |  3 ---
 2 files changed, 27 deletions(-)

diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 1a5fb6c65b..e1f252cc45 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -164,30 +164,6 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
     return object_class_by_name(typename);
 }
 
-static void hppa_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-    CPUClass *cc = CPU_CLASS(oc);
-    const char *tname = object_class_get_name(oc);
-    g_autofree char *name = g_strndup(tname, strchr(tname, '-') - tname);
-
-    if (cc->deprecation_note) {
-        qemu_printf("  %s (deprecated)\n", name);
-    } else {
-        qemu_printf("  %s\n", name);
-    }
-}
-
-void hppa_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list_sorted(TYPE_HPPA_CPU, false);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, hppa_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 #ifndef CONFIG_USER_ONLY
 #include "hw/core/sysemu-cpu-ops.h"
 
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index bcfed04f7c..5d3fcdc927 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -402,7 +402,4 @@ G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra);
 
 #define CPU_RESOLVING_TYPE TYPE_HPPA_CPU
 
-#define cpu_list hppa_cpu_list
-void hppa_cpu_list(void);
-
 #endif /* HPPA_CPU_H */
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 13/31] target/loongarch: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (11 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 12/31] target/hppa: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  0:59   ` Richard Henderson
  2023-11-16 10:27   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 14/31] target/m68k: " Gavin Shan
                   ` (19 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
la132-loongarch-cpu
la464-loongarch-cpu
max-loongarch-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
Available CPUs:
  la132
  la464
  max

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/loongarch/cpu.c | 15 ---------------
 target/loongarch/cpu.h |  4 ----
 2 files changed, 19 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 6fdf5e60f5..a69ab595fb 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -481,21 +481,6 @@ static void loongarch_max_initfn(Object *obj)
     loongarch_la464_initfn(obj);
 }
 
-static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    const char *typename = object_class_get_name(OBJECT_CLASS(data));
-
-    qemu_printf("%s\n", typename);
-}
-
-void loongarch_cpu_list(void)
-{
-    GSList *list;
-    list = object_class_get_list_sorted(TYPE_LOONGARCH_CPU, false);
-    g_slist_foreach(list, loongarch_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 static void loongarch_cpu_reset_hold(Object *obj)
 {
     CPUState *cs = CPU(obj);
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 00d1fba597..0c15a174e4 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -466,10 +466,6 @@ static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
     *flags |= is_va32(env) * HW_FLAGS_VA32;
 }
 
-void loongarch_cpu_list(void);
-
-#define cpu_list loongarch_cpu_list
-
 #include "exec/cpu-all.h"
 
 #define CPU_RESOLVING_TYPE TYPE_LOONGARCH_CPU
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 14/31] target/m68k: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (12 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 13/31] target/loongarch: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:01   ` Richard Henderson
  2023-11-16 10:27   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 15/31] target/mips: " Gavin Shan
                   ` (18 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
cfv4e
m5206
m5208
m68000
m68010
m68020
m68030
m68040
m68060
any

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
Available CPUs:
  any
  cfv4e
  m5206
  m5208
  m68000
  m68010
  m68020
  m68030
  m68040
  m68060

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/m68k/cpu.h    |  4 ----
 target/m68k/helper.c | 40 ----------------------------------------
 2 files changed, 44 deletions(-)

diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
index 6cfc696d2b..d13427b0fe 100644
--- a/target/m68k/cpu.h
+++ b/target/m68k/cpu.h
@@ -556,8 +556,6 @@ static inline bool m68k_feature(CPUM68KState *env, int feature)
     return (env->features & BIT_ULL(feature)) != 0;
 }
 
-void m68k_cpu_list(void);
-
 void register_m68k_insns (CPUM68KState *env);
 
 enum {
@@ -576,8 +574,6 @@ enum {
 
 #define CPU_RESOLVING_TYPE TYPE_M68K_CPU
 
-#define cpu_list m68k_cpu_list
-
 /* MMU modes definitions */
 #define MMU_KERNEL_IDX 0
 #define MMU_USER_IDX 1
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 0a1544cd68..14508dfa11 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -29,46 +29,6 @@
 
 #define SIGNBIT (1u << 31)
 
-/* Sort alphabetically, except for "any". */
-static gint m68k_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
-    ObjectClass *class_a = (ObjectClass *)a;
-    ObjectClass *class_b = (ObjectClass *)b;
-    const char *name_a, *name_b;
-
-    name_a = object_class_get_name(class_a);
-    name_b = object_class_get_name(class_b);
-    if (strcmp(name_a, "any-" TYPE_M68K_CPU) == 0) {
-        return 1;
-    } else if (strcmp(name_b, "any-" TYPE_M68K_CPU) == 0) {
-        return -1;
-    } else {
-        return strcasecmp(name_a, name_b);
-    }
-}
-
-static void m68k_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *c = data;
-    const char *typename;
-    char *name;
-
-    typename = object_class_get_name(c);
-    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_M68K_CPU));
-    qemu_printf("%s\n", name);
-    g_free(name);
-}
-
-void m68k_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list(TYPE_M68K_CPU, false);
-    list = g_slist_sort(list, m68k_cpu_list_compare);
-    g_slist_foreach(list, m68k_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n)
 {
     if (n < 8) {
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 15/31] target/mips: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (13 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 14/31] target/m68k: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:02   ` Richard Henderson
  2023-11-16  7:53   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 16/31] target/openrisc: " Gavin Shan
                   ` (17 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
MIPS '4Kc'
MIPS '4Km'
MIPS '4KEcR1'
MIPS 'XBurstR1'
MIPS '4KEmR1'
MIPS '4KEc'
MIPS '4KEm'
MIPS '24Kc'
MIPS '24KEc'
MIPS '24Kf'
MIPS '34Kf'
MIPS '74Kf'
MIPS 'XBurstR2'
MIPS 'M14K'
MIPS 'M14Kc'
MIPS 'P5600'
MIPS 'mips32r6-generic'
MIPS 'I7200'
MIPS 'R4000'
MIPS 'VR5432'
MIPS '5Kc'
MIPS '5Kf'
MIPS '20Kc'
MIPS 'MIPS64R2-generic'
MIPS '5KEc'
MIPS '5KEf'
MIPS 'I6400'
MIPS 'I6500'
MIPS 'Loongson-2E'
MIPS 'Loongson-2F'
MIPS 'Loongson-3A1000'
MIPS 'Loongson-3A4000'
MIPS 'mips64dspr2'
MIPS 'Octeon68XX'

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
Available CPUs:
  20Kc
  24Kc
  24KEc
  24Kf
  34Kf
  4Kc
  4KEc
  4KEcR1
  4KEm
  4KEmR1
  4Km
  5Kc
  5KEc
  5KEf
  5Kf
  74Kf
  I6400
  I6500
  I7200
  Loongson-2E
  Loongson-2F
  Loongson-3A1000
  Loongson-3A4000
  M14K
  M14Kc
  mips32r6-generic
  mips64dspr2
  MIPS64R2-generic
  Octeon68XX
  P5600
  R4000
  VR5432
  XBurstR1
  XBurstR2

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/mips/cpu-defs.c.inc | 9 ---------
 target/mips/cpu.h          | 4 ----
 2 files changed, 13 deletions(-)

diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc
index c0c389c59a..fbf787d8ce 100644
--- a/target/mips/cpu-defs.c.inc
+++ b/target/mips/cpu-defs.c.inc
@@ -1018,15 +1018,6 @@ const mips_def_t mips_defs[] =
 };
 const int mips_defs_number = ARRAY_SIZE(mips_defs);
 
-void mips_cpu_list(void)
-{
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(mips_defs); i++) {
-        qemu_printf("MIPS '%s'\n", mips_defs[i].name);
-    }
-}
-
 static void fpu_init (CPUMIPSState *env, const mips_def_t *def)
 {
     int i;
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 52f13f0363..1163a71f3c 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1235,10 +1235,6 @@ struct MIPSCPUClass {
     bool no_data_aborts;
 };
 
-void mips_cpu_list(void);
-
-#define cpu_list mips_cpu_list
-
 void cpu_wrdsp(uint32_t rs, uint32_t mask_num, CPUMIPSState *env);
 uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState *env);
 
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 16/31] target/openrisc: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (14 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 15/31] target/mips: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:04   ` Richard Henderson
  2023-11-16 10:28   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 17/31] target/riscv: " Gavin Shan
                   ` (16 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-or1k -cpu ?
Available CPUs:
  or1200
  any

After it's applied:

[gshan@gshan q]$ ./build/qemu-or1k -cpu ?
Available CPUs:
  any
  or1200

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/openrisc/cpu.c | 42 ------------------------------------------
 target/openrisc/cpu.h |  3 ---
 2 files changed, 45 deletions(-)

diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index f7d53c592a..381ebe00d3 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -253,48 +253,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
     cc->tcg_ops = &openrisc_tcg_ops;
 }
 
-/* Sort alphabetically by type name, except for "any". */
-static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
-    ObjectClass *class_a = (ObjectClass *)a;
-    ObjectClass *class_b = (ObjectClass *)b;
-    const char *name_a, *name_b;
-
-    name_a = object_class_get_name(class_a);
-    name_b = object_class_get_name(class_b);
-    if (strcmp(name_a, "any-" TYPE_OPENRISC_CPU) == 0) {
-        return 1;
-    } else if (strcmp(name_b, "any-" TYPE_OPENRISC_CPU) == 0) {
-        return -1;
-    } else {
-        return strcmp(name_a, name_b);
-    }
-}
-
-static void openrisc_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-    const char *typename;
-    char *name;
-
-    typename = object_class_get_name(oc);
-    name = g_strndup(typename,
-                     strlen(typename) - strlen("-" TYPE_OPENRISC_CPU));
-    qemu_printf("  %s\n", name);
-    g_free(name);
-}
-
-void cpu_openrisc_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list(TYPE_OPENRISC_CPU, false);
-    list = g_slist_sort(list, openrisc_cpu_list_compare);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, openrisc_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 #define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \
     {                                               \
         .parent = TYPE_OPENRISC_CPU,                \
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index dedeb89f8e..b454014ddd 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -299,15 +299,12 @@ struct ArchCPU {
     CPUOpenRISCState env;
 };
 
-void cpu_openrisc_list(void);
 void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 void openrisc_translate_init(void);
 int print_insn_or1k(bfd_vma addr, disassemble_info *info);
 
-#define cpu_list cpu_openrisc_list
-
 #ifndef CONFIG_USER_ONLY
 hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 17/31] target/riscv: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (15 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 16/31] target/openrisc: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:05   ` Richard Henderson
  2023-11-16 10:28   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 18/31] target/rx: " Gavin Shan
                   ` (15 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
any
max
rv64
shakti-c
sifive-e51
sifive-u54
thead-c906
veyron-v1
x-rv128

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
Available CPUs:
  any
  max
  rv64
  shakti-c
  sifive-e51
  sifive-u54
  thead-c906
  veyron-v1
  x-rv128

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/riscv/cpu.c | 29 -----------------------------
 target/riscv/cpu.h |  2 --
 2 files changed, 31 deletions(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 523e9a16ea..22d7422c89 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1733,35 +1733,6 @@ char *riscv_isa_string(RISCVCPU *cpu)
     return isa_str;
 }
 
-static gint riscv_cpu_list_compare(gconstpointer a, gconstpointer b)
-{
-    ObjectClass *class_a = (ObjectClass *)a;
-    ObjectClass *class_b = (ObjectClass *)b;
-    const char *name_a, *name_b;
-
-    name_a = object_class_get_name(class_a);
-    name_b = object_class_get_name(class_b);
-    return strcmp(name_a, name_b);
-}
-
-static void riscv_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    const char *typename = object_class_get_name(OBJECT_CLASS(data));
-    int len = strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX);
-
-    qemu_printf("%.*s\n", len, typename);
-}
-
-void riscv_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list(TYPE_RISCV_CPU, false);
-    list = g_slist_sort(list, riscv_cpu_list_compare);
-    g_slist_foreach(list, riscv_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 #define DEFINE_CPU(type_name, initfn)      \
     {                                      \
         .name = type_name,                 \
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index bf58b0f0b5..965a44c853 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -490,9 +490,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                         MMUAccessType access_type, int mmu_idx,
                         bool probe, uintptr_t retaddr);
 char *riscv_isa_string(RISCVCPU *cpu);
-void riscv_cpu_list(void);
 
-#define cpu_list riscv_cpu_list
 #define cpu_mmu_index riscv_cpu_mmu_index
 
 #ifndef CONFIG_USER_ONLY
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 18/31] target/rx: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (16 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 17/31] target/riscv: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:07   ` Richard Henderson
  2023-11-16  7:54   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 19/31] target/sh4: " Gavin Shan
                   ` (14 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
  rx62n-rx-cpu

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
  rx62n

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/rx/cpu.c | 16 ----------------
 target/rx/cpu.h |  3 ---
 2 files changed, 19 deletions(-)

diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index dd5561c8eb..f984e888f6 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -89,22 +89,6 @@ static void rx_cpu_reset_hold(Object *obj)
     set_flush_inputs_to_zero(1, &env->fp_status);
 }
 
-static void rx_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-
-    qemu_printf("  %s\n", object_class_get_name(oc));
-}
-
-void rx_cpu_list(void)
-{
-    GSList *list;
-    list = object_class_get_list_sorted(TYPE_RX_CPU, false);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, rx_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 static ObjectClass *rx_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
diff --git a/target/rx/cpu.h b/target/rx/cpu.h
index e931e77e85..65f9cd2d0a 100644
--- a/target/rx/cpu.h
+++ b/target/rx/cpu.h
@@ -139,11 +139,8 @@ int rx_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int rx_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 
 void rx_translate_init(void);
-void rx_cpu_list(void);
 void rx_cpu_unpack_psw(CPURXState *env, uint32_t psw, int rte);
 
-#define cpu_list rx_cpu_list
-
 #include "exec/cpu-all.h"
 
 #define CPU_INTERRUPT_SOFT CPU_INTERRUPT_TGT_INT_0
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 19/31] target/sh4: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (17 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 18/31] target/rx: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:08   ` Richard Henderson
  2023-11-16  7:55   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 20/31] target/tricore: " Gavin Shan
                   ` (13 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
sh7750r
sh7751r
sh7785

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
Available CPUs:
  sh7750r
  sh7751r
  sh7785

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/sh4/cpu.c | 17 -----------------
 target/sh4/cpu.h |  3 ---
 2 files changed, 20 deletions(-)

diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index a8ec98b134..806a0ef875 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -122,23 +122,6 @@ static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
     info->print_insn = print_insn_sh;
 }
 
-static void superh_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    const char *typename = object_class_get_name(OBJECT_CLASS(data));
-    int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX);
-
-    qemu_printf("%.*s\n", len, typename);
-}
-
-void sh4_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false);
-    g_slist_foreach(list, superh_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 static ObjectClass *superh_cpu_class_by_name(const char *cpu_model)
 {
     ObjectClass *oc;
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 360eac1fbe..e6fc6b87d4 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -238,7 +238,6 @@ G_NORETURN void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
                                                uintptr_t retaddr);
 
 void sh4_translate_init(void);
-void sh4_cpu_list(void);
 
 #if !defined(CONFIG_USER_ONLY)
 hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
@@ -272,8 +271,6 @@ void cpu_load_tlb(CPUSH4State * env);
 
 #define CPU_RESOLVING_TYPE TYPE_SUPERH_CPU
 
-#define cpu_list sh4_cpu_list
-
 /* MMU modes definitions */
 #define MMU_USER_IDX 1
 static inline int cpu_mmu_index (CPUSH4State *env, bool ifetch)
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 20/31] target/tricore: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (18 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 19/31] target/sh4: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:09   ` Richard Henderson
  2023-11-16  7:55   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 21/31] target/xtensa: " Gavin Shan
                   ` (12 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

No changes in the output from the following command.

[gshan@gshan q]$ ./build/qemu-system-tricore -cpu ?
Available CPUs:
  tc1796
  tc1797
  tc27x
  tc37x

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/tricore/cpu.h    |  4 ----
 target/tricore/helper.c | 22 ----------------------
 2 files changed, 26 deletions(-)

diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h
index de3ab53a83..2d4446cea5 100644
--- a/target/tricore/cpu.h
+++ b/target/tricore/cpu.h
@@ -246,10 +246,6 @@ void fpu_set_state(CPUTriCoreState *env);
 
 #define MMU_USER_IDX 2
 
-void tricore_cpu_list(void);
-
-#define cpu_list tricore_cpu_list
-
 static inline int cpu_mmu_index(CPUTriCoreState *env, bool ifetch)
 {
     return 0;
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
index 7e5da3cb23..174f666e1e 100644
--- a/target/tricore/helper.c
+++ b/target/tricore/helper.c
@@ -96,28 +96,6 @@ bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     }
 }
 
-static void tricore_cpu_list_entry(gpointer data, gpointer user_data)
-{
-    ObjectClass *oc = data;
-    const char *typename;
-    char *name;
-
-    typename = object_class_get_name(oc);
-    name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_TRICORE_CPU));
-    qemu_printf("  %s\n", name);
-    g_free(name);
-}
-
-void tricore_cpu_list(void)
-{
-    GSList *list;
-
-    list = object_class_get_list_sorted(TYPE_TRICORE_CPU, false);
-    qemu_printf("Available CPUs:\n");
-    g_slist_foreach(list, tricore_cpu_list_entry, NULL);
-    g_slist_free(list);
-}
-
 void fpu_set_state(CPUTriCoreState *env)
 {
     switch (extract32(env->PSW, 24, 2)) {
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 21/31] target/xtensa: Use generic cpu_list()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (19 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 20/31] target/tricore: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:12   ` Richard Henderson
  2023-11-14 23:56 ` [PATCH v5 22/31] target: Use generic cpu_model_from_type() Gavin Shan
                   ` (11 subsequent siblings)
  32 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Before it's applied:

[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
  test_mmuhifi_c3
  sample_controller
  lx106
  dsp3400
  de233_fpu
  de212
  dc233c
  dc232b

After it's applied:

[gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
Available CPUs:
  dc232b
  dc233c
  de212
  de233_fpu
  dsp3400
  lx106
  sample_controller
  test_mmuhifi_c3

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/xtensa/cpu.h          | 10 +---------
 target/xtensa/helper.c       | 19 +++----------------
 target/xtensa/overlay_tool.h |  7 ++-----
 3 files changed, 6 insertions(+), 30 deletions(-)

diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index dd81729306..ffeb1ca43f 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -491,11 +491,6 @@ typedef struct XtensaConfig {
     bool use_first_nan;
 } XtensaConfig;
 
-typedef struct XtensaConfigList {
-    const XtensaConfig *config;
-    struct XtensaConfigList *next;
-} XtensaConfigList;
-
 #if HOST_BIG_ENDIAN
 enum {
     FP_F32_HIGH,
@@ -600,8 +595,6 @@ G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
                                                MMUAccessType access_type, int mmu_idx,
                                                uintptr_t retaddr);
 
-#define cpu_list xtensa_cpu_list
-
 #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
 
 #if TARGET_BIG_ENDIAN
@@ -620,13 +613,12 @@ void xtensa_collect_sr_names(const XtensaConfig *config);
 void xtensa_translate_init(void);
 void **xtensa_get_regfile_by_name(const char *name, int entries, int bits);
 void xtensa_breakpoint_handler(CPUState *cs);
-void xtensa_register_core(XtensaConfigList *node);
+void xtensa_register_core(XtensaConfig *config);
 void xtensa_sim_open_console(Chardev *chr);
 void check_interrupts(CPUXtensaState *s);
 void xtensa_irq_init(CPUXtensaState *env);
 qemu_irq *xtensa_get_extints(CPUXtensaState *env);
 qemu_irq xtensa_get_runstall(CPUXtensaState *env);
-void xtensa_cpu_list(void);
 void xtensa_sync_window_from_phys(CPUXtensaState *env);
 void xtensa_sync_phys_from_window(CPUXtensaState *env);
 void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index dbeb97a953..3654739b09 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -35,8 +35,6 @@
 #include "qemu/qemu-print.h"
 #include "qemu/host-utils.h"
 
-static struct XtensaConfigList *xtensa_cores;
-
 static void add_translator_to_hash(GHashTable *translator,
                                    const char *name,
                                    const XtensaOpcodeOps *opcode)
@@ -187,17 +185,15 @@ static void xtensa_core_class_init(ObjectClass *oc, void *data)
     cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
 }
 
-void xtensa_register_core(XtensaConfigList *node)
+void xtensa_register_core(XtensaConfig *config)
 {
     TypeInfo type = {
         .parent = TYPE_XTENSA_CPU,
         .class_init = xtensa_core_class_init,
-        .class_data = (void *)node->config,
+        .class_data = (void *)config,
     };
 
-    node->next = xtensa_cores;
-    xtensa_cores = node;
-    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), node->config->name);
+    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), config->name);
     type_register(&type);
     g_free((gpointer)type.name);
 }
@@ -234,15 +230,6 @@ void xtensa_breakpoint_handler(CPUState *cs)
     }
 }
 
-void xtensa_cpu_list(void)
-{
-    XtensaConfigList *core = xtensa_cores;
-    qemu_printf("Available CPUs:\n");
-    for (; core; core = core->next) {
-        qemu_printf("  %s\n", core->config->name);
-    }
-}
-
 #ifndef CONFIG_USER_ONLY
 void xtensa_cpu_do_unaligned_access(CPUState *cs,
                                     vaddr addr, MMUAccessType access_type,
diff --git a/target/xtensa/overlay_tool.h b/target/xtensa/overlay_tool.h
index 701c00eed2..7373ba7592 100644
--- a/target/xtensa/overlay_tool.h
+++ b/target/xtensa/overlay_tool.h
@@ -450,13 +450,10 @@
 #endif
 
 #if TARGET_BIG_ENDIAN == (XCHAL_HAVE_BE != 0)
-#define REGISTER_CORE(core) \
+#define REGISTER_CORE(config) \
     static void __attribute__((constructor)) register_core(void) \
     { \
-        static XtensaConfigList node = { \
-            .config = &core, \
-        }; \
-        xtensa_register_core(&node); \
+        xtensa_register_core(&config); \
     }
 #else
 #define REGISTER_CORE(core)
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 22/31] target: Use generic cpu_model_from_type()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (20 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 21/31] target/xtensa: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:17   ` Richard Henderson
  2023-11-16 13:32   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i] Gavin Shan
                   ` (10 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Use generic cpu_model_from_type() when the CPU model name needs to
be extracted from the CPU type name.

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/arm/arm-qmp-cmds.c             | 3 +--
 target/i386/cpu.c                     | 3 +--
 target/loongarch/loongarch-qmp-cmds.c | 3 +--
 target/mips/sysemu/mips-qmp-cmds.c    | 3 +--
 target/ppc/cpu_init.c                 | 3 +--
 target/ppc/ppc-qmp-cmds.c             | 3 +--
 target/riscv/cpu.c                    | 3 +--
 target/riscv/riscv-qmp-cmds.c         | 3 +--
 8 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/target/arm/arm-qmp-cmds.c b/target/arm/arm-qmp-cmds.c
index b53d5efe13..2250cd7ddf 100644
--- a/target/arm/arm-qmp-cmds.c
+++ b/target/arm/arm-qmp-cmds.c
@@ -237,8 +237,7 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data)
 
     typename = object_class_get_name(oc);
     info = g_malloc0(sizeof(*info));
-    info->name = g_strndup(typename,
-                           strlen(typename) - strlen("-" TYPE_ARM_CPU));
+    info->name = cpu_model_from_type(typename);
     info->q_typename = g_strdup(typename);
 
     QAPI_LIST_PREPEND(*cpu_list, info);
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 358d9c0a65..b351f83246 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1744,8 +1744,7 @@ static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
 {
     const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
     assert(g_str_has_suffix(class_name, X86_CPU_TYPE_SUFFIX));
-    return g_strndup(class_name,
-                     strlen(class_name) - strlen(X86_CPU_TYPE_SUFFIX));
+    return cpu_model_from_type(class_name);
 }
 
 typedef struct X86CPUVersionDefinition {
diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c
index 645672ff59..ec33ce81f0 100644
--- a/target/loongarch/loongarch-qmp-cmds.c
+++ b/target/loongarch/loongarch-qmp-cmds.c
@@ -22,8 +22,7 @@ static void loongarch_cpu_add_definition(gpointer data, gpointer user_data)
     CpuDefinitionInfo *info = g_new0(CpuDefinitionInfo, 1);
     const char *typename = object_class_get_name(oc);
 
-    info->name = g_strndup(typename,
-                           strlen(typename) - strlen("-" TYPE_LOONGARCH_CPU));
+    info->name = cpu_model_from_type(typename);
     info->q_typename = g_strdup(typename);
 
     QAPI_LIST_PREPEND(*cpu_list, info);
diff --git a/target/mips/sysemu/mips-qmp-cmds.c b/target/mips/sysemu/mips-qmp-cmds.c
index 6db4626412..7340ac70ba 100644
--- a/target/mips/sysemu/mips-qmp-cmds.c
+++ b/target/mips/sysemu/mips-qmp-cmds.c
@@ -19,8 +19,7 @@ static void mips_cpu_add_definition(gpointer data, gpointer user_data)
 
     typename = object_class_get_name(oc);
     info = g_malloc0(sizeof(*info));
-    info->name = g_strndup(typename,
-                           strlen(typename) - strlen("-" TYPE_MIPS_CPU));
+    info->name = cpu_model_from_type(typename);
     info->q_typename = g_strdup(typename);
 
     QAPI_LIST_PREPEND(*cpu_list, info);
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 40fe14a6c2..344196a8ce 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7036,8 +7036,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data)
         return;
     }
 
-    name = g_strndup(typename,
-                     strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX));
+    name = cpu_model_from_type(typename);
     qemu_printf("PowerPC %-16s PVR %08x\n", name, pcc->pvr);
     for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) {
         PowerPCCPUAlias *alias = &ppc_cpu_aliases[i];
diff --git a/target/ppc/ppc-qmp-cmds.c b/target/ppc/ppc-qmp-cmds.c
index f9acc21056..c0c137d9d7 100644
--- a/target/ppc/ppc-qmp-cmds.c
+++ b/target/ppc/ppc-qmp-cmds.c
@@ -181,8 +181,7 @@ static void ppc_cpu_defs_entry(gpointer data, gpointer user_data)
 
     typename = object_class_get_name(oc);
     info = g_malloc0(sizeof(*info));
-    info->name = g_strndup(typename,
-                           strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX));
+    info->name = cpu_model_from_type(typename);
 
     QAPI_LIST_PREPEND(*first, info);
 }
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 22d7422c89..b07a76ef6b 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -657,8 +657,7 @@ char *riscv_cpu_get_name(RISCVCPU *cpu)
 
     g_assert(g_str_has_suffix(typename, RISCV_CPU_TYPE_SUFFIX));
 
-    return g_strndup(typename,
-                     strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX));
+    return cpu_model_from_type(typename);
 }
 
 static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c
index 2f2dbae7c8..c5551d2cfe 100644
--- a/target/riscv/riscv-qmp-cmds.c
+++ b/target/riscv/riscv-qmp-cmds.c
@@ -44,8 +44,7 @@ static void riscv_cpu_add_definition(gpointer data, gpointer user_data)
     const char *typename = object_class_get_name(oc);
     ObjectClass *dyn_class;
 
-    info->name = g_strndup(typename,
-                           strlen(typename) - strlen("-" TYPE_RISCV_CPU));
+    info->name = cpu_model_from_type(typename);
     info->q_typename = g_strdup(typename);
 
     dyn_class = object_class_dynamic_cast(oc, TYPE_RISCV_DYNAMIC_CPU);
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i]
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (21 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 22/31] target: Use generic cpu_model_from_type() Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:17   ` Richard Henderson
  2023-11-16  9:52   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 24/31] machine: Use error handling when CPU type is checked Gavin Shan
                   ` (9 subsequent siblings)
  32 siblings, 2 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Constify MachineClass::valid_cpu_types[i], as suggested by Richard
Henderson.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/m68k/q800.c      | 2 +-
 include/hw/boards.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index 1d7cd5ff1c..38d4bc2013 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -726,7 +726,7 @@ static GlobalProperty hw_compat_q800[] = {
 };
 static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);
 
-static const char *q800_machine_valid_cpu_types[] = {
+static const char * const q800_machine_valid_cpu_types[] = {
     M68K_CPU_TYPE_NAME("m68040"),
     NULL
 };
diff --git a/include/hw/boards.h b/include/hw/boards.h
index a735999298..da85f86efb 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -273,7 +273,7 @@ struct MachineClass {
     bool has_hotpluggable_cpus;
     bool ignore_memory_transaction_failures;
     int numa_mem_align_shift;
-    const char **valid_cpu_types;
+    const char * const *valid_cpu_types;
     strList *allowed_dynamic_sysbus_devices;
     bool auto_enable_numa_with_memhp;
     bool auto_enable_numa_with_memdev;
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 24/31] machine: Use error handling when CPU type is checked
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (22 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i] Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:21   ` Richard Henderson
  2023-11-14 23:56 ` [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported() Gavin Shan
                   ` (8 subsequent siblings)
  32 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

QEMU will be terminated if the specified CPU type isn't supported
in machine_run_board_init(). The list of supported CPU type names
is tracked by mc->valid_cpu_types.

The error handling can be used to propagate error messages, to be
consistent how the errors are handled for other situations in the
same function.

No functional change intended.

Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 hw/core/machine.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index 0c17398141..5b45dbbbd5 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1394,6 +1394,7 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error *
     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
     ObjectClass *oc = object_class_by_name(machine->cpu_type);
     CPUClass *cc;
+    Error *local_err = NULL;
 
     /* This checkpoint is required by replay to separate prior clock
        reading from the other reads, because timer polling functions query
@@ -1466,15 +1467,16 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error *
 
         if (!machine_class->valid_cpu_types[i]) {
             /* The user specified CPU is not valid */
-            error_report("Invalid CPU type: %s", machine->cpu_type);
-            error_printf("The valid types are: %s",
-                         machine_class->valid_cpu_types[0]);
+            error_setg(&local_err, "Invalid CPU type: %s", machine->cpu_type);
+            error_append_hint(&local_err, "The valid types are: %s",
+                              machine_class->valid_cpu_types[0]);
             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
-                error_printf(", %s", machine_class->valid_cpu_types[i]);
+                error_append_hint(&local_err, ", %s",
+                                  machine_class->valid_cpu_types[i]);
             }
-            error_printf("\n");
+            error_append_hint(&local_err, "\n");
 
-            exit(1);
+            error_propagate(errp, local_err);
         }
     }
 
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (23 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 24/31] machine: Use error handling when CPU type is checked Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-16  9:33   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name Gavin Shan
                   ` (7 subsequent siblings)
  32 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

The logic, to check if the specified CPU type is supported in
machine_run_board_init(), is independent enough. Factor it out into
helper is_cpu_type_supported(). machine_run_board_init() looks a bit
clean with this. Since we're here, @machine_class is renamed to @mc
to avoid multiple line spanning of code. The comments are tweaked a
bit either.

No functional change intended.

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 hw/core/machine.c | 82 +++++++++++++++++++++++++----------------------
 1 file changed, 44 insertions(+), 38 deletions(-)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index 5b45dbbbd5..49e0bc874d 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1387,13 +1387,51 @@ out:
     return r;
 }
 
+static void is_cpu_type_supported(MachineState *machine, Error **errp)
+{
+    MachineClass *mc = MACHINE_GET_CLASS(machine);
+    ObjectClass *oc = object_class_by_name(machine->cpu_type);
+    CPUClass *cc;
+    int i;
+
+    /*
+     * Check if the user specified CPU type is supported when the valid
+     * CPU types have been determined. Note that the user specified CPU
+     * type is provided through '-cpu' option.
+     */
+    if (mc->valid_cpu_types && machine->cpu_type) {
+        for (i = 0; mc->valid_cpu_types[i]; i++) {
+            if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) {
+                break;
+            }
+        }
+
+        /* The user specified CPU type isn't valid */
+        if (!mc->valid_cpu_types[i]) {
+            error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
+            error_append_hint(errp, "The valid types are: %s",
+                              mc->valid_cpu_types[0]);
+            for (i = 1; mc->valid_cpu_types[i]; i++) {
+                error_append_hint(errp, ", %s", mc->valid_cpu_types[i]);
+            }
+
+            error_append_hint(errp, "\n");
+            return;
+        }
+    }
+
+    /* Check if CPU type is deprecated and warn if so */
+    cc = CPU_CLASS(oc);
+    if (cc && cc->deprecation_note) {
+        warn_report("CPU model %s is deprecated -- %s",
+                    machine->cpu_type, cc->deprecation_note);
+    }
+}
 
 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp)
 {
     ERRP_GUARD();
     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
-    ObjectClass *oc = object_class_by_name(machine->cpu_type);
-    CPUClass *cc;
     Error *local_err = NULL;
 
     /* This checkpoint is required by replay to separate prior clock
@@ -1449,42 +1487,10 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error *
         machine->ram = machine_consume_memdev(machine, machine->memdev);
     }
 
-    /* If the machine supports the valid_cpu_types check and the user
-     * specified a CPU with -cpu check here that the user CPU is supported.
-     */
-    if (machine_class->valid_cpu_types && machine->cpu_type) {
-        int i;
-
-        for (i = 0; machine_class->valid_cpu_types[i]; i++) {
-            if (object_class_dynamic_cast(oc,
-                                          machine_class->valid_cpu_types[i])) {
-                /* The user specified CPU is in the valid field, we are
-                 * good to go.
-                 */
-                break;
-            }
-        }
-
-        if (!machine_class->valid_cpu_types[i]) {
-            /* The user specified CPU is not valid */
-            error_setg(&local_err, "Invalid CPU type: %s", machine->cpu_type);
-            error_append_hint(&local_err, "The valid types are: %s",
-                              machine_class->valid_cpu_types[0]);
-            for (i = 1; machine_class->valid_cpu_types[i]; i++) {
-                error_append_hint(&local_err, ", %s",
-                                  machine_class->valid_cpu_types[i]);
-            }
-            error_append_hint(&local_err, "\n");
-
-            error_propagate(errp, local_err);
-        }
-    }
-
-    /* Check if CPU type is deprecated and warn if so */
-    cc = CPU_CLASS(oc);
-    if (cc && cc->deprecation_note) {
-        warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
-                    cc->deprecation_note);
+    /* Check if the CPU type is supported */
+    is_cpu_type_supported(machine, &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
     }
 
     if (machine->cgs) {
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (24 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported() Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-15  1:32   ` Richard Henderson
  2023-11-14 23:56 ` [PATCH v5 27/31] hw/arm/virt: Hide host CPU model for tcg Gavin Shan
                   ` (6 subsequent siblings)
  32 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

The names of supported CPU models instead of CPU types should be
printed when the user specified CPU type isn't supported, to be
consistent with the output from '-cpu ?'.

Correct the error messages to print CPU model names instead of CPU
type names.

Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 hw/core/machine.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/hw/core/machine.c b/hw/core/machine.c
index 49e0bc874d..58512b4b89 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -1392,6 +1392,7 @@ static void is_cpu_type_supported(MachineState *machine, Error **errp)
     MachineClass *mc = MACHINE_GET_CLASS(machine);
     ObjectClass *oc = object_class_by_name(machine->cpu_type);
     CPUClass *cc;
+    char *model;
     int i;
 
     /*
@@ -1408,11 +1409,21 @@ static void is_cpu_type_supported(MachineState *machine, Error **errp)
 
         /* The user specified CPU type isn't valid */
         if (!mc->valid_cpu_types[i]) {
-            error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
-            error_append_hint(errp, "The valid types are: %s",
-                              mc->valid_cpu_types[0]);
+            model = cpu_model_from_type(machine->cpu_type);
+            g_assert(model != NULL);
+            error_setg(errp, "Invalid CPU type: %s", model);
+            g_free(model);
+
+            model = cpu_model_from_type(mc->valid_cpu_types[0]);
+            g_assert(model != NULL);
+            error_append_hint(errp, "The valid types are: %s", model);
+            g_free(model);
+
             for (i = 1; mc->valid_cpu_types[i]; i++) {
-                error_append_hint(errp, ", %s", mc->valid_cpu_types[i]);
+                model = cpu_model_from_type(mc->valid_cpu_types[i]);
+                g_assert(model != NULL);
+                error_append_hint(errp, ", %s", model);
+                g_free(model);
             }
 
             error_append_hint(errp, "\n");
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 27/31] hw/arm/virt: Hide host CPU model for tcg
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (25 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-14 23:56 ` [PATCH v5 28/31] hw/arm/virt: Check CPU type in machine_run_board_init() Gavin Shan
                   ` (5 subsequent siblings)
  32 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

The 'host' CPU model isn't available until KVM or HVF is enabled.
For example, the following error messages are seen when the guest
is started with option '-cpu cortex-a8' on tcg after the next commit
is applied to check the CPU type in machine_run_board_init().

  ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \
  assertion failed: (model != NULL)
  Bail out! ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \
  assertion failed: (model != NULL)
  Aborted (core dumped)

Hide 'host' CPU model until KVM or HVF is enabled. With this applied,
the valid CPU models can be shown.

  qemu-system-aarch64: Invalid CPU type: cortex-a8
  The valid types are: cortex-a7, cortex-a15, cortex-a35, \
  cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, \
  neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53,      \
  cortex-a57, max

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 hw/arm/virt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index be2856c018..668c0d3194 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -220,7 +220,9 @@ static const char *valid_cpus[] = {
 #endif
     ARM_CPU_TYPE_NAME("cortex-a53"),
     ARM_CPU_TYPE_NAME("cortex-a57"),
+#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
     ARM_CPU_TYPE_NAME("host"),
+#endif
     ARM_CPU_TYPE_NAME("max"),
 };
 
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 28/31] hw/arm/virt: Check CPU type in machine_run_board_init()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (26 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 27/31] hw/arm/virt: Hide host CPU model for tcg Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-14 23:56 ` [PATCH v5 29/31] hw/arm/sbsa-ref: " Gavin Shan
                   ` (4 subsequent siblings)
  32 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Set mc->valid_cpu_types so that the user specified CPU type can be
validated in machine_run_board_init(). We needn't to do the check
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 hw/arm/virt.c | 21 +++------------------
 1 file changed, 3 insertions(+), 18 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 668c0d3194..1d149cf7a9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -204,7 +204,7 @@ static const int a15irqmap[] = {
     [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */
 };
 
-static const char *valid_cpus[] = {
+static const char * const valid_cpu_types[] = {
 #ifdef CONFIG_TCG
     ARM_CPU_TYPE_NAME("cortex-a7"),
     ARM_CPU_TYPE_NAME("cortex-a15"),
@@ -224,20 +224,9 @@ static const char *valid_cpus[] = {
     ARM_CPU_TYPE_NAME("host"),
 #endif
     ARM_CPU_TYPE_NAME("max"),
+    NULL
 };
 
-static bool cpu_type_valid(const char *cpu)
-{
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) {
-        if (strcmp(cpu, valid_cpus[i]) == 0) {
-            return true;
-        }
-    }
-    return false;
-}
-
 static void create_randomness(MachineState *ms, const char *node)
 {
     struct {
@@ -2041,11 +2030,6 @@ static void machvirt_init(MachineState *machine)
     unsigned int smp_cpus = machine->smp.cpus;
     unsigned int max_cpus = machine->smp.max_cpus;
 
-    if (!cpu_type_valid(machine->cpu_type)) {
-        error_report("mach-virt: CPU type %s not supported", machine->cpu_type);
-        exit(1);
-    }
-
     possible_cpus = mc->possible_cpu_arch_ids(machine);
 
     /*
@@ -2965,6 +2949,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
 #else
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("max");
 #endif
+    mc->valid_cpu_types = valid_cpu_types;
     mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
     mc->kvm_type = virt_kvm_type;
     assert(!mc->get_hotplug_handler);
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 29/31] hw/arm/sbsa-ref: Check CPU type in machine_run_board_init()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (27 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 28/31] hw/arm/virt: Check CPU type in machine_run_board_init() Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-14 23:56 ` [PATCH v5 30/31] hw/arm: " Gavin Shan
                   ` (3 subsequent siblings)
  32 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 hw/arm/sbsa-ref.c | 21 +++------------------
 1 file changed, 3 insertions(+), 18 deletions(-)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index f3c9704693..31bee595f8 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -145,27 +145,16 @@ static const int sbsa_ref_irqmap[] = {
     [SBSA_GWDT_WS0] = 16,
 };
 
-static const char * const valid_cpus[] = {
+static const char * const valid_cpu_types[] = {
     ARM_CPU_TYPE_NAME("cortex-a57"),
     ARM_CPU_TYPE_NAME("cortex-a72"),
     ARM_CPU_TYPE_NAME("neoverse-n1"),
     ARM_CPU_TYPE_NAME("neoverse-v1"),
     ARM_CPU_TYPE_NAME("neoverse-n2"),
     ARM_CPU_TYPE_NAME("max"),
+    NULL,
 };
 
-static bool cpu_type_valid(const char *cpu)
-{
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) {
-        if (strcmp(cpu, valid_cpus[i]) == 0) {
-            return true;
-        }
-    }
-    return false;
-}
-
 static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)
 {
     uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER;
@@ -733,11 +722,6 @@ static void sbsa_ref_init(MachineState *machine)
     const CPUArchIdList *possible_cpus;
     int n, sbsa_max_cpus;
 
-    if (!cpu_type_valid(machine->cpu_type)) {
-        error_report("sbsa-ref: CPU type %s not supported", machine->cpu_type);
-        exit(1);
-    }
-
     if (kvm_enabled()) {
         error_report("sbsa-ref: KVM is not supported for this machine");
         exit(1);
@@ -902,6 +886,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data)
     mc->init = sbsa_ref_init;
     mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine";
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n1");
+    mc->valid_cpu_types = valid_cpu_types;
     mc->max_cpus = 512;
     mc->pci_allow_0_address = true;
     mc->minimum_page_bits = 12;
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 30/31] hw/arm: Check CPU type in machine_run_board_init()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (28 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 29/31] hw/arm/sbsa-ref: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-16  8:35   ` Philippe Mathieu-Daudé
  2023-11-14 23:56 ` [PATCH v5 31/31] hw/riscv/shakti_c: " Gavin Shan
                   ` (2 subsequent siblings)
  32 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it by
ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 hw/arm/bananapi_m2u.c   | 12 ++++++------
 hw/arm/cubieboard.c     | 12 ++++++------
 hw/arm/mps2-tz.c        | 20 ++++++++++++++------
 hw/arm/mps2.c           | 25 +++++++++++++++++++------
 hw/arm/msf2-som.c       | 12 ++++++------
 hw/arm/musca.c          | 13 ++++++-------
 hw/arm/npcm7xx_boards.c | 13 ++++++-------
 hw/arm/orangepi.c       | 12 ++++++------
 8 files changed, 69 insertions(+), 50 deletions(-)

diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c
index 8f24b18d8c..5eed11fe03 100644
--- a/hw/arm/bananapi_m2u.c
+++ b/hw/arm/bananapi_m2u.c
@@ -30,6 +30,11 @@
 
 static struct arm_boot_info bpim2u_binfo;
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-a7"),
+    NULL
+};
+
 /*
  * R40 can boot from mmc0 and mmc2, and bpim2u has two mmc interface, one is
  * connected to sdcard and another mount an emmc media.
@@ -71,12 +76,6 @@ static void bpim2u_init(MachineState *machine)
         exit(1);
     }
 
-    /* Only allow Cortex-A7 for this board */
-    if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
-        error_report("This board can only be used with cortex-a7 CPU");
-        exit(1);
-    }
-
     r40 = AW_R40(object_new(TYPE_AW_R40));
     object_property_add_child(OBJECT(machine), "soc", OBJECT(r40));
     object_unref(OBJECT(r40));
@@ -139,6 +138,7 @@ static void bpim2u_machine_init(MachineClass *mc)
     mc->max_cpus = AW_R40_NUM_CPUS;
     mc->default_cpus = AW_R40_NUM_CPUS;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+    mc->valid_cpu_types = valid_cpu_types;
     mc->default_ram_size = 1 * GiB;
     mc->default_ram_id = "bpim2u.ram";
 }
diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c
index 29146f5018..7d9bb6c837 100644
--- a/hw/arm/cubieboard.c
+++ b/hw/arm/cubieboard.c
@@ -29,6 +29,11 @@ static struct arm_boot_info cubieboard_binfo = {
     .board_id = 0x1008,
 };
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-a8"),
+    NULL
+};
+
 static void cubieboard_init(MachineState *machine)
 {
     AwA10State *a10;
@@ -52,12 +57,6 @@ static void cubieboard_init(MachineState *machine)
         exit(1);
     }
 
-    /* Only allow Cortex-A8 for this board */
-    if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a8")) != 0) {
-        error_report("This board can only be used with cortex-a8 CPU");
-        exit(1);
-    }
-
     a10 = AW_A10(object_new(TYPE_AW_A10));
     object_property_add_child(OBJECT(machine), "soc", OBJECT(a10));
     object_unref(OBJECT(a10));
@@ -116,6 +115,7 @@ static void cubieboard_machine_init(MachineClass *mc)
 {
     mc->desc = "cubietech cubieboard (Cortex-A8)";
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8");
+    mc->valid_cpu_types = valid_cpu_types;
     mc->default_ram_size = 1 * GiB;
     mc->init = cubieboard_init;
     mc->block_default_type = IF_IDE;
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 668db5ed61..1c88e76a22 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -191,6 +191,16 @@ OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE)
 /* For cpu{0,1}_mpu_{ns,s}, means "leave at SSE's default value" */
 #define MPU_REGION_DEFAULT UINT32_MAX
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-m33"),
+    NULL
+};
+
+static const char * const mps3tz_an547_valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-m55"),
+    NULL
+};
+
 static const uint32_t an505_oscclk[] = {
     40000000,
     24580000,
@@ -813,12 +823,6 @@ static void mps2tz_common_init(MachineState *machine)
     int num_ppcs;
     int i;
 
-    if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
-        error_report("This board can only be used with CPU %s",
-                     mc->default_cpu_type);
-        exit(1);
-    }
-
     if (machine->ram_size != mc->default_ram_size) {
         char *sz = size_to_str(mc->default_ram_size);
         error_report("Invalid RAM size, should be %s", sz);
@@ -1325,6 +1329,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
     mc->max_cpus = mc->default_cpus;
     mmc->fpga_type = FPGA_AN505;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+    mc->valid_cpu_types = valid_cpu_types;
     mmc->scc_id = 0x41045050;
     mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
     mmc->apb_periph_frq = mmc->sysclk_frq;
@@ -1354,6 +1359,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
     mc->max_cpus = mc->default_cpus;
     mmc->fpga_type = FPGA_AN521;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+    mc->valid_cpu_types = valid_cpu_types;
     mmc->scc_id = 0x41045210;
     mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
     mmc->apb_periph_frq = mmc->sysclk_frq;
@@ -1383,6 +1389,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data)
     mc->max_cpus = mc->default_cpus;
     mmc->fpga_type = FPGA_AN524;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+    mc->valid_cpu_types = valid_cpu_types;
     mmc->scc_id = 0x41045240;
     mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
     mmc->apb_periph_frq = mmc->sysclk_frq;
@@ -1417,6 +1424,7 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data)
     mc->max_cpus = mc->default_cpus;
     mmc->fpga_type = FPGA_AN547;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m55");
+    mc->valid_cpu_types = mps3tz_an547_valid_cpu_types;
     mmc->scc_id = 0x41055470;
     mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
     mmc->apb_periph_frq = 25 * 1000 * 1000; /* 25MHz */
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 292a180ad2..3baff18571 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -111,6 +111,21 @@ OBJECT_DECLARE_TYPE(MPS2MachineState, MPS2MachineClass, MPS2_MACHINE)
  */
 #define REFCLK_FRQ (1 * 1000 * 1000)
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-m3"),
+    NULL
+};
+
+static const char * const mps2_an386_valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-m4"),
+    NULL
+};
+
+static const char * const mps2_an500_valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-m7"),
+    NULL
+};
+
 /* Initialize the auxiliary RAM region @mr and map it into
  * the memory map at @base.
  */
@@ -142,12 +157,6 @@ static void mps2_common_init(MachineState *machine)
     QList *oscclk;
     int i;
 
-    if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
-        error_report("This board can only be used with CPU %s",
-                     mc->default_cpu_type);
-        exit(1);
-    }
-
     if (machine->ram_size != mc->default_ram_size) {
         char *sz = size_to_str(mc->default_ram_size);
         error_report("Invalid RAM size, should be %s", sz);
@@ -488,6 +497,7 @@ static void mps2_an385_class_init(ObjectClass *oc, void *data)
     mc->desc = "ARM MPS2 with AN385 FPGA image for Cortex-M3";
     mmc->fpga_type = FPGA_AN385;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
+    mc->valid_cpu_types = valid_cpu_types;
     mmc->scc_id = 0x41043850;
     mmc->psram_base = 0x21000000;
     mmc->ethernet_base = 0x40200000;
@@ -502,6 +512,7 @@ static void mps2_an386_class_init(ObjectClass *oc, void *data)
     mc->desc = "ARM MPS2 with AN386 FPGA image for Cortex-M4";
     mmc->fpga_type = FPGA_AN386;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m4");
+    mc->valid_cpu_types = mps2_an386_valid_cpu_types;
     mmc->scc_id = 0x41043860;
     mmc->psram_base = 0x21000000;
     mmc->ethernet_base = 0x40200000;
@@ -516,6 +527,7 @@ static void mps2_an500_class_init(ObjectClass *oc, void *data)
     mc->desc = "ARM MPS2 with AN500 FPGA image for Cortex-M7";
     mmc->fpga_type = FPGA_AN500;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m7");
+    mc->valid_cpu_types = mps2_an500_valid_cpu_types;
     mmc->scc_id = 0x41045000;
     mmc->psram_base = 0x60000000;
     mmc->ethernet_base = 0xa0000000;
@@ -530,6 +542,7 @@ static void mps2_an511_class_init(ObjectClass *oc, void *data)
     mc->desc = "ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3";
     mmc->fpga_type = FPGA_AN511;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
+    mc->valid_cpu_types = valid_cpu_types;
     mmc->scc_id = 0x41045110;
     mmc->psram_base = 0x21000000;
     mmc->ethernet_base = 0x40200000;
diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c
index 7b3106c790..470951a006 100644
--- a/hw/arm/msf2-som.c
+++ b/hw/arm/msf2-som.c
@@ -42,6 +42,11 @@
 #define M2S010_ENVM_SIZE      (256 * KiB)
 #define M2S010_ESRAM_SIZE     (64 * KiB)
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-m3"),
+    NULL
+};
+
 static void emcraft_sf2_s2s010_init(MachineState *machine)
 {
     DeviceState *dev;
@@ -55,12 +60,6 @@ static void emcraft_sf2_s2s010_init(MachineState *machine)
     MemoryRegion *ddr = g_new(MemoryRegion, 1);
     Clock *m3clk;
 
-    if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
-        error_report("This board can only be used with CPU %s",
-                     mc->default_cpu_type);
-        exit(1);
-    }
-
     memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
                            &error_fatal);
     memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);
@@ -109,6 +108,7 @@ static void emcraft_sf2_machine_init(MachineClass *mc)
     mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)";
     mc->init = emcraft_sf2_s2s010_init;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
+    mc->valid_cpu_types = valid_cpu_types;
 }
 
 DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 6eeee57c9d..9bd78fd531 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -102,6 +102,11 @@ OBJECT_DECLARE_TYPE(MuscaMachineState, MuscaMachineClass, MUSCA_MACHINE)
 /* Slow 32Khz S32KCLK frequency in Hz */
 #define S32KCLK_FRQ (32 * 1000)
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-m33"),
+    NULL
+};
+
 static qemu_irq get_sse_irq_in(MuscaMachineState *mms, int irqno)
 {
     /* Return a qemu_irq which will signal IRQ n to all CPUs in the SSE. */
@@ -355,7 +360,6 @@ static void musca_init(MachineState *machine)
 {
     MuscaMachineState *mms = MUSCA_MACHINE(machine);
     MuscaMachineClass *mmc = MUSCA_MACHINE_GET_CLASS(mms);
-    MachineClass *mc = MACHINE_GET_CLASS(machine);
     MemoryRegion *system_memory = get_system_memory();
     DeviceState *ssedev;
     DeviceState *dev_splitter;
@@ -366,12 +370,6 @@ static void musca_init(MachineState *machine)
     assert(mmc->num_irqs <= MUSCA_NUMIRQ_MAX);
     assert(mmc->num_mpcs <= MUSCA_MPC_MAX);
 
-    if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
-        error_report("This board can only be used with CPU %s",
-                     mc->default_cpu_type);
-        exit(1);
-    }
-
     mms->sysclk = clock_new(OBJECT(machine), "SYSCLK");
     clock_set_hz(mms->sysclk, SYSCLK_FRQ);
     mms->s32kclk = clock_new(OBJECT(machine), "S32KCLK");
@@ -609,6 +607,7 @@ static void musca_class_init(ObjectClass *oc, void *data)
     mc->min_cpus = mc->default_cpus;
     mc->max_cpus = mc->default_cpus;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
+    mc->valid_cpu_types = valid_cpu_types;
     mc->init = musca_init;
 }
 
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index 2aef579aac..ca37c893b4 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -55,6 +55,11 @@
 
 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin";
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-a9"),
+    NULL
+};
+
 static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc)
 {
     const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom;
@@ -121,15 +126,8 @@ static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
                                         uint32_t hw_straps)
 {
     NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
-    MachineClass *mc = MACHINE_CLASS(nmc);
     Object *obj;
 
-    if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
-        error_report("This board can only be used with %s",
-                     mc->default_cpu_type);
-        exit(1);
-    }
-
     obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
                                 &error_abort, NULL);
     object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
@@ -469,6 +467,7 @@ static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
     mc->no_parallel = 1;
     mc->default_ram_id = "ram";
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+    mc->valid_cpu_types = valid_cpu_types;
 }
 
 /*
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index f3784d45ca..4e8a43978d 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -29,6 +29,11 @@
 
 static struct arm_boot_info orangepi_binfo;
 
+static const char * const valid_cpu_types[] = {
+    ARM_CPU_TYPE_NAME("cortex-a7"),
+    NULL
+};
+
 static void orangepi_init(MachineState *machine)
 {
     AwH3State *h3;
@@ -49,12 +54,6 @@ static void orangepi_init(MachineState *machine)
         exit(1);
     }
 
-    /* Only allow Cortex-A7 for this board */
-    if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
-        error_report("This board can only be used with cortex-a7 CPU");
-        exit(1);
-    }
-
     h3 = AW_H3(object_new(TYPE_AW_H3));
     object_property_add_child(OBJECT(machine), "soc", OBJECT(h3));
     object_unref(OBJECT(h3));
@@ -119,6 +118,7 @@ static void orangepi_machine_init(MachineClass *mc)
     mc->max_cpus = AW_H3_NUM_CPUS;
     mc->default_cpus = AW_H3_NUM_CPUS;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+    mc->valid_cpu_types = valid_cpu_types;
     mc->default_ram_size = 1 * GiB;
     mc->default_ram_id = "orangepi.ram";
 }
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* [PATCH v5 31/31] hw/riscv/shakti_c: Check CPU type in machine_run_board_init()
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (29 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 30/31] hw/arm: " Gavin Shan
@ 2023-11-14 23:56 ` Gavin Shan
  2023-11-16 10:01 ` [PATCH v5 00/31] Unified CPU type check Philippe Mathieu-Daudé
  2023-11-16 13:35 ` Philippe Mathieu-Daudé
  32 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-14 23:56 UTC (permalink / raw)
  To: qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, philmd, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/riscv/shakti_c.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index 12ea74b032..fc83ed4db4 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -28,6 +28,10 @@
 #include "exec/address-spaces.h"
 #include "hw/riscv/boot.h"
 
+static const char * const valid_cpu_types[] = {
+    RISCV_CPU_TYPE_NAME("shakti-c"),
+    NULL
+};
 
 static const struct MemmapEntry {
     hwaddr base;
@@ -47,12 +51,6 @@ static void shakti_c_machine_state_init(MachineState *mstate)
     ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate);
     MemoryRegion *system_memory = get_system_memory();
 
-    /* Allow only Shakti C CPU for this platform */
-    if (strcmp(mstate->cpu_type, TYPE_RISCV_CPU_SHAKTI_C) != 0) {
-        error_report("This board can only be used with Shakti C CPU");
-        exit(1);
-    }
-
     /* Initialize SoC */
     object_initialize_child(OBJECT(mstate), "soc", &sms->soc,
                             TYPE_RISCV_SHAKTI_SOC);
@@ -85,6 +83,7 @@ static void shakti_c_machine_class_init(ObjectClass *klass, void *data)
     mc->desc = "RISC-V Board compatible with Shakti SDK";
     mc->init = shakti_c_machine_state_init;
     mc->default_cpu_type = TYPE_RISCV_CPU_SHAKTI_C;
+    mc->valid_cpu_types = valid_cpu_types;
     mc->default_ram_id = "riscv.shakti.c.ram";
 }
 
-- 
2.41.0



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class
  2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
@ 2023-11-15  0:22   ` Richard Henderson
  2023-11-16  6:58     ` Philippe Mathieu-Daudé
  2024-01-04 17:58   ` Philippe Mathieu-Daudé
  1 sibling, 1 reply; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:22 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:55, Gavin Shan wrote:
> 'ev67' CPU class will be returned to match everything, which makes
> no sense as mentioned in the comments. Remove the logic to fall
> back to 'ev67' CPU class to match everything.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/alpha/cpu.c | 7 ++-----
>   1 file changed, 2 insertions(+), 5 deletions(-)

The subject is wrong -- ev67 cpu class is still present.
Better as

   target/alpha: Remove fallback to ev67 cpu class

with that,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

> 
> diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
> index 39cf841b3e..91fe8ae095 100644
> --- a/target/alpha/cpu.c
> +++ b/target/alpha/cpu.c
> @@ -141,11 +141,8 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
>       typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
>       oc = object_class_by_name(typename);
>       g_free(typename);
> -
> -    /* TODO: remove match everything nonsense */
> -    if (!oc || object_class_is_abstract(oc)) {
> -        /* Default to ev67; no reason not to emulate insns by default. */
> -        oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
> +    if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
> +        return NULL;
>       }
>   
>       return oc;



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract()
  2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
@ 2023-11-15  0:26   ` Richard Henderson
  2023-11-15 11:18   ` BALATON Zoltan
  2023-11-16  7:09   ` Philippe Mathieu-Daudé
  2 siblings, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:26 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:55, Gavin Shan wrote:
> No need to check if @oc is abstract because it has been covered
> by cpu_class_by_name().
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/hppa/cpu.c | 1 -
>   1 file changed, 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

> 
> diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
> index 04de1689d7..fc4d2abad7 100644
> --- a/target/hppa/cpu.c
> +++ b/target/hppa/cpu.c
> @@ -163,7 +163,6 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
>       ObjectClass *oc = object_class_by_name(typename);
>   
>       if (oc &&
> -        !object_class_is_abstract(oc) &&
>           object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
>           return oc;
>       }



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()
  2023-11-14 23:56 ` [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Gavin Shan
@ 2023-11-15  0:30   ` Richard Henderson
  2023-11-16 16:08   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:30 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> From: Philippe Mathieu-Daudé <philmd@linaro.org>
> 
> For all targets, the CPU class returned from CPUClass::class_by_name()
> and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
> compatible. Lets apply the check in cpu_class_by_name() for once,
> instead of having the check in CPUClass::class_by_name() for individual
> target.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
>   hw/core/cpu-common.c   | 8 +++++---
>   target/alpha/cpu.c     | 3 ---
>   target/arm/cpu.c       | 4 +---
>   target/avr/cpu.c       | 8 +-------
>   target/cris/cpu.c      | 4 +---
>   target/hexagon/cpu.c   | 4 +---
>   target/hppa/cpu.c      | 7 +------
>   target/loongarch/cpu.c | 8 +-------
>   target/m68k/cpu.c      | 4 +---
>   target/openrisc/cpu.c  | 4 +---
>   target/riscv/cpu.c     | 4 +---
>   target/tricore/cpu.c   | 4 +---
>   target/xtensa/cpu.c    | 4 +---
>   13 files changed, 16 insertions(+), 50 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 04/31] target: Remove 'oc == NULL' check
  2023-11-14 23:56 ` [PATCH v5 04/31] target: Remove 'oc == NULL' check Gavin Shan
@ 2023-11-15  0:34   ` Richard Henderson
  0 siblings, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:34 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> No need to have 'oc == NULL' since object_class_dynamic_cast()
> covers it. Besides, we don't expect an abstrat CPU class returned
> from CPUClass::cpu_class_by_name() in the middle on alpha and rx.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/alpha/cpu.c | 3 ++-
>   target/rx/cpu.c    | 4 +++-
>   2 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
> index 83345c5c7d..c19257d765 100644
> --- a/target/alpha/cpu.c
> +++ b/target/alpha/cpu.c
> @@ -126,7 +126,8 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
>       int i;
>   
>       oc = object_class_by_name(cpu_model);
> -    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL) {
> +    if (object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) &&
> +        !object_class_is_abstract(oc)) {
>           return oc;
>       }

This appears to be a rebase error, re-introducing code removed in patch 3.
I think the entire patch should be dropped.


r~

>   
> diff --git a/target/rx/cpu.c b/target/rx/cpu.c
> index 9cc9d9d15e..dd5561c8eb 100644
> --- a/target/rx/cpu.c
> +++ b/target/rx/cpu.c
> @@ -111,9 +111,11 @@ static ObjectClass *rx_cpu_class_by_name(const char *cpu_model)
>       char *typename;
>   
>       oc = object_class_by_name(cpu_model);
> -    if (oc != NULL && object_class_dynamic_cast(oc, TYPE_RX_CPU) != NULL) {
> +    if (object_class_dynamic_cast(oc, TYPE_RX_CPU) &&
> +        !object_class_is_abstract(oc)) {
>           return oc;
>       }
> +
>       typename = g_strdup_printf(RX_CPU_TYPE_NAME("%s"), cpu_model);
>       oc = object_class_by_name(typename);
>       g_free(typename);



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 05/31] cpu: Add helper cpu_model_from_type()
  2023-11-14 23:56 ` [PATCH v5 05/31] cpu: Add helper cpu_model_from_type() Gavin Shan
@ 2023-11-15  0:35   ` Richard Henderson
  2023-11-16  7:45   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:35 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Add helper cpu_model_from_type() to extract the CPU model name from
> the CPU type name in two circumstances: (1) The CPU type name is the
> combination of the CPU model name and suffix. (2) The CPU type name
> is same to the CPU model name.
> 
> The helper will be used in the subsequent commits to conver the
> CPU type name to the CPU model name.
> 
> Suggested-by: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   cpu-target.c          | 15 +++++++++++++++
>   include/hw/core/cpu.h | 12 ++++++++++++
>   2 files changed, 27 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 06/31] cpu: Add generic cpu_list() Gavin Shan
@ 2023-11-15  0:37   ` Richard Henderson
  2023-11-16  7:39   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:37 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Add generic cpu_list() to replace the individual target's implementation
> in the subsequent commits. Currently, there are 3 targets with no cpu_list()
> implementation: microblaze and nios2. With this applied, those two targets
> switch to the generic cpu_list().
> 
> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
> Available CPUs:
>    microblaze-cpu
> 
> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
> Available CPUs:
>    nios2-cpu
> 
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   bsd-user/main.c |  5 +----
>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>   2 files changed, 27 insertions(+), 7 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 07/31] target/alpha: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 07/31] target/alpha: Use " Gavin Shan
@ 2023-11-15  0:38   ` Richard Henderson
  2023-11-16  7:47   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:38 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
> Available CPUs:
>    ev4-alpha-cpu
>    ev5-alpha-cpu
>    ev56-alpha-cpu
>    ev6-alpha-cpu
>    ev67-alpha-cpu
>    ev68-alpha-cpu
>    pca56-alpha-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
> Available CPUs:
>    ev4
>    ev5
>    ev56
>    ev6
>    ev67
>    ev68
>    pca56
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/alpha/cpu.c | 17 -----------------
>   target/alpha/cpu.h |  3 ---
>   2 files changed, 20 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 08/31] target/arm: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 08/31] target/arm: " Gavin Shan
@ 2023-11-15  0:41   ` Richard Henderson
  2023-11-16  7:51   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:41 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> No changes of the output from the following command before and
> after it's applied.
> 
> [gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ?
> Available CPUs:
>    a64fx
>    arm1026
>    arm1136
>    arm1136-r2
>    arm1176
>    arm11mpcore
>    arm926
>    arm946
>    cortex-a15
>    cortex-a35
>    cortex-a53
>    cortex-a55
>    cortex-a57
>    cortex-a7
>    cortex-a710
>    cortex-a72
>    cortex-a76
>    cortex-a8
>    cortex-a9
>    cortex-m0
>    cortex-m3
>    cortex-m33
>    cortex-m4
>    cortex-m55
>    cortex-m7
>    cortex-r5
>    cortex-r52
>    cortex-r5f
>    max
>    neoverse-n1
>    neoverse-n2
>    neoverse-v1
>    pxa250
>    pxa255
>    pxa260
>    pxa261
>    pxa262
>    pxa270-a0
>    pxa270-a1
>    pxa270
>    pxa270-b0
>    pxa270-b1
>    pxa270-c0
>    pxa270-c5
>    sa1100
>    sa1110
>    ti925t
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/arm/cpu.h    |  3 ---
>   target/arm/helper.c | 46 ---------------------------------------------
>   2 files changed, 49 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 09/31] target/avr: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 09/31] target/avr: " Gavin Shan
@ 2023-11-15  0:42   ` Richard Henderson
  2023-11-16  7:51   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:42 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
> avr5-avr-cpu
> avr51-avr-cpu
> avr6-avr-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
> Available CPUs:
>    avr5
>    avr51
>    avr6
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/avr/cpu.c | 15 ---------------
>   target/avr/cpu.h |  2 --
>   2 files changed, 17 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 10/31] target/cris: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 10/31] target/cris: " Gavin Shan
@ 2023-11-15  0:44   ` Richard Henderson
  2023-11-16  7:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:44 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
> Available CPUs:
>    crisv8
>    crisv9
>    crisv10
>    crisv11
>    crisv17
>    crisv32
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
> Available CPUs:
>    crisv10
>    crisv11
>    crisv17
>    crisv32
>    crisv8
>    crisv9
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/cris/cpu.c | 38 --------------------------------------
>   target/cris/cpu.h |  3 ---
>   2 files changed, 41 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 11/31] target/hexagon: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 11/31] target/hexagon: " Gavin Shan
@ 2023-11-15  0:46   ` Richard Henderson
  2023-11-16  7:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:46 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> No changes in the output from the following command.
> 
> [gshan@gshan q]$ ./build/qemu-hexagon -cpu ?
> Available CPUs:
>    v67
>    v68
>    v69
>    v71
>    v73
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/hexagon/cpu.c | 20 --------------------
>   target/hexagon/cpu.h |  3 ---
>   2 files changed, 23 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 12/31] target/hppa: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 12/31] target/hppa: " Gavin Shan
@ 2023-11-15  0:57   ` Richard Henderson
  2023-11-16  7:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:57 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> No changes in the output from the following command.
> 
> [gshan@gshan q]$ ./build/qemu-system-hppa -cpu ?
> Available CPUs:
>    hppa
>    hppa64
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/hppa/cpu.c | 24 ------------------------
>   target/hppa/cpu.h |  3 ---
>   2 files changed, 27 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 13/31] target/loongarch: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 13/31] target/loongarch: " Gavin Shan
@ 2023-11-15  0:59   ` Richard Henderson
  2023-11-16 10:27   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  0:59 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
> la132-loongarch-cpu
> la464-loongarch-cpu
> max-loongarch-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
> Available CPUs:
>    la132
>    la464
>    max
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/loongarch/cpu.c | 15 ---------------
>   target/loongarch/cpu.h |  4 ----
>   2 files changed, 19 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 14/31] target/m68k: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 14/31] target/m68k: " Gavin Shan
@ 2023-11-15  1:01   ` Richard Henderson
  2023-11-16 10:27   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:01 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
> cfv4e
> m5206
> m5208
> m68000
> m68010
> m68020
> m68030
> m68040
> m68060
> any
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
> Available CPUs:
>    any
>    cfv4e
>    m5206
>    m5208
>    m68000
>    m68010
>    m68020
>    m68030
>    m68040
>    m68060
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/m68k/cpu.h    |  4 ----
>   target/m68k/helper.c | 40 ----------------------------------------
>   2 files changed, 44 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 15/31] target/mips: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 15/31] target/mips: " Gavin Shan
@ 2023-11-15  1:02   ` Richard Henderson
  2023-11-16  7:53   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:02 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
> MIPS '4Kc'
> MIPS '4Km'
> MIPS '4KEcR1'
> MIPS 'XBurstR1'
> MIPS '4KEmR1'
> MIPS '4KEc'
> MIPS '4KEm'
> MIPS '24Kc'
> MIPS '24KEc'
> MIPS '24Kf'
> MIPS '34Kf'
> MIPS '74Kf'
> MIPS 'XBurstR2'
> MIPS 'M14K'
> MIPS 'M14Kc'
> MIPS 'P5600'
> MIPS 'mips32r6-generic'
> MIPS 'I7200'
> MIPS 'R4000'
> MIPS 'VR5432'
> MIPS '5Kc'
> MIPS '5Kf'
> MIPS '20Kc'
> MIPS 'MIPS64R2-generic'
> MIPS '5KEc'
> MIPS '5KEf'
> MIPS 'I6400'
> MIPS 'I6500'
> MIPS 'Loongson-2E'
> MIPS 'Loongson-2F'
> MIPS 'Loongson-3A1000'
> MIPS 'Loongson-3A4000'
> MIPS 'mips64dspr2'
> MIPS 'Octeon68XX'
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
> Available CPUs:
>    20Kc
>    24Kc
>    24KEc
>    24Kf
>    34Kf
>    4Kc
>    4KEc
>    4KEcR1
>    4KEm
>    4KEmR1
>    4Km
>    5Kc
>    5KEc
>    5KEf
>    5Kf
>    74Kf
>    I6400
>    I6500
>    I7200
>    Loongson-2E
>    Loongson-2F
>    Loongson-3A1000
>    Loongson-3A4000
>    M14K
>    M14Kc
>    mips32r6-generic
>    mips64dspr2
>    MIPS64R2-generic
>    Octeon68XX
>    P5600
>    R4000
>    VR5432
>    XBurstR1
>    XBurstR2
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/mips/cpu-defs.c.inc | 9 ---------
>   target/mips/cpu.h          | 4 ----
>   2 files changed, 13 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 16/31] target/openrisc: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 16/31] target/openrisc: " Gavin Shan
@ 2023-11-15  1:04   ` Richard Henderson
  2023-11-16 10:28   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:04 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-or1k -cpu ?
> Available CPUs:
>    or1200
>    any
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-or1k -cpu ?
> Available CPUs:
>    any
>    or1200
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/openrisc/cpu.c | 42 ------------------------------------------
>   target/openrisc/cpu.h |  3 ---
>   2 files changed, 45 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 17/31] target/riscv: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 17/31] target/riscv: " Gavin Shan
@ 2023-11-15  1:05   ` Richard Henderson
  2023-11-16 10:28   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:05 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
> any
> max
> rv64
> shakti-c
> sifive-e51
> sifive-u54
> thead-c906
> veyron-v1
> x-rv128
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
> Available CPUs:
>    any
>    max
>    rv64
>    shakti-c
>    sifive-e51
>    sifive-u54
>    thead-c906
>    veyron-v1
>    x-rv128
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/riscv/cpu.c | 29 -----------------------------
>   target/riscv/cpu.h |  2 --
>   2 files changed, 31 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 18/31] target/rx: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 18/31] target/rx: " Gavin Shan
@ 2023-11-15  1:07   ` Richard Henderson
  2023-11-16  7:54   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:07 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
> Available CPUs:
>    rx62n-rx-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
> Available CPUs:
>    rx62n
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/rx/cpu.c | 16 ----------------
>   target/rx/cpu.h |  3 ---
>   2 files changed, 19 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 19/31] target/sh4: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 19/31] target/sh4: " Gavin Shan
@ 2023-11-15  1:08   ` Richard Henderson
  2023-11-16  7:55   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:08 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> sh7750r
> sh7751r
> sh7785
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> Available CPUs:
>    sh7750r
>    sh7751r
>    sh7785
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/sh4/cpu.c | 17 -----------------
>   target/sh4/cpu.h |  3 ---
>   2 files changed, 20 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 20/31] target/tricore: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 20/31] target/tricore: " Gavin Shan
@ 2023-11-15  1:09   ` Richard Henderson
  2023-11-16  7:55   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:09 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> No changes in the output from the following command.
> 
> [gshan@gshan q]$ ./build/qemu-system-tricore -cpu ?
> Available CPUs:
>    tc1796
>    tc1797
>    tc27x
>    tc37x
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/tricore/cpu.h    |  4 ----
>   target/tricore/helper.c | 22 ----------------------
>   2 files changed, 26 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 21/31] target/xtensa: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 21/31] target/xtensa: " Gavin Shan
@ 2023-11-15  1:12   ` Richard Henderson
  2023-11-16 13:29     ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:12 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
> Available CPUs:
>    test_mmuhifi_c3
>    sample_controller
>    lx106
>    dsp3400
>    de233_fpu
>    de212
>    dc233c
>    dc232b
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
> Available CPUs:
>    dc232b
>    dc233c
>    de212
>    de233_fpu
>    dsp3400
>    lx106
>    sample_controller
>    test_mmuhifi_c3
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/xtensa/cpu.h          | 10 +---------
>   target/xtensa/helper.c       | 19 +++----------------
>   target/xtensa/overlay_tool.h |  7 ++-----
>   3 files changed, 6 insertions(+), 30 deletions(-)
> 
> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
> index dd81729306..ffeb1ca43f 100644
> --- a/target/xtensa/cpu.h
> +++ b/target/xtensa/cpu.h
> @@ -491,11 +491,6 @@ typedef struct XtensaConfig {
>       bool use_first_nan;
>   } XtensaConfig;
>   
> -typedef struct XtensaConfigList {
> -    const XtensaConfig *config;
> -    struct XtensaConfigList *next;
> -} XtensaConfigList;
> -
>   #if HOST_BIG_ENDIAN
>   enum {
>       FP_F32_HIGH,
> @@ -600,8 +595,6 @@ G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
>                                                  MMUAccessType access_type, int mmu_idx,
>                                                  uintptr_t retaddr);
>   
> -#define cpu_list xtensa_cpu_list
> -
>   #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
>   
>   #if TARGET_BIG_ENDIAN
> @@ -620,13 +613,12 @@ void xtensa_collect_sr_names(const XtensaConfig *config);
>   void xtensa_translate_init(void);
>   void **xtensa_get_regfile_by_name(const char *name, int entries, int bits);
>   void xtensa_breakpoint_handler(CPUState *cs);
> -void xtensa_register_core(XtensaConfigList *node);
> +void xtensa_register_core(XtensaConfig *config);
>   void xtensa_sim_open_console(Chardev *chr);
>   void check_interrupts(CPUXtensaState *s);
>   void xtensa_irq_init(CPUXtensaState *env);
>   qemu_irq *xtensa_get_extints(CPUXtensaState *env);
>   qemu_irq xtensa_get_runstall(CPUXtensaState *env);
> -void xtensa_cpu_list(void);
>   void xtensa_sync_window_from_phys(CPUXtensaState *env);
>   void xtensa_sync_phys_from_window(CPUXtensaState *env);
>   void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
> diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
> index dbeb97a953..3654739b09 100644
> --- a/target/xtensa/helper.c
> +++ b/target/xtensa/helper.c
> @@ -35,8 +35,6 @@
>   #include "qemu/qemu-print.h"
>   #include "qemu/host-utils.h"
>   
> -static struct XtensaConfigList *xtensa_cores;
> -
>   static void add_translator_to_hash(GHashTable *translator,
>                                      const char *name,
>                                      const XtensaOpcodeOps *opcode)
> @@ -187,17 +185,15 @@ static void xtensa_core_class_init(ObjectClass *oc, void *data)
>       cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
>   }
>   
> -void xtensa_register_core(XtensaConfigList *node)
> +void xtensa_register_core(XtensaConfig *config)
>   {
>       TypeInfo type = {
>           .parent = TYPE_XTENSA_CPU,
>           .class_init = xtensa_core_class_init,
> -        .class_data = (void *)node->config,
> +        .class_data = (void *)config,
>       };

This patch does two things and should be split.


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 22/31] target: Use generic cpu_model_from_type()
  2023-11-14 23:56 ` [PATCH v5 22/31] target: Use generic cpu_model_from_type() Gavin Shan
@ 2023-11-15  1:17   ` Richard Henderson
  2023-11-16 13:32   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:17 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Use generic cpu_model_from_type() when the CPU model name needs to
> be extracted from the CPU type name.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/arm/arm-qmp-cmds.c             | 3 +--
>   target/i386/cpu.c                     | 3 +--
>   target/loongarch/loongarch-qmp-cmds.c | 3 +--
>   target/mips/sysemu/mips-qmp-cmds.c    | 3 +--
>   target/ppc/cpu_init.c                 | 3 +--
>   target/ppc/ppc-qmp-cmds.c             | 3 +--
>   target/riscv/cpu.c                    | 3 +--
>   target/riscv/riscv-qmp-cmds.c         | 3 +--
>   8 files changed, 8 insertions(+), 16 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i]
  2023-11-14 23:56 ` [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i] Gavin Shan
@ 2023-11-15  1:17   ` Richard Henderson
  2023-11-16  9:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:17 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> Constify MachineClass::valid_cpu_types[i], as suggested by Richard
> Henderson.
> 
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   hw/m68k/q800.c      | 2 +-
>   include/hw/boards.h | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 24/31] machine: Use error handling when CPU type is checked
  2023-11-14 23:56 ` [PATCH v5 24/31] machine: Use error handling when CPU type is checked Gavin Shan
@ 2023-11-15  1:21   ` Richard Henderson
  2023-11-15  1:26     ` Richard Henderson
  0 siblings, 1 reply; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:21 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> QEMU will be terminated if the specified CPU type isn't supported
> in machine_run_board_init(). The list of supported CPU type names
> is tracked by mc->valid_cpu_types.
> 
> The error handling can be used to propagate error messages, to be
> consistent how the errors are handled for other situations in the
> same function.
> 
> No functional change intended.
> 
> Suggested-by: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   hw/core/machine.c | 14 ++++++++------
>   1 file changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index 0c17398141..5b45dbbbd5 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -1394,6 +1394,7 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error *
>       MachineClass *machine_class = MACHINE_GET_CLASS(machine);
>       ObjectClass *oc = object_class_by_name(machine->cpu_type);
>       CPUClass *cc;
> +    Error *local_err = NULL;


There is no need for local_error; just use errp throughout.

With that,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

>           if (!machine_class->valid_cpu_types[i]) {
>               /* The user specified CPU is not valid */
> -            error_report("Invalid CPU type: %s", machine->cpu_type);
> -            error_printf("The valid types are: %s",
> -                         machine_class->valid_cpu_types[0]);
> +            error_setg(&local_err, "Invalid CPU type: %s", machine->cpu_type);
> +            error_append_hint(&local_err, "The valid types are: %s",
> +                              machine_class->valid_cpu_types[0]);
>               for (i = 1; machine_class->valid_cpu_types[i]; i++) {
> -                error_printf(", %s", machine_class->valid_cpu_types[i]);
> +                error_append_hint(&local_err, ", %s",
> +                                  machine_class->valid_cpu_types[i]);
>               }
> -            error_printf("\n");
> +            error_append_hint(&local_err, "\n");
>   
> -            exit(1);
> +            error_propagate(errp, local_err);
>           }
>       }
>   



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 24/31] machine: Use error handling when CPU type is checked
  2023-11-15  1:21   ` Richard Henderson
@ 2023-11-15  1:26     ` Richard Henderson
  0 siblings, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:26 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 17:21, Richard Henderson wrote:
> On 11/14/23 15:56, Gavin Shan wrote:
>> QEMU will be terminated if the specified CPU type isn't supported
>> in machine_run_board_init(). The list of supported CPU type names
>> is tracked by mc->valid_cpu_types.
>>
>> The error handling can be used to propagate error messages, to be
>> consistent how the errors are handled for other situations in the
>> same function.
>>
>> No functional change intended.
>>
>> Suggested-by: Igor Mammedov <imammedo@redhat.com>
>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>> ---
>>   hw/core/machine.c | 14 ++++++++------
>>   1 file changed, 8 insertions(+), 6 deletions(-)
>>
>> diff --git a/hw/core/machine.c b/hw/core/machine.c
>> index 0c17398141..5b45dbbbd5 100644
>> --- a/hw/core/machine.c
>> +++ b/hw/core/machine.c
>> @@ -1394,6 +1394,7 @@ void machine_run_board_init(MachineState *machine, const char 
>> *mem_path, Error *
>>       MachineClass *machine_class = MACHINE_GET_CLASS(machine);
>>       ObjectClass *oc = object_class_by_name(machine->cpu_type);
>>       CPUClass *cc;
>> +    Error *local_err = NULL;
> 
> 
> There is no need for local_error; just use errp throughout.
> 
> With that,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Alternately, is this because passing &error_fatal will abort on the first error_setg, 
without all the hints?

In which case you can move local_error into the inner block and add a comment to that effect.


r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name
  2023-11-14 23:56 ` [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name Gavin Shan
@ 2023-11-15  1:32   ` Richard Henderson
  0 siblings, 0 replies; 102+ messages in thread
From: Richard Henderson @ 2023-11-15  1:32 UTC (permalink / raw)
  To: Gavin Shan; +Cc: qemu-devel

On 11/14/23 15:56, Gavin Shan wrote:
> The names of supported CPU models instead of CPU types should be
> printed when the user specified CPU type isn't supported, to be
> consistent with the output from '-cpu ?'.
> 
> Correct the error messages to print CPU model names instead of CPU
> type names.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   hw/core/machine.c | 19 +++++++++++++++----
>   1 file changed, 15 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index 49e0bc874d..58512b4b89 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -1392,6 +1392,7 @@ static void is_cpu_type_supported(MachineState *machine, Error **errp)
>       MachineClass *mc = MACHINE_GET_CLASS(machine);
>       ObjectClass *oc = object_class_by_name(machine->cpu_type);
>       CPUClass *cc;
> +    char *model;

Move to inner block.

> @@ -1408,11 +1409,21 @@ static void is_cpu_type_supported(MachineState *machine, Error **errp)
>   
>           /* The user specified CPU type isn't valid */
>           if (!mc->valid_cpu_types[i]) {
> -            error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
> -            error_append_hint(errp, "The valid types are: %s",
> -                              mc->valid_cpu_types[0]);
> +            model = cpu_model_from_type(machine->cpu_type);
> +            g_assert(model != NULL);
> +            error_setg(errp, "Invalid CPU type: %s", model);

I see no reason for these asserts -- printf of NULL will print "(nil)".
Aborting in the middle of error reporting won't be helpful.



r~


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract()
  2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
  2023-11-15  0:26   ` Richard Henderson
@ 2023-11-15 11:18   ` BALATON Zoltan
  2023-11-15 11:24     ` Gavin Shan
  2023-11-16  7:09   ` Philippe Mathieu-Daudé
  2 siblings, 1 reply; 102+ messages in thread
From: BALATON Zoltan @ 2023-11-15 11:18 UTC (permalink / raw)
  To: Gavin Shan
  Cc: qemu-arm, qemu-devel, qemu-riscv, qemu-ppc, imp, kevans,
	richard.henderson, pbonzini, peter.maydell, imammedo, philmd,
	b.galvani, strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On Wed, 15 Nov 2023, Gavin Shan wrote:
> No need to check if @oc is abstract because it has been covered
> by cpu_class_by_name().
>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
> target/hppa/cpu.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
> index 04de1689d7..fc4d2abad7 100644
> --- a/target/hppa/cpu.c
> +++ b/target/hppa/cpu.c
> @@ -163,7 +163,6 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
>     ObjectClass *oc = object_class_by_name(typename);
>
>     if (oc &&
> -        !object_class_is_abstract(oc) &&
>         object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {

Might as well remove the line break as the remaining expression fits in 80 
chars.

Regards,
BALATON Zoltan

>         return oc;
>     }
>


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract()
  2023-11-15 11:18   ` BALATON Zoltan
@ 2023-11-15 11:24     ` Gavin Shan
  2023-11-15 11:27       ` BALATON Zoltan
  0 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-15 11:24 UTC (permalink / raw)
  To: BALATON Zoltan
  Cc: qemu-arm, qemu-devel, qemu-riscv, qemu-ppc, imp, kevans,
	richard.henderson, pbonzini, peter.maydell, imammedo, philmd,
	b.galvani, strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 11/15/23 21:18, BALATON Zoltan wrote:
> On Wed, 15 Nov 2023, Gavin Shan wrote:
>> No need to check if @oc is abstract because it has been covered
>> by cpu_class_by_name().
>>
>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>> ---
>> target/hppa/cpu.c | 1 -
>> 1 file changed, 1 deletion(-)
>>
>> diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
>> index 04de1689d7..fc4d2abad7 100644
>> --- a/target/hppa/cpu.c
>> +++ b/target/hppa/cpu.c
>> @@ -163,7 +163,6 @@ static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
>>     ObjectClass *oc = object_class_by_name(typename);
>>
>>     if (oc &&
>> -        !object_class_is_abstract(oc) &&
>>         object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
> 
> Might as well remove the line break as the remaining expression fits in 80 chars.
> 

Yes, but the whole chunk of code will be removed in PATCH[03]. So I think
we needn't the extra effort to adjust the format in PATCH[02]?

Thaks,
Gavin

>>         return oc;
>>     }
>>
> 



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract()
  2023-11-15 11:24     ` Gavin Shan
@ 2023-11-15 11:27       ` BALATON Zoltan
  0 siblings, 0 replies; 102+ messages in thread
From: BALATON Zoltan @ 2023-11-15 11:27 UTC (permalink / raw)
  To: Gavin Shan
  Cc: qemu-arm, qemu-devel, qemu-riscv, qemu-ppc, imp, kevans,
	richard.henderson, pbonzini, peter.maydell, imammedo, philmd,
	b.galvani, strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

[-- Attachment #1: Type: text/plain, Size: 1191 bytes --]

On Wed, 15 Nov 2023, Gavin Shan wrote:
> On 11/15/23 21:18, BALATON Zoltan wrote:
>> On Wed, 15 Nov 2023, Gavin Shan wrote:
>>> No need to check if @oc is abstract because it has been covered
>>> by cpu_class_by_name().
>>> 
>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>> ---
>>> target/hppa/cpu.c | 1 -
>>> 1 file changed, 1 deletion(-)
>>> 
>>> diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
>>> index 04de1689d7..fc4d2abad7 100644
>>> --- a/target/hppa/cpu.c
>>> +++ b/target/hppa/cpu.c
>>> @@ -163,7 +163,6 @@ static ObjectClass *hppa_cpu_class_by_name(const char 
>>> *cpu_model)
>>>     ObjectClass *oc = object_class_by_name(typename);
>>> 
>>>     if (oc &&
>>> -        !object_class_is_abstract(oc) &&
>>>         object_class_dynamic_cast(oc, TYPE_HPPA_CPU)) {
>> 
>> Might as well remove the line break as the remaining expression fits in 80 
>> chars.
>> 
>
> Yes, but the whole chunk of code will be removed in PATCH[03]. So I think
> we needn't the extra effort to adjust the format in PATCH[02]?

Yes, if it's gone later then does not matter.

Regards,
BALATON Zoltan

> Thaks,
> Gavin
>
>>>         return oc;
>>>     }
>>> 
>> 
>
>
>

^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class
  2023-11-15  0:22   ` Richard Henderson
@ 2023-11-16  6:58     ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  6:58 UTC (permalink / raw)
  To: Richard Henderson, Gavin Shan; +Cc: qemu-devel

On 15/11/23 01:22, Richard Henderson wrote:
> On 11/14/23 15:55, Gavin Shan wrote:
>> 'ev67' CPU class will be returned to match everything, which makes
>> no sense as mentioned in the comments. Remove the logic to fall
>> back to 'ev67' CPU class to match everything.
>>
>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>> ---
>>   target/alpha/cpu.c | 7 ++-----
>>   1 file changed, 2 insertions(+), 5 deletions(-)
> 
> The subject is wrong -- ev67 cpu class is still present.
> Better as
> 
>    target/alpha: Remove fallback to ev67 cpu class
> 
> with that,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Also:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract()
  2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
  2023-11-15  0:26   ` Richard Henderson
  2023-11-15 11:18   ` BALATON Zoltan
@ 2023-11-16  7:09   ` Philippe Mathieu-Daudé
  2 siblings, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:09 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:55, Gavin Shan wrote:
> No need to check if @oc is abstract because it has been covered
> by cpu_class_by_name().

Since commit 3a9d0d7b64 ("hw/cpu: Call object_class_is_abstract() once 
in cpu_class_by_name()") ...

> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/hppa/cpu.c | 1 -
>   1 file changed, 1 deletion(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 06/31] cpu: Add generic cpu_list() Gavin Shan
  2023-11-15  0:37   ` Richard Henderson
@ 2023-11-16  7:39   ` Philippe Mathieu-Daudé
  2023-11-16  7:51     ` Philippe Mathieu-Daudé
  1 sibling, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:39 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Gavin,

On 15/11/23 00:56, Gavin Shan wrote:
> Add generic cpu_list() to replace the individual target's implementation
> in the subsequent commits. Currently, there are 3 targets with no cpu_list()
> implementation: microblaze and nios2. With this applied, those two targets
> switch to the generic cpu_list().
> 
> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
> Available CPUs:
>    microblaze-cpu
> 
> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
> Available CPUs:
>    nios2-cpu
> 
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   bsd-user/main.c |  5 +----
>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>   2 files changed, 27 insertions(+), 7 deletions(-)


> diff --git a/cpu-target.c b/cpu-target.c
> index c078c0e91b..acfc654b95 100644
> --- a/cpu-target.c
> +++ b/cpu-target.c
> @@ -24,6 +24,7 @@
>   #include "hw/qdev-core.h"
>   #include "hw/qdev-properties.h"
>   #include "qemu/error-report.h"
> +#include "qemu/qemu-print.h"
>   #include "migration/vmstate.h"
>   #ifdef CONFIG_USER_ONLY
>   #include "qemu.h"
> @@ -283,12 +284,34 @@ const char *parse_cpu_option(const char *cpu_option)
>       return cpu_type;
>   }
>   
> +#ifndef cpu_list
> +static void cpu_list_entry(gpointer data, gpointer user_data)
> +{
> +    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
> +    const char *typename = object_class_get_name(OBJECT_CLASS(data));
> +    g_autofree char *model = cpu_model_from_type(typename);
> +
> +    if (cc->deprecation_note) {
> +        qemu_printf("  %s (deprecated)\n", model);
> +    } else {
> +        qemu_printf("  %s\n", model);
> +    }
> +}
> +
> +static void cpu_list(void)
> +{
> +    GSList *list;
> +
> +    list = object_class_get_list_sorted(TYPE_CPU, false);
> +    qemu_printf("Available CPUs:\n");

Since this output will likely be displayed a lot, IMHO it is worth
doing a first pass to get the number of available CPUs. If it is 1,
print using singular but even better smth like:

        "This machine can only be used with the following CPU:"

That said, this can be done later on top, so:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> +    g_slist_foreach(list, cpu_list_entry, NULL);
> +    g_slist_free(list);
> +}
> +#endif




^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 05/31] cpu: Add helper cpu_model_from_type()
  2023-11-14 23:56 ` [PATCH v5 05/31] cpu: Add helper cpu_model_from_type() Gavin Shan
  2023-11-15  0:35   ` Richard Henderson
@ 2023-11-16  7:45   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:45 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Add helper cpu_model_from_type() to extract the CPU model name from
> the CPU type name in two circumstances: (1) The CPU type name is the
> combination of the CPU model name and suffix. (2) The CPU type name
> is same to the CPU model name.
> 
> The helper will be used in the subsequent commits to conver the
> CPU type name to the CPU model name.
> 
> Suggested-by: Igor Mammedov <imammedo@redhat.com>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   cpu-target.c          | 15 +++++++++++++++
>   include/hw/core/cpu.h | 12 ++++++++++++
>   2 files changed, 27 insertions(+)


> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index c0c8320413..57ceb46bc1 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -779,6 +779,18 @@ void cpu_reset(CPUState *cpu);
>    */
>   ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
>   
> +/**
> + * cpu_model_from_type:
> + * @typename: The CPU type name
> + *
> + * Extract the CPU model name from the CPU type name. The
> + * CPU type name is either the combination of the CPU model
> + * name and suffix, or same to the CPU model name.
> + *
> + * Returns: CPU model name or NULL if the CPU class doesn't exist

Worth adding:

     *          The user should g_free() the string once no longer
     *          needed.

> + */


Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 07/31] target/alpha: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 07/31] target/alpha: Use " Gavin Shan
  2023-11-15  0:38   ` Richard Henderson
@ 2023-11-16  7:47   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:47 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
> Available CPUs:
>    ev4-alpha-cpu
>    ev5-alpha-cpu
>    ev56-alpha-cpu
>    ev6-alpha-cpu
>    ev67-alpha-cpu
>    ev68-alpha-cpu
>    pca56-alpha-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-alpha -cpu ?
> Available CPUs:
>    ev4
>    ev5
>    ev56
>    ev6
>    ev67
>    ev68
>    pca56
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/alpha/cpu.c | 17 -----------------
>   target/alpha/cpu.h |  3 ---
>   2 files changed, 20 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-16  7:39   ` Philippe Mathieu-Daudé
@ 2023-11-16  7:51     ` Philippe Mathieu-Daudé
  2023-11-16 10:19       ` Philippe Mathieu-Daudé
  2023-11-16 10:34       ` Gavin Shan
  0 siblings, 2 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:51 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
> Hi Gavin,
> 
> On 15/11/23 00:56, Gavin Shan wrote:
>> Add generic cpu_list() to replace the individual target's implementation
>> in the subsequent commits. Currently, there are 3 targets with no 
>> cpu_list()
>> implementation: microblaze and nios2. With this applied, those two 
>> targets
>> switch to the generic cpu_list().
>>
>> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
>> Available CPUs:
>>    microblaze-cpu
>>
>> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
>> Available CPUs:
>>    nios2-cpu
>>
>> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>> ---
>>   bsd-user/main.c |  5 +----
>>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>>   2 files changed, 27 insertions(+), 7 deletions(-)
> 
> 
>> diff --git a/cpu-target.c b/cpu-target.c
>> index c078c0e91b..acfc654b95 100644
>> --- a/cpu-target.c
>> +++ b/cpu-target.c
>> @@ -24,6 +24,7 @@
>>   #include "hw/qdev-core.h"
>>   #include "hw/qdev-properties.h"
>>   #include "qemu/error-report.h"
>> +#include "qemu/qemu-print.h"
>>   #include "migration/vmstate.h"
>>   #ifdef CONFIG_USER_ONLY
>>   #include "qemu.h"
>> @@ -283,12 +284,34 @@ const char *parse_cpu_option(const char 
>> *cpu_option)
>>       return cpu_type;
>>   }
>> +#ifndef cpu_list
>> +static void cpu_list_entry(gpointer data, gpointer user_data)
>> +{
>> +    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>> +    const char *typename = object_class_get_name(OBJECT_CLASS(data));
>> +    g_autofree char *model = cpu_model_from_type(typename);
>> +
>> +    if (cc->deprecation_note) {
>> +        qemu_printf("  %s (deprecated)\n", model);
>> +    } else {
>> +        qemu_printf("  %s\n", model);
>> +    }
>> +}
>> +
>> +static void cpu_list(void)
>> +{
>> +    GSList *list;
>> +
>> +    list = object_class_get_list_sorted(TYPE_CPU, false);
>> +    qemu_printf("Available CPUs:\n");
> 
> Since this output will likely be displayed a lot, IMHO it is worth
> doing a first pass to get the number of available CPUs. If it is 1,
> print using singular but even better smth like:
> 
>         "This machine can only be used with the following CPU:"

Hmm I missed this code is common to user/system emulation.

System helper could be clever by using the intersection of cpu_list()
and MachineClass::valid_cpu_types[] sets.

> That said, this can be done later on top, so:
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> 
>> +    g_slist_foreach(list, cpu_list_entry, NULL);
>> +    g_slist_free(list);
>> +}
>> +#endif
> 
> 



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 08/31] target/arm: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 08/31] target/arm: " Gavin Shan
  2023-11-15  0:41   ` Richard Henderson
@ 2023-11-16  7:51   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:51 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> No changes of the output from the following command before and
> after it's applied.
> 
> [gshan@gshan q]$ ./build/qemu-system-aarch64 -cpu ?
> Available CPUs:
>    a64fx
>    arm1026
>    arm1136
>    arm1136-r2
>    arm1176
>    arm11mpcore
>    arm926
>    arm946
>    cortex-a15
>    cortex-a35
>    cortex-a53
>    cortex-a55
>    cortex-a57
>    cortex-a7
>    cortex-a710
>    cortex-a72
>    cortex-a76
>    cortex-a8
>    cortex-a9
>    cortex-m0
>    cortex-m3
>    cortex-m33
>    cortex-m4
>    cortex-m55
>    cortex-m7
>    cortex-r5
>    cortex-r52
>    cortex-r5f
>    max
>    neoverse-n1
>    neoverse-n2
>    neoverse-v1
>    pxa250
>    pxa255
>    pxa260
>    pxa261
>    pxa262
>    pxa270-a0
>    pxa270-a1
>    pxa270
>    pxa270-b0
>    pxa270-b1
>    pxa270-c0
>    pxa270-c5
>    sa1100
>    sa1110
>    ti925t
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/arm/cpu.h    |  3 ---
>   target/arm/helper.c | 46 ---------------------------------------------
>   2 files changed, 49 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 09/31] target/avr: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 09/31] target/avr: " Gavin Shan
  2023-11-15  0:42   ` Richard Henderson
@ 2023-11-16  7:51   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:51 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
> avr5-avr-cpu
> avr51-avr-cpu
> avr6-avr-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-avr -cpu ?
> Available CPUs:
>    avr5
>    avr51
>    avr6
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/avr/cpu.c | 15 ---------------
>   target/avr/cpu.h |  2 --
>   2 files changed, 17 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 10/31] target/cris: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 10/31] target/cris: " Gavin Shan
  2023-11-15  0:44   ` Richard Henderson
@ 2023-11-16  7:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:52 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
> Available CPUs:
>    crisv8
>    crisv9
>    crisv10
>    crisv11
>    crisv17
>    crisv32
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-cris -cpu ?
> Available CPUs:
>    crisv10
>    crisv11
>    crisv17
>    crisv32
>    crisv8
>    crisv9
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/cris/cpu.c | 38 --------------------------------------
>   target/cris/cpu.h |  3 ---
>   2 files changed, 41 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 11/31] target/hexagon: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 11/31] target/hexagon: " Gavin Shan
  2023-11-15  0:46   ` Richard Henderson
@ 2023-11-16  7:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:52 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> No changes in the output from the following command.
> 
> [gshan@gshan q]$ ./build/qemu-hexagon -cpu ?
> Available CPUs:
>    v67
>    v68
>    v69
>    v71
>    v73
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/hexagon/cpu.c | 20 --------------------
>   target/hexagon/cpu.h |  3 ---
>   2 files changed, 23 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 12/31] target/hppa: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 12/31] target/hppa: " Gavin Shan
  2023-11-15  0:57   ` Richard Henderson
@ 2023-11-16  7:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:52 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> No changes in the output from the following command.
> 
> [gshan@gshan q]$ ./build/qemu-system-hppa -cpu ?
> Available CPUs:
>    hppa
>    hppa64
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/hppa/cpu.c | 24 ------------------------
>   target/hppa/cpu.h |  3 ---
>   2 files changed, 27 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 15/31] target/mips: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 15/31] target/mips: " Gavin Shan
  2023-11-15  1:02   ` Richard Henderson
@ 2023-11-16  7:53   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:53 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
> MIPS '4Kc'
> MIPS '4Km'
> MIPS '4KEcR1'
> MIPS 'XBurstR1'
> MIPS '4KEmR1'
> MIPS '4KEc'
> MIPS '4KEm'
> MIPS '24Kc'
> MIPS '24KEc'
> MIPS '24Kf'
> MIPS '34Kf'
> MIPS '74Kf'
> MIPS 'XBurstR2'
> MIPS 'M14K'
> MIPS 'M14Kc'
> MIPS 'P5600'
> MIPS 'mips32r6-generic'
> MIPS 'I7200'
> MIPS 'R4000'
> MIPS 'VR5432'
> MIPS '5Kc'
> MIPS '5Kf'
> MIPS '20Kc'
> MIPS 'MIPS64R2-generic'
> MIPS '5KEc'
> MIPS '5KEf'
> MIPS 'I6400'
> MIPS 'I6500'
> MIPS 'Loongson-2E'
> MIPS 'Loongson-2F'
> MIPS 'Loongson-3A1000'
> MIPS 'Loongson-3A4000'
> MIPS 'mips64dspr2'
> MIPS 'Octeon68XX'
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
> Available CPUs:
>    20Kc
>    24Kc
>    24KEc
>    24Kf
>    34Kf
>    4Kc
>    4KEc
>    4KEcR1
>    4KEm
>    4KEmR1
>    4Km
>    5Kc
>    5KEc
>    5KEf
>    5Kf
>    74Kf
>    I6400
>    I6500
>    I7200
>    Loongson-2E
>    Loongson-2F
>    Loongson-3A1000
>    Loongson-3A4000
>    M14K
>    M14Kc
>    mips32r6-generic
>    mips64dspr2
>    MIPS64R2-generic
>    Octeon68XX
>    P5600
>    R4000
>    VR5432
>    XBurstR1
>    XBurstR2
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/mips/cpu-defs.c.inc | 9 ---------
>   target/mips/cpu.h          | 4 ----
>   2 files changed, 13 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 18/31] target/rx: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 18/31] target/rx: " Gavin Shan
  2023-11-15  1:07   ` Richard Henderson
@ 2023-11-16  7:54   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:54 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
> Available CPUs:
>    rx62n-rx-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
> Available CPUs:
>    rx62n
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/rx/cpu.c | 16 ----------------
>   target/rx/cpu.h |  3 ---
>   2 files changed, 19 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 19/31] target/sh4: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 19/31] target/sh4: " Gavin Shan
  2023-11-15  1:08   ` Richard Henderson
@ 2023-11-16  7:55   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:55 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> sh7750r
> sh7751r
> sh7785
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
> Available CPUs:
>    sh7750r
>    sh7751r
>    sh7785
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/sh4/cpu.c | 17 -----------------
>   target/sh4/cpu.h |  3 ---
>   2 files changed, 20 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 20/31] target/tricore: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 20/31] target/tricore: " Gavin Shan
  2023-11-15  1:09   ` Richard Henderson
@ 2023-11-16  7:55   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  7:55 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> No changes in the output from the following command.
> 
> [gshan@gshan q]$ ./build/qemu-system-tricore -cpu ?
> Available CPUs:
>    tc1796
>    tc1797
>    tc27x
>    tc37x
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/tricore/cpu.h    |  4 ----
>   target/tricore/helper.c | 22 ----------------------
>   2 files changed, 26 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 30/31] hw/arm: Check CPU type in machine_run_board_init()
  2023-11-14 23:56 ` [PATCH v5 30/31] hw/arm: " Gavin Shan
@ 2023-11-16  8:35   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  8:35 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Gavin,

On 15/11/23 00:56, Gavin Shan wrote:
> Set mc->valid_cpu_types so that the user specified CPU type can
> be validated in machine_run_board_init(). We needn't to do it by
> ourselves.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   hw/arm/bananapi_m2u.c   | 12 ++++++------
>   hw/arm/cubieboard.c     | 12 ++++++------
>   hw/arm/mps2-tz.c        | 20 ++++++++++++++------
>   hw/arm/mps2.c           | 25 +++++++++++++++++++------
>   hw/arm/msf2-som.c       | 12 ++++++------
>   hw/arm/musca.c          | 13 ++++++-------
>   hw/arm/npcm7xx_boards.c | 13 ++++++-------
>   hw/arm/orangepi.c       | 12 ++++++------
>   8 files changed, 69 insertions(+), 50 deletions(-)


> diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
> index 668db5ed61..1c88e76a22 100644
> --- a/hw/arm/mps2-tz.c
> +++ b/hw/arm/mps2-tz.c
> @@ -191,6 +191,16 @@ OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE)
>   /* For cpu{0,1}_mpu_{ns,s}, means "leave at SSE's default value" */
>   #define MPU_REGION_DEFAULT UINT32_MAX
>   
> +static const char * const valid_cpu_types[] = {

Generic variable name,

> +    ARM_CPU_TYPE_NAME("cortex-m33"),
> +    NULL
> +};
> +
> +static const char * const mps3tz_an547_valid_cpu_types[] = {

then specific, is a bit confusing.

Better declare the array in the machine_class_init() methods ...

> +    ARM_CPU_TYPE_NAME("cortex-m55"),
> +    NULL
> +};
> +
>   static const uint32_t an505_oscclk[] = {

>       40000000,
>       24580000,
> @@ -813,12 +823,6 @@ static void mps2tz_common_init(MachineState *machine)
>       int num_ppcs;
>       int i;
>   
> -    if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
> -        error_report("This board can only be used with CPU %s",
> -                     mc->default_cpu_type);
> -        exit(1);
> -    }
> -
>       if (machine->ram_size != mc->default_ram_size) {
>           char *sz = size_to_str(mc->default_ram_size);
>           error_report("Invalid RAM size, should be %s", sz);
> @@ -1325,6 +1329,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)

... here. See for example
https://lore.kernel.org/qemu-devel/20231115232154.4515-2-philmd@linaro.org/.

>       mc->max_cpus = mc->default_cpus;
>       mmc->fpga_type = FPGA_AN505;
>       mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
> +    mc->valid_cpu_types = valid_cpu_types;
>       mmc->scc_id = 0x41045050;
>       mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
>       mmc->apb_periph_frq = mmc->sysclk_frq;
> @@ -1354,6 +1359,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
>       mc->max_cpus = mc->default_cpus;
>       mmc->fpga_type = FPGA_AN521;
>       mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
> +    mc->valid_cpu_types = valid_cpu_types;
>       mmc->scc_id = 0x41045210;
>       mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */
>       mmc->apb_periph_frq = mmc->sysclk_frq;
> @@ -1383,6 +1389,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data)
>       mc->max_cpus = mc->default_cpus;
>       mmc->fpga_type = FPGA_AN524;
>       mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33");
> +    mc->valid_cpu_types = valid_cpu_types;
>       mmc->scc_id = 0x41045240;
>       mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
>       mmc->apb_periph_frq = mmc->sysclk_frq;
> @@ -1417,6 +1424,7 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data)
>       mc->max_cpus = mc->default_cpus;
>       mmc->fpga_type = FPGA_AN547;
>       mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m55");
> +    mc->valid_cpu_types = mps3tz_an547_valid_cpu_types;
>       mmc->scc_id = 0x41055470;
>       mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */
>       mmc->apb_periph_frq = 25 * 1000 * 1000; /* 25MHz */



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported()
  2023-11-14 23:56 ` [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported() Gavin Shan
@ 2023-11-16  9:33   ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  9:33 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> The logic, to check if the specified CPU type is supported in
> machine_run_board_init(), is independent enough. Factor it out into
> helper is_cpu_type_supported(). machine_run_board_init() looks a bit
> clean with this. Since we're here, @machine_class is renamed to @mc
> to avoid multiple line spanning of code. The comments are tweaked a
> bit either.
> 
> No functional change intended.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   hw/core/machine.c | 82 +++++++++++++++++++++++++----------------------
>   1 file changed, 44 insertions(+), 38 deletions(-)
> 
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index 5b45dbbbd5..49e0bc874d 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -1387,13 +1387,51 @@ out:
>       return r;
>   }
>   
> +static void is_cpu_type_supported(MachineState *machine, Error **errp)

'const MachineState *'.

> +{
> +    MachineClass *mc = MACHINE_GET_CLASS(machine);
> +    ObjectClass *oc = object_class_by_name(machine->cpu_type);
> +    CPUClass *cc;
> +    int i;
> +
> +    /*
> +     * Check if the user specified CPU type is supported when the valid
> +     * CPU types have been determined. Note that the user specified CPU
> +     * type is provided through '-cpu' option.
> +     */
> +    if (mc->valid_cpu_types && machine->cpu_type) {
> +        for (i = 0; mc->valid_cpu_types[i]; i++) {
> +            if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) {
> +                break;
> +            }
> +        }
> +
> +        /* The user specified CPU type isn't valid */
> +        if (!mc->valid_cpu_types[i]) {
> +            error_setg(errp, "Invalid CPU type: %s", machine->cpu_type);
> +            error_append_hint(errp, "The valid types are: %s",
> +                              mc->valid_cpu_types[0]);

This hint could be clearer if only an unique CPU is allowed.

> +            for (i = 1; mc->valid_cpu_types[i]; i++) {
> +                error_append_hint(errp, ", %s", mc->valid_cpu_types[i]);
> +            }
> +
> +            error_append_hint(errp, "\n");
> +            return;
> +        }
> +    }
> +
> +    /* Check if CPU type is deprecated and warn if so */
> +    cc = CPU_CLASS(oc);
> +    if (cc && cc->deprecation_note) {
> +        warn_report("CPU model %s is deprecated -- %s",
> +                    machine->cpu_type, cc->deprecation_note);
> +    }
> +}



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i]
  2023-11-14 23:56 ` [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i] Gavin Shan
  2023-11-15  1:17   ` Richard Henderson
@ 2023-11-16  9:52   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16  9:52 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Constify MachineClass::valid_cpu_types[i], as suggested by Richard
> Henderson.
> 
> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   hw/m68k/q800.c      | 2 +-
>   include/hw/boards.h | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)

Preferably:

-- >8 --
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index 1d7cd5ff1c..83d1571d02 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -726,19 +726,18 @@ static GlobalProperty hw_compat_q800[] = {
  };
  static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800);

-static const char *q800_machine_valid_cpu_types[] = {
-    M68K_CPU_TYPE_NAME("m68040"),
-    NULL
-};
-
  static void q800_machine_class_init(ObjectClass *oc, void *data)
  {
+    static const char * const valid_cpu_types[] = {
+        M68K_CPU_TYPE_NAME("m68040"),
+        NULL
+    };
      MachineClass *mc = MACHINE_CLASS(oc);

      mc->desc = "Macintosh Quadra 800";
      mc->init = q800_machine_init;
      mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
-    mc->valid_cpu_types = q800_machine_valid_cpu_types;
+    mc->valid_cpu_types = valid_cpu_types;
      mc->max_cpus = 1;
      mc->block_default_type = IF_SCSI;
      mc->default_ram_id = "m68k_mac.ram";
---

Since commit 3d1611bfa1 ("hw/hppa: Allow C3700 with 64-bit and B160L
with 32-bit CPU only") we need to update hw/hppa/machine.c:

-- >8 --
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 9d08f39490..c8da7c18d5 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -672,19 +672,18 @@ static void hppa_nmi(NMIState *n, int cpu_index, 
Error **errp)
      }
  }

-static const char *HP_B160L_machine_valid_cpu_types[] = {
-    TYPE_HPPA_CPU,
-    NULL
-};
-
  static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data)
  {
+    static const char * const valid_cpu_types[] = {
+        TYPE_HPPA_CPU,
+        NULL
+    };
      MachineClass *mc = MACHINE_CLASS(oc);
      NMIClass *nc = NMI_CLASS(oc);

      mc->desc = "HP B160L workstation";
      mc->default_cpu_type = TYPE_HPPA_CPU;
-    mc->valid_cpu_types = HP_B160L_machine_valid_cpu_types;
+    mc->valid_cpu_types = valid_cpu_types;
      mc->init = machine_HP_B160L_init;
      mc->reset = hppa_machine_reset;
      mc->block_default_type = IF_SCSI;
@@ -709,19 +708,18 @@ static const TypeInfo 
HP_B160L_machine_init_typeinfo = {
      },
  };

-static const char *HP_C3700_machine_valid_cpu_types[] = {
-    TYPE_HPPA64_CPU,
-    NULL
-};
-
  static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data)
  {
+    static const char * const valid_cpu_types[] = {
+        TYPE_HPPA64_CPU,
+        NULL
+    };
      MachineClass *mc = MACHINE_CLASS(oc);
      NMIClass *nc = NMI_CLASS(oc);

      mc->desc = "HP C3700 workstation";
      mc->default_cpu_type = TYPE_HPPA64_CPU;
-    mc->valid_cpu_types = HP_C3700_machine_valid_cpu_types;
+    mc->valid_cpu_types = valid_cpu_types;
      mc->init = machine_HP_C3700_init;
      mc->reset = hppa_machine_reset;
      mc->block_default_type = IF_SCSI;
---


^ permalink raw reply related	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 00/31] Unified CPU type check
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (30 preceding siblings ...)
  2023-11-14 23:56 ` [PATCH v5 31/31] hw/riscv/shakti_c: " Gavin Shan
@ 2023-11-16 10:01 ` Philippe Mathieu-Daudé
  2023-11-16 10:12   ` Gavin Shan
  2023-11-16 13:35 ` Philippe Mathieu-Daudé
  32 siblings, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 10:01 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Gavin,

On 15/11/23 00:55, Gavin Shan wrote:
> There are two places where the user specified CPU type is checked to see
> if it's supported or allowed by the board: machine_run_board_init() and
> mc->init(). We don't have to maintain two duplicate sets of logic. This
> series intends to move the check to machine_run_board_init() so that we
> have unified CPU type check.
> 
> PATCH[01-04] consolidate CPUClass::class_by_name() so that the returned
>               CPU class is checked for once in cpu_class_by_name()
> PATCH[05]    add generic helper cpu_model_from_type() to extract the CPU
>               model name from the CPU type name
> PATCH[06]    add generic cpu_list(), to be reused by most of the targets
> PATCH[07-21] switch to generic cpu_list() for most of the targets
> PATCH[22]    use generic helper cpu_model_from_type() for several targets
> PATCH[23-31] validate the CPU type in machine_run_board_init() for the
>               individual board
> 
> v1: https://lists.nongnu.org/archive/html/qemu-arm/2023-07/msg00302.html
> v2: https://lists.nongnu.org/archive/html/qemu-arm/2023-07/msg00528.html
> v3: https://lists.nongnu.org/archive/html/qemu-arm/2023-09/msg00157.html
> v4: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00005.html

Maybe I missed the comment in earlier series, but what is the plan for
the following targets?

$ git grep 'define cpu_list'
target/i386/cpu.h:2289:#define cpu_list x86_cpu_list
target/ppc/cpu.h:1623:#define cpu_list ppc_cpu_list
target/s390x/cpu.h:922:#define cpu_list s390_cpu_list
target/sparc/cpu.h:673:#define cpu_list sparc_cpu_list

Thanks,

Phil.


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 00/31] Unified CPU type check
  2023-11-16 10:01 ` [PATCH v5 00/31] Unified CPU type check Philippe Mathieu-Daudé
@ 2023-11-16 10:12   ` Gavin Shan
  0 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-16 10:12 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Phil,

On 11/16/23 20:01, Philippe Mathieu-Daudé wrote:
> On 15/11/23 00:55, Gavin Shan wrote:
>> There are two places where the user specified CPU type is checked to see
>> if it's supported or allowed by the board: machine_run_board_init() and
>> mc->init(). We don't have to maintain two duplicate sets of logic. This
>> series intends to move the check to machine_run_board_init() so that we
>> have unified CPU type check.
>>
>> PATCH[01-04] consolidate CPUClass::class_by_name() so that the returned
>>               CPU class is checked for once in cpu_class_by_name()
>> PATCH[05]    add generic helper cpu_model_from_type() to extract the CPU
>>               model name from the CPU type name
>> PATCH[06]    add generic cpu_list(), to be reused by most of the targets
>> PATCH[07-21] switch to generic cpu_list() for most of the targets
>> PATCH[22]    use generic helper cpu_model_from_type() for several targets
>> PATCH[23-31] validate the CPU type in machine_run_board_init() for the
>>               individual board
>>
>> v1: https://lists.nongnu.org/archive/html/qemu-arm/2023-07/msg00302.html
>> v2: https://lists.nongnu.org/archive/html/qemu-arm/2023-07/msg00528.html
>> v3: https://lists.nongnu.org/archive/html/qemu-arm/2023-09/msg00157.html
>> v4: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00005.html
> 
> Maybe I missed the comment in earlier series, but what is the plan for
> the following targets?
> 
> $ git grep 'define cpu_list'
> target/i386/cpu.h:2289:#define cpu_list x86_cpu_list
> target/ppc/cpu.h:1623:#define cpu_list ppc_cpu_list
> target/s390x/cpu.h:922:#define cpu_list s390_cpu_list
> target/sparc/cpu.h:673:#define cpu_list sparc_cpu_list
> 

Thanks a lot for your review.

The generic cpu_list() was suggested by Richard on v5, so there're nothing
you missed. For those targets, there are target dependent output from
xxx_cpu_list() and the generic cpu_list() doesn't fit. So the plan is to
leave them as of being.

Thanks,
Gavin



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-16  7:51     ` Philippe Mathieu-Daudé
@ 2023-11-16 10:19       ` Philippe Mathieu-Daudé
  2023-11-16 10:25         ` Philippe Mathieu-Daudé
  2023-11-16 10:34       ` Gavin Shan
  1 sibling, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 10:19 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin, Marcin Juszkiewicz

On 16/11/23 08:51, Philippe Mathieu-Daudé wrote:
> On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
>> Hi Gavin,
>>
>> On 15/11/23 00:56, Gavin Shan wrote:
>>> Add generic cpu_list() to replace the individual target's implementation
>>> in the subsequent commits. Currently, there are 3 targets with no 
>>> cpu_list()
>>> implementation: microblaze and nios2. With this applied, those two 
>>> targets
>>> switch to the generic cpu_list().
>>>
>>> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
>>> Available CPUs:
>>>    microblaze-cpu
>>>
>>> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
>>> Available CPUs:
>>>    nios2-cpu
>>>
>>> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>> ---
>>>   bsd-user/main.c |  5 +----
>>>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>>>   2 files changed, 27 insertions(+), 7 deletions(-)
>>
>>
>>> diff --git a/cpu-target.c b/cpu-target.c
>>> index c078c0e91b..acfc654b95 100644
>>> --- a/cpu-target.c
>>> +++ b/cpu-target.c
>>> @@ -24,6 +24,7 @@
>>>   #include "hw/qdev-core.h"
>>>   #include "hw/qdev-properties.h"
>>>   #include "qemu/error-report.h"
>>> +#include "qemu/qemu-print.h"
>>>   #include "migration/vmstate.h"
>>>   #ifdef CONFIG_USER_ONLY
>>>   #include "qemu.h"
>>> @@ -283,12 +284,34 @@ const char *parse_cpu_option(const char 
>>> *cpu_option)
>>>       return cpu_type;
>>>   }
>>> +#ifndef cpu_list
>>> +static void cpu_list_entry(gpointer data, gpointer user_data)
>>> +{
>>> +    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>>> +    const char *typename = object_class_get_name(OBJECT_CLASS(data));
>>> +    g_autofree char *model = cpu_model_from_type(typename);
>>> +
>>> +    if (cc->deprecation_note) {
>>> +        qemu_printf("  %s (deprecated)\n", model);
>>> +    } else {
>>> +        qemu_printf("  %s\n", model);

Wondering how this scale to heterogeneous emulation. Should we
display the architecture, i.e.:

-- >8 --
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 76ef59de0a..aeff182a37 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -792,6 +792,8 @@ ObjectClass *cpu_class_by_name(const char *typename, 
const char *cpu_model);
   */
  char *cpu_model_from_type(const char *typename);

+char *cpu_arch_from_type(const char *typename);
+
  /**
   * cpu_create:
   * @typename: The CPU type.
diff --git a/cpu-target.c b/cpu-target.c
index acfc654b95..75412f902f 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -257,6 +257,12 @@ char *cpu_model_from_type(const char *typename)
      return g_strdup(typename);
  }

+char *cpu_arch_from_type(const char *typename)
+{
+    assert(g_str_has_suffix(CPU_RESOLVING_TYPE, "-cpu"));
+    return g_strndup(CPU_RESOLVING_TYPE, strlen(CPU_RESOLVING_TYPE) - 
strlen("-cpu"));
+}
+
  const char *parse_cpu_option(const char *cpu_option)
  {
      ObjectClass *oc;
@@ -290,12 +296,11 @@ static void cpu_list_entry(gpointer data, gpointer 
user_data)
      CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
      const char *typename = object_class_get_name(OBJECT_CLASS(data));
      g_autofree char *model = cpu_model_from_type(typename);
+    g_autofree char *arch = cpu_arch_from_type(typename);
+    g_autofree char *arch_up = g_ascii_strup(arch, -1);

-    if (cc->deprecation_note) {
-        qemu_printf("  %s (deprecated)\n", model);
-    } else {
-        qemu_printf("  %s\n", model);
-    }
+    qemu_printf("  %s (%s%s)\n", model, arch_up,
+                cc->deprecation_note ? ", deprecated" : "");
  }
---

Produces:

qemu-system-aarch64 -M mps2-an500 -cpu \?
Available CPUs:
   a64fx (ARM)
   arm1026 (ARM)
   arm1136 (ARM)
   arm1136-r2 (ARM)
   arm1176 (ARM)
   arm11mpcore (ARM)
   arm926 (ARM)
   arm946 (ARM)
   cortex-a15 (ARM)
   cortex-a35 (ARM)
   cortex-a53 (ARM)
   cortex-a55 (ARM)
   cortex-a57 (ARM)
   cortex-a7 (ARM)
   cortex-a710 (ARM)
   cortex-a72 (ARM)
   cortex-a76 (ARM)
   cortex-a8 (ARM)
   cortex-a9 (ARM)
   cortex-m0 (ARM)
   cortex-m3 (ARM)
   cortex-m33 (ARM)
   cortex-m4 (ARM)
   cortex-m55 (ARM)
   cortex-m7 (ARM)
   cortex-r5 (ARM)
   cortex-r52 (ARM)
   cortex-r5f (ARM)
   host (ARM)
   max (ARM)

Bah, host/max are meaningless here. We'll need to filter somehow,
or rename them.


^ permalink raw reply related	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-16 10:19       ` Philippe Mathieu-Daudé
@ 2023-11-16 10:25         ` Philippe Mathieu-Daudé
  2023-11-16 10:37           ` Gavin Shan
  0 siblings, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 10:25 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 16/11/23 11:19, Philippe Mathieu-Daudé wrote:
> On 16/11/23 08:51, Philippe Mathieu-Daudé wrote:
>> On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
>>> Hi Gavin,
>>>
>>> On 15/11/23 00:56, Gavin Shan wrote:
>>>> Add generic cpu_list() to replace the individual target's 
>>>> implementation
>>>> in the subsequent commits. Currently, there are 3 targets with no 
>>>> cpu_list()
>>>> implementation: microblaze and nios2. With this applied, those two 
>>>> targets
>>>> switch to the generic cpu_list().
>>>>
>>>> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
>>>> Available CPUs:
>>>>    microblaze-cpu
>>>>
>>>> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
>>>> Available CPUs:
>>>>    nios2-cpu
>>>>
>>>> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
>>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>>> ---
>>>>   bsd-user/main.c |  5 +----
>>>>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>>>>   2 files changed, 27 insertions(+), 7 deletions(-)
>>>
>>>
>>>> diff --git a/cpu-target.c b/cpu-target.c
>>>> index c078c0e91b..acfc654b95 100644
>>>> --- a/cpu-target.c
>>>> +++ b/cpu-target.c
>>>> @@ -24,6 +24,7 @@
>>>>   #include "hw/qdev-core.h"
>>>>   #include "hw/qdev-properties.h"
>>>>   #include "qemu/error-report.h"
>>>> +#include "qemu/qemu-print.h"
>>>>   #include "migration/vmstate.h"
>>>>   #ifdef CONFIG_USER_ONLY
>>>>   #include "qemu.h"
>>>> @@ -283,12 +284,34 @@ const char *parse_cpu_option(const char 
>>>> *cpu_option)
>>>>       return cpu_type;
>>>>   }
>>>> +#ifndef cpu_list
>>>> +static void cpu_list_entry(gpointer data, gpointer user_data)
>>>> +{
>>>> +    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>>>> +    const char *typename = object_class_get_name(OBJECT_CLASS(data));
>>>> +    g_autofree char *model = cpu_model_from_type(typename);
>>>> +
>>>> +    if (cc->deprecation_note) {
>>>> +        qemu_printf("  %s (deprecated)\n", model);
>>>> +    } else {
>>>> +        qemu_printf("  %s\n", model);
> 
> Wondering how this scale to heterogeneous emulation. Should we
> display the architecture, i.e.:
> 
> -- >8 --
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 76ef59de0a..aeff182a37 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -792,6 +792,8 @@ ObjectClass *cpu_class_by_name(const char *typename, 
> const char *cpu_model);
>    */
>   char *cpu_model_from_type(const char *typename);
> 
> +char *cpu_arch_from_type(const char *typename);
> +
>   /**
>    * cpu_create:
>    * @typename: The CPU type.
> diff --git a/cpu-target.c b/cpu-target.c
> index acfc654b95..75412f902f 100644
> --- a/cpu-target.c
> +++ b/cpu-target.c
> @@ -257,6 +257,12 @@ char *cpu_model_from_type(const char *typename)
>       return g_strdup(typename);
>   }
> 
> +char *cpu_arch_from_type(const char *typename)
> +{
> +    assert(g_str_has_suffix(CPU_RESOLVING_TYPE, "-cpu"));
> +    return g_strndup(CPU_RESOLVING_TYPE, strlen(CPU_RESOLVING_TYPE) - 
> strlen("-cpu"));

Not good enough:

$ ./qemu-system-mips64el -M mps2-an500 -cpu \?
Available CPUs:
   20Kc (MIPS64)
   24Kc (MIPS64)
   24KEc (MIPS64)
   24Kf (MIPS64)
   34Kf (MIPS64)
   4Kc (MIPS64)
   4KEc (MIPS64)
   4KEcR1 (MIPS64)
   4KEm (MIPS64)
   4KEmR1 (MIPS64)
   4Km (MIPS64)
   5Kc (MIPS64)
   5KEc (MIPS64)
   5KEf (MIPS64)
   5Kf (MIPS64)

Anyhow we can't use CPU_RESOLVING_TYPE in heterogeneous context,
so we'll probably have to add the arch as a CPUClass field.

> +}
> +
>   const char *parse_cpu_option(const char *cpu_option)
>   {
>       ObjectClass *oc;
> @@ -290,12 +296,11 @@ static void cpu_list_entry(gpointer data, gpointer 
> user_data)
>       CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>       const char *typename = object_class_get_name(OBJECT_CLASS(data));
>       g_autofree char *model = cpu_model_from_type(typename);
> +    g_autofree char *arch = cpu_arch_from_type(typename);
> +    g_autofree char *arch_up = g_ascii_strup(arch, -1);
> 
> -    if (cc->deprecation_note) {
> -        qemu_printf("  %s (deprecated)\n", model);
> -    } else {
> -        qemu_printf("  %s\n", model);
> -    }
> +    qemu_printf("  %s (%s%s)\n", model, arch_up,
> +                cc->deprecation_note ? ", deprecated" : "");
>   }
> ---
> 
> Produces:
> 
> qemu-system-aarch64 -M mps2-an500 -cpu \?
> Available CPUs:
>    a64fx (ARM)
>    arm1026 (ARM)
>    arm1136 (ARM)
>    arm1136-r2 (ARM)
>    arm1176 (ARM)
>    arm11mpcore (ARM)
>    arm926 (ARM)
>    arm946 (ARM)
>    cortex-a15 (ARM)
>    cortex-a35 (ARM)
>    cortex-a53 (ARM)
>    cortex-a55 (ARM)
>    cortex-a57 (ARM)
>    cortex-a7 (ARM)
>    cortex-a710 (ARM)
>    cortex-a72 (ARM)
>    cortex-a76 (ARM)



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 13/31] target/loongarch: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 13/31] target/loongarch: " Gavin Shan
  2023-11-15  0:59   ` Richard Henderson
@ 2023-11-16 10:27   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 10:27 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
> la132-loongarch-cpu
> la464-loongarch-cpu
> max-loongarch-cpu
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-loongarch64 -cpu ?
> Available CPUs:
>    la132
>    la464
>    max
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/loongarch/cpu.c | 15 ---------------
>   target/loongarch/cpu.h |  4 ----
>   2 files changed, 19 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 14/31] target/m68k: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 14/31] target/m68k: " Gavin Shan
  2023-11-15  1:01   ` Richard Henderson
@ 2023-11-16 10:27   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 10:27 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
> cfv4e
> m5206
> m5208
> m68000
> m68010
> m68020
> m68030
> m68040
> m68060
> any
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-m68k -cpu ?
> Available CPUs:
>    any
>    cfv4e
>    m5206
>    m5208
>    m68000
>    m68010
>    m68020
>    m68030
>    m68040
>    m68060
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/m68k/cpu.h    |  4 ----
>   target/m68k/helper.c | 40 ----------------------------------------
>   2 files changed, 44 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 16/31] target/openrisc: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 16/31] target/openrisc: " Gavin Shan
  2023-11-15  1:04   ` Richard Henderson
@ 2023-11-16 10:28   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 10:28 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-or1k -cpu ?
> Available CPUs:
>    or1200
>    any
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-or1k -cpu ?
> Available CPUs:
>    any
>    or1200
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/openrisc/cpu.c | 42 ------------------------------------------
>   target/openrisc/cpu.h |  3 ---
>   2 files changed, 45 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 17/31] target/riscv: Use generic cpu_list()
  2023-11-14 23:56 ` [PATCH v5 17/31] target/riscv: " Gavin Shan
  2023-11-15  1:05   ` Richard Henderson
@ 2023-11-16 10:28   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 10:28 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Before it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
> any
> max
> rv64
> shakti-c
> sifive-e51
> sifive-u54
> thead-c906
> veyron-v1
> x-rv128
> 
> After it's applied:
> 
> [gshan@gshan q]$ ./build/qemu-system-riscv64 -cpu ?
> Available CPUs:
>    any
>    max
>    rv64
>    shakti-c
>    sifive-e51
>    sifive-u54
>    thead-c906
>    veyron-v1
>    x-rv128
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/riscv/cpu.c | 29 -----------------------------
>   target/riscv/cpu.h |  2 --
>   2 files changed, 31 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-16  7:51     ` Philippe Mathieu-Daudé
  2023-11-16 10:19       ` Philippe Mathieu-Daudé
@ 2023-11-16 10:34       ` Gavin Shan
  2023-11-16 13:22         ` Philippe Mathieu-Daudé
  1 sibling, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-16 10:34 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Phil,

On 11/16/23 17:51, Philippe Mathieu-Daudé wrote:
> On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
>> On 15/11/23 00:56, Gavin Shan wrote:
>>> Add generic cpu_list() to replace the individual target's implementation
>>> in the subsequent commits. Currently, there are 3 targets with no cpu_list()
>>> implementation: microblaze and nios2. With this applied, those two targets
>>> switch to the generic cpu_list().
>>>
>>> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
>>> Available CPUs:
>>>    microblaze-cpu
>>>
>>> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
>>> Available CPUs:
>>>    nios2-cpu
>>>
>>> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>> ---
>>>   bsd-user/main.c |  5 +----
>>>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>>>   2 files changed, 27 insertions(+), 7 deletions(-)
>>
>>
>>> diff --git a/cpu-target.c b/cpu-target.c
>>> index c078c0e91b..acfc654b95 100644
>>> --- a/cpu-target.c
>>> +++ b/cpu-target.c
>>> @@ -24,6 +24,7 @@
>>>   #include "hw/qdev-core.h"
>>>   #include "hw/qdev-properties.h"
>>>   #include "qemu/error-report.h"
>>> +#include "qemu/qemu-print.h"
>>>   #include "migration/vmstate.h"
>>>   #ifdef CONFIG_USER_ONLY
>>>   #include "qemu.h"
>>> @@ -283,12 +284,34 @@ const char *parse_cpu_option(const char *cpu_option)
>>>       return cpu_type;
>>>   }
>>> +#ifndef cpu_list
>>> +static void cpu_list_entry(gpointer data, gpointer user_data)
>>> +{
>>> +    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>>> +    const char *typename = object_class_get_name(OBJECT_CLASS(data));
>>> +    g_autofree char *model = cpu_model_from_type(typename);
>>> +
>>> +    if (cc->deprecation_note) {
>>> +        qemu_printf("  %s (deprecated)\n", model);
>>> +    } else {
>>> +        qemu_printf("  %s\n", model);
>>> +    }
>>> +}
>>> +
>>> +static void cpu_list(void)
>>> +{
>>> +    GSList *list;
>>> +
>>> +    list = object_class_get_list_sorted(TYPE_CPU, false);
>>> +    qemu_printf("Available CPUs:\n");
>>
>> Since this output will likely be displayed a lot, IMHO it is worth
>> doing a first pass to get the number of available CPUs. If it is 1,
>> print using singular but even better smth like:
>>
>>         "This machine can only be used with the following CPU:"
> 
> Hmm I missed this code is common to user/system emulation.
> 
> System helper could be clever by using the intersection of cpu_list()
> and MachineClass::valid_cpu_types[] sets.
> 

When cpu_list() is called, it's possible the machine type option isn't
parsed yet. Besides, this function is usually used by "qemu-system-arm -cpu ?".
So I wouldn't connect to MachineClass::valid_cpu_types[] here if you agree.

Thanks,
Gavin

>> That said, this can be done later on top, so:
>> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>>
>>> +    g_slist_foreach(list, cpu_list_entry, NULL);
>>> +    g_slist_free(list);
>>> +}
>>> +#endif
>>
>>
> 



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-16 10:25         ` Philippe Mathieu-Daudé
@ 2023-11-16 10:37           ` Gavin Shan
  0 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-16 10:37 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Phil,

On 11/16/23 20:25, Philippe Mathieu-Daudé wrote:
> On 16/11/23 11:19, Philippe Mathieu-Daudé wrote:
>> On 16/11/23 08:51, Philippe Mathieu-Daudé wrote:
>>> On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
>>>> On 15/11/23 00:56, Gavin Shan wrote:
>>>>> Add generic cpu_list() to replace the individual target's implementation
>>>>> in the subsequent commits. Currently, there are 3 targets with no cpu_list()
>>>>> implementation: microblaze and nios2. With this applied, those two targets
>>>>> switch to the generic cpu_list().
>>>>>
>>>>> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
>>>>> Available CPUs:
>>>>>    microblaze-cpu
>>>>>
>>>>> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
>>>>> Available CPUs:
>>>>>    nios2-cpu
>>>>>
>>>>> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
>>>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>>>> ---
>>>>>   bsd-user/main.c |  5 +----
>>>>>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>>>>>   2 files changed, 27 insertions(+), 7 deletions(-)
>>>>
>>>>
>>>>> diff --git a/cpu-target.c b/cpu-target.c
>>>>> index c078c0e91b..acfc654b95 100644
>>>>> --- a/cpu-target.c
>>>>> +++ b/cpu-target.c
>>>>> @@ -24,6 +24,7 @@
>>>>>   #include "hw/qdev-core.h"
>>>>>   #include "hw/qdev-properties.h"
>>>>>   #include "qemu/error-report.h"
>>>>> +#include "qemu/qemu-print.h"
>>>>>   #include "migration/vmstate.h"
>>>>>   #ifdef CONFIG_USER_ONLY
>>>>>   #include "qemu.h"
>>>>> @@ -283,12 +284,34 @@ const char *parse_cpu_option(const char *cpu_option)
>>>>>       return cpu_type;
>>>>>   }
>>>>> +#ifndef cpu_list
>>>>> +static void cpu_list_entry(gpointer data, gpointer user_data)
>>>>> +{
>>>>> +    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>>>>> +    const char *typename = object_class_get_name(OBJECT_CLASS(data));
>>>>> +    g_autofree char *model = cpu_model_from_type(typename);
>>>>> +
>>>>> +    if (cc->deprecation_note) {
>>>>> +        qemu_printf("  %s (deprecated)\n", model);
>>>>> +    } else {
>>>>> +        qemu_printf("  %s\n", model);
>>
>> Wondering how this scale to heterogeneous emulation. Should we
>> display the architecture, i.e.:
>>
>> -- >8 --
>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
>> index 76ef59de0a..aeff182a37 100644
>> --- a/include/hw/core/cpu.h
>> +++ b/include/hw/core/cpu.h
>> @@ -792,6 +792,8 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
>>    */
>>   char *cpu_model_from_type(const char *typename);
>>
>> +char *cpu_arch_from_type(const char *typename);
>> +
>>   /**
>>    * cpu_create:
>>    * @typename: The CPU type.
>> diff --git a/cpu-target.c b/cpu-target.c
>> index acfc654b95..75412f902f 100644
>> --- a/cpu-target.c
>> +++ b/cpu-target.c
>> @@ -257,6 +257,12 @@ char *cpu_model_from_type(const char *typename)
>>       return g_strdup(typename);
>>   }
>>
>> +char *cpu_arch_from_type(const char *typename)
>> +{
>> +    assert(g_str_has_suffix(CPU_RESOLVING_TYPE, "-cpu"));
>> +    return g_strndup(CPU_RESOLVING_TYPE, strlen(CPU_RESOLVING_TYPE) - strlen("-cpu"));
> 
> Not good enough:
> 
> $ ./qemu-system-mips64el -M mps2-an500 -cpu \?
> Available CPUs:
>    20Kc (MIPS64)
>    24Kc (MIPS64)
>    24KEc (MIPS64)
>    24Kf (MIPS64)
>    34Kf (MIPS64)
>    4Kc (MIPS64)
>    4KEc (MIPS64)
>    4KEcR1 (MIPS64)
>    4KEm (MIPS64)
>    4KEmR1 (MIPS64)
>    4Km (MIPS64)
>    5Kc (MIPS64)
>    5KEc (MIPS64)
>    5KEf (MIPS64)
>    5Kf (MIPS64)
> 
> Anyhow we can't use CPU_RESOLVING_TYPE in heterogeneous context,
> so we'll probably have to add the arch as a CPUClass field.
> 

CPU_RESOLVING_TYPE has been pinned to one specific target. We need to
improve this to support heterogeneous scenario in the future if you
agree. How about to figure out the improvement in the future to support
heterogeneous case and leave it as what we had?

Thanks,
Gavin

>> +}
>> +
>>   const char *parse_cpu_option(const char *cpu_option)
>>   {
>>       ObjectClass *oc;
>> @@ -290,12 +296,11 @@ static void cpu_list_entry(gpointer data, gpointer user_data)
>>       CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>>       const char *typename = object_class_get_name(OBJECT_CLASS(data));
>>       g_autofree char *model = cpu_model_from_type(typename);
>> +    g_autofree char *arch = cpu_arch_from_type(typename);
>> +    g_autofree char *arch_up = g_ascii_strup(arch, -1);
>>
>> -    if (cc->deprecation_note) {
>> -        qemu_printf("  %s (deprecated)\n", model);
>> -    } else {
>> -        qemu_printf("  %s\n", model);
>> -    }
>> +    qemu_printf("  %s (%s%s)\n", model, arch_up,
>> +                cc->deprecation_note ? ", deprecated" : "");
>>   }
>> ---
>>
>> Produces:
>>
>> qemu-system-aarch64 -M mps2-an500 -cpu \?
>> Available CPUs:
>>    a64fx (ARM)
>>    arm1026 (ARM)
>>    arm1136 (ARM)
>>    arm1136-r2 (ARM)
>>    arm1176 (ARM)
>>    arm11mpcore (ARM)
>>    arm926 (ARM)
>>    arm946 (ARM)
>>    cortex-a15 (ARM)
>>    cortex-a35 (ARM)
>>    cortex-a53 (ARM)
>>    cortex-a55 (ARM)
>>    cortex-a57 (ARM)
>>    cortex-a7 (ARM)
>>    cortex-a710 (ARM)
>>    cortex-a72 (ARM)
>>    cortex-a76 (ARM)
> 



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 06/31] cpu: Add generic cpu_list()
  2023-11-16 10:34       ` Gavin Shan
@ 2023-11-16 13:22         ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 13:22 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 16/11/23 11:34, Gavin Shan wrote:
> Hi Phil,
> 
> On 11/16/23 17:51, Philippe Mathieu-Daudé wrote:
>> On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
>>> On 15/11/23 00:56, Gavin Shan wrote:
>>>> Add generic cpu_list() to replace the individual target's 
>>>> implementation
>>>> in the subsequent commits. Currently, there are 3 targets with no 
>>>> cpu_list()
>>>> implementation: microblaze and nios2. With this applied, those two 
>>>> targets
>>>> switch to the generic cpu_list().
>>>>
>>>> [gshan@gshan q]$ ./build/qemu-system-microblaze -cpu ?
>>>> Available CPUs:
>>>>    microblaze-cpu
>>>>
>>>> [gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
>>>> Available CPUs:
>>>>    nios2-cpu
>>>>
>>>> Suggested-by: Richard Henderson <richard.henderson@linaro.org>
>>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>>> ---
>>>>   bsd-user/main.c |  5 +----
>>>>   cpu-target.c    | 29 ++++++++++++++++++++++++++---
>>>>   2 files changed, 27 insertions(+), 7 deletions(-)
>>>
>>>
>>>> diff --git a/cpu-target.c b/cpu-target.c
>>>> index c078c0e91b..acfc654b95 100644
>>>> --- a/cpu-target.c
>>>> +++ b/cpu-target.c
>>>> @@ -24,6 +24,7 @@
>>>>   #include "hw/qdev-core.h"
>>>>   #include "hw/qdev-properties.h"
>>>>   #include "qemu/error-report.h"
>>>> +#include "qemu/qemu-print.h"
>>>>   #include "migration/vmstate.h"
>>>>   #ifdef CONFIG_USER_ONLY
>>>>   #include "qemu.h"
>>>> @@ -283,12 +284,34 @@ const char *parse_cpu_option(const char 
>>>> *cpu_option)
>>>>       return cpu_type;
>>>>   }
>>>> +#ifndef cpu_list
>>>> +static void cpu_list_entry(gpointer data, gpointer user_data)
>>>> +{
>>>> +    CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
>>>> +    const char *typename = object_class_get_name(OBJECT_CLASS(data));
>>>> +    g_autofree char *model = cpu_model_from_type(typename);
>>>> +
>>>> +    if (cc->deprecation_note) {
>>>> +        qemu_printf("  %s (deprecated)\n", model);
>>>> +    } else {
>>>> +        qemu_printf("  %s\n", model);
>>>> +    }
>>>> +}
>>>> +
>>>> +static void cpu_list(void)
>>>> +{
>>>> +    GSList *list;
>>>> +
>>>> +    list = object_class_get_list_sorted(TYPE_CPU, false);
>>>> +    qemu_printf("Available CPUs:\n");
>>>
>>> Since this output will likely be displayed a lot, IMHO it is worth
>>> doing a first pass to get the number of available CPUs. If it is 1,
>>> print using singular but even better smth like:
>>>
>>>         "This machine can only be used with the following CPU:"
>>
>> Hmm I missed this code is common to user/system emulation.
>>
>> System helper could be clever by using the intersection of cpu_list()
>> and MachineClass::valid_cpu_types[] sets.
>>
> 
> When cpu_list() is called, it's possible the machine type option isn't
> parsed yet. Besides, this function is usually used by "qemu-system-arm 
> -cpu ?".

Not sure this is a good example :)

   $ qemu-system-arm -cpu ?
   qemu-system-arm: No machine specified, and there is no default
   Use -machine help to list supported machines

> So I wouldn't connect to MachineClass::valid_cpu_types[] here if you agree.

Agreed.



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 21/31] target/xtensa: Use generic cpu_list()
  2023-11-15  1:12   ` Richard Henderson
@ 2023-11-16 13:29     ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 13:29 UTC (permalink / raw)
  To: Richard Henderson, Gavin Shan; +Cc: qemu-devel, Max Filippov

On 15/11/23 02:12, Richard Henderson wrote:
> On 11/14/23 15:56, Gavin Shan wrote:
>> Before it's applied:
>>
>> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
>> Available CPUs:
>>    test_mmuhifi_c3
>>    sample_controller
>>    lx106
>>    dsp3400
>>    de233_fpu
>>    de212
>>    dc233c
>>    dc232b
>>
>> After it's applied:
>>
>> [gshan@gshan q]$ ./build/qemu-system-xtensa -cpu ?
>> Available CPUs:
>>    dc232b
>>    dc233c
>>    de212
>>    de233_fpu
>>    dsp3400
>>    lx106
>>    sample_controller
>>    test_mmuhifi_c3
>>
>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>> ---
>>   target/xtensa/cpu.h          | 10 +---------
>>   target/xtensa/helper.c       | 19 +++----------------
>>   target/xtensa/overlay_tool.h |  7 ++-----
>>   3 files changed, 6 insertions(+), 30 deletions(-)
>>
>> diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
>> index dd81729306..ffeb1ca43f 100644
>> --- a/target/xtensa/cpu.h
>> +++ b/target/xtensa/cpu.h
>> @@ -491,11 +491,6 @@ typedef struct XtensaConfig {
>>       bool use_first_nan;
>>   } XtensaConfig;
>> -typedef struct XtensaConfigList {
>> -    const XtensaConfig *config;
>> -    struct XtensaConfigList *next;
>> -} XtensaConfigList;
>> -
>>   #if HOST_BIG_ENDIAN
>>   enum {
>>       FP_F32_HIGH,
>> @@ -600,8 +595,6 @@ G_NORETURN void 
>> xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
>>                                                  MMUAccessType 
>> access_type, int mmu_idx,
>>                                                  uintptr_t retaddr);
>> -#define cpu_list xtensa_cpu_list
>> -
>>   #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU
>>   #if TARGET_BIG_ENDIAN
>> @@ -620,13 +613,12 @@ void xtensa_collect_sr_names(const XtensaConfig 
>> *config);
>>   void xtensa_translate_init(void);
>>   void **xtensa_get_regfile_by_name(const char *name, int entries, int 
>> bits);
>>   void xtensa_breakpoint_handler(CPUState *cs);
>> -void xtensa_register_core(XtensaConfigList *node);
>> +void xtensa_register_core(XtensaConfig *config);
>>   void xtensa_sim_open_console(Chardev *chr);
>>   void check_interrupts(CPUXtensaState *s);
>>   void xtensa_irq_init(CPUXtensaState *env);
>>   qemu_irq *xtensa_get_extints(CPUXtensaState *env);
>>   qemu_irq xtensa_get_runstall(CPUXtensaState *env);
>> -void xtensa_cpu_list(void);
>>   void xtensa_sync_window_from_phys(CPUXtensaState *env);
>>   void xtensa_sync_phys_from_window(CPUXtensaState *env);
>>   void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
>> diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
>> index dbeb97a953..3654739b09 100644
>> --- a/target/xtensa/helper.c
>> +++ b/target/xtensa/helper.c
>> @@ -35,8 +35,6 @@
>>   #include "qemu/qemu-print.h"
>>   #include "qemu/host-utils.h"
>> -static struct XtensaConfigList *xtensa_cores;
>> -
>>   static void add_translator_to_hash(GHashTable *translator,
>>                                      const char *name,
>>                                      const XtensaOpcodeOps *opcode)
>> @@ -187,17 +185,15 @@ static void xtensa_core_class_init(ObjectClass 
>> *oc, void *data)
>>       cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
>>   }
>> -void xtensa_register_core(XtensaConfigList *node)
>> +void xtensa_register_core(XtensaConfig *config)
>>   {
>>       TypeInfo type = {
>>           .parent = TYPE_XTENSA_CPU,
>>           .class_init = xtensa_core_class_init,
>> -        .class_data = (void *)node->config,
>> +        .class_data = (void *)config,
>>       };
> 
> This patch does two things and should be split.

I'm doing the split. This patch becomes:

-- >8 --
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index dd81729306..d9c49a35fa 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -600,8 +600,6 @@ G_NORETURN void 
xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
                                                 MMUAccessType 
access_type, int mmu_idx,
                                                 uintptr_t retaddr);

-#define cpu_list xtensa_cpu_list
-
  #define CPU_RESOLVING_TYPE TYPE_XTENSA_CPU

  #if TARGET_BIG_ENDIAN
@@ -626,7 +624,6 @@ void check_interrupts(CPUXtensaState *s);
  void xtensa_irq_init(CPUXtensaState *env);
  qemu_irq *xtensa_get_extints(CPUXtensaState *env);
  qemu_irq xtensa_get_runstall(CPUXtensaState *env);
-void xtensa_cpu_list(void);
  void xtensa_sync_window_from_phys(CPUXtensaState *env);
  void xtensa_sync_phys_from_window(CPUXtensaState *env);
  void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta);
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index dbeb97a953..f6632df646 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -234,15 +234,6 @@ void xtensa_breakpoint_handler(CPUState *cs)
      }
  }

-void xtensa_cpu_list(void)
-{
-    XtensaConfigList *core = xtensa_cores;
-    qemu_printf("Available CPUs:\n");
-    for (; core; core = core->next) {
-        qemu_printf("  %s\n", core->config->name);
-    }
-}
-
  #ifndef CONFIG_USER_ONLY
  void xtensa_cpu_do_unaligned_access(CPUState *cs,
                                      vaddr addr, MMUAccessType access_type,
---

What is left is:

-- >8 --
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h
index d9c49a35fa..ffeb1ca43f 100644
--- a/target/xtensa/cpu.h
+++ b/target/xtensa/cpu.h
@@ -491,11 +491,6 @@ typedef struct XtensaConfig {
      bool use_first_nan;
  } XtensaConfig;

-typedef struct XtensaConfigList {
-    const XtensaConfig *config;
-    struct XtensaConfigList *next;
-} XtensaConfigList;
-
  #if HOST_BIG_ENDIAN
  enum {
      FP_F32_HIGH,
@@ -618,7 +613,7 @@ void xtensa_collect_sr_names(const XtensaConfig 
*config);
  void xtensa_translate_init(void);
  void **xtensa_get_regfile_by_name(const char *name, int entries, int 
bits);
  void xtensa_breakpoint_handler(CPUState *cs);
-void xtensa_register_core(XtensaConfigList *node);
+void xtensa_register_core(XtensaConfig *config);
  void xtensa_sim_open_console(Chardev *chr);
  void check_interrupts(CPUXtensaState *s);
  void xtensa_irq_init(CPUXtensaState *env);
diff --git a/target/xtensa/overlay_tool.h b/target/xtensa/overlay_tool.h
index 701c00eed2..7373ba7592 100644
--- a/target/xtensa/overlay_tool.h
+++ b/target/xtensa/overlay_tool.h
@@ -450,13 +450,10 @@
  #endif

  #if TARGET_BIG_ENDIAN == (XCHAL_HAVE_BE != 0)
-#define REGISTER_CORE(core) \
+#define REGISTER_CORE(config) \
      static void __attribute__((constructor)) register_core(void) \
      { \
-        static XtensaConfigList node = { \
-            .config = &core, \
-        }; \
-        xtensa_register_core(&node); \
+        xtensa_register_core(&config); \
      }
  #else
  #define REGISTER_CORE(core)
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index f6632df646..3654739b09 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -35,8 +35,6 @@
  #include "qemu/qemu-print.h"
  #include "qemu/host-utils.h"

-static struct XtensaConfigList *xtensa_cores;
-
  static void add_translator_to_hash(GHashTable *translator,
                                     const char *name,
                                     const XtensaOpcodeOps *opcode)
@@ -187,17 +185,15 @@ static void xtensa_core_class_init(ObjectClass 
*oc, void *data)
      cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
  }

-void xtensa_register_core(XtensaConfigList *node)
+void xtensa_register_core(XtensaConfig *config)
  {
      TypeInfo type = {
          .parent = TYPE_XTENSA_CPU,
          .class_init = xtensa_core_class_init,
-        .class_data = (void *)node->config,
+        .class_data = (void *)config,
      };

-    node->next = xtensa_cores;
-    xtensa_cores = node;
-    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), 
node->config->name);
+    type.name = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), config->name);
      type_register(&type);
      g_free((gpointer)type.name);
  }
---

Which I will skip for now unless Max Ack-by it, since as per commit
ac8b7db493 ("target-xtensa: extract core configuration from overlay")
this might be used externally by the overlay tool generator.

Regards,

Phil.



^ permalink raw reply related	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 22/31] target: Use generic cpu_model_from_type()
  2023-11-14 23:56 ` [PATCH v5 22/31] target: Use generic cpu_model_from_type() Gavin Shan
  2023-11-15  1:17   ` Richard Henderson
@ 2023-11-16 13:32   ` Philippe Mathieu-Daudé
  1 sibling, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 13:32 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> Use generic cpu_model_from_type() when the CPU model name needs to
> be extracted from the CPU type name.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/arm/arm-qmp-cmds.c             | 3 +--
>   target/i386/cpu.c                     | 3 +--
>   target/loongarch/loongarch-qmp-cmds.c | 3 +--
>   target/mips/sysemu/mips-qmp-cmds.c    | 3 +--
>   target/ppc/cpu_init.c                 | 3 +--
>   target/ppc/ppc-qmp-cmds.c             | 3 +--
>   target/riscv/cpu.c                    | 3 +--
>   target/riscv/riscv-qmp-cmds.c         | 3 +--
>   8 files changed, 8 insertions(+), 16 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 00/31] Unified CPU type check
  2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
                   ` (31 preceding siblings ...)
  2023-11-16 10:01 ` [PATCH v5 00/31] Unified CPU type check Philippe Mathieu-Daudé
@ 2023-11-16 13:35 ` Philippe Mathieu-Daudé
  2023-11-16 16:20   ` Philippe Mathieu-Daudé
  32 siblings, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 13:35 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Gavin,

On 15/11/23 00:55, Gavin Shan wrote:
> There are two places where the user specified CPU type is checked to see
> if it's supported or allowed by the board: machine_run_board_init() and
> mc->init(). We don't have to maintain two duplicate sets of logic. This
> series intends to move the check to machine_run_board_init() so that we
> have unified CPU type check.


> Gavin Shan (30):
>    target/alpha: Remove 'ev67' CPU class
>    target/hppa: Remove object_class_is_abstract()
>    target: Remove 'oc == NULL' check
>    cpu: Add helper cpu_model_from_type()
>    cpu: Add generic cpu_list()
>    target/alpha: Use generic cpu_list()
>    target/arm: Use generic cpu_list()
>    target/avr: Use generic cpu_list()
>    target/cris: Use generic cpu_list()
>    target/hexagon: Use generic cpu_list()
>    target/hppa: Use generic cpu_list()
>    target/loongarch: Use generic cpu_list()
>    target/m68k: Use generic cpu_list()
>    target/mips: Use generic cpu_list()
>    target/openrisc: Use generic cpu_list()
>    target/riscv: Use generic cpu_list()
>    target/rx: Use generic cpu_list()
>    target/sh4: Use generic cpu_list()
>    target/tricore: Use generic cpu_list()
>    target/xtensa: Use generic cpu_list()
>    target: Use generic cpu_model_from_type()
>    machine: Constify MachineClass::valid_cpu_types[i]

I'm queuing patches 1-3 & 5-23 to my cpus-next tree. No need to
repost them, please base them on my tree. I'll follow up with the
branch link when I finish my testing and push it.

>    machine: Use error handling when CPU type is checked
>    machine: Introduce helper is_cpu_type_supported()
>    machine: Print CPU model name instead of CPU type name
>    hw/arm/virt: Hide host CPU model for tcg
>    hw/arm/virt: Check CPU type in machine_run_board_init()
>    hw/arm/sbsa-ref: Check CPU type in machine_run_board_init()
>    hw/arm: Check CPU type in machine_run_board_init()
>    hw/riscv/shakti_c: Check CPU type in machine_run_board_init()




^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()
  2023-11-14 23:56 ` [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Gavin Shan
  2023-11-15  0:30   ` Richard Henderson
@ 2023-11-16 16:08   ` Philippe Mathieu-Daudé
  2023-11-16 23:13     ` Gavin Shan
  1 sibling, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 16:08 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:56, Gavin Shan wrote:
> From: Philippe Mathieu-Daudé <philmd@linaro.org>
> 
> For all targets, the CPU class returned from CPUClass::class_by_name()
> and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
> compatible. Lets apply the check in cpu_class_by_name() for once,
> instead of having the check in CPUClass::class_by_name() for individual
> target.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>

Gavin, this patch is missing your S-o-b tag. Do you mind responding to
this email with it? Thanks!

> ---
>   hw/core/cpu-common.c   | 8 +++++---
>   target/alpha/cpu.c     | 3 ---
>   target/arm/cpu.c       | 4 +---
>   target/avr/cpu.c       | 8 +-------
>   target/cris/cpu.c      | 4 +---
>   target/hexagon/cpu.c   | 4 +---
>   target/hppa/cpu.c      | 7 +------
>   target/loongarch/cpu.c | 8 +-------
>   target/m68k/cpu.c      | 4 +---
>   target/openrisc/cpu.c  | 4 +---
>   target/riscv/cpu.c     | 4 +---
>   target/tricore/cpu.c   | 4 +---
>   target/xtensa/cpu.c    | 4 +---
>   13 files changed, 16 insertions(+), 50 deletions(-)



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 00/31] Unified CPU type check
  2023-11-16 13:35 ` Philippe Mathieu-Daudé
@ 2023-11-16 16:20   ` Philippe Mathieu-Daudé
  2023-11-16 23:26     ` Gavin Shan
  0 siblings, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-16 16:20 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 16/11/23 14:35, Philippe Mathieu-Daudé wrote:
> Hi Gavin,
> 
> On 15/11/23 00:55, Gavin Shan wrote:
>> There are two places where the user specified CPU type is checked to see
>> if it's supported or allowed by the board: machine_run_board_init() and
>> mc->init(). We don't have to maintain two duplicate sets of logic. This
>> series intends to move the check to machine_run_board_init() so that we
>> have unified CPU type check.
> 
> 
>> Gavin Shan (30):
>>    target/alpha: Remove 'ev67' CPU class
>>    target/hppa: Remove object_class_is_abstract()
>>    target: Remove 'oc == NULL' check
>>    cpu: Add helper cpu_model_from_type()
>>    cpu: Add generic cpu_list()
>>    target/alpha: Use generic cpu_list()
>>    target/arm: Use generic cpu_list()
>>    target/avr: Use generic cpu_list()
>>    target/cris: Use generic cpu_list()
>>    target/hexagon: Use generic cpu_list()
>>    target/hppa: Use generic cpu_list()
>>    target/loongarch: Use generic cpu_list()
>>    target/m68k: Use generic cpu_list()
>>    target/mips: Use generic cpu_list()
>>    target/openrisc: Use generic cpu_list()
>>    target/riscv: Use generic cpu_list()
>>    target/rx: Use generic cpu_list()
>>    target/sh4: Use generic cpu_list()
>>    target/tricore: Use generic cpu_list()
>>    target/xtensa: Use generic cpu_list()
>>    target: Use generic cpu_model_from_type()
>>    machine: Constify MachineClass::valid_cpu_types[i]
> 
> I'm queuing patches 1-3 & 5-23 to my cpus-next tree. No need to
> repost them, please base them on my tree. I'll follow up with the
> branch link when I finish my testing and push it.

Here are these patches queued:

   https://github.com/philmd/qemu.git branches/cpus-next

I might queue more patches before the 9.0 merge window opens.

Regards,

Phil.


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name()
  2023-11-16 16:08   ` Philippe Mathieu-Daudé
@ 2023-11-16 23:13     ` Gavin Shan
  0 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-16 23:13 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Phil,

On 11/17/23 02:08, Philippe Mathieu-Daudé wrote:
> On 15/11/23 00:56, Gavin Shan wrote:
>> From: Philippe Mathieu-Daudé <philmd@linaro.org>
>>
>> For all targets, the CPU class returned from CPUClass::class_by_name()
>> and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
>> compatible. Lets apply the check in cpu_class_by_name() for once,
>> instead of having the check in CPUClass::class_by_name() for individual
>> target.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Reviewed-by: Gavin Shan <gshan@redhat.com>
>> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> 
> Gavin, this patch is missing your S-o-b tag. Do you mind responding to
> this email with it? Thanks!
> 

Yes, please add my s-o-b if you need:

Signed-off-by: Gavin Shan <gshan@redhat.com>

Thanks,
Gavin

>> ---
>>   hw/core/cpu-common.c   | 8 +++++---
>>   target/alpha/cpu.c     | 3 ---
>>   target/arm/cpu.c       | 4 +---
>>   target/avr/cpu.c       | 8 +-------
>>   target/cris/cpu.c      | 4 +---
>>   target/hexagon/cpu.c   | 4 +---
>>   target/hppa/cpu.c      | 7 +------
>>   target/loongarch/cpu.c | 8 +-------
>>   target/m68k/cpu.c      | 4 +---
>>   target/openrisc/cpu.c  | 4 +---
>>   target/riscv/cpu.c     | 4 +---
>>   target/tricore/cpu.c   | 4 +---
>>   target/xtensa/cpu.c    | 4 +---
>>   13 files changed, 16 insertions(+), 50 deletions(-)
> 



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 00/31] Unified CPU type check
  2023-11-16 16:20   ` Philippe Mathieu-Daudé
@ 2023-11-16 23:26     ` Gavin Shan
  2023-11-17  7:34       ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 102+ messages in thread
From: Gavin Shan @ 2023-11-16 23:26 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

Hi Phil,

On 11/17/23 02:20, Philippe Mathieu-Daudé wrote:
> On 16/11/23 14:35, Philippe Mathieu-Daudé wrote:
>>
>> I'm queuing patches 1-3 & 5-23 to my cpus-next tree. No need to
>> repost them, please base them on my tree. I'll follow up with the
>> branch link when I finish my testing and push it.
> 
> Here are these patches queued:
> 
>    https://github.com/philmd/qemu.git branches/cpus-next
> 
> I might queue more patches before the 9.0 merge window opens.
> 

Thanks for queuing these patches, but I don't see 'cpus-next' branch
in the repository. Please let me know if I checked out the code properly.

$ git clone https://github.com/philmd/qemu.git philmd
$ cd philmd
$ git branch
* staging
$ git branch -a | grep cpus-next
$ echo $?
1

Thanks,
Gavin



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 00/31] Unified CPU type check
  2023-11-16 23:26     ` Gavin Shan
@ 2023-11-17  7:34       ` Philippe Mathieu-Daudé
  2023-11-18  6:40         ` Gavin Shan
  0 siblings, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2023-11-17  7:34 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 17/11/23 00:26, Gavin Shan wrote:
> Hi Phil,
> 
> On 11/17/23 02:20, Philippe Mathieu-Daudé wrote:
>> On 16/11/23 14:35, Philippe Mathieu-Daudé wrote:
>>>
>>> I'm queuing patches 1-3 & 5-23 to my cpus-next tree. No need to
>>> repost them, please base them on my tree. I'll follow up with the
>>> branch link when I finish my testing and push it.
>>
>> Here are these patches queued:
>>
>>    https://github.com/philmd/qemu.git branches/cpus-next

Oops, no clue why I wrote github instead of gitlab, sorry =)

>> I might queue more patches before the 9.0 merge window opens.
>>
> 
> Thanks for queuing these patches, but I don't see 'cpus-next' branch
> in the repository. Please let me know if I checked out the code properly.
> 
> $ git clone https://github.com/philmd/qemu.git philmd
> $ cd philmd
> $ git branch
> * staging
> $ git branch -a | grep cpus-next
> $ echo $?
> 1

No need to clone, you can use in your current cloned repository:

   $ git fetch https://gitlab.com/philmd/qemu.git cpus-next:cpus-next

Regards,

Phil.


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 00/31] Unified CPU type check
  2023-11-17  7:34       ` Philippe Mathieu-Daudé
@ 2023-11-18  6:40         ` Gavin Shan
  0 siblings, 0 replies; 102+ messages in thread
From: Gavin Shan @ 2023-11-18  6:40 UTC (permalink / raw)
  To: Philippe Mathieu-Daudé, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin


On 11/17/23 17:34, Philippe Mathieu-Daudé wrote:
> On 17/11/23 00:26, Gavin Shan wrote:
>> On 11/17/23 02:20, Philippe Mathieu-Daudé wrote:
>>> On 16/11/23 14:35, Philippe Mathieu-Daudé wrote:
>>>>
>>>> I'm queuing patches 1-3 & 5-23 to my cpus-next tree. No need to
>>>> repost them, please base them on my tree. I'll follow up with the
>>>> branch link when I finish my testing and push it.
>>>
>>> Here are these patches queued:
>>>
>>>    https://github.com/philmd/qemu.git branches/cpus-next
> 
> Oops, no clue why I wrote github instead of gitlab, sorry =)
> 

No worries, Phil.

>>> I might queue more patches before the 9.0 merge window opens.
>>>
>>
>> Thanks for queuing these patches, but I don't see 'cpus-next' branch
>> in the repository. Please let me know if I checked out the code properly.
>>
>> $ git clone https://github.com/philmd/qemu.git philmd
>> $ cd philmd
>> $ git branch
>> * staging
>> $ git branch -a | grep cpus-next
>> $ echo $?
>> 1
> 
> No need to clone, you can use in your current cloned repository:
> 
>    $ git fetch https://gitlab.com/philmd/qemu.git cpus-next:cpus-next
> 

Thanks. It worked for me.

Thanks,
Gavin



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class
  2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
  2023-11-15  0:22   ` Richard Henderson
@ 2024-01-04 17:58   ` Philippe Mathieu-Daudé
  2024-01-04 18:03     ` Philippe Mathieu-Daudé
  1 sibling, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-04 17:58 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 15/11/23 00:55, Gavin Shan wrote:
> 'ev67' CPU class will be returned to match everything, which makes
> no sense as mentioned in the comments. Remove the logic to fall
> back to 'ev67' CPU class to match everything.
> 
> Signed-off-by: Gavin Shan <gshan@redhat.com>
> ---
>   target/alpha/cpu.c | 7 ++-----
>   1 file changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
> index 39cf841b3e..91fe8ae095 100644
> --- a/target/alpha/cpu.c
> +++ b/target/alpha/cpu.c
> @@ -141,11 +141,8 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model)
>       typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
>       oc = object_class_by_name(typename);
>       g_free(typename);
> -
> -    /* TODO: remove match everything nonsense */
> -    if (!oc || object_class_is_abstract(oc)) {
> -        /* Default to ev67; no reason not to emulate insns by default. */
> -        oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
> +    if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
> +        return NULL;
>       }

This breaks linux-user:

qemu-alpha: unable to find CPU model 'any'


^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class
  2024-01-04 17:58   ` Philippe Mathieu-Daudé
@ 2024-01-04 18:03     ` Philippe Mathieu-Daudé
  2024-01-04 18:12       ` Philippe Mathieu-Daudé
  0 siblings, 1 reply; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-04 18:03 UTC (permalink / raw)
  To: Gavin Shan, qemu-arm
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, richard.henderson,
	pbonzini, peter.maydell, imammedo, b.galvani,
	strahinja.p.jankovic, sundeep.lkml, kfting, wuhaotsh,
	nieklinnenbank, rad, quic_llindhol, marcin.juszkiewicz, eduardo,
	marcel.apfelbaum, wangyanan55, laurent, vijai, palmer,
	alistair.francis, bin.meng, liwei1518, dbarboza, zhiwei_liu,
	mrolnik, edgar.iglesias, bcain, gaosong, aurelien, jiaxun.yang,
	aleksandar.rikalo, chenhuacai, shorne, npiggin, clg, ysato,
	kbastian, jcmvbkbc, shan.gavin

On 4/1/24 18:58, Philippe Mathieu-Daudé wrote:
> On 15/11/23 00:55, Gavin Shan wrote:
>> 'ev67' CPU class will be returned to match everything, which makes
>> no sense as mentioned in the comments. Remove the logic to fall
>> back to 'ev67' CPU class to match everything.
>>
>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>> ---
>>   target/alpha/cpu.c | 7 ++-----
>>   1 file changed, 2 insertions(+), 5 deletions(-)
>>
>> diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
>> index 39cf841b3e..91fe8ae095 100644
>> --- a/target/alpha/cpu.c
>> +++ b/target/alpha/cpu.c
>> @@ -141,11 +141,8 @@ static ObjectClass *alpha_cpu_class_by_name(const 
>> char *cpu_model)
>>       typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
>>       oc = object_class_by_name(typename);
>>       g_free(typename);
>> -
>> -    /* TODO: remove match everything nonsense */
>> -    if (!oc || object_class_is_abstract(oc)) {
>> -        /* Default to ev67; no reason not to emulate insns by 
>> default. */
>> -        oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
>> +    if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
>> +        return NULL;
>>       }
> 
> This breaks linux-user:
> 
> qemu-alpha: unable to find CPU model 'any'

Thread 1 "qemu-alpha" hit Breakpoint 1, alpha_cpu_class_by_name 
(cpu_model=0x5555557202a0 "any") at target/alpha/cpu.c:123
123	{
(gdb) bt
#0  alpha_cpu_class_by_name (cpu_model=0x5555557202a0 "any") at 
target/alpha/cpu.c:123
#1  0x0000555555583956 in cpu_class_by_name 
(typename=typename@entry=0x555555674af8 "alpha-cpu", 
cpu_model=0x5555557202a0 "any")
     at hw/core/cpu-common.c:156
#2  0x00005555555904a1 in parse_cpu_option (cpu_option=<optimized out>) 
at cpu-target.c:257
#3  0x00005555555822e9 in main (argc=2, argv=0x7fffffffe318, 
envp=<optimized out>) at linux-user/main.c:784

in main():

  781     if (cpu_model == NULL) {
  782         cpu_model = cpu_get_model(get_elf_eflags(execfd));
  783     }
  784     cpu_type = parse_cpu_option(cpu_model);

Having:

$ cat linux-user/alpha/target_elf.h
...
#ifndef ALPHA_TARGET_ELF_H
#define ALPHA_TARGET_ELF_H
static inline const char *cpu_get_model(uint32_t eflags)
{
     return "any";
}
#endif



^ permalink raw reply	[flat|nested] 102+ messages in thread

* Re: [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class
  2024-01-04 18:03     ` Philippe Mathieu-Daudé
@ 2024-01-04 18:12       ` Philippe Mathieu-Daudé
  0 siblings, 0 replies; 102+ messages in thread
From: Philippe Mathieu-Daudé @ 2024-01-04 18:12 UTC (permalink / raw)
  To: Gavin Shan, laurent, richard.henderson
  Cc: qemu-devel, qemu-riscv, qemu-ppc, imp, kevans, pbonzini,
	peter.maydell, imammedo, b.galvani, strahinja.p.jankovic,
	sundeep.lkml, kfting, wuhaotsh, nieklinnenbank, rad, qemu-arm,
	quic_llindhol, marcin.juszkiewicz, eduardo, marcel.apfelbaum,
	wangyanan55, vijai, palmer, alistair.francis, bin.meng,
	liwei1518, dbarboza, zhiwei_liu, mrolnik, edgar.iglesias, bcain,
	gaosong, aurelien, jiaxun.yang, aleksandar.rikalo, chenhuacai,
	shorne, npiggin, clg, ysato, kbastian, jcmvbkbc, shan.gavin

On 4/1/24 19:03, Philippe Mathieu-Daudé wrote:
> On 4/1/24 18:58, Philippe Mathieu-Daudé wrote:
>> On 15/11/23 00:55, Gavin Shan wrote:
>>> 'ev67' CPU class will be returned to match everything, which makes
>>> no sense as mentioned in the comments. Remove the logic to fall
>>> back to 'ev67' CPU class to match everything.
>>>
>>> Signed-off-by: Gavin Shan <gshan@redhat.com>
>>> ---
>>>   target/alpha/cpu.c | 7 ++-----
>>>   1 file changed, 2 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
>>> index 39cf841b3e..91fe8ae095 100644
>>> --- a/target/alpha/cpu.c
>>> +++ b/target/alpha/cpu.c
>>> @@ -141,11 +141,8 @@ static ObjectClass 
>>> *alpha_cpu_class_by_name(const char *cpu_model)
>>>       typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model);
>>>       oc = object_class_by_name(typename);
>>>       g_free(typename);
>>> -
>>> -    /* TODO: remove match everything nonsense */
>>> -    if (!oc || object_class_is_abstract(oc)) {
>>> -        /* Default to ev67; no reason not to emulate insns by 
>>> default. */
>>> -        oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67"));
>>> +    if (!oc || !object_class_dynamic_cast(oc, TYPE_ALPHA_CPU)) {
>>> +        return NULL;
>>>       }
>>
>> This breaks linux-user:
>>
>> qemu-alpha: unable to find CPU model 'any'
> 
> Thread 1 "qemu-alpha" hit Breakpoint 1, alpha_cpu_class_by_name 
> (cpu_model=0x5555557202a0 "any") at target/alpha/cpu.c:123
> 123    {
> (gdb) bt
> #0  alpha_cpu_class_by_name (cpu_model=0x5555557202a0 "any") at 
> target/alpha/cpu.c:123
> #1  0x0000555555583956 in cpu_class_by_name 
> (typename=typename@entry=0x555555674af8 "alpha-cpu", 
> cpu_model=0x5555557202a0 "any")
>      at hw/core/cpu-common.c:156
> #2  0x00005555555904a1 in parse_cpu_option (cpu_option=<optimized out>) 
> at cpu-target.c:257
> #3  0x00005555555822e9 in main (argc=2, argv=0x7fffffffe318, 
> envp=<optimized out>) at linux-user/main.c:784
> 
> in main():
> 
>   781     if (cpu_model == NULL) {
>   782         cpu_model = cpu_get_model(get_elf_eflags(execfd));
>   783     }
>   784     cpu_type = parse_cpu_option(cpu_model);
> 
> Having:
> 
> $ cat linux-user/alpha/target_elf.h
> ...
> #ifndef ALPHA_TARGET_ELF_H
> #define ALPHA_TARGET_ELF_H
> static inline const char *cpu_get_model(uint32_t eflags)
> {
>      return "any";
> }
> #endif

Laurent, Richard, are you OK with this fix?

-- >8 --
diff --git a/linux-user/alpha/target_elf.h b/linux-user/alpha/target_elf.h
index 344e9f4d39..b77d638f6d 100644
--- a/linux-user/alpha/target_elf.h
+++ b/linux-user/alpha/target_elf.h
@@ -9,6 +9,6 @@
  #define ALPHA_TARGET_ELF_H
  static inline const char *cpu_get_model(uint32_t eflags)
  {
-    return "any";
+    return "ev67";
  }
  #endif
---



^ permalink raw reply related	[flat|nested] 102+ messages in thread

end of thread, other threads:[~2024-01-04 18:13 UTC | newest]

Thread overview: 102+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-11-14 23:55 [PATCH v5 00/31] Unified CPU type check Gavin Shan
2023-11-14 23:55 ` [PATCH v5 01/31] target/alpha: Remove 'ev67' CPU class Gavin Shan
2023-11-15  0:22   ` Richard Henderson
2023-11-16  6:58     ` Philippe Mathieu-Daudé
2024-01-04 17:58   ` Philippe Mathieu-Daudé
2024-01-04 18:03     ` Philippe Mathieu-Daudé
2024-01-04 18:12       ` Philippe Mathieu-Daudé
2023-11-14 23:55 ` [PATCH v5 02/31] target/hppa: Remove object_class_is_abstract() Gavin Shan
2023-11-15  0:26   ` Richard Henderson
2023-11-15 11:18   ` BALATON Zoltan
2023-11-15 11:24     ` Gavin Shan
2023-11-15 11:27       ` BALATON Zoltan
2023-11-16  7:09   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 03/31] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Gavin Shan
2023-11-15  0:30   ` Richard Henderson
2023-11-16 16:08   ` Philippe Mathieu-Daudé
2023-11-16 23:13     ` Gavin Shan
2023-11-14 23:56 ` [PATCH v5 04/31] target: Remove 'oc == NULL' check Gavin Shan
2023-11-15  0:34   ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 05/31] cpu: Add helper cpu_model_from_type() Gavin Shan
2023-11-15  0:35   ` Richard Henderson
2023-11-16  7:45   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 06/31] cpu: Add generic cpu_list() Gavin Shan
2023-11-15  0:37   ` Richard Henderson
2023-11-16  7:39   ` Philippe Mathieu-Daudé
2023-11-16  7:51     ` Philippe Mathieu-Daudé
2023-11-16 10:19       ` Philippe Mathieu-Daudé
2023-11-16 10:25         ` Philippe Mathieu-Daudé
2023-11-16 10:37           ` Gavin Shan
2023-11-16 10:34       ` Gavin Shan
2023-11-16 13:22         ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 07/31] target/alpha: Use " Gavin Shan
2023-11-15  0:38   ` Richard Henderson
2023-11-16  7:47   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 08/31] target/arm: " Gavin Shan
2023-11-15  0:41   ` Richard Henderson
2023-11-16  7:51   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 09/31] target/avr: " Gavin Shan
2023-11-15  0:42   ` Richard Henderson
2023-11-16  7:51   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 10/31] target/cris: " Gavin Shan
2023-11-15  0:44   ` Richard Henderson
2023-11-16  7:52   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 11/31] target/hexagon: " Gavin Shan
2023-11-15  0:46   ` Richard Henderson
2023-11-16  7:52   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 12/31] target/hppa: " Gavin Shan
2023-11-15  0:57   ` Richard Henderson
2023-11-16  7:52   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 13/31] target/loongarch: " Gavin Shan
2023-11-15  0:59   ` Richard Henderson
2023-11-16 10:27   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 14/31] target/m68k: " Gavin Shan
2023-11-15  1:01   ` Richard Henderson
2023-11-16 10:27   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 15/31] target/mips: " Gavin Shan
2023-11-15  1:02   ` Richard Henderson
2023-11-16  7:53   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 16/31] target/openrisc: " Gavin Shan
2023-11-15  1:04   ` Richard Henderson
2023-11-16 10:28   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 17/31] target/riscv: " Gavin Shan
2023-11-15  1:05   ` Richard Henderson
2023-11-16 10:28   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 18/31] target/rx: " Gavin Shan
2023-11-15  1:07   ` Richard Henderson
2023-11-16  7:54   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 19/31] target/sh4: " Gavin Shan
2023-11-15  1:08   ` Richard Henderson
2023-11-16  7:55   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 20/31] target/tricore: " Gavin Shan
2023-11-15  1:09   ` Richard Henderson
2023-11-16  7:55   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 21/31] target/xtensa: " Gavin Shan
2023-11-15  1:12   ` Richard Henderson
2023-11-16 13:29     ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 22/31] target: Use generic cpu_model_from_type() Gavin Shan
2023-11-15  1:17   ` Richard Henderson
2023-11-16 13:32   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 23/31] machine: Constify MachineClass::valid_cpu_types[i] Gavin Shan
2023-11-15  1:17   ` Richard Henderson
2023-11-16  9:52   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 24/31] machine: Use error handling when CPU type is checked Gavin Shan
2023-11-15  1:21   ` Richard Henderson
2023-11-15  1:26     ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 25/31] machine: Introduce helper is_cpu_type_supported() Gavin Shan
2023-11-16  9:33   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 26/31] machine: Print CPU model name instead of CPU type name Gavin Shan
2023-11-15  1:32   ` Richard Henderson
2023-11-14 23:56 ` [PATCH v5 27/31] hw/arm/virt: Hide host CPU model for tcg Gavin Shan
2023-11-14 23:56 ` [PATCH v5 28/31] hw/arm/virt: Check CPU type in machine_run_board_init() Gavin Shan
2023-11-14 23:56 ` [PATCH v5 29/31] hw/arm/sbsa-ref: " Gavin Shan
2023-11-14 23:56 ` [PATCH v5 30/31] hw/arm: " Gavin Shan
2023-11-16  8:35   ` Philippe Mathieu-Daudé
2023-11-14 23:56 ` [PATCH v5 31/31] hw/riscv/shakti_c: " Gavin Shan
2023-11-16 10:01 ` [PATCH v5 00/31] Unified CPU type check Philippe Mathieu-Daudé
2023-11-16 10:12   ` Gavin Shan
2023-11-16 13:35 ` Philippe Mathieu-Daudé
2023-11-16 16:20   ` Philippe Mathieu-Daudé
2023-11-16 23:26     ` Gavin Shan
2023-11-17  7:34       ` Philippe Mathieu-Daudé
2023-11-18  6:40         ` Gavin Shan

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