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* [RESEND PATCH v2] arm: mvebu: Power up 2nd SATA port for Thecus N2350
@ 2023-02-07  1:00 Tony Dinh
  2023-02-07  8:19 ` Stefan Roese
  2023-02-13 14:00 ` Stefan Roese
  0 siblings, 2 replies; 3+ messages in thread
From: Tony Dinh @ 2023-02-07  1:00 UTC (permalink / raw)
  To: U-Boot Mailing List, Stefan Roese; +Cc: Tom Rini, Pali Roh�r, Tony Dinh

Currently, only the 1st SATA port is powered up (by GPIO1 12).
Add GPIO1 13 in board initialization to power up the 2nd SATA port.

Note that this patch depends on the initial add-support patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---

Changes in v2:
- Use BIT macros to make it easier to see which GPIOs are used.
- Resent to correct missing BIT(0) in N2350_GPP_OUT_VAL_MID

 board/thecus/n2350/n2350.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/thecus/n2350/n2350.c b/board/thecus/n2350/n2350.c
index 4cfdfba662..fd8f95f944 100644
--- a/board/thecus/n2350/n2350.c
+++ b/board/thecus/n2350/n2350.c
@@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define N2350_GPP_OUT_ENA_LOW	(~(BIT(20) | BIT(21) | BIT(24)))
 #define N2350_GPP_OUT_ENA_MID	(~(BIT(12) | BIT(13) | BIT(16) | BIT(19) | BIT(22)))
-#define N2350_GPP_OUT_VAL_LOW	0x1200000
-#define N2350_GPP_OUT_VAL_MID	0x1001
+#define N2350_GPP_OUT_VAL_LOW	(BIT(21) | BIT(24))
+#define N2350_GPP_OUT_VAL_MID	(BIT(0) | BIT(12) | BIT(13))
 #define N2350_GPP_POL_LOW	0x0
 #define N2350_GPP_POL_MID	0x0
 
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [RESEND PATCH v2] arm: mvebu: Power up 2nd SATA port for Thecus N2350
  2023-02-07  1:00 [RESEND PATCH v2] arm: mvebu: Power up 2nd SATA port for Thecus N2350 Tony Dinh
@ 2023-02-07  8:19 ` Stefan Roese
  2023-02-13 14:00 ` Stefan Roese
  1 sibling, 0 replies; 3+ messages in thread
From: Stefan Roese @ 2023-02-07  8:19 UTC (permalink / raw)
  To: Tony Dinh, U-Boot Mailing List; +Cc: Tom Rini, Pali Roh�r

On 2/7/23 02:00, Tony Dinh wrote:
> Currently, only the 1st SATA port is powered up (by GPIO1 12).
> Add GPIO1 13 in board initialization to power up the 2nd SATA port.
> 
> Note that this patch depends on the initial add-support patch:
> https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>

Reviewed-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

> ---
> 
> Changes in v2:
> - Use BIT macros to make it easier to see which GPIOs are used.
> - Resent to correct missing BIT(0) in N2350_GPP_OUT_VAL_MID
> 
>   board/thecus/n2350/n2350.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/board/thecus/n2350/n2350.c b/board/thecus/n2350/n2350.c
> index 4cfdfba662..fd8f95f944 100644
> --- a/board/thecus/n2350/n2350.c
> +++ b/board/thecus/n2350/n2350.c
> @@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
>   
>   #define N2350_GPP_OUT_ENA_LOW	(~(BIT(20) | BIT(21) | BIT(24)))
>   #define N2350_GPP_OUT_ENA_MID	(~(BIT(12) | BIT(13) | BIT(16) | BIT(19) | BIT(22)))
> -#define N2350_GPP_OUT_VAL_LOW	0x1200000
> -#define N2350_GPP_OUT_VAL_MID	0x1001
> +#define N2350_GPP_OUT_VAL_LOW	(BIT(21) | BIT(24))
> +#define N2350_GPP_OUT_VAL_MID	(BIT(0) | BIT(12) | BIT(13))
>   #define N2350_GPP_POL_LOW	0x0
>   #define N2350_GPP_POL_MID	0x0
>   

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [RESEND PATCH v2] arm: mvebu: Power up 2nd SATA port for Thecus N2350
  2023-02-07  1:00 [RESEND PATCH v2] arm: mvebu: Power up 2nd SATA port for Thecus N2350 Tony Dinh
  2023-02-07  8:19 ` Stefan Roese
@ 2023-02-13 14:00 ` Stefan Roese
  1 sibling, 0 replies; 3+ messages in thread
From: Stefan Roese @ 2023-02-13 14:00 UTC (permalink / raw)
  To: Tony Dinh, U-Boot Mailing List; +Cc: Tom Rini, Pali Roh�r

On 2/7/23 02:00, Tony Dinh wrote:
> Currently, only the 1st SATA port is powered up (by GPIO1 12).
> Add GPIO1 13 in board initialization to power up the 2nd SATA port.
> 
> Note that this patch depends on the initial add-support patch:
> https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/
> 
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>

Applied to u-boot-marvell/master

Thanks,
Stefan

> ---
> 
> Changes in v2:
> - Use BIT macros to make it easier to see which GPIOs are used.
> - Resent to correct missing BIT(0) in N2350_GPP_OUT_VAL_MID
> 
>   board/thecus/n2350/n2350.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/board/thecus/n2350/n2350.c b/board/thecus/n2350/n2350.c
> index 4cfdfba662..fd8f95f944 100644
> --- a/board/thecus/n2350/n2350.c
> +++ b/board/thecus/n2350/n2350.c
> @@ -24,8 +24,8 @@ DECLARE_GLOBAL_DATA_PTR;
>   
>   #define N2350_GPP_OUT_ENA_LOW	(~(BIT(20) | BIT(21) | BIT(24)))
>   #define N2350_GPP_OUT_ENA_MID	(~(BIT(12) | BIT(13) | BIT(16) | BIT(19) | BIT(22)))
> -#define N2350_GPP_OUT_VAL_LOW	0x1200000
> -#define N2350_GPP_OUT_VAL_MID	0x1001
> +#define N2350_GPP_OUT_VAL_LOW	(BIT(21) | BIT(24))
> +#define N2350_GPP_OUT_VAL_MID	(BIT(0) | BIT(12) | BIT(13))
>   #define N2350_GPP_POL_LOW	0x0
>   #define N2350_GPP_POL_MID	0x0
>   

Viele Grüße,
Stefan Roese

-- 
DENX Software Engineering GmbH,      Managing Director: Erika Unter
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2023-02-13 14:03 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-02-07  1:00 [RESEND PATCH v2] arm: mvebu: Power up 2nd SATA port for Thecus N2350 Tony Dinh
2023-02-07  8:19 ` Stefan Roese
2023-02-13 14:00 ` Stefan Roese

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