* [PATCH] arm64: Unify vertical spacing in HWCAPS @ 2022-05-20 6:55 Martin Liška 2022-05-20 12:01 ` Bagas Sanjaya 0 siblings, 1 reply; 10+ messages in thread From: Martin Liška @ 2022-05-20 6:55 UTC (permalink / raw) To: linux-doc; +Cc: linux-kernel, corbet Unify vertical spacing so that same font weight is used by Sphinx. Signed-off-by: Martin Liska <mliska@suse.cz> --- Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index a8f30963e550..1e79044f51a2 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -171,96 +171,73 @@ HWCAP_PACG Documentation/arm64/pointer-authentication.rst. HWCAP2_DCPODP - Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. HWCAP2_SVE2 - Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. HWCAP2_SVEAES - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. HWCAP2_SVEPMULL - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. HWCAP2_SVEBITPERM - Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. HWCAP2_SVESHA3 - Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. HWCAP2_SVESM4 - Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. HWCAP2_FLAGM2 - Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. HWCAP2_FRINT - Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. HWCAP2_SVEI8MM - Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. HWCAP2_SVEF32MM - Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. HWCAP2_SVEF64MM - Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. HWCAP2_SVEBF16 - Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. HWCAP2_I8MM - Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. HWCAP2_BF16 - Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. HWCAP2_DGH - Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. HWCAP2_RNG - Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. HWCAP2_BTI - Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. HWCAP2_MTE - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described by Documentation/arm64/memory-tagging-extension.rst. HWCAP2_ECV - Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. HWCAP2_AFP - Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. HWCAP2_RPRES - Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. HWCAP2_MTE3 - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described by Documentation/arm64/memory-tagging-extension.rst. -- 2.36.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] arm64: Unify vertical spacing in HWCAPS 2022-05-20 6:55 [PATCH] arm64: Unify vertical spacing in HWCAPS Martin Liška @ 2022-05-20 12:01 ` Bagas Sanjaya 2022-05-20 14:01 ` Martin Liška 0 siblings, 1 reply; 10+ messages in thread From: Bagas Sanjaya @ 2022-05-20 12:01 UTC (permalink / raw) To: Martin Liška, linux-doc; +Cc: linux-kernel, corbet On 5/20/22 13:55, Martin Liška wrote: > Unify vertical spacing so that same font weight > is used by Sphinx. > > Signed-off-by: Martin Liska <mliska@suse.cz> > --- > Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- > 1 file changed, 23 deletions(-) > > diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst > index a8f30963e550..1e79044f51a2 100644 > --- a/Documentation/arm64/elf_hwcaps.rst > +++ b/Documentation/arm64/elf_hwcaps.rst > @@ -171,96 +171,73 @@ HWCAP_PACG > Documentation/arm64/pointer-authentication.rst. > > HWCAP2_DCPODP > - > Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. > > HWCAP2_SVE2 > - > Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. > > HWCAP2_SVEAES > - > Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. > > HWCAP2_SVEPMULL > - > Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. > > HWCAP2_SVEBITPERM > - > Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. > > HWCAP2_SVESHA3 > - > Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. > > HWCAP2_SVESM4 > - > Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. > > HWCAP2_FLAGM2 > - > Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. > > HWCAP2_FRINT > - > Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. > > HWCAP2_SVEI8MM > - > Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. > > HWCAP2_SVEF32MM > - > Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. > > HWCAP2_SVEF64MM > - > Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. > > HWCAP2_SVEBF16 > - > Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. > > HWCAP2_I8MM > - > Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. > > HWCAP2_BF16 > - > Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. > > HWCAP2_DGH > - > Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. > > HWCAP2_RNG > - > Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. > > HWCAP2_BTI > - > Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. > > HWCAP2_MTE > - > Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described > by Documentation/arm64/memory-tagging-extension.rst. > > HWCAP2_ECV > - > Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. > > HWCAP2_AFP > - > Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. > > HWCAP2_RPRES > - > Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. > > HWCAP2_MTE3 > - > Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described > by Documentation/arm64/memory-tagging-extension.rst. > Did you mean the font weight is heading? Something like promoting headings by removing intermediate blank lines? -- An old man doll... just what I always wanted! - Clara ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] arm64: Unify vertical spacing in HWCAPS 2022-05-20 12:01 ` Bagas Sanjaya @ 2022-05-20 14:01 ` Martin Liška 2022-05-21 8:08 ` Bagas Sanjaya 0 siblings, 1 reply; 10+ messages in thread From: Martin Liška @ 2022-05-20 14:01 UTC (permalink / raw) To: linux-doc; +Cc: linux-kernel, corbet, bagasdotme Promote headings by removing intermediate blank lines. Signed-off-by: Martin Liska <mliska@suse.cz> --- Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index a8f30963e550..1e79044f51a2 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -171,96 +171,73 @@ HWCAP_PACG Documentation/arm64/pointer-authentication.rst. HWCAP2_DCPODP - Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. HWCAP2_SVE2 - Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. HWCAP2_SVEAES - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. HWCAP2_SVEPMULL - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. HWCAP2_SVEBITPERM - Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. HWCAP2_SVESHA3 - Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. HWCAP2_SVESM4 - Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. HWCAP2_FLAGM2 - Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. HWCAP2_FRINT - Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. HWCAP2_SVEI8MM - Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. HWCAP2_SVEF32MM - Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. HWCAP2_SVEF64MM - Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. HWCAP2_SVEBF16 - Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. HWCAP2_I8MM - Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. HWCAP2_BF16 - Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. HWCAP2_DGH - Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. HWCAP2_RNG - Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. HWCAP2_BTI - Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. HWCAP2_MTE - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described by Documentation/arm64/memory-tagging-extension.rst. HWCAP2_ECV - Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. HWCAP2_AFP - Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. HWCAP2_RPRES - Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. HWCAP2_MTE3 - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described by Documentation/arm64/memory-tagging-extension.rst. -- 2.36.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] arm64: Unify vertical spacing in HWCAPS 2022-05-20 14:01 ` Martin Liška @ 2022-05-21 8:08 ` Bagas Sanjaya 2022-05-21 9:22 ` Akira Yokosawa 0 siblings, 1 reply; 10+ messages in thread From: Bagas Sanjaya @ 2022-05-21 8:08 UTC (permalink / raw) To: Martin Liška; +Cc: linux-doc, linux-kernel, corbet, Akira Yokosawa On Fri, May 20, 2022 at 04:01:33PM +0200, Martin Liška wrote: > Promote headings by removing intermediate blank lines. > > Signed-off-by: Martin Liska <mliska@suse.cz> > --- > Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- > 1 file changed, 23 deletions(-) > > diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst > index a8f30963e550..1e79044f51a2 100644 > --- a/Documentation/arm64/elf_hwcaps.rst > +++ b/Documentation/arm64/elf_hwcaps.rst > @@ -171,96 +171,73 @@ HWCAP_PACG > Documentation/arm64/pointer-authentication.rst. > > HWCAP2_DCPODP > - > Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. > > HWCAP2_SVE2 > - > Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. > > HWCAP2_SVEAES > - > Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. > > HWCAP2_SVEPMULL > - > Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. > > HWCAP2_SVEBITPERM > - > Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. > > HWCAP2_SVESHA3 > - > Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. > > HWCAP2_SVESM4 > - > Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. > > HWCAP2_FLAGM2 > - > Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. > > HWCAP2_FRINT > - > Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. > > HWCAP2_SVEI8MM > - > Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. > > HWCAP2_SVEF32MM > - > Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. > > HWCAP2_SVEF64MM > - > Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. > > HWCAP2_SVEBF16 > - > Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. > > HWCAP2_I8MM > - > Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. > > HWCAP2_BF16 > - > Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. > > HWCAP2_DGH > - > Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. > > HWCAP2_RNG > - > Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. > > HWCAP2_BTI > - > Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. > > HWCAP2_MTE > - > Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described > by Documentation/arm64/memory-tagging-extension.rst. > > HWCAP2_ECV > - > Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. > > HWCAP2_AFP > - > Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. > > HWCAP2_RPRES > - > Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. > > HWCAP2_MTE3 > - > Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described > by Documentation/arm64/memory-tagging-extension.rst. > > -- > 2.36.1 > Hi, Sorry for misunderstanding of this topic on my reply at [1]. After applying this patch and doing htmldocs build, I see the HTML diff below. diff --git a/tmp/elf_hwcaps.html b/tmp/elf_hwcaps.patched.html index 8b0b0f83ca4f9e..d13f49faebf297 100644 --- a/tmp/elf_hwcaps.html +++ b/tmp/elf_hwcaps.patched.html @@ -320,101 +320,55 @@ ID_AA64ISAR1_EL1.API == 0b0001, as described by ID_AA64ISAR1_EL1.GPI == 0b0001, as described by <a class="reference internal" href="pointer-authentication.html"><span class="doc">Pointer authentication in AArch64 Linux</span></a>.</p> </dd> -</dl> -<p>HWCAP2_DCPODP</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.</p> -</div></blockquote> -<p>HWCAP2_SVE2</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVEAES</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVEPMULL</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.</p> -</div></blockquote> -<p>HWCAP2_SVEBITPERM</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVESHA3</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVESM4</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_FLAGM2</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.</p> -</div></blockquote> -<p>HWCAP2_FRINT</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVEI8MM</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVEF32MM</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVEF64MM</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_SVEBF16</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_I8MM</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_BF16</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_DGH</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_RNG</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_BTI</p> -<blockquote> -<div><p>Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_MTE</p> -<blockquote> -<div><p>Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described +<dt>HWCAP2_DCPODP</dt><dd><p>Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.</p> +</dd> +<dt>HWCAP2_SVE2</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.</p> +</dd> +<dt>HWCAP2_SVEAES</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.</p> +</dd> +<dt>HWCAP2_SVEPMULL</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.</p> +</dd> +<dt>HWCAP2_SVEBITPERM</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.</p> +</dd> +<dt>HWCAP2_SVESHA3</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.</p> +</dd> +<dt>HWCAP2_SVESM4</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.</p> +</dd> +<dt>HWCAP2_FLAGM2</dt><dd><p>Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.</p> +</dd> +<dt>HWCAP2_FRINT</dt><dd><p>Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.</p> +</dd> +<dt>HWCAP2_SVEI8MM</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.</p> +</dd> +<dt>HWCAP2_SVEF32MM</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.</p> +</dd> +<dt>HWCAP2_SVEF64MM</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.</p> +</dd> +<dt>HWCAP2_SVEBF16</dt><dd><p>Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.</p> +</dd> +<dt>HWCAP2_I8MM</dt><dd><p>Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.</p> +</dd> +<dt>HWCAP2_BF16</dt><dd><p>Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001.</p> +</dd> +<dt>HWCAP2_DGH</dt><dd><p>Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001.</p> +</dd> +<dt>HWCAP2_RNG</dt><dd><p>Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.</p> +</dd> +<dt>HWCAP2_BTI</dt><dd><p>Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.</p> +</dd> +<dt>HWCAP2_MTE</dt><dd><p>Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described by <a class="reference internal" href="memory-tagging-extension.html"><span class="doc">Memory Tagging Extension (MTE) in AArch64 Linux</span></a>.</p> -</div></blockquote> -<p>HWCAP2_ECV</p> -<blockquote> -<div><p>Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_AFP</p> -<blockquote> -<div><p>Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_RPRES</p> -<blockquote> -<div><p>Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.</p> -</div></blockquote> -<p>HWCAP2_MTE3</p> -<blockquote> -<div><p>Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described +</dd> +<dt>HWCAP2_ECV</dt><dd><p>Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.</p> +</dd> +<dt>HWCAP2_AFP</dt><dd><p>Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.</p> +</dd> +<dt>HWCAP2_RPRES</dt><dd><p>Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.</p> +</dd> +<dt>HWCAP2_MTE3</dt><dd><p>Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described by <a class="reference internal" href="memory-tagging-extension.html"><span class="doc">Memory Tagging Extension (MTE) in AArch64 Linux</span></a>.</p> -</div></blockquote> +</dd> +</dl> </section> <section id="unused-at-hwcap-bits"> <h2>4. Unused AT_HWCAP bits<a class="headerlink" href="#unused-at-hwcap-bits" title="Permalink to this headline">¶</a></h2> So basically this doesn't promotes HWCAP2_* as headings, but rather changes HTML element used by them from <div> & <p> to <dl> & <dd>. Otherwise I don't see any visual differences. Regarding the patch subject, I don't know what unifying the vertical spacing is, so I can't tell whether the patch is correct on this context or not. Also, when submitting next iterations of your patch series, don't forget to pass -v <number> to git-format-patch(1) so that the patch subject prefix contains the correct version numbers. I gave that advice because I don't see that this patch is sent as v2 of [2]. CCing Akira to help reviewing. [1]: https://lore.kernel.org/linux-doc/4752814a-091c-9dd5-762c-6fd1a476c4bb@gmail.com/ [2]: https://lore.kernel.org/linux-doc/b95b3128-f010-dcba-1f6a-1a85dd2d20a5@suse.cz/ -- An old man doll... just what I always wanted! - Clara ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] arm64: Unify vertical spacing in HWCAPS 2022-05-21 8:08 ` Bagas Sanjaya @ 2022-05-21 9:22 ` Akira Yokosawa 0 siblings, 0 replies; 10+ messages in thread From: Akira Yokosawa @ 2022-05-21 9:22 UTC (permalink / raw) To: Bagas Sanjaya, Martin Liška Cc: linux-doc, linux-kernel, corbet, Catalin Marinas, Will Deacon, linux-arm-kernel [+Cc: arm64 maintainers] Hi Martin, On 2022/05/21 17:08, Bagas Sanjaya wrote: > On Fri, May 20, 2022 at 04:01:33PM +0200, Martin Liška wrote: >> Promote headings by removing intermediate blank lines. >> >> Signed-off-by: Martin Liska <mliska@suse.cz> >> --- >> Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- >> 1 file changed, 23 deletions(-) >> >> diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst >> index a8f30963e550..1e79044f51a2 100644 >> --- a/Documentation/arm64/elf_hwcaps.rst >> +++ b/Documentation/arm64/elf_hwcaps.rst >> @@ -171,96 +171,73 @@ HWCAP_PACG >> Documentation/arm64/pointer-authentication.rst. >> >> HWCAP2_DCPODP >> - >> Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. >> >> HWCAP2_SVE2 >> - >> Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. >> >> HWCAP2_SVEAES >> - >> Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. >> >> HWCAP2_SVEPMULL >> - >> Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. >> >> HWCAP2_SVEBITPERM >> - >> Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. >> >> HWCAP2_SVESHA3 >> - >> Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. >> >> HWCAP2_SVESM4 >> - >> Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. >> >> HWCAP2_FLAGM2 >> - >> Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. >> >> HWCAP2_FRINT >> - >> Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. >> >> HWCAP2_SVEI8MM >> - >> Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. >> >> HWCAP2_SVEF32MM >> - >> Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. >> >> HWCAP2_SVEF64MM >> - >> Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. >> >> HWCAP2_SVEBF16 >> - >> Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. >> >> HWCAP2_I8MM >> - >> Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. >> >> HWCAP2_BF16 >> - >> Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. >> >> HWCAP2_DGH >> - >> Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. >> >> HWCAP2_RNG >> - >> Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. >> >> HWCAP2_BTI >> - >> Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. >> >> HWCAP2_MTE >> - >> Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described >> by Documentation/arm64/memory-tagging-extension.rst. >> >> HWCAP2_ECV >> - >> Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. >> >> HWCAP2_AFP >> - >> Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. >> >> HWCAP2_RPRES >> - >> Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. >> >> HWCAP2_MTE3 >> - >> Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described >> by Documentation/arm64/memory-tagging-extension.rst. >> >> -- >> 2.36.1 >> > > Hi, > > Sorry for misunderstanding of this topic on my reply at [1]. > > After applying this patch and doing htmldocs build, I see the HTML > diff below. Hey Bagas, please don't speak in HTML diffs. Let's talk about ReST formatting. So, the earlier part of the lists read: ---- HWCAP_FP Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000. HWCAP_ASIMD Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000. HWCAP_EVTSTRM The generic timer is configured to generate events at a frequency of approximately 10KHz. [...] ----- I see that what Martin wants is the consistency of the format of the lists. I think the change is quite reasonable. The list construct is called "Definition lists" in ReST. See: https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#definition-lists This construct makes the defined terms be rendered in bolder face. On the other hand, similar looking existing lists: ---- HWCAP2_DCPODP Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. HWCAP2_SVE2 Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. [...] ---- are not recognized as "Definition lists" and rendered differently. Actually speaking, they are not in any list format. So my suggestion of the title would be: "docs/arm64: elf_hwcaps: Unify HWCAP lists as description lists" [...] > Also, when submitting next iterations of your patch series, don't forget > to pass -v <number> to git-format-patch(1) so that the patch subject > prefix contains the correct version numbers. I gave that advice because > I don't see that this patch is sent as v2 of [2]. > > CCing Akira to help reviewing. > > [1]: https://lore.kernel.org/linux-doc/4752814a-091c-9dd5-762c-6fd1a476c4bb@gmail.com/ > [2]: https://lore.kernel.org/linux-doc/b95b3128-f010-dcba-1f6a-1a85dd2d20a5@suse.cz/ > Yeah, please post the next version as a v3. Also, please note that this document belongs to the ARM64 PORT (AARCH64 ARCHITECTURE) subsystem. So please consult the entry in MAINTAINERS and prepare a patch against its tree at: T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git and CC to the maintainers and the list of the subsystem. Thanks, Akira ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] arm64: Unify vertical spacing in HWCAPS @ 2022-05-21 9:22 ` Akira Yokosawa 0 siblings, 0 replies; 10+ messages in thread From: Akira Yokosawa @ 2022-05-21 9:22 UTC (permalink / raw) To: Bagas Sanjaya, Martin Liška Cc: linux-doc, linux-kernel, corbet, Catalin Marinas, Will Deacon, linux-arm-kernel [+Cc: arm64 maintainers] Hi Martin, On 2022/05/21 17:08, Bagas Sanjaya wrote: > On Fri, May 20, 2022 at 04:01:33PM +0200, Martin Liška wrote: >> Promote headings by removing intermediate blank lines. >> >> Signed-off-by: Martin Liska <mliska@suse.cz> >> --- >> Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- >> 1 file changed, 23 deletions(-) >> >> diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst >> index a8f30963e550..1e79044f51a2 100644 >> --- a/Documentation/arm64/elf_hwcaps.rst >> +++ b/Documentation/arm64/elf_hwcaps.rst >> @@ -171,96 +171,73 @@ HWCAP_PACG >> Documentation/arm64/pointer-authentication.rst. >> >> HWCAP2_DCPODP >> - >> Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. >> >> HWCAP2_SVE2 >> - >> Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. >> >> HWCAP2_SVEAES >> - >> Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. >> >> HWCAP2_SVEPMULL >> - >> Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. >> >> HWCAP2_SVEBITPERM >> - >> Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. >> >> HWCAP2_SVESHA3 >> - >> Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. >> >> HWCAP2_SVESM4 >> - >> Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. >> >> HWCAP2_FLAGM2 >> - >> Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. >> >> HWCAP2_FRINT >> - >> Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. >> >> HWCAP2_SVEI8MM >> - >> Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. >> >> HWCAP2_SVEF32MM >> - >> Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. >> >> HWCAP2_SVEF64MM >> - >> Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. >> >> HWCAP2_SVEBF16 >> - >> Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. >> >> HWCAP2_I8MM >> - >> Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. >> >> HWCAP2_BF16 >> - >> Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. >> >> HWCAP2_DGH >> - >> Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. >> >> HWCAP2_RNG >> - >> Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. >> >> HWCAP2_BTI >> - >> Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. >> >> HWCAP2_MTE >> - >> Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described >> by Documentation/arm64/memory-tagging-extension.rst. >> >> HWCAP2_ECV >> - >> Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. >> >> HWCAP2_AFP >> - >> Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. >> >> HWCAP2_RPRES >> - >> Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. >> >> HWCAP2_MTE3 >> - >> Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described >> by Documentation/arm64/memory-tagging-extension.rst. >> >> -- >> 2.36.1 >> > > Hi, > > Sorry for misunderstanding of this topic on my reply at [1]. > > After applying this patch and doing htmldocs build, I see the HTML > diff below. Hey Bagas, please don't speak in HTML diffs. Let's talk about ReST formatting. So, the earlier part of the lists read: ---- HWCAP_FP Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000. HWCAP_ASIMD Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000. HWCAP_EVTSTRM The generic timer is configured to generate events at a frequency of approximately 10KHz. [...] ----- I see that what Martin wants is the consistency of the format of the lists. I think the change is quite reasonable. The list construct is called "Definition lists" in ReST. See: https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#definition-lists This construct makes the defined terms be rendered in bolder face. On the other hand, similar looking existing lists: ---- HWCAP2_DCPODP Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. HWCAP2_SVE2 Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. [...] ---- are not recognized as "Definition lists" and rendered differently. Actually speaking, they are not in any list format. So my suggestion of the title would be: "docs/arm64: elf_hwcaps: Unify HWCAP lists as description lists" [...] > Also, when submitting next iterations of your patch series, don't forget > to pass -v <number> to git-format-patch(1) so that the patch subject > prefix contains the correct version numbers. I gave that advice because > I don't see that this patch is sent as v2 of [2]. > > CCing Akira to help reviewing. > > [1]: https://lore.kernel.org/linux-doc/4752814a-091c-9dd5-762c-6fd1a476c4bb@gmail.com/ > [2]: https://lore.kernel.org/linux-doc/b95b3128-f010-dcba-1f6a-1a85dd2d20a5@suse.cz/ > Yeah, please post the next version as a v3. Also, please note that this document belongs to the ARM64 PORT (AARCH64 ARCHITECTURE) subsystem. So please consult the entry in MAINTAINERS and prepare a patch against its tree at: T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git and CC to the maintainers and the list of the subsystem. Thanks, Akira _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3] docs/arm64: elf_hwcaps: Unify HWCAP lists as description lists 2022-05-21 9:22 ` Akira Yokosawa @ 2022-05-23 12:18 ` Martin Liška -1 siblings, 0 replies; 10+ messages in thread From: Martin Liška @ 2022-05-23 12:18 UTC (permalink / raw) To: akiyks Cc: bagasdotme, catalin.marinas, corbet, linux-arm-kernel, linux-doc, linux-kernel, mliska, will Signed-off-by: Martin Liska <mliska@suse.cz> --- Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index a8f30963e550..1e79044f51a2 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -171,96 +171,73 @@ HWCAP_PACG Documentation/arm64/pointer-authentication.rst. HWCAP2_DCPODP - Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. HWCAP2_SVE2 - Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. HWCAP2_SVEAES - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. HWCAP2_SVEPMULL - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. HWCAP2_SVEBITPERM - Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. HWCAP2_SVESHA3 - Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. HWCAP2_SVESM4 - Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. HWCAP2_FLAGM2 - Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. HWCAP2_FRINT - Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. HWCAP2_SVEI8MM - Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. HWCAP2_SVEF32MM - Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. HWCAP2_SVEF64MM - Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. HWCAP2_SVEBF16 - Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. HWCAP2_I8MM - Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. HWCAP2_BF16 - Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. HWCAP2_DGH - Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. HWCAP2_RNG - Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. HWCAP2_BTI - Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. HWCAP2_MTE - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described by Documentation/arm64/memory-tagging-extension.rst. HWCAP2_ECV - Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. HWCAP2_AFP - Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. HWCAP2_RPRES - Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. HWCAP2_MTE3 - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described by Documentation/arm64/memory-tagging-extension.rst. -- 2.36.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3] docs/arm64: elf_hwcaps: Unify HWCAP lists as description lists @ 2022-05-23 12:18 ` Martin Liška 0 siblings, 0 replies; 10+ messages in thread From: Martin Liška @ 2022-05-23 12:18 UTC (permalink / raw) To: akiyks Cc: bagasdotme, catalin.marinas, corbet, linux-arm-kernel, linux-doc, linux-kernel, mliska, will Signed-off-by: Martin Liska <mliska@suse.cz> --- Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- 1 file changed, 23 deletions(-) diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index a8f30963e550..1e79044f51a2 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -171,96 +171,73 @@ HWCAP_PACG Documentation/arm64/pointer-authentication.rst. HWCAP2_DCPODP - Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. HWCAP2_SVE2 - Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001. HWCAP2_SVEAES - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001. HWCAP2_SVEPMULL - Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010. HWCAP2_SVEBITPERM - Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001. HWCAP2_SVESHA3 - Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001. HWCAP2_SVESM4 - Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001. HWCAP2_FLAGM2 - Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010. HWCAP2_FRINT - Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001. HWCAP2_SVEI8MM - Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001. HWCAP2_SVEF32MM - Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001. HWCAP2_SVEF64MM - Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001. HWCAP2_SVEBF16 - Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001. HWCAP2_I8MM - Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001. HWCAP2_BF16 - Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001. HWCAP2_DGH - Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001. HWCAP2_RNG - Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001. HWCAP2_BTI - Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. HWCAP2_MTE - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described by Documentation/arm64/memory-tagging-extension.rst. HWCAP2_ECV - Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. HWCAP2_AFP - Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001. HWCAP2_RPRES - Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001. HWCAP2_MTE3 - Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described by Documentation/arm64/memory-tagging-extension.rst. -- 2.36.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3] docs/arm64: elf_hwcaps: Unify HWCAP lists as description lists 2022-05-23 12:18 ` Martin Liška @ 2022-06-13 17:32 ` Jonathan Corbet -1 siblings, 0 replies; 10+ messages in thread From: Jonathan Corbet @ 2022-06-13 17:32 UTC (permalink / raw) To: Martin Liška, akiyks Cc: bagasdotme, catalin.marinas, linux-arm-kernel, linux-doc, linux-kernel, mliska, will Martin Liška <mliska@suse.cz> writes: > Signed-off-by: Martin Liska <mliska@suse.cz> > --- > Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- > 1 file changed, 23 deletions(-) This patch has been sitting for about three weeks, which seems like long enough, so I've gone ahead and applied it. I've added a bit of a changelog to it, which I'd rather not have to do; Martin, please be sure to include a changelog in future patches. Thanks, jon _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3] docs/arm64: elf_hwcaps: Unify HWCAP lists as description lists @ 2022-06-13 17:32 ` Jonathan Corbet 0 siblings, 0 replies; 10+ messages in thread From: Jonathan Corbet @ 2022-06-13 17:32 UTC (permalink / raw) To: Martin Liška, akiyks Cc: bagasdotme, catalin.marinas, linux-arm-kernel, linux-doc, linux-kernel, mliska, will Martin Liška <mliska@suse.cz> writes: > Signed-off-by: Martin Liska <mliska@suse.cz> > --- > Documentation/arm64/elf_hwcaps.rst | 23 ----------------------- > 1 file changed, 23 deletions(-) This patch has been sitting for about three weeks, which seems like long enough, so I've gone ahead and applied it. I've added a bit of a changelog to it, which I'd rather not have to do; Martin, please be sure to include a changelog in future patches. Thanks, jon ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-06-13 19:15 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-05-20 6:55 [PATCH] arm64: Unify vertical spacing in HWCAPS Martin Liška 2022-05-20 12:01 ` Bagas Sanjaya 2022-05-20 14:01 ` Martin Liška 2022-05-21 8:08 ` Bagas Sanjaya 2022-05-21 9:22 ` Akira Yokosawa 2022-05-21 9:22 ` Akira Yokosawa 2022-05-23 12:18 ` [PATCH v3] docs/arm64: elf_hwcaps: Unify HWCAP lists as description lists Martin Liška 2022-05-23 12:18 ` Martin Liška 2022-06-13 17:32 ` Jonathan Corbet 2022-06-13 17:32 ` Jonathan Corbet
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