[U-Boot] [PATCH] arm: mach-omap2: cache: Explicitly enable I cache

[U-Boot] [PATCH] arm: mach-omap2: cache: Explicitly enable I cache

[Lokesh Vutla]

omap-common cache enabling sequence relies on cpu_init_cp15()
(inside start.S) for enabling I-caches. But cpu_init_cp15()
can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
enable I-caches if not enabled already.

Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 arch/arm/mach-omap2/omap-cache.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c
index b37163a4f3..975ee1b020 100644
--- a/arch/arm/mach-omap2/omap-cache.c
+++ b/arch/arm/mach-omap2/omap-cache.c
@@ -44,7 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void enable_caches(void)
 {
-	/* Enable D-cache. I-cache is already enabled in start.S */
+
+	/* Enable I cache if not enabled */
+	if (!icache_status())
+		icache_enable();
+
 	dcache_enable();
 }
 
-- 
2.17.0

[U-Boot] [PATCH] arm: mach-omap2: cache: Explicitly enable I cache

[Jean-Jacques Hiblot]

On 03/05/2018 17:04, Lokesh Vutla wrote:
> omap-common cache enabling sequence relies on cpu_init_cp15()
> (inside start.S) for enabling I-caches. But cpu_init_cp15()
> can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
> enable I-caches if not enabled already.
>
> Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
> Tested-by: Steve Kipisz <s-kipisz2@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> ---
>   arch/arm/mach-omap2/omap-cache.c | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c
> index b37163a4f3..975ee1b020 100644
> --- a/arch/arm/mach-omap2/omap-cache.c
> +++ b/arch/arm/mach-omap2/omap-cache.c
> @@ -44,7 +44,11 @@ DECLARE_GLOBAL_DATA_PTR;
>   
>   void enable_caches(void)
>   {
> -	/* Enable D-cache. I-cache is already enabled in start.S */
> +
> +	/* Enable I cache if not enabled */
> +	if (!icache_status())
> +		icache_enable();
> +
>   	dcache_enable();
>   }
>   

Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

[U-Boot] [PATCH] arm: mach-omap2: cache: Explicitly enable I cache

[Tom Rini]

On Thu, May 03, 2018 at 08:34:49PM +0530, Lokesh Vutla wrote:

> omap-common cache enabling sequence relies on cpu_init_cp15()
> (inside start.S) for enabling I-caches. But cpu_init_cp15()
> can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
> enable I-caches if not enabled already.
> 
> Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
> Tested-by: Steve Kipisz <s-kipisz2@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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[U-Boot] arm: mach-omap2: cache: Explicitly enable I cache

[Tom Rini]

On Thu, May 03, 2018 at 08:34:49PM +0530, Lokesh Vutla wrote:

> omap-common cache enabling sequence relies on cpu_init_cp15()
> (inside start.S) for enabling I-caches. But cpu_init_cp15()
> can be skipped if CONFIG_SKIP_LOWLEVEL_INIT is defined. So
> enable I-caches if not enabled already.
> 
> Debugged-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
> Tested-by: Steve Kipisz <s-kipisz2@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> Tested-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
> Reviewed-by: Tom Rini <trini@konsulko.com>

Applied to u-boot/master, thanks!

-- 
Tom
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