* [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
@ 2018-06-22 16:54 Michel Dänzer
[not found] ` <20180622165433.4263-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Michel Dänzer @ 2018-06-22 16:54 UTC (permalink / raw)
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
From: Michel Dänzer <michel.daenzer@amd.com>
To hopefully make the code dealing with GPU vs CPU pages a little
clearer.
Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 8 ++++----
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 ++++----
3 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index 17d6b9fb6d77..e3bf0e7bfad2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -234,7 +234,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
}
t = offset / AMDGPU_GPU_PAGE_SIZE;
- p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+ p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
for (i = 0; i < pages; i++, p++) {
#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
adev->gart.pages[p] = NULL;
@@ -243,7 +243,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
if (!adev->gart.ptr)
continue;
- for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
+ for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr,
t, page_base, flags);
page_base += AMDGPU_GPU_PAGE_SIZE;
@@ -282,7 +282,7 @@ int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
for (i = 0; i < pages; i++) {
page_base = dma_addr[i];
- for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
+ for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
amdgpu_gmc_set_pte_pde(adev, dst, t, page_base, flags);
page_base += AMDGPU_GPU_PAGE_SIZE;
}
@@ -319,7 +319,7 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
t = offset / AMDGPU_GPU_PAGE_SIZE;
- p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+ p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
for (i = 0; i < pages; i++, p++)
adev->gart.pages[p] = pagelist ? pagelist[i] : NULL;
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
index 456295c00291..9f9e9dc87da1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
@@ -37,6 +37,8 @@ struct amdgpu_bo;
#define AMDGPU_GPU_PAGE_SHIFT 12
#define AMDGPU_GPU_PAGE_ALIGN(a) (((a) + AMDGPU_GPU_PAGE_MASK) & ~AMDGPU_GPU_PAGE_MASK)
+#define AMDGPU_GPU_PAGES_IN_CPU_PAGE (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE)
+
struct amdgpu_gart {
u64 table_addr;
struct amdgpu_bo *robj;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 75579200f4a6..0f6d287f54c3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1571,7 +1571,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
if (nodes) {
addr = nodes->start << PAGE_SHIFT;
max_entries = (nodes->size - pfn) *
- (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+ AMDGPU_GPU_PAGES_IN_CPU_PAGE;
} else {
addr = 0;
max_entries = S64_MAX;
@@ -1582,7 +1582,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
max_entries = min(max_entries, 16ull * 1024ull);
for (count = 1;
- count < max_entries / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+ count < max_entries / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
++count) {
uint64_t idx = pfn + count;
@@ -1596,7 +1596,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
dma_addr = pages_addr;
} else {
addr = pages_addr[pfn];
- max_entries = count * (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+ max_entries = count * AMDGPU_GPU_PAGES_IN_CPU_PAGE;
}
} else if (flags & AMDGPU_PTE_VALID) {
@@ -1611,7 +1611,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
if (r)
return r;
- pfn += (last - start + 1) / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+ pfn += (last - start + 1) / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
if (nodes && nodes->size == pfn) {
pfn = 0;
++nodes;
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
[not found] ` <20180622165433.4263-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2018-06-22 19:50 ` Alex Deucher
[not found] ` <CADnq5_NLmNtSH35TG5i3_WJdLGu_ujbkTW-Z-G5CodCDRZj0Xg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Alex Deucher @ 2018-06-22 19:50 UTC (permalink / raw)
To: Michel Dänzer; +Cc: amd-gfx list
On Fri, Jun 22, 2018 at 12:54 PM, Michel Dänzer <michel@daenzer.net> wrote:
> From: Michel Dänzer <michel.daenzer@amd.com>
>
> To hopefully make the code dealing with GPU vs CPU pages a little
> clearer.
>
> Suggested-by: Christian König <christian.koenig@amd.com>
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 2 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 ++++----
> 3 files changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> index 17d6b9fb6d77..e3bf0e7bfad2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> @@ -234,7 +234,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
> }
>
> t = offset / AMDGPU_GPU_PAGE_SIZE;
> - p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> + p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
> for (i = 0; i < pages; i++, p++) {
> #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
> adev->gart.pages[p] = NULL;
> @@ -243,7 +243,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
> if (!adev->gart.ptr)
> continue;
>
> - for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
> + for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
> amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr,
> t, page_base, flags);
> page_base += AMDGPU_GPU_PAGE_SIZE;
> @@ -282,7 +282,7 @@ int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
>
> for (i = 0; i < pages; i++) {
> page_base = dma_addr[i];
> - for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
> + for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
> amdgpu_gmc_set_pte_pde(adev, dst, t, page_base, flags);
> page_base += AMDGPU_GPU_PAGE_SIZE;
> }
> @@ -319,7 +319,7 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
>
> #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
> t = offset / AMDGPU_GPU_PAGE_SIZE;
> - p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> + p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
> for (i = 0; i < pages; i++, p++)
> adev->gart.pages[p] = pagelist ? pagelist[i] : NULL;
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
> index 456295c00291..9f9e9dc87da1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
> @@ -37,6 +37,8 @@ struct amdgpu_bo;
> #define AMDGPU_GPU_PAGE_SHIFT 12
> #define AMDGPU_GPU_PAGE_ALIGN(a) (((a) + AMDGPU_GPU_PAGE_MASK) & ~AMDGPU_GPU_PAGE_MASK)
>
> +#define AMDGPU_GPU_PAGES_IN_CPU_PAGE (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE)
> +
> struct amdgpu_gart {
> u64 table_addr;
> struct amdgpu_bo *robj;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 75579200f4a6..0f6d287f54c3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1571,7 +1571,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
> if (nodes) {
> addr = nodes->start << PAGE_SHIFT;
> max_entries = (nodes->size - pfn) *
> - (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> + AMDGPU_GPU_PAGES_IN_CPU_PAGE;
> } else {
> addr = 0;
> max_entries = S64_MAX;
> @@ -1582,7 +1582,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
>
> max_entries = min(max_entries, 16ull * 1024ull);
> for (count = 1;
> - count < max_entries / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> + count < max_entries / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
> ++count) {
> uint64_t idx = pfn + count;
>
> @@ -1596,7 +1596,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
> dma_addr = pages_addr;
> } else {
> addr = pages_addr[pfn];
> - max_entries = count * (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> + max_entries = count * AMDGPU_GPU_PAGES_IN_CPU_PAGE;
> }
>
> } else if (flags & AMDGPU_PTE_VALID) {
> @@ -1611,7 +1611,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
> if (r)
> return r;
>
> - pfn += (last - start + 1) / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> + pfn += (last - start + 1) / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
> if (nodes && nodes->size == pfn) {
> pfn = 0;
> ++nodes;
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
[not found] ` <CADnq5_NLmNtSH35TG5i3_WJdLGu_ujbkTW-Z-G5CodCDRZj0Xg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-06-25 1:56 ` zhoucm1
[not found] ` <9a352ebd-3dea-e8ef-4151-022be90d45c0-5C7GfCeVMHo@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: zhoucm1 @ 2018-06-25 1:56 UTC (permalink / raw)
To: Alex Deucher, Michel Dänzer; +Cc: amd-gfx list
one question to you:
Did you consider the case that GPU_PAGE_SIZE > CPU_PAGE_SIZE? What
happens if the case is ture?
Regards,
David Zhou
On 2018年06月23日 03:50, Alex Deucher wrote:
> On Fri, Jun 22, 2018 at 12:54 PM, Michel Dänzer <michel@daenzer.net> wrote:
>> From: Michel Dänzer <michel.daenzer@amd.com>
>>
>> To hopefully make the code dealing with GPU vs CPU pages a little
>> clearer.
>>
>> Suggested-by: Christian König <christian.koenig@amd.com>
>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 8 ++++----
>> drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 2 ++
>> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 8 ++++----
>> 3 files changed, 10 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
>> index 17d6b9fb6d77..e3bf0e7bfad2 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
>> @@ -234,7 +234,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
>> }
>>
>> t = offset / AMDGPU_GPU_PAGE_SIZE;
>> - p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
>> + p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
>> for (i = 0; i < pages; i++, p++) {
>> #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
>> adev->gart.pages[p] = NULL;
>> @@ -243,7 +243,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
>> if (!adev->gart.ptr)
>> continue;
>>
>> - for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
>> + for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
>> amdgpu_gmc_set_pte_pde(adev, adev->gart.ptr,
>> t, page_base, flags);
>> page_base += AMDGPU_GPU_PAGE_SIZE;
>> @@ -282,7 +282,7 @@ int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
>>
>> for (i = 0; i < pages; i++) {
>> page_base = dma_addr[i];
>> - for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
>> + for (j = 0; j < AMDGPU_GPU_PAGES_IN_CPU_PAGE; j++, t++) {
>> amdgpu_gmc_set_pte_pde(adev, dst, t, page_base, flags);
>> page_base += AMDGPU_GPU_PAGE_SIZE;
>> }
>> @@ -319,7 +319,7 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
>>
>> #ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
>> t = offset / AMDGPU_GPU_PAGE_SIZE;
>> - p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
>> + p = t / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
>> for (i = 0; i < pages; i++, p++)
>> adev->gart.pages[p] = pagelist ? pagelist[i] : NULL;
>> #endif
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
>> index 456295c00291..9f9e9dc87da1 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h
>> @@ -37,6 +37,8 @@ struct amdgpu_bo;
>> #define AMDGPU_GPU_PAGE_SHIFT 12
>> #define AMDGPU_GPU_PAGE_ALIGN(a) (((a) + AMDGPU_GPU_PAGE_MASK) & ~AMDGPU_GPU_PAGE_MASK)
>>
>> +#define AMDGPU_GPU_PAGES_IN_CPU_PAGE (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE)
>> +
>> struct amdgpu_gart {
>> u64 table_addr;
>> struct amdgpu_bo *robj;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> index 75579200f4a6..0f6d287f54c3 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>> @@ -1571,7 +1571,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
>> if (nodes) {
>> addr = nodes->start << PAGE_SHIFT;
>> max_entries = (nodes->size - pfn) *
>> - (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
>> + AMDGPU_GPU_PAGES_IN_CPU_PAGE;
>> } else {
>> addr = 0;
>> max_entries = S64_MAX;
>> @@ -1582,7 +1582,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
>>
>> max_entries = min(max_entries, 16ull * 1024ull);
>> for (count = 1;
>> - count < max_entries / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
>> + count < max_entries / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
>> ++count) {
>> uint64_t idx = pfn + count;
>>
>> @@ -1596,7 +1596,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
>> dma_addr = pages_addr;
>> } else {
>> addr = pages_addr[pfn];
>> - max_entries = count * (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
>> + max_entries = count * AMDGPU_GPU_PAGES_IN_CPU_PAGE;
>> }
>>
>> } else if (flags & AMDGPU_PTE_VALID) {
>> @@ -1611,7 +1611,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
>> if (r)
>> return r;
>>
>> - pfn += (last - start + 1) / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
>> + pfn += (last - start + 1) / AMDGPU_GPU_PAGES_IN_CPU_PAGE;
>> if (nodes && nodes->size == pfn) {
>> pfn = 0;
>> ++nodes;
>> --
>> 2.17.1
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
[not found] ` <9a352ebd-3dea-e8ef-4151-022be90d45c0-5C7GfCeVMHo@public.gmane.org>
@ 2018-06-25 9:10 ` Michel Dänzer
[not found] ` <b61f92a6-2d90-257d-8aa5-25b88b98459c-otUistvHUpPR7s880joybQ@public.gmane.org>
[not found] ` <5b30f068.1c69fb81.45984.62a8SMTPIN_ADDED_BROKEN@mx.google.com>
0 siblings, 2 replies; 7+ messages in thread
From: Michel Dänzer @ 2018-06-25 9:10 UTC (permalink / raw)
To: zhoucm1, Alex Deucher; +Cc: amd-gfx list
On 2018-06-25 03:56 AM, zhoucm1 wrote:
> one question to you:
>
> Did you consider the case that GPU_PAGE_SIZE > CPU_PAGE_SIZE?
That is never the case: AMDGPU_GPU_PAGE_SIZE is always 4096, and
PAGE_SIZE is always >= 4096 (an integer multiple of it).
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
[not found] ` <b61f92a6-2d90-257d-8aa5-25b88b98459c-otUistvHUpPR7s880joybQ@public.gmane.org>
@ 2018-06-25 13:33 ` Zhou, David(ChunMing)
0 siblings, 0 replies; 7+ messages in thread
From: Zhou, David(ChunMing) @ 2018-06-25 13:33 UTC (permalink / raw)
To: Michel D鋘zer; +Cc: Alex Deucher, Zhou, David(ChunMing), amd-gfx list
[-- Attachment #1.1: Type: text/plain, Size: 759 bytes --]
current amdgpu driver indeed always set GPU PAGE SIZE is 4096.
In fact, our gpu supports bigger page size like 64KB, just we don't use it. I remeber previous amdsoc(old android kernel driver) used 64KB.
correct me if I'm wrong.
send from Smartisan Pro
Michel D鋘zer <michel@daenzer.net> 于 2018年6月25日 下午5:10写道：
On 2018-06-25 03:56 AM, zhoucm1 wrote:
> one question to you:
>
> Did you consider the case that GPU_PAGE_SIZE > CPU_PAGE_SIZE?
That is never the case: AMDGPU_GPU_PAGE_SIZE is always 4096, and
PAGE_SIZE is always >= 4096 (an integer multiple of it).
--
Earthling Michel Dänzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
[-- Attachment #1.2: Type: text/html, Size: 2407 bytes --]
[-- Attachment #2: Type: text/plain, Size: 154 bytes --]
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
[not found] ` <5b30f068.1c69fb81.45984.62a8SMTPIN_ADDED_BROKEN-ATjtLOhZ0NVl57MIdRCFDg@public.gmane.org>
@ 2018-06-25 14:41 ` Alex Deucher
[not found] ` <CADnq5_O5kAsZZRdyacuOP7CcN5Ey-Rz+-grW29WOLbR4SL88ng-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
0 siblings, 1 reply; 7+ messages in thread
From: Alex Deucher @ 2018-06-25 14:41 UTC (permalink / raw)
To: Zhou, David(ChunMing); +Cc: Michel D鋘zer, amd-gfx list
On Mon, Jun 25, 2018 at 9:33 AM, Zhou, David(ChunMing)
<David1.Zhou@amd.com> wrote:
> current amdgpu driver indeed always set GPU PAGE SIZE is 4096.
> In fact, our gpu supports bigger page size like 64KB, just we don't use it.
> I remeber previous amdsoc(old android kernel driver) used 64KB.
>
> correct me if I'm wrong.
It's still 4k pages, but you can tweak the fragment size to make a TLB
entry cover multiple pages.
Alex
>
> send from Smartisan Pro
>
> Michel D鋘zer <michel@daenzer.net> 于 2018年6月25日 下午5:10写道：
>
> On 2018-06-25 03:56 AM, zhoucm1 wrote:
>> one question to you:
>>
>> Did you consider the case that GPU_PAGE_SIZE > CPU_PAGE_SIZE?
>
> That is never the case: AMDGPU_GPU_PAGE_SIZE is always 4096, and
> PAGE_SIZE is always >= 4096 (an integer multiple of it).
>
>
> --
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Mesa and X developer
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define
[not found] ` <CADnq5_O5kAsZZRdyacuOP7CcN5Ey-Rz+-grW29WOLbR4SL88ng-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
@ 2018-07-02 9:17 ` Christian König
0 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2018-07-02 9:17 UTC (permalink / raw)
To: Alex Deucher, Zhou, David(ChunMing); +Cc: Michel D鋘zer, amd-gfx list
Am 25.06.2018 um 16:41 schrieb Alex Deucher:
> On Mon, Jun 25, 2018 at 9:33 AM, Zhou, David(ChunMing)
> <David1.Zhou@amd.com> wrote:
>> current amdgpu driver indeed always set GPU PAGE SIZE is 4096.
>> In fact, our gpu supports bigger page size like 64KB, just we don't use it.
>> I remeber previous amdsoc(old android kernel driver) used 64KB.
>>
>> correct me if I'm wrong.
> It's still 4k pages, but you can tweak the fragment size to make a TLB
> entry cover multiple pages.
Yeah, but David is right you can also directly increase the GPU page
size. It's just that I'm pretty sure we will never ever support that :)
Anyway original patch is Reviewed-by: Christian König
<christian.koenig@amd.com>.
Christian.
>
> Alex
>
>> send from Smartisan Pro
>>
>> Michel D鋘zer <michel@daenzer.net> 于 2018年6月25日 下午5:10写道：
>>
>> On 2018-06-25 03:56 AM, zhoucm1 wrote:
>>> one question to you:
>>>
>>> Did you consider the case that GPU_PAGE_SIZE > CPU_PAGE_SIZE?
>> That is never the case: AMDGPU_GPU_PAGE_SIZE is always 4096, and
>> PAGE_SIZE is always >= 4096 (an integer multiple of it).
>>
>>
>> --
>> Earthling Michel Dänzer | http://www.amd.com
>> Libre software enthusiast | Mesa and X developer
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2018-07-02 9:17 UTC | newest]
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2018-06-22 16:54 [PATCH] drm/amdgpu: Add AMDGPU_GPU_PAGES_IN_CPU_PAGE define Michel Dänzer
[not found] ` <20180622165433.4263-1-michel-otUistvHUpPR7s880joybQ@public.gmane.org>
2018-06-22 19:50 ` Alex Deucher
[not found] ` <CADnq5_NLmNtSH35TG5i3_WJdLGu_ujbkTW-Z-G5CodCDRZj0Xg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-06-25 1:56 ` zhoucm1
[not found] ` <9a352ebd-3dea-e8ef-4151-022be90d45c0-5C7GfCeVMHo@public.gmane.org>
2018-06-25 9:10 ` Michel Dänzer
[not found] ` <b61f92a6-2d90-257d-8aa5-25b88b98459c-otUistvHUpPR7s880joybQ@public.gmane.org>
2018-06-25 13:33 ` Zhou, David(ChunMing)
[not found] ` <5b30f068.1c69fb81.45984.62a8SMTPIN_ADDED_BROKEN@mx.google.com>
[not found] ` <5b30f068.1c69fb81.45984.62a8SMTPIN_ADDED_BROKEN-ATjtLOhZ0NVl57MIdRCFDg@public.gmane.org>
2018-06-25 14:41 ` Alex Deucher
[not found] ` <CADnq5_O5kAsZZRdyacuOP7CcN5Ey-Rz+-grW29WOLbR4SL88ng-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-02 9:17 ` Christian König
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