Rockchip - watchdog - clocks

Rockchip - watchdog - clocks

[David Summers]

Hi,

This is intended as a subject for discussion, to see if we can decide 
the best way forward.

The watchdog clocks in the kernel, are not consistent, and where the 
current code has come from, and how it applies between different chip 
sets isn't clear.

First off a configuration that works: RK3288:

arch/arm/boot/dts/rk3288.dtsi:

     wdt: watchdog@ff800000 {
         compatible = "rockchip,rk3288-wdt", "snps,dw-wdt";
         reg = <0x0 0xff800000 0x0 0x100>;
         clocks = <&cru PCLK_WDT>;
         interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
         status = "disabled";
     };

include/dt-bindings/clock/rk3288-cru.h:

#define PCLK_WDT        368

drivers/clk/rockchip/clk-rk3288.c:

     /* Watchdog pclk is controlled by RK3288_SGRF_SOC_CON0[1]. */
     clk = clk_register_fixed_factor(NULL, "pclk_wdt", "pclk_pd_alive", 
0, 1, 1);
     if (IS_ERR(clk))
         pr_warn("%s: could not register clock pclk_wdt: %ld\n",
             __func__, PTR_ERR(clk));
     else
         rockchip_clk_add_lookup(ctx, clk, PCLK_WDT);

Now the source of the rockchip cru for rk3288 is the TRM:

http://opensource.rock-chips.com/images/8/8f/Rockchip_RK3288_TRM_V1.2_Part1-20170321.pdf

Fig 2-2 through to fig 2-5 CRU Clock Architecture - but this doesn't 
show the watchdog clock. The watchdog section of the TRM says:

WDT counter’s clock is pclk

And this all creates a working watchdog on the rk3288.

But instead look at the rk3328:

arch/arm64/boot/dts/rockchip/rk3328.dtsi

     wdt: watchdog@ff1a0000 {
         compatible = "snps,dw-wdt";
         reg = <0x0 0xff1a0000 0x0 0x100>;
         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
     };

And the watchdog has no clock defined. The clock is also not defined in 
include/dt-bindings/clock/rk3328-cru.h nor in 
drivers/clk/rockchip/clk-rk3328.c

The rk3328 TRM 
http://opensource.rock-chips.com/images/9/97/Rockchip_RK3328TRM_V1.1-Part1-20170321.pdf 
doesn't have a CRU Clock Architecture diagram. The watchdog section does 
say though:

WDT counter’s clock is pclk

And needless to say the rk3328 watchdog doesn't work, the dw-wdt kernel 
module fails with:

dw_wdt: probe of ff1a0000.watchdog failed with error -2

Now issues like this seem to occur across the whole rockchip set up. 7 
files in include/dt-bindings/clock/rk* contain some kind of _WDT line, 
and 4 rk* files don't have any _WDT line. I've not checked all their TRM 
though. The ones missing a WDT line are:

rk3066a-cru.h
rk3228-cru.h
rk3328-cru.h
rk3399-ddr.h (maybe this shouldn't have one ...)

So two questions:

. Is it known how rockchip wire the watchdog clock in the rk chips?
. How is it best to set this up in the kernel?
. Can we do this for all rockchip devices?

Does anyone have any thoughts?

David




_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip