[Qemu-devel] [PATCH 0/2] Add Phenom CPU Descriptor

[Qemu-devel] [PATCH 0/2] Add Phenom CPU Descriptor

[Alexander Graf]

Having multiple different CPUs can be very conventient when trying out
if some things don't work because they require special features.

Mac OS X only running on modern Intel CPUs is an example for this. Another
example is Hyper-V, which needs a current Barcelona/Phenom CPU to run
on when it's supposed to use SVM.

This patchset implements FFXSR which is required by Hyper-V and the
Phenom CPU description. It is not sufficient to make Hyper-V boot yet,
but at least brings us one step closer to it.

Alexander Graf (2):
  Implement FFXSR
  Add phenom CPU descriptor

 target-i386/helper.c    |   28 ++++++++++++++++++++++++++++
 target-i386/op_helper.c |   28 ++++++++++++++++++++--------
 2 files changed, 48 insertions(+), 8 deletions(-)

[Qemu-devel] [PATCH 1/2] Implement FFXSR

[Alexander Graf]

Newer AMD CPUs have the FFXSR capability. This leaves out XMM
register in FXSAVE/FXRESTORE when in CPL=0 and 64-bit mode.

This is required for Hyper-V.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-i386/op_helper.c |   28 ++++++++++++++++++++--------
 1 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index 8cf3bb2..c69328a 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -3030,6 +3030,8 @@ void helper_wrmsr(void)
                 update_mask |= MSR_EFER_NXE;
             if (env->cpuid_ext3_features & CPUID_EXT3_SVM)
                 update_mask |= MSR_EFER_SVME;
+            if (env->cpuid_ext2_features & CPUID_EXT2_FFXSR)
+                update_mask |= MSR_EFER_FFXSR;
             cpu_load_efer(env, (env->efer & ~update_mask) |
                           (val & update_mask));
         }
@@ -4345,10 +4347,15 @@ void helper_fxsave(target_ulong ptr, int data64)
         else
             nb_xmm_regs = 8;
         addr = ptr + 0xa0;
-        for(i = 0; i < nb_xmm_regs; i++) {
-            stq(addr, env->xmm_regs[i].XMM_Q(0));
-            stq(addr + 8, env->xmm_regs[i].XMM_Q(1));
-            addr += 16;
+        /* Fast FXSAVE leaves out the XMM registers */
+        if (!(env->efer & MSR_EFER_FFXSR)
+          || (env->hflags & HF_CPL_MASK)
+          || !(env->hflags & HF_LMA_MASK)) {
+            for(i = 0; i < nb_xmm_regs; i++) {
+                stq(addr, env->xmm_regs[i].XMM_Q(0));
+                stq(addr + 8, env->xmm_regs[i].XMM_Q(1));
+                addr += 16;
+            }
         }
     }
 }
@@ -4385,10 +4392,15 @@ void helper_fxrstor(target_ulong ptr, int data64)
         else
             nb_xmm_regs = 8;
         addr = ptr + 0xa0;
-        for(i = 0; i < nb_xmm_regs; i++) {
-            env->xmm_regs[i].XMM_Q(0) = ldq(addr);
-            env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
-            addr += 16;
+        /* Fast FXRESTORE leaves out the XMM registers */
+        if (!(env->efer & MSR_EFER_FFXSR)
+          || (env->hflags & HF_CPL_MASK)
+          || !(env->hflags & HF_LMA_MASK)) {
+            for(i = 0; i < nb_xmm_regs; i++) {
+                env->xmm_regs[i].XMM_Q(0) = ldq(addr);
+                env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
+                addr += 16;
+            }
         }
     }
 }
-- 
1.6.0.2

[Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Alexander Graf]

As part of my ongoing effort to make nested SVM useful, I started working to get
VMware ESX run inside KVM.

VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate
a machine that officially supports SVM and should thus exploit the powers of
nested virtualization.

This patch adds a Phenom CPU identifier, that resembles a real-world phenom
CPU as closely as possible.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-i386/helper.c |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index c2da767..636a02d 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -137,6 +137,34 @@ static x86_def_t x86_defs[] = {
         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
     },
     {
+        .name = "phenom",
+        .level = 5,
+        .vendor1 = CPUID_VENDOR_AMD_1,
+        .vendor2 = CPUID_VENDOR_AMD_2,
+        .vendor3 = CPUID_VENDOR_AMD_3,
+        .family = 16,
+        .model = 2,
+        .stepping = 3,
+        /* Missing: CPUID_VME, CPUID_HT */
+        .features = PPRO_FEATURES | 
+            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
+            CPUID_PSE36,
+        /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
+        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
+        /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
+        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | 
+            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
+            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
+            CPUID_EXT2_FFXSR,
+        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
+                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
+                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
+                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
+        .ext3_features = CPUID_EXT3_SVM,
+        .xlevel = 0x8000001A,
+        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
+    },
+    {
         .name = "core2duo",
         .level = 10,
         .family = 6,
-- 
1.6.0.2

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Anthony Liguori]

Alexander Graf wrote:
> As part of my ongoing effort to make nested SVM useful, I started working to get
> VMware ESX run inside KVM.
>
> VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate
> a machine that officially supports SVM and should thus exploit the powers of
> nested virtualization.
>
> This patch adds a Phenom CPU identifier, that resembles a real-world phenom
> CPU as closely as possible.
>   

I didn't apply this last time because I dislike the idea of adding 
oodles of CPU definitions for x86.  The proper thing to do here is to 
have an fdt based description of CPU model.  That's not to say I won't 
apply this patch, but I don't like the idea of adding more and more of 
these things.

Regards,

Anthony Liguori

> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
>  target-i386/helper.c |   28 ++++++++++++++++++++++++++++
>  1 files changed, 28 insertions(+), 0 deletions(-)
>
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index c2da767..636a02d 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -137,6 +137,34 @@ static x86_def_t x86_defs[] = {
>          .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
>      },
>      {
> +        .name = "phenom",
> +        .level = 5,
> +        .vendor1 = CPUID_VENDOR_AMD_1,
> +        .vendor2 = CPUID_VENDOR_AMD_2,
> +        .vendor3 = CPUID_VENDOR_AMD_3,
> +        .family = 16,
> +        .model = 2,
> +        .stepping = 3,
> +        /* Missing: CPUID_VME, CPUID_HT */
> +        .features = PPRO_FEATURES | 
> +            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
> +            CPUID_PSE36,
> +        /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
> +        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
> +        /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
> +        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | 
> +            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
> +            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
> +            CPUID_EXT2_FFXSR,
> +        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
> +                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
> +                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
> +                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
> +        .ext3_features = CPUID_EXT3_SVM,
> +        .xlevel = 0x8000001A,
> +        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
> +    },
> +    {
>          .name = "core2duo",
>          .level = 10,
>          .family = 6,
>   

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Alexander Graf]

On 27.01.2009, at 15:37, Anthony Liguori wrote:

> Alexander Graf wrote:
>> As part of my ongoing effort to make nested SVM useful, I started  
>> working to get
>> VMware ESX run inside KVM.
>>
>> VMware couples itself pretty tightly to the CPUID, so it's a good  
>> idea to emulate
>> a machine that officially supports SVM and should thus exploit the  
>> powers of
>> nested virtualization.
>>
>> This patch adds a Phenom CPU identifier, that resembles a real- 
>> world phenom
>> CPU as closely as possible.
>>
>
> I didn't apply this last time because I dislike the idea of adding  
> oodles of CPU definitions for x86.  The proper thing to do here is  
> to have an fdt based description of CPU model.  That's not to say I  
> won't apply this patch, but I don't like the idea of adding more and  
> more of these things.

I don't think an fdt based machine description is the right place to  
model CPUs. CPU capabilities are tightly coupled to qemu capabilities.  
Looking at coreduo/phenom descriptors as they are now, we are lacking  
quite some features. These might come in later, but I would guess  
machine descriptions should be rather static and user creatable.

So FWIW the fdt should rather contain a pointer to "phenom" CPU  
instead of describing every single CPUID feature.

Though honestly - we only have a "current Intel" and "current  
migratable" CPU, so we're missing a "current AMD" one just to be  
fair ;-). It's also pretty necessary for nested SVM wizardry whenever  
a guest checks which CPU it runs on (opposed to only the SVM bit like  
KVM).

Alex

>
>
> Regards,
>
> Anthony Liguori
>
>> Signed-off-by: Alexander Graf <agraf@suse.de>
>> ---
>> target-i386/helper.c |   28 ++++++++++++++++++++++++++++
>> 1 files changed, 28 insertions(+), 0 deletions(-)
>>
>> diff --git a/target-i386/helper.c b/target-i386/helper.c
>> index c2da767..636a02d 100644
>> --- a/target-i386/helper.c
>> +++ b/target-i386/helper.c
>> @@ -137,6 +137,34 @@ static x86_def_t x86_defs[] = {
>>         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
>>     },
>>     {
>> +        .name = "phenom",
>> +        .level = 5,
>> +        .vendor1 = CPUID_VENDOR_AMD_1,
>> +        .vendor2 = CPUID_VENDOR_AMD_2,
>> +        .vendor3 = CPUID_VENDOR_AMD_3,
>> +        .family = 16,
>> +        .model = 2,
>> +        .stepping = 3,
>> +        /* Missing: CPUID_VME, CPUID_HT */
>> +        .features = PPRO_FEATURES | +            CPUID_MTRR |  
>> CPUID_CLFLUSH | CPUID_MCA |
>> +            CPUID_PSE36,
>> +        /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
>> +        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
>> +        /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
>> +        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |  
>> +            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
>> +            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT |  
>> CPUID_EXT2_MMXEXT |
>> +            CPUID_EXT2_FFXSR,
>> +        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG,  
>> CPUID_EXT3_EXTAPIC,
>> +                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM,  
>> CPUID_EXT3_SSE4A,
>> +                    CPUID_EXT3_MISALIGNSSE,  
>> CPUID_EXT3_3DNOWPREFETCH,
>> +                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
>> +        .ext3_features = CPUID_EXT3_SVM,
>> +        .xlevel = 0x8000001A,
>> +        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
>> +    },
>> +    {
>>         .name = "core2duo",
>>         .level = 10,
>>         .family = 6,
>>
>
>
>

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Laurent Vivier]

Le mardi 27 janvier 2009 à 08:37 -0600, Anthony Liguori a écrit :
> Alexander Graf wrote:
> > As part of my ongoing effort to make nested SVM useful, I started working to get
> > VMware ESX run inside KVM.
> >
> > VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate
> > a machine that officially supports SVM and should thus exploit the powers of
> > nested virtualization.
> >
> > This patch adds a Phenom CPU identifier, that resembles a real-world phenom
> > CPU as closely as possible.
> >   
> 
> I didn't apply this last time because I dislike the idea of adding 
> oodles of CPU definitions for x86.  The proper thing to do here is to 
> have an fdt based description of CPU model.  That's not to say I won't 
> apply this patch, but I don't like the idea of adding more and more of 
> these things.

Did you try "qemu-system-ppc -cpu ?" ;-) ?
 
Regards,
Laurent
-- 
------------------ Laurent.Vivier@bull.net  ------------------
"Tout ce qui est impossible reste à accomplir"    Jules Verne
"Things are only impossible until they're not" Jean-Luc Picard

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Anthony Liguori]

Laurent Vivier wrote:
> Le mardi 27 janvier 2009 à 08:37 -0600, Anthony Liguori a écrit :
>   
>> Alexander Graf wrote:
>>     
>>> As part of my ongoing effort to make nested SVM useful, I started working to get
>>> VMware ESX run inside KVM.
>>>
>>> VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate
>>> a machine that officially supports SVM and should thus exploit the powers of
>>> nested virtualization.
>>>
>>> This patch adds a Phenom CPU identifier, that resembles a real-world phenom
>>> CPU as closely as possible.
>>>   
>>>       
>> I didn't apply this last time because I dislike the idea of adding 
>> oodles of CPU definitions for x86.  The proper thing to do here is to 
>> have an fdt based description of CPU model.  That's not to say I won't 
>> apply this patch, but I don't like the idea of adding more and more of 
>> these things.
>>     
>
> Did you try "qemu-system-ppc -cpu ?" ;-) ?
>   

Which is precisely what I'd like to avoid :-)

Although this is a bit different.  We aren't actually emulating a 
phenom.  We're just taking what we have and calling it a phenom.  I 
suspect there's going to be a desire to call whatever we emulate 
arbitrary things.

Regards,

Anthony LIguori

> Regards,
> Laurent
>   

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Paul Brook]

> >> I didn't apply this last time because I dislike the idea of adding
> >> oodles of CPU definitions for x86.  The proper thing to do here is to
> >> have an fdt based description of CPU model.  That's not to say I won't
> >> apply this patch, but I don't like the idea of adding more and more of
> >> these things.
> >
> > Did you try "qemu-system-ppc -cpu ?" ;-) ?
>
> Which is precisely what I'd like to avoid :-)
>
> Although this is a bit different.  We aren't actually emulating a
> phenom.  We're just taking what we have and calling it a phenom.  I
> suspect there's going to be a desire to call whatever we emulate
> arbitrary things.

I don't think we're likely to want the big list of cpus anyway.

The real problem is that the x86 translation code ignores most of the CPU 
feature bits, and implements everything all the time.

Paul

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Paul Brook]

> > Although this is a bit different.  We aren't actually emulating a
> > phenom.  We're just taking what we have and calling it a phenom.  I
> > suspect there's going to be a desire to call whatever we emulate
> > arbitrary things.
>
> I don't think we're likely to want the big list of cpus anyway.

Argh. I got that completely wrong.I mean we *are* likely to want a big list of 
cpus anyway. If done properly it should be fairly easy to maintain.
e.g. instead of missing out unimplemented feature flags in each cpu, add them 
all, then have qemu mask out the ones it doesn't implement.

Paul

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Alexander Graf]

On 27.01.2009, at 23:39, Paul Brook <paul@codesourcery.com> wrote:

>>>> I didn't apply this last time because I dislike the idea of adding
>>>> oodles of CPU definitions for x86.  The proper thing to do here  
>>>> is to
>>>> have an fdt based description of CPU model.  That's not to say I  
>>>> won't
>>>> apply this patch, but I don't like the idea of adding more and  
>>>> more of
>>>> these things.
>>>
>>> Did you try "qemu-system-ppc -cpu ?" ;-) ?
>>
>> Which is precisely what I'd like to avoid :-)
>>
>> Although this is a bit different.  We aren't actually emulating a
>> phenom.  We're just taking what we have and calling it a phenom.  I
>> suspect there's going to be a desire to call whatever we emulate
>> arbitrary things.
>
> I don't think we're likely to want the big list of cpus anyway.
>
> The real problem is that the x86 translation code ignores most of  
> the CPU
> feature bits, and implements everything all the time.

While that's true for quite some old features, at least x86_64/amd  
extensions are usually guarded by efer, which does read the cpuid  
bits. I'm also trying to do those checks with new features, like the  
ffxsr one.

(that is btw the reason, applying 1/2 of this series doesn't hurt  
anyone)

But yes, decoupling the cpu descriptors from qemu emulation  
capabilities sounds like a good idea. Kqemu and kvm certainly have  
different masks here ;).

Alex

>
>
> Paul
>
>

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Jamie Lokier]

Paul Brook wrote:
> > > Although this is a bit different.  We aren't actually emulating a
> > > phenom.  We're just taking what we have and calling it a phenom.  I
> > > suspect there's going to be a desire to call whatever we emulate
> > > arbitrary things.
> >
> > I don't think we're likely to want the big list of cpus anyway.
> 
> Argh. I got that completely wrong.I mean we *are* likely to want a
> big list of cpus anyway. If done properly it should be fairly easy
> to maintain.  e.g. instead of missing out unimplemented feature
> flags in each cpu, add them all, then have qemu mask out the ones it
> doesn't implement.

That's an excellent idea.  The CPU list is a bit of historical
documentation of real CPU capabilities among other things, and not all
easy to verify, so having it be correct, and then QEMU masking things
out, sounds good to me.

-- Jamie

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Amit Shah]

On (Tue) Jan 27 2009 [22:56:40], Paul Brook wrote:
> > > Although this is a bit different.  We aren't actually emulating a
> > > phenom.  We're just taking what we have and calling it a phenom.  I
> > > suspect there's going to be a desire to call whatever we emulate
> > > arbitrary things.
> >
> > I don't think we're likely to want the big list of cpus anyway.
> 
> Argh. I got that completely wrong.I mean we *are* likely to want a big list of 
> cpus anyway. If done properly it should be fairly easy to maintain.
> e.g. instead of missing out unimplemented feature flags in each cpu, add them 
> all, then have qemu mask out the ones it doesn't implement.

What I'm thinking of is moving all the CPU definitions out from helper.c
into $(PREFIX)/usr/share/qemu/cpu-defs/... with one file holding one
definition, like
$ cat core2duo.def
model= 15
family = 16
stepping = 11
level = 10
.
.
.

Adding a new def then just becomes a matter of submitting a text file
for inclusion and doesn't need any recompilation.

Also, there are many details not captured in a CPU def, like the cache
sizes and types. They're hard-coded for all the CPUs in the cpuid helper
function. So we could have those values too incorporated in the CPU def
file an fall back to the defaults when not available.

When we do get some kind of a machine FDT, we can specify the cpu type
by either pointing to one of these files or by constructing a new CPU
type by specifying individual values.

Amit

Re: [Qemu-devel] [PATCH 0/2] Add Phenom CPU Descriptor

[Anthony Liguori]

Alexander Graf wrote:
> Having multiple different CPUs can be very conventient when trying out
> if some things don't work because they require special features.
>
> Mac OS X only running on modern Intel CPUs is an example for this. Another
> example is Hyper-V, which needs a current Barcelona/Phenom CPU to run
> on when it's supposed to use SVM.
>
> This patchset implements FFXSR which is required by Hyper-V and the
> Phenom CPU description. It is not sufficient to make Hyper-V boot yet,
> but at least brings us one step closer to it.
>
> Alexander Graf (2):
>   Implement FFXSR
>   Add phenom CPU descriptor
>
>  target-i386/helper.c    |   28 ++++++++++++++++++++++++++++
>  target-i386/op_helper.c |   28 ++++++++++++++++++++--------
>  2 files changed, 48 insertions(+), 8 deletions(-)
>   

Applied both.  Thanks.

Regards,

Anthony Liguori

>
>
>   

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Anthony Liguori]

Alexander Graf wrote:
> Any reason not to commit this one? It's required for Hyper-V and 
> VMware ESX and lives perfectly fine without patch 1/2.

Because the first one can't be committed and I wasn't sure whether you 
meant for this one to be included to.  I take a look at committing it.

Regards,

Anthony Liguori

> Alex
>
> On 05.01.2009, at 17:11, Alexander Graf wrote:
>
>> As part of my ongoing effort to make nested SVM useful, I started 
>> working to get
>> VMware ESX run inside KVM.
>>
>> VMware couples itself pretty tightly to the CPUID, so it's a good 
>> idea to emulate
>> a machine that officially supports SVM and should thus exploit the 
>> powers of
>> nested virtualization.
>>
>> This patch adds a Phenom CPU identifier, that resembles a real-world 
>> phenom
>> CPU as closely as possible.
>>
>> Signed-off-by: Alexander Graf <agraf@suse.de>
>> ---
>> target-i386/helper.c |   27 +++++++++++++++++++++++++++
>> 1 files changed, 27 insertions(+), 0 deletions(-)
>>
>> diff --git a/target-i386/helper.c b/target-i386/helper.c
>> index a28ab93..c709ad8 100644
>> --- a/target-i386/helper.c
>> +++ b/target-i386/helper.c
>> @@ -137,6 +137,33 @@ static x86_def_t x86_defs[] = {
>>         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
>>     },
>>     {
>> +        .name = "phenom",
>> +        .level = 5,
>> +        .vendor1 = CPUID_VENDOR_AMD_1,
>> +        .vendor2 = CPUID_VENDOR_AMD_2,
>> +        .vendor3 = CPUID_VENDOR_AMD_3,
>> +        .family = 16,
>> +        .model = 2,
>> +        .stepping = 3,
>> +        /* Missing: CPUID_VME, CPUID_HT */
>> +        .features = PPRO_FEATURES |
>> +            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
>> +            CPUID_PSE36,
>> +        /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
>> +        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
>> +        /* Missing: CPUID_EXT2_FFXSR, CPUID_EXT2_PDPE1GB, 
>> CPUID_EXT2_RDTSCP */
>> +        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
>> +            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
>> +            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT,
>> +        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, 
>> CPUID_EXT3_EXTAPIC,
>> +                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, 
>> CPUID_EXT3_SSE4A,
>> +                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
>> +                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
>> +        .ext3_features = CPUID_EXT3_SVM,
>> +        .xlevel = 0x8000001A,
>> +        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
>> +    },
>> +    {
>>         .name = "core2duo",
>>         .level = 10,
>>         .family = 6,
>> -- 
>> 1.5.6
>>
>>
>>
>
>
>

Re: [Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Alexander Graf]

Any reason not to commit this one? It's required for Hyper-V and  
VMware ESX and lives perfectly fine without patch 1/2.

Alex

On 05.01.2009, at 17:11, Alexander Graf wrote:

> As part of my ongoing effort to make nested SVM useful, I started  
> working to get
> VMware ESX run inside KVM.
>
> VMware couples itself pretty tightly to the CPUID, so it's a good  
> idea to emulate
> a machine that officially supports SVM and should thus exploit the  
> powers of
> nested virtualization.
>
> This patch adds a Phenom CPU identifier, that resembles a real-world  
> phenom
> CPU as closely as possible.
>
> Signed-off-by: Alexander Graf <agraf@suse.de>
> ---
> target-i386/helper.c |   27 +++++++++++++++++++++++++++
> 1 files changed, 27 insertions(+), 0 deletions(-)
>
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index a28ab93..c709ad8 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -137,6 +137,33 @@ static x86_def_t x86_defs[] = {
>         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
>     },
>     {
> +        .name = "phenom",
> +        .level = 5,
> +        .vendor1 = CPUID_VENDOR_AMD_1,
> +        .vendor2 = CPUID_VENDOR_AMD_2,
> +        .vendor3 = CPUID_VENDOR_AMD_3,
> +        .family = 16,
> +        .model = 2,
> +        .stepping = 3,
> +        /* Missing: CPUID_VME, CPUID_HT */
> +        .features = PPRO_FEATURES |
> +            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
> +            CPUID_PSE36,
> +        /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
> +        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
> +        /* Missing: CPUID_EXT2_FFXSR, CPUID_EXT2_PDPE1GB,  
> CPUID_EXT2_RDTSCP */
> +        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
> +            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
> +            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT |  
> CPUID_EXT2_MMXEXT,
> +        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG,  
> CPUID_EXT3_EXTAPIC,
> +                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM,  
> CPUID_EXT3_SSE4A,
> +                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
> +                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
> +        .ext3_features = CPUID_EXT3_SVM,
> +        .xlevel = 0x8000001A,
> +        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
> +    },
> +    {
>         .name = "core2duo",
>         .level = 10,
>         .family = 6,
> -- 
> 1.5.6
>
>
>

[Qemu-devel] [PATCH 2/2] Add phenom CPU descriptor

[Alexander Graf]

As part of my ongoing effort to make nested SVM useful, I started working to get
VMware ESX run inside KVM.

VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulate
a machine that officially supports SVM and should thus exploit the powers of
nested virtualization.

This patch adds a Phenom CPU identifier, that resembles a real-world phenom
CPU as closely as possible.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 target-i386/helper.c |   27 +++++++++++++++++++++++++++
 1 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/target-i386/helper.c b/target-i386/helper.c
index a28ab93..c709ad8 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -137,6 +137,33 @@ static x86_def_t x86_defs[] = {
         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
     },
     {
+        .name = "phenom",
+        .level = 5,
+        .vendor1 = CPUID_VENDOR_AMD_1,
+        .vendor2 = CPUID_VENDOR_AMD_2,
+        .vendor3 = CPUID_VENDOR_AMD_3,
+        .family = 16,
+        .model = 2,
+        .stepping = 3,
+        /* Missing: CPUID_VME, CPUID_HT */
+        .features = PPRO_FEATURES | 
+            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
+            CPUID_PSE36,
+        /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
+        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
+        /* Missing: CPUID_EXT2_FFXSR, CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
+        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | 
+            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
+            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT,
+        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
+                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
+                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
+                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
+        .ext3_features = CPUID_EXT3_SVM,
+        .xlevel = 0x8000001A,
+        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
+    },
+    {
         .name = "core2duo",
         .level = 10,
         .family = 6,
-- 
1.5.6