* [PATCH 1/4] Fix GPE registers read/write handling.
@ 2009-02-05 13:42 Gleb Natapov
2009-02-05 13:42 ` [PATCH 2/4] Fix CPU hotplug Gleb Natapov
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Gleb Natapov @ 2009-02-05 13:42 UTC (permalink / raw)
To: avi; +Cc: kvm
For STS register bit are cleared by writing 1 into it.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
---
qemu/hw/acpi.c | 43 +++++++++++++++++++++++++++++++------------
1 files changed, 31 insertions(+), 12 deletions(-)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index b998225..7074166 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -590,6 +590,13 @@ struct pci_status {
static struct gpe_regs gpe;
static struct pci_status pci0_status;
+static uint32_t gpe_read_val(uint16_t val, uint32_t addr)
+{
+ if (addr & 1)
+ return (val >> 8) & 0xff;
+ return val & 0xff;
+}
+
static uint32_t gpe_readb(void *opaque, uint32_t addr)
{
uint32_t val = 0;
@@ -603,16 +610,12 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr)
break;
case GPE_BASE:
- val = g->sts & 0xFF;
- break;
case GPE_BASE + 1:
- val = (g->sts >> 8) & 0xFF;
+ val = gpe_read_val(g->sts, addr);
break;
case GPE_BASE + 2:
- val = g->en & 0xFF;
- break;
case GPE_BASE + 3:
- val = (g->en >> 8) & 0xFF;
+ val = gpe_read_val(g->en, addr);
break;
default:
break;
@@ -624,6 +627,26 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr)
return val;
}
+static void gpe_write_val(uint16_t *cur, int addr, uint32_t val)
+{
+ if (addr & 1)
+ *cur = (*cur & 0xff) | (val << 8);
+ else
+ *cur = (*cur & 0xff00) | (val & 0xff);
+}
+
+static void gpe_reset_val(uint16_t *cur, int addr, uint32_t val)
+{
+ uint16_t x1, x0 = val & 0xff;
+ int shift = (addr & 1) ? 8 : 0;
+
+ x1 = (*cur >> shift) & 0xff;
+
+ x1 = x1 & ~x0;
+
+ *cur = (*cur & (0xff << (8 - shift))) | (x1 << shift);
+}
+
static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
{
struct gpe_regs *g = opaque;
@@ -636,16 +659,12 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
break;
case GPE_BASE:
- g->sts = (g->sts & ~0xFFFF) | (val & 0xFFFF);
- break;
case GPE_BASE + 1:
- g->sts = (g->sts & 0xFFFF) | (val << 8);
+ gpe_reset_val(&g->sts, addr, val);
break;
case GPE_BASE + 2:
- g->en = (g->en & ~0xFFFF) | (val & 0xFFFF);
- break;
case GPE_BASE + 3:
- g->en = (g->en & 0xFFFF) | (val << 8);
+ gpe_write_val(&g->en, addr, val);
break;
default:
break;
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/4] Fix CPU hotplug
2009-02-05 13:42 [PATCH 1/4] Fix GPE registers read/write handling Gleb Natapov
@ 2009-02-05 13:42 ` Gleb Natapov
2009-02-09 13:52 ` Gleb Natapov
2009-02-05 13:42 ` [PATCH 3/4] Use reserved STS bits from PIIX4 chipset to avoid clash in the future Gleb Natapov
` (3 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Gleb Natapov @ 2009-02-05 13:42 UTC (permalink / raw)
To: avi; +Cc: kvm
1) Disabled processor's _STA method should return 0 (this fixes Vista's
BSOD on resuming after hibernate problem)
2) Disabled processor's _MAT method should return disabled MADT entry
instead of 0 (this fixes Linux kernel complains during boot)
3) Extend bitmask of hot pluggable CPUs to be 256 bit long
4) Generate interrupt only if corespondent EN bit is set
Signed-off-by: Gleb Natapov <gleb@redhat.com>
---
qemu/hw/acpi.c | 41 +++++++++++++++++++----------------------
1 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index d67616d..f94ab22 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -27,28 +27,41 @@ DefinitionBlock (
{
Scope (\_PR)
{
- OperationRegion( PRST, SystemIO, 0xaf00, 0x02)
- Field (PRST, ByteAcc, NoLock, WriteAsZeros)
+ OperationRegion(PRST, SystemIO, 0xaf00, 32)
+ Field (PRST, ByteAcc, NoLock, Preserve)
{
- PRU, 8,
- PRD, 8,
+ PRS, 256
+ }
+
+ Name(PRSS, Buffer(32){}) /* shadow CPU status bitmask */
+ Name(SSVL, 0)
+
+ Method(CRST, 1) {
+ If (LEqual(SSVL, 0)) {
+ Store(PRS, PRSS) /* read CPUs status bitmaks from HW */
+ Store(1, SSVL)
+ }
+ ShiftRight(Arg0, 3, Local1)
+ Store(DerefOf(Index(PRSS, Local1)), Local2)
+ Return(And(Local2, ShiftLeft(1, And(Arg0, 0x7))))
}
#define gen_processor(nr, name) \
Processor (CPU##name, nr, 0x0000b010, 0x06) { \
- Name (TMP, Buffer(0x8) {0x0, 0x8, nr, nr, 0x1, 0x0, 0x0, 0x0}) \
+ Name (PREN, Buffer(0x8) {0x0, 0x8, nr, nr, 0x1, 0x0, 0x0, 0x0}) \
+ Name (PRDS, Buffer(0x8) {0x0, 0x8, nr, nr, 0x0, 0x0, 0x0, 0x0}) \
Method(_MAT, 0) { \
- If (And(\_PR.PRU, ShiftLeft(1, nr))) { Return(TMP) } \
- Else { Return(0x0) } \
+ If (CRST(nr)) { Return(PREN) } \
+ Else { Return(PRDS) } \
} \
Method (_STA) { \
- Return(0xF) \
+ If (CRST(nr)) { Return(0xF) } \
+ Else { Return(0x0) } \
} \
} \
-
- Processor (CPU0, 0x00, 0x0000b010, 0x06) {Method (_STA) { Return(0xF)}}
+ gen_processor(0, 0)
gen_processor(1, 1)
gen_processor(2, 2)
gen_processor(3, 3)
@@ -63,6 +76,67 @@ DefinitionBlock (
gen_processor(12, C)
gen_processor(13, D)
gen_processor(14, E)
+
+ Method (NTFY, 2) {
+#define gen_ntfy(nr) \
+ If (LEqual(Arg0, 0x##nr)) { \
+ Notify(CPU##nr, Arg1) \
+ }
+ gen_ntfy(0)
+ gen_ntfy(1)
+ gen_ntfy(2)
+ gen_ntfy(3)
+ gen_ntfy(4)
+ gen_ntfy(5)
+ gen_ntfy(6)
+ gen_ntfy(7)
+ gen_ntfy(8)
+ gen_ntfy(9)
+ gen_ntfy(A)
+ gen_ntfy(B)
+ gen_ntfy(C)
+ gen_ntfy(D)
+ gen_ntfy(E)
+ Return(One)
+ }
+
+ /* Works on 8 bit quentity.
+ * Arg1 - Shadow status bits
+ * Arg2 - Current status bits
+ */
+ Method(PR1, 3) {
+ Xor(Arg1, Arg2, Local0) /* figure out what chaged */
+ ShiftLeft(Arg0, 3, Local1)
+ While (LNotEqual(Local0, Zero)) {
+ If (And(Local0, 1)) { /* if staus have changed */
+ if(And(Arg2, 1)) { /* check previous status */
+ Store(3, Local3)
+ } Else {
+ Store(1, Local3)
+ }
+ NTFY(Local1, Local3)
+ }
+ ShiftRight(Local0, 1, Local0)
+ ShiftRight(Arg2, 1, Arg2)
+ Increment(Local1)
+ }
+ Return(One)
+ }
+
+ Method(PRSC, 0) {
+ Store(Buffer(32){}, Local0)
+ Store(PRS, Local0) /* read CPUs status bitmask into Local0 */
+ Store(Zero, Local1)
+ /* loop over bitmask byte by byte to see what have chaged */
+ While(LLess(Local1, 32)) {
+ Store(DerefOf(Index(Local0, Local1)), Local2)
+ Store(DerefOf(Index(PRSS, Local1)), Local3)
+ PR1(Local1, Local2, Local3)
+ Increment(Local1)
+ }
+ Store(Local0, PRSS) /* store curr satust bitmask into shadow */
+ Return(One)
+ }
}
Scope (\)
@@ -666,34 +740,13 @@ DefinitionBlock (
Zero, /* reserved */
Zero /* reserved */
})
+
Scope (\_GPE)
{
-
-#define gen_cpu_hotplug(name, nr) \
- If (And(\_PR.PRU, ShiftLeft(1, nr))) { \
- Notify(\_PR.CPU##name, 1) \
- } \
- If (And(\_PR.PRD, ShiftLeft(1, nr))) { \
- Notify(\_PR.CPU##name, 3) \
- }
+ Name(_HID, "ACPI0006")
Method(_L00) {
- gen_cpu_hotplug(1, 1)
- gen_cpu_hotplug(2, 2)
- gen_cpu_hotplug(3, 3)
- gen_cpu_hotplug(4, 4)
- gen_cpu_hotplug(5, 5)
- gen_cpu_hotplug(6, 6)
- gen_cpu_hotplug(7, 7)
- gen_cpu_hotplug(8, 8)
- gen_cpu_hotplug(9, 9)
- gen_cpu_hotplug(A, 10)
- gen_cpu_hotplug(B, 11)
- gen_cpu_hotplug(C, 12)
- gen_cpu_hotplug(D, 13)
- gen_cpu_hotplug(E, 14)
-
- Return(0x01)
+ Return(\_PR.PRSC())
}
#define gen_pci_hotplug(nr) \
@@ -739,6 +792,7 @@ DefinitionBlock (
Return(0x01)
}
+
Method(_L02) {
Return(0x01)
}
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index 7074166..60ef43f 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -578,8 +578,7 @@ void qemu_system_powerdown(void)
struct gpe_regs {
uint16_t sts; /* status */
uint16_t en; /* enabled */
- uint8_t up;
- uint8_t down;
+ uint8_t cpus_sts[32];
};
struct pci_status {
@@ -602,11 +601,8 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr)
uint32_t val = 0;
struct gpe_regs *g = opaque;
switch (addr) {
- case PROC_BASE:
- val = g->up;
- break;
- case PROC_BASE + 1:
- val = g->down;
+ case PROC_BASE ... PROC_BASE+31:
+ val = g->cpus_sts[addr - PROC_BASE];
break;
case GPE_BASE:
@@ -651,11 +647,8 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
{
struct gpe_regs *g = opaque;
switch (addr) {
- case PROC_BASE:
- g->up = val;
- break;
- case PROC_BASE + 1:
- g->down = val;
+ case PROC_BASE ... PROC_BASE + 31:
+ /* don't allow to change cpus_sts from inside a guest */
break;
case GPE_BASE:
@@ -736,11 +729,17 @@ static const char *model;
void qemu_system_hot_add_init(const char *cpu_model)
{
+ int i = 0, cpus = smp_cpus;
+
+ while (cpus > 0) {
+ gpe.cpus_sts[i++] = (cpus < 8) ? (1 << cpus) - 1 : 0xff;
+ cpus -= 8;
+ }
register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, &gpe);
register_ioport_read(GPE_BASE, 4, 1, gpe_readb, &gpe);
- register_ioport_write(PROC_BASE, 4, 1, gpe_writeb, &gpe);
- register_ioport_read(PROC_BASE, 4, 1, gpe_readb, &gpe);
+ register_ioport_write(PROC_BASE, 32, 1, gpe_writeb, &gpe);
+ register_ioport_read(PROC_BASE, 32, 1, gpe_readb, &gpe);
register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, &pci0_status);
register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, &pci0_status);
@@ -754,15 +753,13 @@ void qemu_system_hot_add_init(const char *cpu_model)
static void enable_processor(struct gpe_regs *g, int cpu)
{
g->sts |= 1;
- g->en |= 1;
- g->up |= (1 << cpu);
+ g->cpus_sts[cpu/8] |= (1 << (cpu%8));
}
static void disable_processor(struct gpe_regs *g, int cpu)
{
g->sts |= 1;
- g->en |= 1;
- g->down |= (1 << cpu);
+ g->cpus_sts[cpu/8] &= ~(1 << (cpu%8));
}
#if defined(TARGET_I386) || defined(TARGET_X86_64)
@@ -803,14 +800,14 @@ void qemu_system_cpu_hot_add(int cpu, int state)
#endif
}
- qemu_set_irq(pm_state->irq, 1);
- gpe.up = 0;
- gpe.down = 0;
if (state)
enable_processor(&gpe, cpu);
else
disable_processor(&gpe, cpu);
- qemu_set_irq(pm_state->irq, 0);
+ if (gpe.en & 1) {
+ qemu_set_irq(pm_state->irq, 1);
+ qemu_set_irq(pm_state->irq, 0);
+ }
}
#endif
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/4] Use reserved STS bits from PIIX4 chipset to avoid clash in the future
2009-02-05 13:42 [PATCH 1/4] Fix GPE registers read/write handling Gleb Natapov
2009-02-05 13:42 ` [PATCH 2/4] Fix CPU hotplug Gleb Natapov
@ 2009-02-05 13:42 ` Gleb Natapov
2009-02-05 13:42 ` [PATCH 4/4] PCI hotplug fixes Gleb Natapov
` (2 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Gleb Natapov @ 2009-02-05 13:42 UTC (permalink / raw)
To: avi; +Cc: kvm
Signed-off-by: Gleb Natapov <gleb@redhat.com>
---
qemu/hw/acpi.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index f94ab22..1d1a6b5 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -746,7 +746,7 @@ DefinitionBlock (
Name(_HID, "ACPI0006")
Method(_L00) {
- Return(\_PR.PRSC())
+ Return(0x01)
}
#define gen_pci_hotplug(nr) \
@@ -794,7 +794,7 @@ DefinitionBlock (
}
Method(_L02) {
- Return(0x01)
+ Return(\_PR.PRSC())
}
Method(_L03) {
Return(0x01)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index 60ef43f..c2c60ad 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -752,13 +752,13 @@ void qemu_system_hot_add_init(const char *cpu_model)
static void enable_processor(struct gpe_regs *g, int cpu)
{
- g->sts |= 1;
+ g->sts |= 4;
g->cpus_sts[cpu/8] |= (1 << (cpu%8));
}
static void disable_processor(struct gpe_regs *g, int cpu)
{
- g->sts |= 1;
+ g->sts |= 4;
g->cpus_sts[cpu/8] &= ~(1 << (cpu%8));
}
@@ -804,7 +804,7 @@ void qemu_system_cpu_hot_add(int cpu, int state)
enable_processor(&gpe, cpu);
else
disable_processor(&gpe, cpu);
- if (gpe.en & 1) {
+ if (gpe.en & 4) {
qemu_set_irq(pm_state->irq, 1);
qemu_set_irq(pm_state->irq, 0);
}
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/4] PCI hotplug fixes
2009-02-05 13:42 [PATCH 1/4] Fix GPE registers read/write handling Gleb Natapov
2009-02-05 13:42 ` [PATCH 2/4] Fix CPU hotplug Gleb Natapov
2009-02-05 13:42 ` [PATCH 3/4] Use reserved STS bits from PIIX4 chipset to avoid clash in the future Gleb Natapov
@ 2009-02-05 13:42 ` Gleb Natapov
2009-02-10 0:36 ` Marcelo Tosatti
2009-02-09 13:58 ` [PATCH 1/4] Fix GPE registers read/write handling Avi Kivity
2009-02-11 12:14 ` Avi Kivity
4 siblings, 1 reply; 9+ messages in thread
From: Gleb Natapov @ 2009-02-05 13:42 UTC (permalink / raw)
To: avi; +Cc: kvm
Generate interrupt only if corespondent EN bit is set.
Signed-off-by: Gleb Natapov <gleb@redhat.com>
---
qemu/hw/acpi.c | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index c2c60ad..fcb02a5 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -814,25 +814,26 @@ void qemu_system_cpu_hot_add(int cpu, int state)
static void enable_device(struct pci_status *p, struct gpe_regs *g, int slot)
{
g->sts |= 2;
- g->en |= 2;
p->up |= (1 << slot);
}
static void disable_device(struct pci_status *p, struct gpe_regs *g, int slot)
{
g->sts |= 2;
- g->en |= 2;
p->down |= (1 << slot);
}
void qemu_system_device_hot_add(int pcibus, int slot, int state)
{
- qemu_set_irq(pm_state->irq, 1);
pci0_status.up = 0;
pci0_status.down = 0;
if (state)
enable_device(&pci0_status, &gpe, slot);
else
disable_device(&pci0_status, &gpe, slot);
- qemu_set_irq(pm_state->irq, 0);
+
+ if (gpe.en & 2) {
+ qemu_set_irq(pm_state->irq, 1);
+ qemu_set_irq(pm_state->irq, 0);
+ }
}
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/4] Fix CPU hotplug
2009-02-05 13:42 ` [PATCH 2/4] Fix CPU hotplug Gleb Natapov
@ 2009-02-09 13:52 ` Gleb Natapov
0 siblings, 0 replies; 9+ messages in thread
From: Gleb Natapov @ 2009-02-09 13:52 UTC (permalink / raw)
To: avi; +Cc: kvm
Use this patch instead (return 0x9 from disabled processor's _STA method
instead of 0).
On Thu, Feb 05, 2009 at 03:42:46PM +0200, Gleb Natapov wrote:
> 1) Disabled processor's _STA method should return 0 (this fixes Vista's
> BSOD on resuming after hibernate problem)
> 2) Disabled processor's _MAT method should return disabled MADT entry
> instead of 0 (this fixes Linux kernel complains during boot)
> 3) Extend bitmask of hot pluggable CPUs to be 256 bit long
> 4) Generate interrupt only if corespondent EN bit is set
>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
diff --git a/bios/acpi-dsdt.dsl b/bios/acpi-dsdt.dsl
index d67616d..1684820 100755
--- a/bios/acpi-dsdt.dsl
+++ b/bios/acpi-dsdt.dsl
@@ -27,28 +27,41 @@ DefinitionBlock (
{
Scope (\_PR)
{
- OperationRegion( PRST, SystemIO, 0xaf00, 0x02)
- Field (PRST, ByteAcc, NoLock, WriteAsZeros)
+ OperationRegion(PRST, SystemIO, 0xaf00, 32)
+ Field (PRST, ByteAcc, NoLock, Preserve)
{
- PRU, 8,
- PRD, 8,
+ PRS, 256
+ }
+
+ Name(PRSS, Buffer(32){}) /* shadow CPU status bitmask */
+ Name(SSVL, 0)
+
+ Method(CRST, 1) {
+ If (LEqual(SSVL, 0)) {
+ Store(PRS, PRSS) /* read CPUs status bitmaks from HW */
+ Store(1, SSVL)
+ }
+ ShiftRight(Arg0, 3, Local1)
+ Store(DerefOf(Index(PRSS, Local1)), Local2)
+ Return(And(Local2, ShiftLeft(1, And(Arg0, 0x7))))
}
#define gen_processor(nr, name) \
Processor (CPU##name, nr, 0x0000b010, 0x06) { \
- Name (TMP, Buffer(0x8) {0x0, 0x8, nr, nr, 0x1, 0x0, 0x0, 0x0}) \
+ Name (PREN, Buffer(0x8) {0x0, 0x8, nr, nr, 0x1, 0x0, 0x0, 0x0}) \
+ Name (PRDS, Buffer(0x8) {0x0, 0x8, nr, nr, 0x0, 0x0, 0x0, 0x0}) \
Method(_MAT, 0) { \
- If (And(\_PR.PRU, ShiftLeft(1, nr))) { Return(TMP) } \
- Else { Return(0x0) } \
+ If (CRST(nr)) { Return(PREN) } \
+ Else { Return(PRDS) } \
} \
Method (_STA) { \
- Return(0xF) \
+ If (CRST(nr)) { Return(0xF) } \
+ Else { Return(0x9) } \
} \
} \
-
- Processor (CPU0, 0x00, 0x0000b010, 0x06) {Method (_STA) { Return(0xF)}}
+ gen_processor(0, 0)
gen_processor(1, 1)
gen_processor(2, 2)
gen_processor(3, 3)
@@ -63,6 +76,67 @@ DefinitionBlock (
gen_processor(12, C)
gen_processor(13, D)
gen_processor(14, E)
+
+ Method (NTFY, 2) {
+#define gen_ntfy(nr) \
+ If (LEqual(Arg0, 0x##nr)) { \
+ Notify(CPU##nr, Arg1) \
+ }
+ gen_ntfy(0)
+ gen_ntfy(1)
+ gen_ntfy(2)
+ gen_ntfy(3)
+ gen_ntfy(4)
+ gen_ntfy(5)
+ gen_ntfy(6)
+ gen_ntfy(7)
+ gen_ntfy(8)
+ gen_ntfy(9)
+ gen_ntfy(A)
+ gen_ntfy(B)
+ gen_ntfy(C)
+ gen_ntfy(D)
+ gen_ntfy(E)
+ Return(One)
+ }
+
+ /* Works on 8 bit quentity.
+ * Arg1 - Shadow status bits
+ * Arg2 - Current status bits
+ */
+ Method(PR1, 3) {
+ Xor(Arg1, Arg2, Local0) /* figure out what chaged */
+ ShiftLeft(Arg0, 3, Local1)
+ While (LNotEqual(Local0, Zero)) {
+ If (And(Local0, 1)) { /* if staus have changed */
+ if(And(Arg2, 1)) { /* check previous status */
+ Store(3, Local3)
+ } Else {
+ Store(1, Local3)
+ }
+ NTFY(Local1, Local3)
+ }
+ ShiftRight(Local0, 1, Local0)
+ ShiftRight(Arg2, 1, Arg2)
+ Increment(Local1)
+ }
+ Return(One)
+ }
+
+ Method(PRSC, 0) {
+ Store(Buffer(32){}, Local0)
+ Store(PRS, Local0) /* read CPUs status bitmask into Local0 */
+ Store(Zero, Local1)
+ /* loop over bitmask byte by byte to see what have chaged */
+ While(LLess(Local1, 32)) {
+ Store(DerefOf(Index(Local0, Local1)), Local2)
+ Store(DerefOf(Index(PRSS, Local1)), Local3)
+ PR1(Local1, Local2, Local3)
+ Increment(Local1)
+ }
+ Store(Local0, PRSS) /* store curr satust bitmask into shadow */
+ Return(One)
+ }
}
Scope (\)
@@ -666,34 +740,13 @@ DefinitionBlock (
Zero, /* reserved */
Zero /* reserved */
})
+
Scope (\_GPE)
{
-
-#define gen_cpu_hotplug(name, nr) \
- If (And(\_PR.PRU, ShiftLeft(1, nr))) { \
- Notify(\_PR.CPU##name, 1) \
- } \
- If (And(\_PR.PRD, ShiftLeft(1, nr))) { \
- Notify(\_PR.CPU##name, 3) \
- }
+ Name(_HID, "ACPI0006")
Method(_L00) {
- gen_cpu_hotplug(1, 1)
- gen_cpu_hotplug(2, 2)
- gen_cpu_hotplug(3, 3)
- gen_cpu_hotplug(4, 4)
- gen_cpu_hotplug(5, 5)
- gen_cpu_hotplug(6, 6)
- gen_cpu_hotplug(7, 7)
- gen_cpu_hotplug(8, 8)
- gen_cpu_hotplug(9, 9)
- gen_cpu_hotplug(A, 10)
- gen_cpu_hotplug(B, 11)
- gen_cpu_hotplug(C, 12)
- gen_cpu_hotplug(D, 13)
- gen_cpu_hotplug(E, 14)
-
- Return(0x01)
+ Return(\_PR.PRSC())
}
#define gen_pci_hotplug(nr) \
@@ -739,6 +792,7 @@ DefinitionBlock (
Return(0x01)
}
+
Method(_L02) {
Return(0x01)
}
diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c
index f7b3862..d857149 100644
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -578,8 +578,7 @@ void qemu_system_powerdown(void)
struct gpe_regs {
uint16_t sts; /* status */
uint16_t en; /* enabled */
- uint8_t up;
- uint8_t down;
+ uint8_t cpus_sts[32];
};
struct pci_status {
@@ -602,11 +601,8 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr)
uint32_t val = 0;
struct gpe_regs *g = opaque;
switch (addr) {
- case PROC_BASE:
- val = g->up;
- break;
- case PROC_BASE + 1:
- val = g->down;
+ case PROC_BASE ... PROC_BASE+31:
+ val = g->cpus_sts[addr - PROC_BASE];
break;
case GPE_BASE:
@@ -651,11 +647,8 @@ static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val)
{
struct gpe_regs *g = opaque;
switch (addr) {
- case PROC_BASE:
- g->up = val;
- break;
- case PROC_BASE + 1:
- g->down = val;
+ case PROC_BASE ... PROC_BASE + 31:
+ /* don't allow to change cpus_sts from inside a guest */
break;
case GPE_BASE:
@@ -736,11 +729,17 @@ static const char *model;
void qemu_system_hot_add_init(const char *cpu_model)
{
+ int i = 0, cpus = smp_cpus;
+
+ while (cpus > 0) {
+ gpe.cpus_sts[i++] = (cpus < 8) ? (1 << cpus) - 1 : 0xff;
+ cpus -= 8;
+ }
register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, &gpe);
register_ioport_read(GPE_BASE, 4, 1, gpe_readb, &gpe);
- register_ioport_write(PROC_BASE, 4, 1, gpe_writeb, &gpe);
- register_ioport_read(PROC_BASE, 4, 1, gpe_readb, &gpe);
+ register_ioport_write(PROC_BASE, 32, 1, gpe_writeb, &gpe);
+ register_ioport_read(PROC_BASE, 32, 1, gpe_readb, &gpe);
register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, &pci0_status);
register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, &pci0_status);
@@ -754,15 +753,13 @@ void qemu_system_hot_add_init(const char *cpu_model)
static void enable_processor(struct gpe_regs *g, int cpu)
{
g->sts |= 1;
- g->en |= 1;
- g->up |= (1 << cpu);
+ g->cpus_sts[cpu/8] |= (1 << (cpu%8));
}
static void disable_processor(struct gpe_regs *g, int cpu)
{
g->sts |= 1;
- g->en |= 1;
- g->down |= (1 << cpu);
+ g->cpus_sts[cpu/8] &= ~(1 << (cpu%8));
}
#if defined(TARGET_I386) || defined(TARGET_X86_64)
@@ -800,14 +797,14 @@ void qemu_system_cpu_hot_add(int cpu, int state)
}
}
- qemu_set_irq(pm_state->irq, 1);
- gpe.up = 0;
- gpe.down = 0;
if (state)
enable_processor(&gpe, cpu);
else
disable_processor(&gpe, cpu);
- qemu_set_irq(pm_state->irq, 0);
+ if (gpe.en & 1) {
+ qemu_set_irq(pm_state->irq, 1);
+ qemu_set_irq(pm_state->irq, 0);
+ }
}
#endif
--
Gleb.
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] Fix GPE registers read/write handling.
2009-02-05 13:42 [PATCH 1/4] Fix GPE registers read/write handling Gleb Natapov
` (2 preceding siblings ...)
2009-02-05 13:42 ` [PATCH 4/4] PCI hotplug fixes Gleb Natapov
@ 2009-02-09 13:58 ` Avi Kivity
2009-02-10 13:52 ` Glauber Costa
2009-02-11 12:14 ` Avi Kivity
4 siblings, 1 reply; 9+ messages in thread
From: Avi Kivity @ 2009-02-09 13:58 UTC (permalink / raw)
To: Marcelo Tosatti, Glauber de Oliveira Costa; +Cc: Gleb Natapov, kvm
Gleb Natapov wrote:
> For STS register bit are cleared by writing 1 into it.
>
>
Patchset looks good; however this is a touchy area. Marcelo or glommer,
can you also review it?
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 4/4] PCI hotplug fixes
2009-02-05 13:42 ` [PATCH 4/4] PCI hotplug fixes Gleb Natapov
@ 2009-02-10 0:36 ` Marcelo Tosatti
0 siblings, 0 replies; 9+ messages in thread
From: Marcelo Tosatti @ 2009-02-10 0:36 UTC (permalink / raw)
To: Gleb Natapov; +Cc: avi, kvm
On Thu, Feb 05, 2009 at 03:42:57PM +0200, Gleb Natapov wrote:
> Generate interrupt only if corespondent EN bit is set.
>
> Signed-off-by: Gleb Natapov <gleb@redhat.com>
> ---
>
> qemu/hw/acpi.c | 9 +++++----
> 1 files changed, 5 insertions(+), 4 deletions(-)
Acked-by: Marcelo Tosatti <mtosatti@redhat.com>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] Fix GPE registers read/write handling.
2009-02-09 13:58 ` [PATCH 1/4] Fix GPE registers read/write handling Avi Kivity
@ 2009-02-10 13:52 ` Glauber Costa
0 siblings, 0 replies; 9+ messages in thread
From: Glauber Costa @ 2009-02-10 13:52 UTC (permalink / raw)
To: Avi Kivity; +Cc: Marcelo Tosatti, Glauber de Oliveira Costa, Gleb Natapov, kvm
On Mon, Feb 09, 2009 at 03:58:52PM +0200, Avi Kivity wrote:
> Gleb Natapov wrote:
>> For STS register bit are cleared by writing 1 into it.
>>
>>
>
> Patchset looks good; however this is a touchy area. Marcelo or glommer,
> can you also review it?
I took a look at the first version, and aside for the comments that have
already been addressed, it seemed fine to me.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/4] Fix GPE registers read/write handling.
2009-02-05 13:42 [PATCH 1/4] Fix GPE registers read/write handling Gleb Natapov
` (3 preceding siblings ...)
2009-02-09 13:58 ` [PATCH 1/4] Fix GPE registers read/write handling Avi Kivity
@ 2009-02-11 12:14 ` Avi Kivity
4 siblings, 0 replies; 9+ messages in thread
From: Avi Kivity @ 2009-02-11 12:14 UTC (permalink / raw)
To: Gleb Natapov; +Cc: kvm
Gleb Natapov wrote:
> For STS register bit are cleared by writing 1 into it.
>
>
Applied all four, thanks.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2009-02-11 12:14 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2009-02-05 13:42 [PATCH 1/4] Fix GPE registers read/write handling Gleb Natapov
2009-02-05 13:42 ` [PATCH 2/4] Fix CPU hotplug Gleb Natapov
2009-02-09 13:52 ` Gleb Natapov
2009-02-05 13:42 ` [PATCH 3/4] Use reserved STS bits from PIIX4 chipset to avoid clash in the future Gleb Natapov
2009-02-05 13:42 ` [PATCH 4/4] PCI hotplug fixes Gleb Natapov
2009-02-10 0:36 ` Marcelo Tosatti
2009-02-09 13:58 ` [PATCH 1/4] Fix GPE registers read/write handling Avi Kivity
2009-02-10 13:52 ` Glauber Costa
2009-02-11 12:14 ` Avi Kivity
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