* mpt fusion broken sometime since 2.6.24 @ 2009-02-17 22:24 david 2009-02-17 21:44 ` david 0 siblings, 1 reply; 103+ messages in thread From: david @ 2009-02-17 22:24 UTC (permalink / raw) To: linux-kernel; +Cc: linux-scsi, DL-MPTFusionLinux I have some systems with the MPT fusion raid cards in them and SAS drives, they work find on the 2.6.24 'etch and a half' debian kernel, but when I try and install a 2.6.28 kernel there are numerous timeouts during boot and the raid array is not recognised. I tried a 2.6.27 kernel I have laying around and got the same results with it. is this a known problem with a work-around? or am I just lucky enough to be the only one hitting this? David Lang ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 22:24 mpt fusion broken sometime since 2.6.24 david @ 2009-02-17 21:44 ` david 2009-02-17 23:00 ` Matthew Wilcox 0 siblings, 1 reply; 103+ messages in thread From: david @ 2009-02-17 21:44 UTC (permalink / raw) To: linux-kernel; +Cc: linux-scsi, DL-MPTFusionLinux I got a picture of the failed boot at http://linux.lang.hm/linux/IMG00052.jpg David Lang On Tue, 17 Feb 2009, david@lang.hm wrote: > Date: Tue, 17 Feb 2009 14:24:27 -0800 (PST) > From: david@lang.hm > To: linux-kernel <linux-kernel@vger.kernel.org> > Cc: linux-scsi@vger.kernel.org, DL-MPTFusionLinux@lsi.com > Subject: mpt fusion broken sometime since 2.6.24 > > I have some systems with the MPT fusion raid cards in them and SAS drives, > they work find on the 2.6.24 'etch and a half' debian kernel, but when I try > and install a 2.6.28 kernel there are numerous timeouts during boot and the > raid array is not recognised. > > I tried a 2.6.27 kernel I have laying around and got the same results with > it. > > is this a known problem with a work-around? or am I just lucky enough to be > the only one hitting this? > > David Lang > -- > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ > ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 21:44 ` david @ 2009-02-17 23:00 ` Matthew Wilcox 2009-02-17 23:07 ` david 0 siblings, 1 reply; 103+ messages in thread From: Matthew Wilcox @ 2009-02-17 23:00 UTC (permalink / raw) To: david; +Cc: linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: > I got a picture of the failed boot at > http://linux.lang.hm/linux/IMG00052.jpg The PCI-MSI line is probably indicative. Can you try booting with: mptbase.mpt_msi_enable_sas=0 and also send us an lspci -v so we can update the blacklist? -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:00 ` Matthew Wilcox @ 2009-02-17 23:07 ` david 2009-02-17 23:11 ` Matthew Wilcox 2009-02-17 23:11 ` Yinghai Lu 0 siblings, 2 replies; 103+ messages in thread From: david @ 2009-02-17 23:07 UTC (permalink / raw) To: Matthew Wilcox; +Cc: linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, Matthew Wilcox wrote: > On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >> I got a picture of the failed boot at >> http://linux.lang.hm/linux/IMG00052.jpg > > The PCI-MSI line is probably indicative. Can you try booting with: > > mptbase.mpt_msi_enable_sas=0 > > and also send us an lspci -v so we can update the blacklist? is that disabling SAS for this system? if so, that's the wrong thing to do (the drives are SAS) David Lang ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:07 ` david @ 2009-02-17 23:11 ` Matthew Wilcox 2009-02-17 23:20 ` Yinghai Lu 2009-02-17 23:21 ` david 2009-02-17 23:11 ` Yinghai Lu 1 sibling, 2 replies; 103+ messages in thread From: Matthew Wilcox @ 2009-02-17 23:11 UTC (permalink / raw) To: david; +Cc: linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, Feb 17, 2009 at 03:07:26PM -0800, david@lang.hm wrote: > >mptbase.mpt_msi_enable_sas=0 > > is that disabling SAS for this system? if so, that's the wrong thing to do > (the drives are SAS) no, it's disabling msi for sas controllers. nb, I said this patch (e382968ba618e016ff7922dff9a6140c2f9108c8) was the wrong way to go about getting MSI working. -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:11 ` Matthew Wilcox @ 2009-02-17 23:20 ` Yinghai Lu 2009-02-17 23:21 ` david 1 sibling, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-17 23:20 UTC (permalink / raw) To: Matthew Wilcox, Andrew Morton, James Bottomley, Linus Torvalds Cc: david, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, Feb 17, 2009 at 3:11 PM, Matthew Wilcox <matthew@wil.cx> wrote: > On Tue, Feb 17, 2009 at 03:07:26PM -0800, david@lang.hm wrote: >> >mptbase.mpt_msi_enable_sas=0 >> >> is that disabling SAS for this system? if so, that's the wrong thing to do >> (the drives are SAS) > > no, it's disabling msi for sas controllers. > > nb, I said this patch (e382968ba618e016ff7922dff9a6140c2f9108c8) was > the wrong way to go about getting MSI working. yes. that patch really does disable the mptsas with MSI. http://lkml.org/lkml/2009/2/6/375 it should get into 2.6.29... YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:11 ` Matthew Wilcox 2009-02-17 23:20 ` Yinghai Lu @ 2009-02-17 23:21 ` david 1 sibling, 0 replies; 103+ messages in thread From: david @ 2009-02-17 23:21 UTC (permalink / raw) To: Matthew Wilcox; +Cc: linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, Matthew Wilcox wrote: > Date: Tue, 17 Feb 2009 16:11:01 -0700 > From: Matthew Wilcox <matthew@wil.cx> > To: david@lang.hm > Cc: linux-kernel <linux-kernel@vger.kernel.org>, linux-scsi@vger.kernel.org, > DL-MPTFusionLinux@lsi.com > Subject: Re: mpt fusion broken sometime since 2.6.24 > > On Tue, Feb 17, 2009 at 03:07:26PM -0800, david@lang.hm wrote: >>> mptbase.mpt_msi_enable_sas=0 >> >> is that disabling SAS for this system? if so, that's the wrong thing to do >> (the drives are SAS) > > no, it's disabling msi for sas controllers. > > nb, I said this patch (e382968ba618e016ff7922dff9a6140c2f9108c8) was > the wrong way to go about getting MSI working. same boot messages, I'll get the lspci in a few min David Lang ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:07 ` david 2009-02-17 23:11 ` Matthew Wilcox @ 2009-02-17 23:11 ` Yinghai Lu 2009-02-17 23:20 ` david 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-17 23:11 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: > On Tue, 17 Feb 2009, Matthew Wilcox wrote: > >> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>> >>> I got a picture of the failed boot at >>> http://linux.lang.hm/linux/IMG00052.jpg >> >> The PCI-MSI line is probably indicative. Can you try booting with: >> >> mptbase.mpt_msi_enable_sas=0 >> >> and also send us an lspci -v so we can update the blacklist? > > is that disabling SAS for this system? if so, that's the wrong thing to do > (the drives are SAS) > it only disable MSI with that mptsas. and mptsas will use ioapic routing. can you post whole bootlog? YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:11 ` Yinghai Lu @ 2009-02-17 23:20 ` david 2009-02-17 23:22 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: david @ 2009-02-17 23:20 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, Yinghai Lu wrote: > Subject: Re: mpt fusion broken sometime since 2.6.24 > > On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >> >>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>> >>>> I got a picture of the failed boot at >>>> http://linux.lang.hm/linux/IMG00052.jpg >>> >>> The PCI-MSI line is probably indicative. Can you try booting with: >>> >>> mptbase.mpt_msi_enable_sas=0 >>> >>> and also send us an lspci -v so we can update the blacklist? >> >> is that disabling SAS for this system? if so, that's the wrong thing to do >> (the drives are SAS) >> > it only disable MSI with that mptsas. > and mptsas will use ioapic routing. > > can you post whole bootlog? unfortunantly it's booting from CD and the only drives in the system are the ones that are not being accessed. David Lang ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:20 ` david @ 2009-02-17 23:22 ` Yinghai Lu 2009-02-17 23:37 ` david 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-17 23:22 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> Subject: Re: mpt fusion broken sometime since 2.6.24 >> >> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>> >>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>> >>>>> I got a picture of the failed boot at >>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>> >>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>> >>>> mptbase.mpt_msi_enable_sas=0 >>>> >>>> and also send us an lspci -v so we can update the blacklist? >>> >>> is that disabling SAS for this system? if so, that's the wrong thing >>> to do >>> (the drives are SAS) >>> >> it only disable MSI with that mptsas. >> and mptsas will use ioapic routing. >> >> can you post whole bootlog? > > unfortunantly it's booting from CD and the only drives in the system are > the ones that are not being accessed. i mean with kernel before 2.6.24.. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:22 ` Yinghai Lu @ 2009-02-17 23:37 ` david 2009-02-18 2:01 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: david @ 2009-02-17 23:37 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux [-- Attachment #1: Type: TEXT/PLAIN, Size: 1069 bytes --] On Tue, 17 Feb 2009, Yinghai Lu wrote: > david@lang.hm wrote: >> On Tue, 17 Feb 2009, Yinghai Lu wrote: >> >>> Subject: Re: mpt fusion broken sometime since 2.6.24 >>> >>> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>>> >>>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>>> >>>>>> I got a picture of the failed boot at >>>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>>> >>>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>>> >>>>> mptbase.mpt_msi_enable_sas=0 >>>>> >>>>> and also send us an lspci -v so we can update the blacklist? >>>> >>>> is that disabling SAS for this system? if so, that's the wrong thing >>>> to do >>>> (the drives are SAS) >>>> >>> it only disable MSI with that mptsas. >>> and mptsas will use ioapic routing. >>> >>> can you post whole bootlog? >> >> unfortunantly it's booting from CD and the only drives in the system are >> the ones that are not being accessed. > > i mean with kernel before 2.6.24.. Ok, attached. David Lang [-- Attachment #2: Type: TEXT/PLAIN, Size: 37854 bytes --] 00:00.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev a3) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=0 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=1 IsocEn- LSEn- ExtCTL- 64b- Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 1.0GHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 200MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [e0] HyperTransport: MSI Mapping 00:01.0 ISA bridge: nVidia Corporation CK804 ISA Bridge (rev a3) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 00:01.1 SMBus: nVidia Corporation CK804 SMBus (rev a2) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 5 Region 0: I/O ports at a400 [size=32] Region 4: I/O ports at 2300 [size=64] Region 5: I/O ports at 2340 [size=64] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:02.0 USB Controller: nVidia Corporation CK804 USB Controller (rev a2) (prog-if 10 [OHCI]) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 22 Region 0: Memory at fe1fc000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:02.1 USB Controller: nVidia Corporation CK804 USB Controller (rev a3) (prog-if 20 [EHCI]) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 21 Region 0: Memory at fe1fdc00 (32-bit, non-prefetchable) [size=256] Capabilities: [44] Debug port Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:06.0 IDE interface: nVidia Corporation CK804 IDE (rev a2) (prog-if 8a [Master SecP PriP]) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [disabled] [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [disabled] [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [disabled] [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [disabled] [size=1] Region 4: I/O ports at 0d00 [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:07.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 20 Region 0: I/O ports at b800 [size=8] Region 1: I/O ports at b400 [size=4] Region 2: I/O ports at b000 [size=8] Region 3: I/O ports at ac00 [size=4] Region 4: I/O ports at a800 [size=16] Region 5: Memory at fe1fe000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:08.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 22 Region 0: I/O ports at cc00 [size=8] Region 1: I/O ports at c800 [size=4] Region 2: I/O ports at c400 [size=8] Region 3: I/O ports at c000 [size=4] Region 4: I/O ports at bc00 [size=16] Region 5: Memory at fe1ff000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00:09.0 PCI bridge: nVidia Corporation CK804 PCI Bridge (rev a2) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Bus: primary=00, secondary=05, subordinate=05, sec-latency=128 I/O behind bridge: 00009000-00009fff Memory behind bridge: fd800000-fe0fffff Prefetchable memory behind bridge: fb400000-fd3fffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR+ BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- 00:0b.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000feeff00c Data: 4149 Capabilities: [58] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <512ns, L1 <4us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x2, ASPM L0s, Port 3 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x4 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 8, PowerLimit 25.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00:0c.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 Memory behind bridge: fd700000-fd7fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000feeff00c Data: 4151 Capabilities: [58] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <512ns, L1 <4us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s, Port 2 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x1 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 4, PowerLimit 10.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00:0d.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 Memory behind bridge: fd600000-fd6fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000feeff00c Data: 4159 Capabilities: [58] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <512ns, L1 <4us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s, Port 1 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x1 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 2, PowerLimit 10.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00:0e.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000feeff00c Data: 4161 Capabilities: [58] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <512ns, L1 <4us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x16, ASPM L0s, Port 0 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x16 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 1, PowerLimit 75.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [80] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 Capabilities: [a0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 Capabilities: [c0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [f0] #0f [0010] 00:19.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [80] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 Capabilities: [a0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 Capabilities: [c0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 00:19.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:19.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:19.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [f0] #0f [0010] 00:1a.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [80] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 Capabilities: [a0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=N/C LWO=N/C Revision ID: 1.02 Capabilities: [c0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 00:1a.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:1a.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:1a.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [f0] #0f [0010] 00:1b.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [80] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 Capabilities: [a0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=16bit LWO=16bit Revision ID: 1.02 Capabilities: [c0] HyperTransport: Host or Secondary Interface !!! Possibly incomplete decoding Command: WarmRst+ DblEnd- Link Control: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 Link Config: MLWI=16bit MLWO=16bit LWI=N/C LWO=N/C Revision ID: 1.02 00:1b.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:1b.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 00:1b.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [f0] #0f [0010] 02:00.0 Ethernet controller: Broadcom Corporation NetXtreme BCM5721 Gigabit Ethernet PCI Express (rev 11) Subsystem: Broadcom Corporation NetXtreme BCM5721 Gigabit Ethernet PCI Express Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 18 Region 0: Memory at fd6f0000 (64-bit, non-prefetchable) [size=64K] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [58] Message Signalled Interrupts: Mask- 64bit+ Queue=0/3 Enable- Address: df59a117da2b636c Data: 0309 Capabilities: [d0] Express Endpoint IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag+ Device: Latency L0s <4us, L1 unlimited Device: AtnBtn- AtnInd- PwrInd- Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported- Device: RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- Device: MaxPayload 128 bytes, MaxReadReq 4096 bytes Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s, Port 0 Link: Latency L0s <2us, L1 <64us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x1 03:00.0 Ethernet controller: Broadcom Corporation NetXtreme BCM5721 Gigabit Ethernet PCI Express (rev 11) Subsystem: Broadcom Corporation NetXtreme BCM5721 Gigabit Ethernet PCI Express Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 19 Region 0: Memory at fd7f0000 (64-bit, non-prefetchable) [size=64K] Expansion ROM at <ignored> [disabled] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [58] Message Signalled Interrupts: Mask- 64bit+ Queue=0/3 Enable- Address: f30140001e000ea4 Data: 1b2c Capabilities: [d0] Express Endpoint IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag+ Device: Latency L0s <4us, L1 unlimited Device: AtnBtn- AtnInd- PwrInd- Device: Errors: Correctable- Non-Fatal- Fatal- Unsupported- Device: RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- Device: MaxPayload 128 bytes, MaxReadReq 4096 bytes Link: Supported Speed 2.5Gb/s, Width x1, ASPM L0s, Port 0 Link: Latency L0s <2us, L1 <64us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x1 05:06.0 VGA compatible controller: XGI - Xabre Graphics Inc Volari Z7 (prog-if 00 [VGA]) Subsystem: XGI - Xabre Graphics Inc Volari Z7 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- BIST result: 00 Region 0: Memory at fc000000 (32-bit, prefetchable) [size=16M] Region 1: Memory at fdc00000 (32-bit, non-prefetchable) [size=256K] Region 2: I/O ports at 9000 [size=128] Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 05:07.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) (prog-if 10 [OHCI]) Subsystem: Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 64 (500ns min, 1000ns max), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 17 Region 0: Memory at fe0ff800 (32-bit, non-prefetchable) [size=2K] Region 1: Memory at fe0f8000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME+ 80:00.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev a3) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=0 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=3 IsocEn- LSEn- ExtCTL- 64b- Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 1.0GHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 200MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [e0] HyperTransport: MSI Mapping 80:01.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev a3) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Region 1: Memory at febfc000 (32-bit, non-prefetchable) [size=4K] 80:08.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: nVidia Corporation Unknown device cb84 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 47 Region 0: I/O ports at fc00 [size=8] Region 1: I/O ports at f800 [size=4] Region 2: I/O ports at f400 [size=8] Region 3: I/O ports at f000 [size=4] Region 4: I/O ports at ec00 [size=16] Region 5: Memory at febfd000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 80:0d.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=80, secondary=84, subordinate=84, sec-latency=0 Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000feeff00c Data: 4169 Capabilities: [58] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <512ns, L1 <4us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x4, ASPM L0s, Port 1 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x8 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 2, PowerLimit 25.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 80:0e.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, Cache Line Size: 64 bytes Bus: primary=80, secondary=83, subordinate=83, sec-latency=0 Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/1 Enable+ Address: 00000000feeff00c Data: 4171 Capabilities: [58] HyperTransport: MSI Mapping Capabilities: [80] Express Root Port (Slot+) IRQ 0 Device: Supported: MaxPayload 128 bytes, PhantFunc 0, ExtTag- Device: Latency L0s <512ns, L1 <4us Device: Errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ Device: RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ Device: MaxPayload 128 bytes, MaxReadReq 512 bytes Link: Supported Speed 2.5Gb/s, Width x16, ASPM L0s, Port 0 Link: Latency L0s <512ns, L1 <4us Link: ASPM Disabled RCB 64 bytes CommClk- ExtSynch- Link: Speed 2.5Gb/s, Width x16 Slot: AtnBtn- PwrCtrl- MRL- AtnInd- PwrInd- HotPlug- Surpise- Slot: Number 1, PowerLimit 75.000000 Slot: Enabled AtnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- Slot: AttnInd Off, PwrInd On, Power- Root: Correctable- Non-Fatal- Fatal- PME- 80:10.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8132 PCI-X Bridge (rev 11) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort- <MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 64 bytes Bus: primary=80, secondary=82, subordinate=82, sec-latency=64 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fe200000-feafffff Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [60] PCI-X bridge device Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=100MHz Status: Dev=80:10.0 64bit+ 133MHz+ SCD- USC- SCO- SRD- Upstream: Capacity=13 CommitmentLimit=65535 Downstream: Capacity=2 CommitmentLimit=65535 Capabilities: [b8] HyperTransport: Interrupt Discovery and Configuration Capabilities: [c0] HyperTransport: Slave or Primary Interface Command: BaseUnitID=16 UnitCnt=2 MastHost- DefDir- DUL- Link Control 0: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Revision ID: 2.00 Link Frequency 0: 1.0GHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz- 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC- LDTSTOP+ CRCTM- ECTLT- 64bA+ UIDRD- Link Frequency 1: 1.0GHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz+ 300MHz- 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE- OFlE- PFE+ OFE+ EOCFE+ RFE- CRCFE+ SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [f4] HyperTransport: MSI Mapping 80:10.1 PIC: Advanced Micro Devices [AMD] AMD-8132 PCI-X IOAPIC (rev 11) (prog-if 10 [IO-APIC]) Subsystem: Advanced Micro Devices [AMD] AMD-8132 PCI-X IOAPIC Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Region 0: Memory at febfe000 (64-bit, non-prefetchable) [size=4K] 80:11.0 PCI bridge: Advanced Micro Devices [AMD] AMD-8132 PCI-X Bridge (rev 11) (prog-if 00 [Normal decode]) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort- <MAbort- >SERR- <PERR- Latency: 64, Cache Line Size: 64 bytes Bus: primary=80, secondary=81, subordinate=81, sec-latency=64 Secondary status: 66MHz+ FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [60] PCI-X bridge device Secondary Status: 64bit+ 133MHz+ SCD- USC- SCO- SRD- Freq=133MHz Status: Dev=80:11.0 64bit+ 133MHz+ SCD- USC- SCO- SRD- Upstream: Capacity=13 CommitmentLimit=65535 Downstream: Capacity=2 CommitmentLimit=65535 Capabilities: [b8] HyperTransport: Interrupt Discovery and Configuration Capabilities: [c0] HyperTransport: Revision ID: 2.00 Capabilities: [f4] HyperTransport: MSI Mapping 80:11.1 PIC: Advanced Micro Devices [AMD] AMD-8132 PCI-X IOAPIC (rev 11) (prog-if 10 [IO-APIC]) Subsystem: Advanced Micro Devices [AMD] AMD-8132 PCI-X IOAPIC Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Region 0: Memory at febff000 (64-bit, non-prefetchable) [size=4K] 82:03.0 SCSI storage controller: LSI Logic / Symbios Logic SAS1068 PCI-X Fusion-MPT SAS (rev 02) Subsystem: LSI Logic / Symbios Logic Unknown device 1000 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 72 (16000ns min, 2500ns max), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 75 Region 0: I/O ports at d800 [disabled] [size=256] Region 1: Memory at feafc000 (64-bit, non-prefetchable) [size=16K] Region 3: Memory at feae0000 (64-bit, non-prefetchable) [size=64K] Expansion ROM at fe400000 [disabled] [size=4M] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [98] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [68] PCI-X non-bridge device Command: DPERE- ERO- RBC=512 OST=16 Status: Dev=82:03.0 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=2048 DMOST=16 DMCRS=128 RSCEM- 266MHz- 533MHz- Capabilities: [b0] MSI-X: Enable- Mask- TabSize=1 Vector table: BAR=1 offset=00002000 PBA: BAR=1 offset=00003000 [-- Attachment #3: Type: TEXT/PLAIN, Size: 29658 bytes --] Initializing cgroup subsys cpuset Linux version 2.6.24-etchnhalf.1-amd64 (Debian 2.6.24-6~etchnhalf.4) (dannf@debian.org) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #1 SMP Mon Jul 21 10:36:02 UTC 2008 Command line: auto BOOT_IMAGE=Linux ro root=802 BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 0000000000093800 (usable) BIOS-e820: 0000000000093800 - 0000000000094c00 (reserved) BIOS-e820: 00000000000eadc0 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 00000000dfff0000 (usable) BIOS-e820: 00000000dfff0000 - 00000000dfffe000 (ACPI data) BIOS-e820: 00000000dfffe000 - 00000000e0000000 (ACPI NVS) BIOS-e820: 00000000fec00000 - 00000000fec01000 (reserved) BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) BIOS-e820: 00000000ff700000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000000820000000 (usable) Entering add_active_range(0, 0, 147) 0 entries of 3200 used Entering add_active_range(0, 256, 917488) 1 entries of 3200 used Entering add_active_range(0, 1048576, 8519680) 2 entries of 3200 used end_pfn_map = 8519680 DMI present. ACPI: RSDP 000F9440, 0014 (r0 ACPIAM) ACPI: RSDT DFFF0000, 0034 (r1 A M I OEMRSDT 6000714 MSFT 97) ACPI: FACP DFFF0200, 0084 (r2 A M I OEMFACP 6000714 MSFT 97) ACPI: DSDT DFFF0440, 5218 (r1 WTF4V WTF4V034 34 INTL 2002026) ACPI: FACS DFFFE000, 0040 ACPI: APIC DFFF0390, 00B0 (r1 A M I OEMAPIC 6000714 MSFT 97) ACPI: OEMB DFFFE040, 0063 (r1 A M I AMI_OEM 6000714 MSFT 97) ACPI: SRAT DFFF5660, 01A0 (r1 AMD HAMMER 1 AMD 1) SRAT: PXM 0 -> APIC 0 -> Node 0 SRAT: PXM 0 -> APIC 1 -> Node 0 SRAT: PXM 1 -> APIC 2 -> Node 1 SRAT: PXM 1 -> APIC 3 -> Node 1 SRAT: PXM 2 -> APIC 4 -> Node 2 SRAT: PXM 2 -> APIC 5 -> Node 2 SRAT: PXM 3 -> APIC 6 -> Node 3 SRAT: PXM 3 -> APIC 7 -> Node 3 SRAT: Node 0 PXM 0 0-a0000 Entering add_active_range(0, 0, 147) 0 entries of 3200 used SRAT: Node 0 PXM 0 0-e0000000 Entering add_active_range(0, 0, 147) 1 entries of 3200 used Entering add_active_range(0, 256, 917488) 1 entries of 3200 used SRAT: Node 0 PXM 0 0-220000000 Entering add_active_range(0, 0, 147) 2 entries of 3200 used Entering add_active_range(0, 256, 917488) 2 entries of 3200 used Entering add_active_range(0, 1048576, 2228224) 2 entries of 3200 used SRAT: Node 1 PXM 1 220000000-420000000 Entering add_active_range(1, 2228224, 4325376) 3 entries of 3200 used SRAT: Node 2 PXM 2 420000000-620000000 Entering add_active_range(2, 4325376, 6422528) 4 entries of 3200 used SRAT: Node 3 PXM 3 620000000-820000000 Entering add_active_range(3, 6422528, 8519680) 5 entries of 3200 used NUMA: Allocated memnodemap from 2a000 - 2a0c1 NUMA: Using 29 for the hash shift. Bootmem setup node 0 0000000000000000-0000000220000000 Bootmem setup node 1 0000000220000000-0000000420000000 Bootmem setup node 2 0000000420000000-0000000620000000 Bootmem setup node 3 0000000620000000-0000000820000000 Zone PFN ranges: DMA 0 -> 4096 DMA32 4096 -> 1048576 Normal 1048576 -> 8519680 Movable zone start PFN for each node early_node_map[6] active PFN ranges 0: 0 -> 147 0: 256 -> 917488 0: 1048576 -> 2228224 1: 2228224 -> 4325376 2: 4325376 -> 6422528 3: 6422528 -> 8519680 On node 0 totalpages: 2097027 DMA zone: 56 pages used for memmap DMA zone: 2460 pages reserved DMA zone: 1471 pages, LIFO batch:0 DMA32 zone: 14280 pages used for memmap DMA32 zone: 899112 pages, LIFO batch:31 Normal zone: 16128 pages used for memmap Normal zone: 1163520 pages, LIFO batch:31 Movable zone: 0 pages used for memmap On node 1 totalpages: 2097152 DMA zone: 0 pages used for memmap DMA32 zone: 0 pages used for memmap Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 Movable zone: 0 pages used for memmap On node 2 totalpages: 2097152 DMA zone: 0 pages used for memmap DMA32 zone: 0 pages used for memmap Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 Movable zone: 0 pages used for memmap On node 3 totalpages: 2097152 DMA zone: 0 pages used for memmap DMA32 zone: 0 pages used for memmap Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 Movable zone: 0 pages used for memmap Nvidia board detected. Ignoring ACPI timer override. If you got timer trouble try acpi_use_timer_override ACPI: PM-Timer IO Port: 0x2008 ACPI: Local APIC address 0xfee00000 ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) Processor #0 (Bootup-CPU) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled) Processor #1 ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled) Processor #2 ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled) Processor #3 ACPI: LAPIC (acpi_id[0x05] lapic_id[0x04] enabled) Processor #4 ACPI: LAPIC (acpi_id[0x06] lapic_id[0x05] enabled) Processor #5 ACPI: LAPIC (acpi_id[0x07] lapic_id[0x06] enabled) Processor #6 ACPI: LAPIC (acpi_id[0x08] lapic_id[0x07] enabled) Processor #7 ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0]) IOAPIC[0]: apic_id 8, address 0xfec00000, GSI 0-23 ACPI: IOAPIC (id[0x09] address[0xfebfc000] gsi_base[24]) IOAPIC[1]: apic_id 9, address 0xfebfc000, GSI 24-47 ACPI: IOAPIC (id[0x0a] address[0xfebfe000] gsi_base[72]) IOAPIC[2]: apic_id 10, address 0xfebfe000, GSI 72-78 ACPI: IOAPIC (id[0x0b] address[0xfebff000] gsi_base[79]) IOAPIC[3]: apic_id 11, address 0xfebff000, GSI 79-85 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: BIOS IRQ0 pin2 override ignored. ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) ACPI: IRQ9 used by override. Setting APIC routing to flat Using ACPI (MADT) for SMP configuration information swsusp: Registered nosave memory region: 0000000000093000 - 0000000000094000 swsusp: Registered nosave memory region: 0000000000094000 - 00000000000eb000 swsusp: Registered nosave memory region: 00000000000eb000 - 0000000000100000 swsusp: Registered nosave memory region: 00000000dfff0000 - 00000000dfffe000 swsusp: Registered nosave memory region: 00000000dfffe000 - 00000000e0000000 swsusp: Registered nosave memory region: 00000000e0000000 - 00000000fec00000 swsusp: Registered nosave memory region: 00000000fec00000 - 00000000fec01000 swsusp: Registered nosave memory region: 00000000fec01000 - 00000000fee00000 swsusp: Registered nosave memory region: 00000000fee00000 - 00000000fee01000 swsusp: Registered nosave memory region: 00000000fee01000 - 00000000ff700000 swsusp: Registered nosave memory region: 00000000ff700000 - 0000000100000000 Allocating PCI resources starting at e2000000 (gap: e0000000:1ec00000) SMP: Allowing 8 CPUs, 0 hotplug CPUs PERCPU: Allocating 34400 bytes of per cpu data Built 4 zonelists in Zone order, mobility grouping on. Total pages: 8269543 Policy zone: Normal Kernel command line: auto BOOT_IMAGE=Linux ro root=802 Initializing CPU#0 PID hash table entries: 4096 (order: 12, 32768 bytes) TSC calibrated against PM_TIMER Marking TSC unstable due to TSCs unsynchronized time.c: Detected 2814.427 MHz processor. Console: colour VGA+ 80x25 console [tty0] enabled Checking aperture... CPU 0: aperture @ f4000000 size 64 MB CPU 1: aperture @ f4000000 size 64 MB CPU 2: aperture @ f4000000 size 64 MB CPU 3: aperture @ f4000000 size 64 MB Memory: 33077220k/34078720k available (2146k kernel code, 476712k reserved, 1004k data, 316k init) Calibrating delay using timer specific routine.. 5632.28 BogoMIPS (lpj=11264579) Security Framework initialized SELinux: Disabled at boot. Capability LSM initialized Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes) Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes) Mount-cache hash table entries: 256 Initializing cgroup subsys ns Initializing cgroup subsys cpuacct CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 0/0 -> Node 0 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 0 SMP alternatives: switching to UP code ACPI: Core revision 20070126 Using local APIC timer interrupts. APIC timer calibration result 12564415 Detected 12.564 MHz APIC timer. SMP alternatives: switching to SMP code Booting processor 1/8 APIC 0x1 Initializing CPU#1 Calibrating delay using timer specific routine.. 5628.88 BogoMIPS (lpj=11257778) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 1/1 -> Node 0 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 1 Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 SMP alternatives: switching to SMP code Booting processor 2/8 APIC 0x2 Initializing CPU#2 Calibrating delay using timer specific routine.. 5628.92 BogoMIPS (lpj=11257846) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 2/2 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 0 Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 SMP alternatives: switching to SMP code Booting processor 3/8 APIC 0x3 Initializing CPU#3 Calibrating delay using timer specific routine.. 5628.91 BogoMIPS (lpj=11257835) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 3/3 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 1 Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 SMP alternatives: switching to SMP code Booting processor 4/8 APIC 0x4 Initializing CPU#4 Calibrating delay using timer specific routine.. 5628.91 BogoMIPS (lpj=11257822) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 4/4 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 0 Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 SMP alternatives: switching to SMP code Booting processor 5/8 APIC 0x5 Initializing CPU#5 Calibrating delay using timer specific routine.. 5628.90 BogoMIPS (lpj=11257816) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 5/5 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 1 Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 SMP alternatives: switching to SMP code Booting processor 6/8 APIC 0x6 Initializing CPU#6 Calibrating delay using timer specific routine.. 5628.91 BogoMIPS (lpj=11257827) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 6/6 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 0 Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 SMP alternatives: switching to SMP code Booting processor 7/8 APIC 0x7 Initializing CPU#7 Calibrating delay using timer specific routine.. 5628.91 BogoMIPS (lpj=11257838) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 7/7 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 1 Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Brought up 8 CPUs net_namespace: 120 bytes NET: Registered protocol family 16 ACPI: bus type pci registered PCI: Using configuration type 1 ACPI: EC: Look up EC in DSDT ACPI: Interpreter enabled ACPI: (supports S0 S1 S4 S5) ACPI: Using IOAPIC for interrupt routing ACPI: PCI Root Bridge [PCI0] (0000:00) PCI: Transparent bridge - 0000:00:09.0 ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT] ACPI: PCI Root Bridge [PCIB] (0000:80) ACPI: PCI Interrupt Routing Table [\_SB_.PCIB._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGA._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGB._PRT] ACPI: PCI Interrupt Link [LNKA] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKB] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LNKC] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKD] (IRQs 16 17 18 19) *7 ACPI: PCI Interrupt Link [LNKE] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LUS0] (IRQs 20 21 22) *9 ACPI: PCI Interrupt Link [LUS1] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LUS2] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LKLN] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LAUI] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKMO] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKSM] (IRQs 20 21 22) *5 ACPI: PCI Interrupt Link [LTID] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LTIE] (IRQs 20 21 22) *10 ACPI: PCI Interrupt Link [LN2A] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2B] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2C] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2D] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LK2N] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT3D] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT2E] (IRQs 44 45 46 47) *0, disabled. ACPI Warning (tbutils-0217): Incorrect checksum in table [OEMB] - EE, should be EB [20070126] Linux Plug and Play Support v0.97 (c) Adam Belay pnp: PnP ACPI init ACPI: bus type pnp registered pnp 00:00: Plug and Play ACPI device, IDs PNP0a03 (active) pnp 00:01: Plug and Play ACPI device, IDs PNP0200 (active) pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active) pnp 00:03: Plug and Play ACPI device, IDs PNP0800 (active) pnp 00:04: Plug and Play ACPI device, IDs PNP0c04 (active) pnp 00:05: Plug and Play ACPI device, IDs PNP0501 (active) pnp 00:06: Plug and Play ACPI device, IDs PNP0501 (active) pnp 00:07: Plug and Play ACPI device, IDs PNP0c02 (active) pnp 00:08: Plug and Play ACPI device, IDs PNP0c02 (active) pnp 00:09: Plug and Play ACPI device, IDs PNP0303 PNP030b (active) pnp 00:0a: Plug and Play ACPI device, IDs PNP0f12 PNP0f13 (active) pnp 00:0b: Plug and Play ACPI device, IDs PNP0c02 (active) pnp 00:0c: Plug and Play ACPI device, IDs PNP0c02 (active) pnp 00:0d: Plug and Play ACPI device, IDs PNP0c01 (active) pnp 00:0e: Plug and Play ACPI device, IDs PNP0a03 (active) pnp: PnP ACPI: found 15 devices ACPI: ACPI bus type pnp unregistered usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb PCI: Using ACPI for IRQ routing PCI: If a device doesn't work, try "pci=routeirq". If it helps, post a report NET: Registered protocol family 8 NET: Registered protocol family 20 PCI-DMA: Disabling AGP. PCI-DMA: aperture base @ f4000000 size 65536 KB PCI-DMA: using GART IOMMU. PCI-DMA: Reserving 64MB of IOMMU area in the AGP aperture ACPI: RTC can wake from S4 pnp: the driver 'system' has been registered system 00:07: ioport range 0x190-0x193 has been reserved system 00:07: ioport range 0x4d0-0x4d1 has been reserved system 00:07: iomem range 0xffb80000-0xfffffffe could not be reserved system 00:07: iomem range 0xdfefc000-0xdfefcfff could not be reserved system 00:07: iomem range 0xdfefd000-0xdfefd3ff could not be reserved system 00:07: iomem range 0xdfefe000-0xdfefe3ff could not be reserved system 00:07: iomem range 0xdfeff000-0xdfefffff could not be reserved system 00:07: iomem range 0xfefff000-0xfeffffff has been reserved system 00:07: driver attached system 00:08: ioport range 0xca2-0xca3 has been reserved system 00:08: iomem range 0xfec00000-0xfec00fff could not be reserved system 00:08: iomem range 0xfee00000-0xfeefffff could not be reserved system 00:08: iomem range 0xfe200000-0xfebfffff could not be reserved system 00:08: iomem range 0xfd500000-0xfd5fffff has been reserved system 00:08: driver attached system 00:0b: ioport range 0xa00-0xa0f has been reserved system 00:0b: driver attached system 00:0c: iomem range 0xe0000000-0xefffffff has been reserved system 00:0c: driver attached system 00:0d: iomem range 0x0-0x9ffff could not be reserved system 00:0d: iomem range 0xc0000-0xdffff has been reserved system 00:0d: iomem range 0xe0000-0xfffff could not be reserved system 00:0d: iomem range 0x100000-0xdfffffff could not be reserved system 00:0d: iomem range 0x0-0x0 could not be reserved system 00:0d: driver attached PCI: Bridge: 0000:00:09.0 IO window: 9000-9fff MEM window: fd800000-fe0fffff PREFETCH window: fb400000-fd3fffff PCI: Bridge: 0000:00:0b.0 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Bridge: 0000:00:0c.0 IO window: disabled. MEM window: fd700000-fd7fffff PREFETCH window: disabled. PCI: Bridge: 0000:00:0d.0 IO window: disabled. MEM window: fd600000-fd6fffff PREFETCH window: disabled. PCI: Bridge: 0000:00:0e.0 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Setting latency timer of device 0000:00:09.0 to 64 PCI: Setting latency timer of device 0000:00:0b.0 to 64 PCI: Setting latency timer of device 0000:00:0c.0 to 64 PCI: Setting latency timer of device 0000:00:0d.0 to 64 PCI: Setting latency timer of device 0000:00:0e.0 to 64 PCI: Bridge: 0000:80:0d.0 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Bridge: 0000:80:0e.0 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Bridge: 0000:80:10.0 IO window: d000-dfff MEM window: fe200000-feafffff PREFETCH window: disabled. PCI: Bridge: 0000:80:11.0 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Setting latency timer of device 0000:80:0d.0 to 64 PCI: Setting latency timer of device 0000:80:0e.0 to 64 NET: Registered protocol family 2 Time: acpi_pm clocksource has been installed. Switched to high resolution mode on CPU 0 Switched to high resolution mode on CPU 1 Switched to high resolution mode on CPU 3 Switched to high resolution mode on CPU 4 Switched to high resolution mode on CPU 2 Switched to high resolution mode on CPU 6 Switched to high resolution mode on CPU 5 Switched to high resolution mode on CPU 7 IP route cache hash table entries: 1048576 (order: 11, 8388608 bytes) TCP established hash table entries: 524288 (order: 11, 8388608 bytes) TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) TCP: Hash tables configured (established 524288 bind 65536) TCP reno registered checking if image is initramfs... it is Freeing initrd memory: 5446k freed audit: initializing netlink socket (disabled) audit(1234913487.632:1): initialized Total HugeTLB memory allocated, 0 VFS: Disk quotas dquot_6.5.1 Dquot-cache hash table entries: 512 (order 0, 4096 bytes) io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered io scheduler cfq registered (default) PCI: Found disabled HT MSI Mapping on 0000:00:0b.0 PCI: Found enabled HT MSI Mapping on 0000:00:00.0 PCI: Found disabled HT MSI Mapping on 0000:00:0c.0 PCI: Found enabled HT MSI Mapping on 0000:00:00.0 PCI: Found disabled HT MSI Mapping on 0000:00:0d.0 PCI: Found enabled HT MSI Mapping on 0000:00:00.0 PCI: Found disabled HT MSI Mapping on 0000:00:0e.0 PCI: Found enabled HT MSI Mapping on 0000:00:00.0 PCI: Found disabled HT MSI Mapping on 0000:80:0d.0 PCI: Found enabled HT MSI Mapping on 0000:80:00.0 PCI: Found disabled HT MSI Mapping on 0000:80:0e.0 PCI: Found enabled HT MSI Mapping on 0000:80:00.0 PCI: Setting latency timer of device 0000:00:0b.0 to 64 assign_interrupt_mode Found MSI capability Allocate Port Service[0000:00:0b.0:pcie00] PCI: Setting latency timer of device 0000:00:0c.0 to 64 assign_interrupt_mode Found MSI capability Allocate Port Service[0000:00:0c.0:pcie00] PCI: Setting latency timer of device 0000:00:0d.0 to 64 assign_interrupt_mode Found MSI capability Allocate Port Service[0000:00:0d.0:pcie00] PCI: Setting latency timer of device 0000:00:0e.0 to 64 assign_interrupt_mode Found MSI capability Allocate Port Service[0000:00:0e.0:pcie00] PCI: Setting latency timer of device 0000:80:0d.0 to 64 assign_interrupt_mode Found MSI capability Allocate Port Service[0000:80:0d.0:pcie00] PCI: Setting latency timer of device 0000:80:0e.0 to 64 assign_interrupt_mode Found MSI capability Allocate Port Service[0000:80:0e.0:pcie00] Real Time Clock Driver v1.12ac Linux agpgart interface v0.102 Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A pnp: the driver 'serial' has been registered 00:05: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial 00:05: driver attached 00:06: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A serial 00:06: driver attached RAMDISK driver initialized: 16 RAM disks of 65536K size 1024 blocksize input: Macintosh mouse button emulation as /class/input/input0 pnp: the driver 'i8042 kbd' has been registered i8042 kbd 00:09: driver attached pnp: the driver 'i8042 aux' has been registered i8042 aux 00:0a: driver attached PNP: PS/2 Controller [PNP0303:PS2K,PNP0f12:PS2M] at 0x60,0x64 irq 1,12 serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice cpuidle: using governor ladder cpuidle: using governor menu TCP bic registered NET: Registered protocol family 1 NET: Registered protocol family 17 registered taskstats version 1 Freeing unused kernel memory: 316k freed input: AT Translated Set 2 keyboard as /class/input/input1 ohci_hcd: 2006 August 04 USB 1.1 'Open' Host Controller (OHCI) Driver ACPI: PCI Interrupt Link [LUS0] enabled at IRQ 22 ACPI: PCI Interrupt 0000:00:02.0[A] -> Link [LUS0] -> GSI 22 (level, low) -> IRQ 22 PCI: Setting latency timer of device 0000:00:02.0 to 64 ohci_hcd 0000:00:02.0: OHCI Host Controller ohci_hcd 0000:00:02.0: new USB bus registered, assigned bus number 1 ohci_hcd 0000:00:02.0: irq 22, io mem 0xfe1fc000 Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx pnp: the driver 'ide' has been registered SCSI subsystem initialized Fusion MPT base driver 3.04.06 Copyright (c) 1999-2007 LSI Corporation Fusion MPT SAS Host driver 3.04.06 usb usb1: configuration #1 chosen from 1 choice hub 1-0:1.0: USB hub found hub 1-0:1.0: 10 ports detected NFORCE-CK804: IDE controller (0x10de:0x0053 rev 0xa2) at PCI slot 0000:00:06.0 NFORCE-CK804: not 100% native mode: will probe irqs later NFORCE-CK804: 0000:00:06.0 (rev a2) UDMA133 controller ide0: BM-DMA at 0x0d00-0x0d07, BIOS settings: hda:DMA, hdb:DMA ide1: BM-DMA at 0x0d08-0x0d0f, BIOS settings: hdc:DMA, hdd:DMA Probing IDE interface ide0... hdb: TSSTcorpCD-ROM TS-L162C, ATAPI CD/DVD-ROM drive hdb: host max PIO5 wanted PIO255(auto-tune) selected PIO4 hdb: UDMA/33 mode selected ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 Probing IDE interface ide1... tg3.c:v3.86 (November 9, 2007) ACPI: PCI Interrupt Link [LNKA] enabled at IRQ 19 ACPI: PCI Interrupt 0000:03:00.0[A] -> Link [LNKA] -> GSI 19 (level, low) -> IRQ 19 PCI: Setting latency timer of device 0000:03:00.0 to 64 eth0: Tigon3 [partno(BCM95721) rev 4101 PHY(5750)] (PCI Express) 10/100/1000Base-T Ethernet 00:d0:68:12:f6:fd eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[1] WireSpeed[1] TSOcap[1] eth0: dma_rwctrl[76180000] dma_mask[64-bit] ACPI: PCI Interrupt Link [LNKD] enabled at IRQ 18 ACPI: PCI Interrupt 0000:02:00.0[A] -> Link [LNKD] -> GSI 18 (level, low) -> IRQ 18 PCI: Setting latency timer of device 0000:02:00.0 to 64 eth1: Tigon3 [partno(BCM95721) rev 4101 PHY(5750)] (PCI Express) 10/100/1000Base-T Ethernet 00:d0:68:12:f6:fc eth1: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] WireSpeed[1] TSOcap[1] eth1: dma_rwctrl[76180000] dma_mask[64-bit] ACPI: PCI Interrupt Link [LUS2] enabled at IRQ 21 ACPI: PCI Interrupt 0000:00:02.1[B] -> Link [LUS2] -> GSI 21 (level, low) -> IRQ 21 PCI: Setting latency timer of device 0000:00:02.1 to 64 ehci_hcd 0000:00:02.1: EHCI Host Controller ehci_hcd 0000:00:02.1: new USB bus registered, assigned bus number 2 ehci_hcd 0000:00:02.1: debug port 1 PCI: cache line size of 64 is not supported by device 0000:00:02.1 ehci_hcd 0000:00:02.1: irq 21, io mem 0xfe1fdc00 libata version 3.00 loaded. ehci_hcd 0000:00:02.1: USB 2.0 started, EHCI 1.00, driver 10 Dec 2004 usb usb2: configuration #1 chosen from 1 choice hub 2-0:1.0: USB hub found hub 2-0:1.0: 10 ports detected sata_nv 0000:00:07.0: version 3.5 ACPI: PCI Interrupt Link [LTID] enabled at IRQ 20 ACPI: PCI Interrupt 0000:00:07.0[A] -> Link [LTID] -> GSI 20 (level, low) -> IRQ 20 sata_nv 0000:00:07.0: Using ADMA mode PCI: Setting latency timer of device 0000:00:07.0 to 64 scsi0 : sata_nv scsi1 : sata_nv ata1: SATA max UDMA/133 cmd 0xb800 ctl 0xb400 bmdma 0xa800 irq 20 ata2: SATA max UDMA/133 cmd 0xb000 ctl 0xac00 bmdma 0xa808 irq 20 ata1: SATA link down (SStatus 0 SControl 300) ata2: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LTIE] enabled at IRQ 22 ACPI: PCI Interrupt 0000:00:08.0[A] -> Link [LTIE] -> GSI 22 (level, low) -> IRQ 22 sata_nv 0000:00:08.0: Using ADMA mode PCI: Setting latency timer of device 0000:00:08.0 to 64 scsi2 : sata_nv scsi3 : sata_nv ata3: SATA max UDMA/133 cmd 0xcc00 ctl 0xc800 bmdma 0xbc00 irq 22 ata4: SATA max UDMA/133 cmd 0xc400 ctl 0xc000 bmdma 0xbc08 irq 22 ata3: SATA link down (SStatus 0 SControl 300) ata4: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LT2E] enabled at IRQ 47 ACPI: PCI Interrupt 0000:80:08.0[A] -> Link [LT2E] -> GSI 47 (level, low) -> IRQ 47 sata_nv 0000:80:08.0: Using ADMA mode ACPI: PCI Interrupt Link [LNKC] enabled at IRQ 17 ACPI: PCI Interrupt 0000:05:07.0[A] -> Link [LNKC] -> <7>PCI: Setting latency timer of device 0000:80:08.0 to 64 GSI 17 (level, low) -> IRQ 17 scsi4 : sata_nv scsi5 : sata_nv ata5: SATA max UDMA/133 cmd 0xfc00 ctl 0xf800 bmdma 0xec00 irq 47 ata6: SATA max UDMA/133 cmd 0xf400 ctl 0xf000 bmdma 0xec08 irq 47 ohci1394: fw-host0: OHCI-1394 1.1 (PCI): IRQ=[17] MMIO=[fe0ff800-fe0fffff] Max Packet=[2048] IR/IT contexts=[4/8] ata5: SATA link down (SStatus 0 SControl 300) ata6: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt 0000:82:03.0[A] -> GSI 75 (level, low) -> IRQ 75 mptbase: ioc0: Initiating bringup hdb: ATAPI 24X CD-ROM drive, 96kB Cache Uniform CD-ROM driver Revision: 3.20 ieee1394: Host added: ID:BUS[0-00:1023] GUID[000000000002244e] ioc0: LSISAS1068 B1: Capabilities={Initiator} scsi6 : ioc0: LSISAS1068 B1, FwRev=01120000h, Ports=1, MaxQ=511, IRQ=75 scsi 6:0:0:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 6:0:1:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 6:1:0:0: Direct-Access LSILOGIC Logical Volume 3000 PQ: 0 ANSI: 2 Driver 'sd' needs updating - please use bus_type methods sd 6:1:0:0: [sda] 285155328 512-byte hardware sectors (146000 MB) sd 6:1:0:0: [sda] Write Protect is off sd 6:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 6:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 6:1:0:0: [sda] 285155328 512-byte hardware sectors (146000 MB) sd 6:1:0:0: [sda] Write Protect is off sd 6:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 6:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda3 sda4 sd 6:1:0:0: [sda] Attached SCSI disk Probing IDE interface ide1... md: linear personality registered for level -1 md: multipath personality registered for level -4 md: raid0 personality registered for level 0 md: raid1 personality registered for level 1 xor: automatically using best checksumming function: generic_sse generic_sse: 8660.000 MB/sec xor: using function: generic_sse (8660.000 MB/sec) async_tx: api initialized (sync-only) raid6: int64x1 2538 MB/s raid6: int64x2 3089 MB/s raid6: int64x4 3283 MB/s raid6: int64x8 2294 MB/s raid6: sse2x1 3553 MB/s raid6: sse2x2 5050 MB/s raid6: sse2x4 5181 MB/s raid6: using algorithm sse2x4 (5181 MB/s) md: raid6 personality registered for level 6 md: raid5 personality registered for level 5 md: raid4 personality registered for level 4 md: raid10 personality registered for level 10 Attempting manual resume SGI XFS with ACLs, security attributes, realtime, large block/inode numbers, no debug enabled SGI XFS Quota Management subsystem XFS mounting filesystem sda2 Ending clean XFS mount for filesystem: sda2 input: Power Button (FF) as /class/input/input2 i2c-adapter i2c-0: nForce2 SMBus adapter at 0x2300 i2c-adapter i2c-1: nForce2 SMBus adapter at 0x2340 ACPI: Power Button (FF) [PWRF] input: Power Button (CM) as /class/input/input3 input: PC Speaker as /class/input/input4 pci_hotplug: PCI Hot Plug PCI Core version: 0.5 shpchp: HPC vendor_id 1022 device_id 7458 ss_vid 0 ss_did 0 shpchp: shpc_init: cannot reserve MMIO region shpchp: HPC vendor_id 1022 device_id 7458 ss_vid 0 ss_did 0 shpchp: shpc_init: cannot reserve MMIO region shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 ACPI: Power Button (CM) [PWRB] Adding 1951856k swap on /dev/sda1. Priority:-1 extents:1 across:1951856k loop: module loaded device-mapper: uevent: version 1.0.3 device-mapper: ioctl: 4.12.0-ioctl (2007-10-02) initialised: dm-devel@redhat.com XFS mounting filesystem sda4 Ending clean XFS mount for filesystem: sda4 NET: Registered protocol family 10 lo: Disabled Privacy Extensions ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-17 23:37 ` david @ 2009-02-18 2:01 ` Yinghai Lu 2009-02-18 2:03 ` david 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 2:01 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> david@lang.hm wrote: >>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>> >>>> Subject: Re: mpt fusion broken sometime since 2.6.24 >>>> >>>> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>>>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>>>> >>>>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>>>> >>>>>>> I got a picture of the failed boot at >>>>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>>>> >>>>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>>>> >>>>>> mptbase.mpt_msi_enable_sas=0 >>>>>> >>>>>> and also send us an lspci -v so we can update the blacklist? >>>>> >>>>> is that disabling SAS for this system? if so, that's the wrong thing >>>>> to do >>>>> (the drives are SAS) >>>>> >>>> it only disable MSI with that mptsas. >>>> and mptsas will use ioapic routing. >>>> >>>> can you post whole bootlog? >>> >>> unfortunantly it's booting from CD and the only drives in the system are >>> the ones that are not being accessed. >> >> i mean with kernel before 2.6.24.. > > Ok, attached. > so your lsi 1068 is under 8132... need to double check if that chip really support MSI. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:01 ` Yinghai Lu @ 2009-02-18 2:03 ` david 2009-02-18 2:14 ` Yinghai Lu 2009-02-18 2:28 ` Yinghai Lu 0 siblings, 2 replies; 103+ messages in thread From: david @ 2009-02-18 2:03 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, Yinghai Lu wrote: > david@lang.hm wrote: >> On Tue, 17 Feb 2009, Yinghai Lu wrote: >> >>> david@lang.hm wrote: >>>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>>> >>>>> Subject: Re: mpt fusion broken sometime since 2.6.24 >>>>> >>>>> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>>>>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>>>>> >>>>>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>>>>> >>>>>>>> I got a picture of the failed boot at >>>>>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>>>>> >>>>>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>>>>> >>>>>>> mptbase.mpt_msi_enable_sas=0 >>>>>>> >>>>>>> and also send us an lspci -v so we can update the blacklist? >>>>>> >>>>>> is that disabling SAS for this system? if so, that's the wrong thing >>>>>> to do >>>>>> (the drives are SAS) >>>>>> >>>>> it only disable MSI with that mptsas. >>>>> and mptsas will use ioapic routing. >>>>> >>>>> can you post whole bootlog? >>>> >>>> unfortunantly it's booting from CD and the only drives in the system are >>>> the ones that are not being accessed. >>> >>> i mean with kernel before 2.6.24.. >> >> Ok, attached. >> > > so your lsi 1068 is under 8132... need to double check if that chip really support MSI. anything I can do in the 2.6.24 kernel? or the 2.8.28.6 kernel? David Lang ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:03 ` david @ 2009-02-18 2:14 ` Yinghai Lu 2009-02-18 2:32 ` david 2009-02-18 2:28 ` Yinghai Lu 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 2:14 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> david@lang.hm wrote: >>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>> >>>> david@lang.hm wrote: >>>>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>>>> >>>>>> Subject: Re: mpt fusion broken sometime since 2.6.24 >>>>>> >>>>>> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>>>>>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>>>>>> >>>>>>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>>>>>> >>>>>>>>> I got a picture of the failed boot at >>>>>>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>>>>>> >>>>>>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>>>>>> >>>>>>>> mptbase.mpt_msi_enable_sas=0 >>>>>>>> >>>>>>>> and also send us an lspci -v so we can update the blacklist? >>>>>>> >>>>>>> is that disabling SAS for this system? if so, that's the wrong thing >>>>>>> to do >>>>>>> (the drives are SAS) >>>>>>> >>>>>> it only disable MSI with that mptsas. >>>>>> and mptsas will use ioapic routing. >>>>>> >>>>>> can you post whole bootlog? >>>>> >>>>> unfortunantly it's booting from CD and the only drives in the >>>>> system are >>>>> the ones that are not being accessed. >>>> >>>> i mean with kernel before 2.6.24.. >>> >>> Ok, attached. >>> >> >> so your lsi 1068 is under 8132... need to double check if that chip >> really support MSI. > > anything I can do in the 2.6.24 kernel? or the 2.8.28.6 kernel? > for 2.6.24, it disable msi by default. for 2.6.28 please have mptbase.mpt_msi_enable=0 in your boot command line. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:14 ` Yinghai Lu @ 2009-02-18 2:32 ` david 0 siblings, 0 replies; 103+ messages in thread From: david @ 2009-02-18 2:32 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, Yinghai Lu wrote: > david@lang.hm wrote: >> On Tue, 17 Feb 2009, Yinghai Lu wrote: >> >>> david@lang.hm wrote: >>>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>>> >>>>> david@lang.hm wrote: >>>>>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>>>>> >>>>>>> Subject: Re: mpt fusion broken sometime since 2.6.24 >>>>>>> >>>>>>> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>>>>>>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>>>>>>> >>>>>>>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>>>>>>> >>>>>>>>>> I got a picture of the failed boot at >>>>>>>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>>>>>>> >>>>>>>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>>>>>>> >>>>>>>>> mptbase.mpt_msi_enable_sas=0 >>>>>>>>> >>>>>>>>> and also send us an lspci -v so we can update the blacklist? >>>>>>>> >>>>>>>> is that disabling SAS for this system? if so, that's the wrong thing >>>>>>>> to do >>>>>>>> (the drives are SAS) >>>>>>>> >>>>>>> it only disable MSI with that mptsas. >>>>>>> and mptsas will use ioapic routing. >>>>>>> >>>>>>> can you post whole bootlog? >>>>>> >>>>>> unfortunantly it's booting from CD and the only drives in the >>>>>> system are >>>>>> the ones that are not being accessed. >>>>> >>>>> i mean with kernel before 2.6.24.. >>>> >>>> Ok, attached. >>>> >>> >>> so your lsi 1068 is under 8132... need to double check if that chip >>> really support MSI. >> >> anything I can do in the 2.6.24 kernel? or the 2.8.28.6 kernel? >> > for 2.6.24, it disable msi by default. > > for 2.6.28 please have > mptbase.mpt_msi_enable=0 > in your boot command line. this does let it boot. David Lang ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:03 ` david 2009-02-18 2:14 ` Yinghai Lu @ 2009-02-18 2:28 ` Yinghai Lu 2009-02-18 2:34 ` david 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 2:28 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> david@lang.hm wrote: >>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>> >>>> david@lang.hm wrote: >>>>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>>>> >>>>>> Subject: Re: mpt fusion broken sometime since 2.6.24 >>>>>> >>>>>> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>>>>>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>>>>>> >>>>>>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>>>>>> >>>>>>>>> I got a picture of the failed boot at >>>>>>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>>>>>> >>>>>>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>>>>>> >>>>>>>> mptbase.mpt_msi_enable_sas=0 >>>>>>>> >>>>>>>> and also send us an lspci -v so we can update the blacklist? >>>>>>> >>>>>>> is that disabling SAS for this system? if so, that's the wrong thing >>>>>>> to do >>>>>>> (the drives are SAS) >>>>>>> >>>>>> it only disable MSI with that mptsas. >>>>>> and mptsas will use ioapic routing. >>>>>> >>>>>> can you post whole bootlog? >>>>> >>>>> unfortunantly it's booting from CD and the only drives in the >>>>> system are >>>>> the ones that are not being accessed. >>>> >>>> i mean with kernel before 2.6.24.. >>> >>> Ok, attached. >>> >> >> so your lsi 1068 is under 8132... need to double check if that chip >> really support MSI. > just check [ 24.921006] calling mptsas_init+0x0/0x119 @ 1 [ 24.925443] Fusion MPT SAS Host driver 3.04.07 [ 24.929928] mptsas 0000:0c:04.0: PCI INT A -> GSI 56 (level, low) -> IRQ 56 [ 24.936888] mptsas 0000:0c:04.0: using 64bit DMA mask [ 24.941931] mptsas 0000:0c:04.0: using 64bit consistent DMA mask [ 24.948099] mptbase: ioc0: Initiating bringup [ 25.660009] ioc0: LSISAS1064 A3: Capabilities={Initiator} [ 25.665461] alloc irq_desc for 83 on cpu 0 node 0 [ 25.668374] alloc kstat_irqs on cpu 0 node 0 [ 25.674778] mptsas 0000:0c:04.0: irq 83 for MSI/MSI-X [ 25.679826] mptbase: ioc0: PCI-MSI enabled [ 46.540010] mptbase: ioc0: Initiating recovery [ 59.330211] scsi2 : ioc0: LSISAS1064 A3, FwRev=01175a00h, Ports=1, MaxQ=286, IRQ=83 [ 59.357423] scsi 2:0:0:0: Direct-Access SEAGATE ST973401LSUN72G 0556 PQ: 0 ANSI: 3 [ 59.367116] sd 2:0:0:0: [sda] 143374738 512-byte hardware sectors: (73.4 GB/68.3 GiB) [ 59.376061] sd 2:0:0:0: [sda] Write Protect is off [ 59.380849] sd 2:0:0:0: [sda] Mode Sense: e3 00 10 08 [ 59.387169] sd 2:0:0:0: [sda] Write cache: disabled, read cache: enabled, supports DPO and FUA [ 59.396296] sd 2:0:0:0: [sda] 143374738 512-byte hardware sectors: (73.4 GB/68.3 GiB) [ 59.405237] sd 2:0:0:0: [sda] Write Protect is off [ 59.410025] sd 2:0:0:0: [sda] Mode Sense: e3 00 10 08 [ 59.416349] sd 2:0:0:0: [sda] Write cache: disabled, read cache: enabled, supports DPO and FUA that MSI does work on one system lsi sas...under PCI-X +-10.0-[0000:0b]--+-01.0 Intel Corporation 82546EB Gigabit Ethernet Controller (Copper) | +-01.1 Intel Corporation 82546EB Gigabit Ethernet Controller (Copper) | +-02.0 Intel Corporation 82546EB Gigabit Ethernet Controller (Copper) | \-02.1 Intel Corporation 82546EB Gigabit Ethernet Controller (Copper) +-10.1 Advanced Micro Devices [AMD] AMD-8132 PCI-X IOAPIC +-11.0-[0000:0c]--+-01.0 Intel Corporation 82546GB Gigabit Ethernet Controller | +-01.1 Intel Corporation 82546GB Gigabit Ethernet Controller | +-02.0 Intel Corporation 82546GB Gigabit Ethernet Controller | +-02.1 Intel Corporation 82546GB Gigabit Ethernet Controller | \-04.0 LSI Logic / Symbios Logic SAS1064 PCI-X Fusion-MPT SAS 0c:04.0 SCSI storage controller: LSI Logic / Symbios Logic SAS1064 PCI-X Fusion-MPT SAS (rev 02) Subsystem: LSI Logic / Symbios Logic Device 3060 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 72 (16000ns min, 2500ns max), Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 83 Region 0: I/O ports at b800 [disabled] [size=256] Region 1: Memory at fe57c000 (64-bit, non-prefetchable) [size=16K] Region 3: Memory at fe560000 (64-bit, non-prefetchable) [size=64K] Expansion ROM at fe200000 [disabled] [size=2M] Capabilities: [50] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [98] Message Signalled Interrupts: Mask- 64bit+ Count=1/1 Enable+ Address: 00000000fee04000 Data: 40aa Capabilities: [68] PCI-X non-bridge device Command: DPERE- ERO- RBC=1024 OST=4 Status: Dev=0c:04.0 64bit+ 133MHz+ SCD- USC- DC=simple DMMRBC=2048 DMOST=16 DMCRS=128 RSCEM- 266MHz- 533MHz- Capabilities: [b0] MSI-X: Enable- Mask- TabSize=1 Vector table: BAR=1 offset=00002000 PBA: BAR=1 offset=00003000 Kernel driver in use: mptsas 00: 00 10 50 00 56 05 30 02 02 00 00 01 10 48 00 00 10: 01 b8 00 00 04 c0 57 fe 00 00 00 00 04 00 56 fe 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 10 60 30 30: 00 00 20 fe 50 00 00 00 00 00 00 00 0a 01 40 0a 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 98 02 06 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 07 b0 34 10 20 0c 43 13 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 05 68 81 00 00 40 e0 fe a0: 00 00 00 00 aa 40 00 00 00 00 00 00 00 00 00 00 b0: 11 00 00 00 01 20 00 00 01 30 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 do you have chance to try current tip/master http://people.redhat.com/mingo/tip.git/readme.txt or 2.6.29-rcX plus following patch? or can you check if there is update fw for your LSI card? [PATCH] mpt: fix enable lsi sas to use msi as default Impact: fix bug the third param in module_param(,,) is perm instead of default value. we still need to assign default at first. Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/message/fusion/mptbase.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Index: linux-2.6/drivers/message/fusion/mptbase.c =================================================================== --- linux-2.6.orig/drivers/message/fusion/mptbase.c +++ linux-2.6/drivers/message/fusion/mptbase.c @@ -90,8 +90,8 @@ module_param(mpt_msi_enable_fc, int, 0); MODULE_PARM_DESC(mpt_msi_enable_fc, " Enable MSI Support for FC \ controllers (default=0)"); -static int mpt_msi_enable_sas; -module_param(mpt_msi_enable_sas, int, 1); +static int mpt_msi_enable_sas = 1; +module_param(mpt_msi_enable_sas, int, 0); MODULE_PARM_DESC(mpt_msi_enable_sas, " Enable MSI Support for SAS \ controllers (default=1)"); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:28 ` Yinghai Lu @ 2009-02-18 2:34 ` david 2009-02-18 2:40 ` david 0 siblings, 1 reply; 103+ messages in thread From: david @ 2009-02-18 2:34 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, Yinghai Lu wrote: > david@lang.hm wrote: >> On Tue, 17 Feb 2009, Yinghai Lu wrote: >> >>> david@lang.hm wrote: >>>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>>> >>>>> david@lang.hm wrote: >>>>>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>>>>> >>>>>>> Subject: Re: mpt fusion broken sometime since 2.6.24 >>>>>>> >>>>>>> On Tue, Feb 17, 2009 at 3:07 PM, <david@lang.hm> wrote: >>>>>>>> On Tue, 17 Feb 2009, Matthew Wilcox wrote: >>>>>>>> >>>>>>>>> On Tue, Feb 17, 2009 at 01:44:55PM -0800, david@lang.hm wrote: >>>>>>>>>> >>>>>>>>>> I got a picture of the failed boot at >>>>>>>>>> http://linux.lang.hm/linux/IMG00052.jpg >>>>>>>>> >>>>>>>>> The PCI-MSI line is probably indicative. Can you try booting with: >>>>>>>>> >>>>>>>>> mptbase.mpt_msi_enable_sas=0 >>>>>>>>> >>>>>>>>> and also send us an lspci -v so we can update the blacklist? >>>>>>>> >>>>>>>> is that disabling SAS for this system? if so, that's the wrong thing >>>>>>>> to do >>>>>>>> (the drives are SAS) >>>>>>>> >>>>>>> it only disable MSI with that mptsas. >>>>>>> and mptsas will use ioapic routing. >>>>>>> >>>>>>> can you post whole bootlog? >>>>>> >>>>>> unfortunantly it's booting from CD and the only drives in the >>>>>> system are >>>>>> the ones that are not being accessed. >>>>> >>>>> i mean with kernel before 2.6.24.. >>>> >>>> Ok, attached. >>>> >>> >>> so your lsi 1068 is under 8132... need to double check if that chip >>> really support MSI. <SNIP> I don't understand the section I snipped from the message above > do you have chance to try current tip/master > http://people.redhat.com/mingo/tip.git/readme.txt > or 2.6.29-rcX > plus following patch? I will see about trying this. > or can you check if there is update fw for your LSI card? this is more work, I'll look into that as well. David Lang > [PATCH] mpt: fix enable lsi sas to use msi as default > > Impact: fix bug > > the third param in module_param(,,) is perm instead of default value. > we still need to assign default at first. > > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > --- > drivers/message/fusion/mptbase.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > Index: linux-2.6/drivers/message/fusion/mptbase.c > =================================================================== > --- linux-2.6.orig/drivers/message/fusion/mptbase.c > +++ linux-2.6/drivers/message/fusion/mptbase.c > @@ -90,8 +90,8 @@ module_param(mpt_msi_enable_fc, int, 0); > MODULE_PARM_DESC(mpt_msi_enable_fc, " Enable MSI Support for FC \ > controllers (default=0)"); > > -static int mpt_msi_enable_sas; > -module_param(mpt_msi_enable_sas, int, 1); > +static int mpt_msi_enable_sas = 1; > +module_param(mpt_msi_enable_sas, int, 0); > MODULE_PARM_DESC(mpt_msi_enable_sas, " Enable MSI Support for SAS \ > controllers (default=1)"); > > ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:34 ` david @ 2009-02-18 2:40 ` david 2009-02-18 2:49 ` Yinghai Lu 2009-02-18 3:12 ` mpt fusion broken sometime since 2.6.24 david 0 siblings, 2 replies; 103+ messages in thread From: david @ 2009-02-18 2:40 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, david@lang.hm wrote: >> do you have chance to try current tip/master >> http://people.redhat.com/mingo/tip.git/readme.txt >> or 2.6.29-rcX >> plus following patch? > > I will see about trying this. does the fact that I am compiling a monolithic kernel (no modules) make any difference related to the patch below? David Lang >> or can you check if there is update fw for your LSI card? > > this is more work, I'll look into that as well. > > David Lang > >> [PATCH] mpt: fix enable lsi sas to use msi as default >> >> Impact: fix bug >> >> the third param in module_param(,,) is perm instead of default value. >> we still need to assign default at first. >> >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >> >> --- >> drivers/message/fusion/mptbase.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> Index: linux-2.6/drivers/message/fusion/mptbase.c >> =================================================================== >> --- linux-2.6.orig/drivers/message/fusion/mptbase.c >> +++ linux-2.6/drivers/message/fusion/mptbase.c >> @@ -90,8 +90,8 @@ module_param(mpt_msi_enable_fc, int, 0); >> MODULE_PARM_DESC(mpt_msi_enable_fc, " Enable MSI Support for FC \ >> controllers (default=0)"); >> >> -static int mpt_msi_enable_sas; >> -module_param(mpt_msi_enable_sas, int, 1); >> +static int mpt_msi_enable_sas = 1; >> +module_param(mpt_msi_enable_sas, int, 0); >> MODULE_PARM_DESC(mpt_msi_enable_sas, " Enable MSI Support for SAS \ >> controllers (default=1)"); >> >> > -- > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ > ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:40 ` david @ 2009-02-18 2:49 ` Yinghai Lu 2009-02-18 3:26 ` david 2009-02-18 3:12 ` mpt fusion broken sometime since 2.6.24 david 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 2:49 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, david@lang.hm wrote: > >>> do you have chance to try current tip/master >>> http://people.redhat.com/mingo/tip.git/readme.txt >>> or 2.6.29-rcX >>> plus following patch? >> >> I will see about trying this. > > does the fact that I am compiling a monolithic kernel (no modules) make > any difference related to the patch below? please try this patch too. wonder if your BIOS does enable the HT MSI ... diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index baad093..7e97b90 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -1981,6 +1981,9 @@ static void __devinit quirk_msi_ht_cap(struct pci_dev *dev) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, quirk_msi_ht_cap); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, + quirk_msi_ht_cap); + /* The nVidia CK804 chipset may have 2 HT MSI mappings. * MSI are supported if the MSI capability set in any of these mappings. ^ permalink raw reply related [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:49 ` Yinghai Lu @ 2009-02-18 3:26 ` david 2009-02-18 3:28 ` Yinghai Lu 2009-02-18 4:40 ` [PATCH] pci: enable MSI on 8132 Yinghai Lu 0 siblings, 2 replies; 103+ messages in thread From: david @ 2009-02-18 3:26 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, Yinghai Lu wrote: > david@lang.hm wrote: >> On Tue, 17 Feb 2009, david@lang.hm wrote: >> >>>> do you have chance to try current tip/master >>>> http://people.redhat.com/mingo/tip.git/readme.txt >>>> or 2.6.29-rcX >>>> plus following patch? >>> >>> I will see about trying this. >> >> does the fact that I am compiling a monolithic kernel (no modules) make >> any difference related to the patch below? > > please try this patch too. wonder if your BIOS does enable the HT MSI ... this does solve the problem. David Lang > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index baad093..7e97b90 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -1981,6 +1981,9 @@ static void __devinit quirk_msi_ht_cap(struct pci_dev *dev) > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, > quirk_msi_ht_cap); > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, > + quirk_msi_ht_cap); > + > > /* The nVidia CK804 chipset may have 2 HT MSI mappings. > * MSI are supported if the MSI capability set in any of these mappings. > ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 3:26 ` david @ 2009-02-18 3:28 ` Yinghai Lu 2009-02-18 3:35 ` david 2009-02-18 4:40 ` [PATCH] pci: enable MSI on 8132 Yinghai Lu 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 3:28 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> david@lang.hm wrote: >>> On Tue, 17 Feb 2009, david@lang.hm wrote: >>> >>>>> do you have chance to try current tip/master >>>>> http://people.redhat.com/mingo/tip.git/readme.txt >>>>> or 2.6.29-rcX >>>>> plus following patch? >>>> >>>> I will see about trying this. >>> >>> does the fact that I am compiling a monolithic kernel (no modules) make >>> any difference related to the patch below? >> >> please try this patch too. wonder if your BIOS does enable the HT MSI ... > > this does solve the problem. can you send out boot log? YH > > David Lang > >> >> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c >> index baad093..7e97b90 100644 >> --- a/drivers/pci/quirks.c >> +++ b/drivers/pci/quirks.c >> @@ -1981,6 +1981,9 @@ static void __devinit quirk_msi_ht_cap(struct >> pci_dev *dev) >> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, >> PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, >> quirk_msi_ht_cap); >> >> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, >> PCI_DEVICE_ID_AMD_8132_BRIDGE, >> + quirk_msi_ht_cap); >> + >> >> /* The nVidia CK804 chipset may have 2 HT MSI mappings. >> * MSI are supported if the MSI capability set in any of these mappings. >> ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 3:28 ` Yinghai Lu @ 2009-02-18 3:35 ` david 2009-02-18 3:45 ` david 2009-02-18 3:47 ` Yinghai Lu 0 siblings, 2 replies; 103+ messages in thread From: david @ 2009-02-18 3:35 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux [-- Attachment #1: Type: TEXT/PLAIN, Size: 1681 bytes --] On Tue, 17 Feb 2009, Yinghai Lu wrote: > Date: Tue, 17 Feb 2009 19:28:59 -0800 > From: Yinghai Lu <yinghai@kernel.org> > To: david@lang.hm > Cc: Matthew Wilcox <matthew@wil.cx>, > linux-kernel <linux-kernel@vger.kernel.org>, linux-scsi@vger.kernel.org, > DL-MPTFusionLinux@lsi.com > Subject: Re: mpt fusion broken sometime since 2.6.24 > > david@lang.hm wrote: >> On Tue, 17 Feb 2009, Yinghai Lu wrote: >> >>> david@lang.hm wrote: >>>> On Tue, 17 Feb 2009, david@lang.hm wrote: >>>> >>>>>> do you have chance to try current tip/master >>>>>> http://people.redhat.com/mingo/tip.git/readme.txt >>>>>> or 2.6.29-rcX >>>>>> plus following patch? >>>>> >>>>> I will see about trying this. >>>> >>>> does the fact that I am compiling a monolithic kernel (no modules) make >>>> any difference related to the patch below? >>> >>> please try this patch too. wonder if your BIOS does enable the HT MSI ... >> >> this does solve the problem. > > can you send out boot log? attached DAvid Lang > YH >> >> David Lang >> >>> >>> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c >>> index baad093..7e97b90 100644 >>> --- a/drivers/pci/quirks.c >>> +++ b/drivers/pci/quirks.c >>> @@ -1981,6 +1981,9 @@ static void __devinit quirk_msi_ht_cap(struct >>> pci_dev *dev) >>> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, >>> PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, >>> quirk_msi_ht_cap); >>> >>> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, >>> PCI_DEVICE_ID_AMD_8132_BRIDGE, >>> + quirk_msi_ht_cap); >>> + >>> >>> /* The nVidia CK804 chipset may have 2 HT MSI mappings. >>> * MSI are supported if the MSI capability set in any of these mappings. >>> > > [-- Attachment #2: Type: TEXT/PLAIN, Size: 39863 bytes --] Linux version 2.6.29-rc5.SMP.K8-64-00122-g5955c7a-dirty (root@secdev) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #21 SMP Tue Feb 17 18:41:12 PST 2009 Command line: auto BOOT_IMAGE=test2 ro root=803 console=ttyS1,9600n8 console=tty1 KERNEL supported cpus: Intel GenuineIntel AMD AuthenticAMD Centaur CentaurHauls BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 0000000000093800 (usable) BIOS-e820: 0000000000093800 - 0000000000094c00 (reserved) BIOS-e820: 00000000000eadc0 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 00000000dfff0000 (usable) BIOS-e820: 00000000dfff0000 - 00000000dfffe000 (ACPI data) BIOS-e820: 00000000dfffe000 - 00000000e0000000 (ACPI NVS) BIOS-e820: 00000000fec00000 - 00000000fec01000 (reserved) BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) BIOS-e820: 00000000ff700000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000000820000000 (usable) DMI present. AMI BIOS detected: BIOS may corrupt low RAM, working around it. last_pfn = 0x820000 max_arch_pfn = 0x100000000 x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 last_pfn = 0xdfff0 max_arch_pfn = 0x100000000 init_memory_mapping: 0000000000000000-00000000dfff0000 0000000000 - 00dfe00000 page 2M 00dfe00000 - 00dfff0000 page 4k kernel direct mapping tables up to dfff0000 @ 10000-16000 last_map_addr: dfff0000 end: dfff0000 init_memory_mapping: 0000000100000000-0000000820000000 0100000000 - 0820000000 page 2M kernel direct mapping tables up to 820000000 @ 14000-36000 last_map_addr: 820000000 end: 820000000 ACPI: RSDP 000F9440, 0014 (r0 ACPIAM) ACPI: RSDT DFFF0000, 0034 (r1 A M I OEMRSDT 6000714 MSFT 97) ACPI: FACP DFFF0200, 0084 (r2 A M I OEMFACP 6000714 MSFT 97) FADT: X_PM1a_EVT_BLK.bit_width (16) does not match PM1_EVT_LEN (4) ACPI: DSDT DFFF0440, 5218 (r1 WTF4V WTF4V034 34 INTL 2002026) ACPI: FACS DFFFE000, 0040 ACPI: APIC DFFF0390, 00B0 (r1 A M I OEMAPIC 6000714 MSFT 97) ACPI: OEMB DFFFE040, 0063 (r1 A M I AMI_OEM 6000714 MSFT 97) ACPI: SRAT DFFF5660, 01A0 (r1 AMD HAMMER 1 AMD 1) ACPI: Local APIC address 0xfee00000 SRAT: PXM 0 -> APIC 0 -> Node 0 SRAT: PXM 0 -> APIC 1 -> Node 0 SRAT: PXM 1 -> APIC 2 -> Node 1 SRAT: PXM 1 -> APIC 3 -> Node 1 SRAT: PXM 2 -> APIC 4 -> Node 2 SRAT: PXM 2 -> APIC 5 -> Node 2 SRAT: PXM 3 -> APIC 6 -> Node 3 SRAT: PXM 3 -> APIC 7 -> Node 3 SRAT: Node 0 PXM 0 0-a0000 SRAT: Node 0 PXM 0 100000-e0000000 SRAT: Node 0 PXM 0 100000000-220000000 SRAT: Node 1 PXM 1 220000000-420000000 SRAT: Node 2 PXM 2 420000000-620000000 SRAT: Node 3 PXM 3 620000000-820000000 NUMA: Allocated memnodemap from 31000 - 41440 NUMA: Using 20 for the hash shift. Bootmem setup node 0 0000000000000000-0000000220000000 NODE_DATA [0000000000041440 - 000000000004343f] bootmap [0000000000044000 - 0000000000087fff] pages 44 (7 early reservations) ==> bootmem [0000000000 - 0220000000] #0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000] #1 [0000006000 - 0000008000] TRAMPOLINE ==> [0000006000 - 0000008000] #2 [0000200000 - 0000975dc4] TEXT DATA BSS ==> [0000200000 - 0000975dc4] #3 [0000093c00 - 0000100000] BIOS reserved ==> [0000093c00 - 0000100000] #4 [0000010000 - 0000014000] PGTABLE ==> [0000010000 - 0000014000] #5 [0000014000 - 0000031000] PGTABLE ==> [0000014000 - 0000031000] #6 [0000031000 - 0000041440] MEMNODEMAP ==> [0000031000 - 0000041440] Bootmem setup node 1 0000000220000000-0000000420000000 NODE_DATA [0000000220000000 - 0000000220001fff] bootmap [0000000220002000 - 0000000220041fff] pages 40 (7 early reservations) ==> bootmem [0220000000 - 0420000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP Bootmem setup node 2 0000000420000000-0000000620000000 NODE_DATA [0000000420000000 - 0000000420001fff] bootmap [0000000420002000 - 0000000420041fff] pages 40 (7 early reservations) ==> bootmem [0420000000 - 0620000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP Bootmem setup node 3 0000000620000000-0000000820000000 NODE_DATA [0000000620000000 - 0000000620001fff] bootmap [0000000620002000 - 0000000620041fff] pages 40 (7 early reservations) ==> bootmem [0620000000 - 0820000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP found SMP MP-table at [ffff8800000ff780] 000ff780 [ffffe20007700000-ffffe200077fffff] potential offnode page_structs [ffffe20000000000-ffffe200077fffff] PMD -> [ffff880028200000-ffff88002f3fffff] on node 0 [ffffe2000e700000-ffffe2000e7fffff] potential offnode page_structs [ffffe20007800000-ffffe2000e7fffff] PMD -> [ffff880220200000-ffff8802271fffff] on node 1 [ffffe20015700000-ffffe200157fffff] potential offnode page_structs [ffffe2000e800000-ffffe200157fffff] PMD -> [ffff880420200000-ffff8804271fffff] on node 2 [ffffe20015800000-ffffe2001c7fffff] PMD -> [ffff880620200000-ffff8806271fffff] on node 3 Zone PFN ranges: DMA 0x00000010 -> 0x00001000 DMA32 0x00001000 -> 0x00100000 Normal 0x00100000 -> 0x00820000 Movable zone start PFN for each node early_node_map[6] active PFN ranges 0: 0x00000010 -> 0x00000093 0: 0x00000100 -> 0x000dfff0 0: 0x00100000 -> 0x00220000 1: 0x00220000 -> 0x00420000 2: 0x00420000 -> 0x00620000 3: 0x00620000 -> 0x00820000 On node 0 totalpages: 2097011 DMA zone: 56 pages used for memmap DMA zone: 2071 pages reserved DMA zone: 1844 pages, LIFO batch:0 DMA32 zone: 14280 pages used for memmap DMA32 zone: 899112 pages, LIFO batch:31 Normal zone: 16128 pages used for memmap Normal zone: 1163520 pages, LIFO batch:31 On node 1 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 On node 2 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 On node 3 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 Nvidia board detected. Ignoring ACPI timer override. If you got timer trouble try acpi_use_timer_override Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus ACPI: PM-Timer IO Port: 0x2008 ACPI: Local APIC address 0xfee00000 ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x04] enabled) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x05] enabled) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x06] enabled) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x07] enabled) ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0]) IOAPIC[0]: apic_id 8, version 0, address 0xfec00000, GSI 0-23 ACPI: IOAPIC (id[0x09] address[0xfebfc000] gsi_base[24]) IOAPIC[1]: apic_id 9, version 0, address 0xfebfc000, GSI 24-47 ACPI: IOAPIC (id[0x0a] address[0xfebfe000] gsi_base[72]) IOAPIC[2]: apic_id 10, version 0, address 0xfebfe000, GSI 72-78 ACPI: IOAPIC (id[0x0b] address[0xfebff000] gsi_base[79]) IOAPIC[3]: apic_id 11, version 0, address 0xfebff000, GSI 79-85 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: BIOS IRQ0 pin2 override ignored. ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) ACPI: IRQ9 used by override. Using ACPI (MADT) for SMP configuration information SMP: Allowing 8 CPUs, 0 hotplug CPUs nr_irqs_gsi: 86 Allocating PCI resources starting at e2000000 (gap: e0000000:1ec00000) NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:8 nr_node_ids:4 PERCPU: Allocating 40960 bytes of per cpu data Built 4 zonelists in Zone order, mobility grouping on. Total pages: 8269916 Policy zone: Normal Kernel command line: auto BOOT_IMAGE=test2 ro root=803 console=ttyS1,9600n8 console=tty1 Initializing CPU#0 PID hash table entries: 4096 (order: 12, 32768 bytes) Fast TSC calibration using PIT Detected 2814.492 MHz processor. spurious 8259A interrupt: IRQ7. Console: colour VGA+ 80x25 console [tty1] enabled console [ttyS1] enabled Checking aperture... No AGP bridge found Node 0: aperture @ f4000000 size 64 MB Node 1: aperture @ f4000000 size 64 MB Node 2: aperture @ f4000000 size 64 MB Node 3: aperture @ f4000000 size 64 MB Memory: 33084308k/34078720k available (3910k kernel code, 524852k absent, 469560k reserved, 1814k data, 372k init) Calibrating delay loop (skipped), value calculated using timer frequency.. 5628.98 BogoMIPS (lpj=11257968) Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes) Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes) Mount-cache hash table entries: 256 CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 0/0x0 -> Node 0 tseg: 0000000000 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 0 using C1E aware idle routine ACPI: Core revision 20081204 Setting APIC routing to flat ..TIMER: vector=0x30 apic1=0 pin1=0 apic2=-1 pin2=-1 CPU0: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 1 APIC 0x1 ip 0x6000 Initializing CPU#1 Calibrating delay using timer specific routine.. 5629.23 BogoMIPS (lpj=11258478) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 1/0x1 -> Node 0 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 1, old 0x7040600070406, new 0x7010600070106 CPU1: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 2 APIC 0x2 ip 0x6000 Initializing CPU#2 Calibrating delay using timer specific routine.. 5629.24 BogoMIPS (lpj=11258499) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 2/0x2 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 2, old 0x7040600070406, new 0x7010600070106 CPU2: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 3 APIC 0x3 ip 0x6000 Initializing CPU#3 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258500) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 3/0x3 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 3, old 0x7040600070406, new 0x7010600070106 CPU3: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 4 APIC 0x4 ip 0x6000 Initializing CPU#4 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258500) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 4/0x4 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 4, old 0x7040600070406, new 0x7010600070106 CPU4: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 5 APIC 0x5 ip 0x6000 Initializing CPU#5 Calibrating delay using timer specific routine.. 5629.26 BogoMIPS (lpj=11258522) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 5/0x5 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 5, old 0x7040600070406, new 0x7010600070106 CPU5: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 6 APIC 0x6 ip 0x6000 Initializing CPU#6 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258505) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 6/0x6 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 6, old 0x7040600070406, new 0x7010600070106 CPU6: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 7 APIC 0x7 ip 0x6000 Initializing CPU#7 Calibrating delay using timer specific routine.. 5629.24 BogoMIPS (lpj=11258486) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 7/0x7 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 7, old 0x7040600070406, new 0x7010600070106 CPU7: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Brought up 8 CPUs Total of 8 processors activated (45033.72 BogoMIPS). net_namespace: 1352 bytes xor: automatically using best checksumming function: generic_sse generic_sse: 8671.000 MB/sec xor: using function: generic_sse (8671.000 MB/sec) NET: Registered protocol family 16 node 0 link 2: io port [9000, cfff] node 1 link 1: io port [d000, ffff] node 1 link 1: io port [1000, 1fff] TOM: 00000000e0000000 aka 3584M node 1 link 1: mmio [fe200000, febfffff] node 1 link 1: mmio [fd500000, fd5fffff] node 0 link 2: mmio [fd600000, fd7fffff] node 0 link 2: mmio [e0000000, e3ffffff] node 1 link 1: mmio [e8000000, ebffffff] node 0 link 2: mmio [a0000, bffff] TOM2: 0000000820000000 aka 33280M bus: [00,05] on node 0 link 2 bus: 00 index 0 io port: [2000, cfff] bus: 00 index 1 io port: [0, fff] bus: 00 index 2 mmio: [fd600000, fe1fffff] bus: 00 index 3 mmio: [e0000000, e7ffffff] bus: 00 index 4 mmio: [a0000, bffff] bus: 00 index 5 mmio: [fec00000, ffffffff] bus: 00 index 6 mmio: [ec000000, fd4fffff] bus: 00 index 7 mmio: [820000000, fcffffffff] bus: [80,84] on node 1 link 1 bus: 80 index 0 io port: [d000, ffff] bus: 80 index 1 io port: [1000, 1fff] bus: 80 index 2 mmio: [fe200000, febfffff] bus: 80 index 3 mmio: [fd500000, fd5fffff] bus: 80 index 4 mmio: [e8000000, ebffffff] ACPI: bus type pci registered PCI: Using configuration type 1 for base access bio: create slab <bio-0> at 0 ACPI: EC: Look up EC in DSDT ACPI: Denied BIOS AML access to invalid port 0x21+0x1 (PIC0) ACPI Exception (dsopcode-0419): AE_AML_ILLEGAL_ADDRESS, During address validation of OpRegion [IRQM] [20081204] ACPI: Interpreter enabled ACPI: (supports S0 S5) ACPI: Using IOAPIC for interrupt routing ACPI: No dock devices found. ACPI: PCI Root Bridge [PCI0] (0000:00) HPET not enabled in BIOS. You might try hpet=force boot option pci 0000:00:01.1: reg 10 io port: [0xa400-0xa41f] pci 0000:00:01.1: reg 20 io port: [0x2300-0x233f] pci 0000:00:01.1: reg 24 io port: [0x2340-0x237f] pci 0000:00:01.1: PME# supported from D3hot D3cold pci 0000:00:01.1: PME# disabled pci 0000:00:02.0: reg 10 32bit mmio: [0xfe1fc000-0xfe1fcfff] pci 0000:00:02.0: supports D1 D2 pci 0000:00:02.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:02.0: PME# disabled pci 0000:00:02.1: reg 10 32bit mmio: [0xfe1fdc00-0xfe1fdcff] pci 0000:00:02.1: supports D1 D2 pci 0000:00:02.1: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:02.1: PME# disabled pci 0000:00:06.0: reg 20 io port: [0xd00-0xd0f] pci 0000:00:07.0: reg 10 io port: [0xb800-0xb807] pci 0000:00:07.0: reg 14 io port: [0xb400-0xb403] pci 0000:00:07.0: reg 18 io port: [0xb000-0xb007] pci 0000:00:07.0: reg 1c io port: [0xac00-0xac03] pci 0000:00:07.0: reg 20 io port: [0xa800-0xa80f] pci 0000:00:07.0: reg 24 32bit mmio: [0xfe1fe000-0xfe1fefff] pci 0000:00:08.0: reg 10 io port: [0xcc00-0xcc07] pci 0000:00:08.0: reg 14 io port: [0xc800-0xc803] pci 0000:00:08.0: reg 18 io port: [0xc400-0xc407] pci 0000:00:08.0: reg 1c io port: [0xc000-0xc003] pci 0000:00:08.0: reg 20 io port: [0xbc00-0xbc0f] pci 0000:00:08.0: reg 24 32bit mmio: [0xfe1ff000-0xfe1fffff] pci 0000:00:0b.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0b.0: PME# disabled pci 0000:00:0c.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0c.0: PME# disabled pci 0000:00:0d.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0d.0: PME# disabled pci 0000:00:0e.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0e.0: PME# disabled pci 0000:05:06.0: reg 10 32bit mmio: [0xfc000000-0xfcffffff] pci 0000:05:06.0: reg 14 32bit mmio: [0xfdc00000-0xfdc3ffff] pci 0000:05:06.0: reg 18 io port: [0x9000-0x907f] pci 0000:05:06.0: supports D1 D2 pci 0000:05:07.0: reg 10 32bit mmio: [0xfe0ff800-0xfe0fffff] pci 0000:05:07.0: reg 14 32bit mmio: [0xfe0f8000-0xfe0fbfff] pci 0000:05:07.0: supports D1 D2 pci 0000:05:07.0: PME# supported from D0 D1 D2 D3hot pci 0000:05:07.0: PME# disabled pci 0000:00:09.0: transparent bridge pci 0000:00:09.0: bridge io port: [0x9000-0x9fff] pci 0000:00:09.0: bridge 32bit mmio: [0xfd800000-0xfe0fffff] pci 0000:00:09.0: bridge 32bit mmio pref: [0xfb400000-0xfd3fffff] pci 0000:03:00.0: reg 10 64bit mmio: [0xfd7f0000-0xfd7fffff] pci 0000:03:00.0: PME# supported from D3hot D3cold pci 0000:03:00.0: PME# disabled pci 0000:00:0c.0: bridge 32bit mmio: [0xfd700000-0xfd7fffff] pci 0000:02:00.0: reg 10 64bit mmio: [0xfd6f0000-0xfd6fffff] pci 0000:02:00.0: PME# supported from D3hot D3cold pci 0000:02:00.0: PME# disabled pci 0000:00:0d.0: bridge 32bit mmio: [0xfd600000-0xfd6fffff] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT] ACPI: PCI Root Bridge [PCIB] (0000:80) pci 0000:80:01.0: reg 14 32bit mmio: [0xfebfc000-0xfebfcfff] pci 0000:80:08.0: reg 10 io port: [0xfc00-0xfc07] pci 0000:80:08.0: reg 14 io port: [0xf800-0xf803] pci 0000:80:08.0: reg 18 io port: [0xf400-0xf407] pci 0000:80:08.0: reg 1c io port: [0xf000-0xf003] pci 0000:80:08.0: reg 20 io port: [0xec00-0xec0f] pci 0000:80:08.0: reg 24 32bit mmio: [0xfebfd000-0xfebfdfff] pci 0000:80:0d.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:80:0d.0: PME# disabled pci 0000:80:0e.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:80:0e.0: PME# disabled pci 0000:80:10.1: reg 10 64bit mmio: [0xfebfe000-0xfebfefff] pci 0000:80:11.1: reg 10 64bit mmio: [0xfebff000-0xfebfffff] pci 0000:82:03.0: reg 10 io port: [0xd800-0xd8ff] pci 0000:82:03.0: reg 14 64bit mmio: [0xfeafc000-0xfeafffff] pci 0000:82:03.0: reg 1c 64bit mmio: [0xfeae0000-0xfeaeffff] pci 0000:82:03.0: reg 30 32bit mmio: [0xfe400000-0xfe7fffff] pci 0000:82:03.0: supports D1 D2 pci 0000:80:10.0: bridge io port: [0xd000-0xdfff] pci 0000:80:10.0: bridge 32bit mmio: [0xfe200000-0xfeafffff] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGA._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGB._PRT] ACPI: PCI Interrupt Link [LNKA] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKB] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LNKC] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKD] (IRQs 16 17 18 19) *7 ACPI: PCI Interrupt Link [LNKE] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LUS0] (IRQs 20 21 22) *9 ACPI: PCI Interrupt Link [LUS1] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LUS2] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LKLN] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LAUI] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKMO] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKSM] (IRQs 20 21 22) *5 ACPI: PCI Interrupt Link [LTID] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LTIE] (IRQs 20 21 22) *10 ACPI: PCI Interrupt Link [LN2A] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2B] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2C] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2D] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LK2N] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT3D] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT2E] (IRQs 44 45 46 47) *0, disabled. ACPI Warning (tbutils-0242): Incorrect checksum in table [OEMB] - EE, should be EB [20081204] SCSI subsystem initialized libata version 3.00 loaded. PCI: Using ACPI for IRQ routing PCI-DMA: Disabling AGP. PCI-DMA: aperture base @ f4000000 size 65536 KB init_memory_mapping: 00000000f4000000-00000000f8000000 00f4000000 - 00f8000000 page 2M last_map_addr: f8000000 end: f8000000 PCI-DMA: using GART IOMMU. PCI-DMA: Reserving 64MB of IOMMU area in the AGP aperture pnp: PnP ACPI init ACPI: bus type pnp registered pnp: PnP ACPI: found 15 devices ACPI: ACPI bus type pnp unregistered system 00:07: ioport range 0x190-0x193 has been reserved system 00:07: ioport range 0x4d0-0x4d1 has been reserved system 00:07: iomem range 0xffb80000-0xfffffffe has been reserved system 00:07: iomem range 0xdfefc000-0xdfefcfff could not be reserved system 00:07: iomem range 0xdfefd000-0xdfefd3ff could not be reserved system 00:07: iomem range 0xdfefe000-0xdfefe3ff could not be reserved system 00:07: iomem range 0xdfeff000-0xdfefffff could not be reserved system 00:07: iomem range 0xfefff000-0xfeffffff has been reserved system 00:08: ioport range 0xca2-0xca3 has been reserved system 00:08: iomem range 0xfec00000-0xfec00fff has been reserved system 00:08: iomem range 0xfee00000-0xfeefffff could not be reserved system 00:08: iomem range 0xfe200000-0xfebfffff could not be reserved system 00:08: iomem range 0xfd500000-0xfd5fffff has been reserved system 00:0b: ioport range 0xa00-0xa0f has been reserved system 00:0c: iomem range 0xe0000000-0xefffffff could not be reserved system 00:0d: iomem range 0x0-0x9ffff could not be reserved system 00:0d: iomem range 0xc0000-0xdffff has been reserved system 00:0d: iomem range 0xe0000-0xfffff could not be reserved system 00:0d: iomem range 0x100000-0xdfffffff could not be reserved pci 0000:00:09.0: PCI bridge, secondary bus 0000:05 Switched to high resolution mode on CPU 0 pci 0000:00:09.0: IO window: 0x9000-0x9fff Switched to high resolution mode on CPU 1 Switched to high resolution mode on CPU 5 Switched to high resolution mode on CPU 4 Switched to high resolution mode on CPU 3 Switched to high resolution mode on CPU 2 Switched to high resolution mode on CPU 7 Switched to high resolution mode on CPU 6 pci 0000:00:09.0: MEM window: 0xfd800000-0xfe0fffff pci 0000:00:09.0: PREFETCH window: 0x000000fb400000-0x000000fd3fffff pci 0000:00:0b.0: PCI bridge, secondary bus 0000:04 pci 0000:00:0b.0: IO window: disabled pci 0000:00:0b.0: MEM window: disabled pci 0000:00:0b.0: PREFETCH window: disabled pci 0000:00:0c.0: PCI bridge, secondary bus 0000:03 pci 0000:00:0c.0: IO window: disabled pci 0000:00:0c.0: MEM window: 0xfd700000-0xfd7fffff pci 0000:00:0c.0: PREFETCH window: disabled pci 0000:00:0d.0: PCI bridge, secondary bus 0000:02 pci 0000:00:0d.0: IO window: disabled pci 0000:00:0d.0: MEM window: 0xfd600000-0xfd6fffff pci 0000:00:0d.0: PREFETCH window: disabled pci 0000:00:0e.0: PCI bridge, secondary bus 0000:01 pci 0000:00:0e.0: IO window: disabled pci 0000:00:0e.0: MEM window: disabled pci 0000:00:0e.0: PREFETCH window: disabled pci 0000:00:09.0: setting latency timer to 64 pci 0000:00:0b.0: setting latency timer to 64 pci 0000:00:0c.0: setting latency timer to 64 pci 0000:00:0d.0: setting latency timer to 64 pci 0000:00:0e.0: setting latency timer to 64 pci 0000:80:0d.0: PCI bridge, secondary bus 0000:84 pci 0000:80:0d.0: IO window: disabled pci 0000:80:0d.0: MEM window: disabled pci 0000:80:0d.0: PREFETCH window: disabled pci 0000:80:0e.0: PCI bridge, secondary bus 0000:83 pci 0000:80:0e.0: IO window: disabled pci 0000:80:0e.0: MEM window: disabled pci 0000:80:0e.0: PREFETCH window: disabled pci 0000:80:10.0: PCI bridge, secondary bus 0000:82 pci 0000:80:10.0: IO window: 0xd000-0xdfff pci 0000:80:10.0: MEM window: 0xfe200000-0xfeafffff pci 0000:80:10.0: PREFETCH window: disabled pci 0000:80:11.0: PCI bridge, secondary bus 0000:81 pci 0000:80:11.0: IO window: disabled pci 0000:80:11.0: MEM window: disabled pci 0000:80:11.0: PREFETCH window: disabled pci 0000:80:0d.0: setting latency timer to 64 pci 0000:80:0e.0: setting latency timer to 64 pci_bus 0000:00: resource 0 io: [0x2000-0xcfff] pci_bus 0000:00: resource 1 io: [0x00-0xfff] pci_bus 0000:00: resource 2 mem: [0xfd600000-0xfe1fffff] pci_bus 0000:00: resource 3 mem: [0xe0000000-0xe7ffffff] pci_bus 0000:00: resource 4 mem: [0x0a0000-0x0bffff] pci_bus 0000:00: resource 5 mem: [0xfec00000-0xffffffff] pci_bus 0000:00: resource 6 mem: [0xec000000-0xfd4fffff] pci_bus 0000:00: resource 7 mem: [0x820000000-0xfcffffffff] pci_bus 0000:05: resource 0 io: [0x9000-0x9fff] pci_bus 0000:05: resource 1 mem: [0xfd800000-0xfe0fffff] pci_bus 0000:05: resource 2 mem: [0xfb400000-0xfd3fffff] pci_bus 0000:05: resource 3 io: [0x2000-0xcfff] pci_bus 0000:05: resource 4 io: [0x00-0xfff] pci_bus 0000:05: resource 5 mem: [0xfd600000-0xfe1fffff] pci_bus 0000:05: resource 6 mem: [0xe0000000-0xe7ffffff] pci_bus 0000:05: resource 7 mem: [0x0a0000-0x0bffff] pci_bus 0000:05: resource 8 mem: [0xfec00000-0xffffffff] pci_bus 0000:05: resource 9 mem: [0xec000000-0xfd4fffff] pci_bus 0000:05: resource 10 mem: [0x820000000-0xfcffffffff] pci_bus 0000:04: resource 0 mem: [0x0-0x0] pci_bus 0000:04: resource 1 mem: [0x0-0x0] pci_bus 0000:04: resource 2 mem: [0x0-0x0] pci_bus 0000:04: resource 3 mem: [0x0-0x0] pci_bus 0000:03: resource 0 mem: [0x0-0x0] pci_bus 0000:03: resource 1 mem: [0xfd700000-0xfd7fffff] pci_bus 0000:03: resource 2 mem: [0x0-0x0] pci_bus 0000:03: resource 3 mem: [0x0-0x0] pci_bus 0000:02: resource 0 mem: [0x0-0x0] pci_bus 0000:02: resource 1 mem: [0xfd600000-0xfd6fffff] pci_bus 0000:02: resource 2 mem: [0x0-0x0] pci_bus 0000:02: resource 3 mem: [0x0-0x0] pci_bus 0000:01: resource 0 mem: [0x0-0x0] pci_bus 0000:01: resource 1 mem: [0x0-0x0] pci_bus 0000:01: resource 2 mem: [0x0-0x0] pci_bus 0000:01: resource 3 mem: [0x0-0x0] pci_bus 0000:80: resource 0 io: [0xd000-0xffff] pci_bus 0000:80: resource 1 io: [0x1000-0x1fff] pci_bus 0000:80: resource 2 mem: [0xfe200000-0xfebfffff] pci_bus 0000:80: resource 3 mem: [0xfd500000-0xfd5fffff] pci_bus 0000:80: resource 4 mem: [0xe8000000-0xebffffff] pci_bus 0000:84: resource 0 mem: [0x0-0x0] pci_bus 0000:84: resource 1 mem: [0x0-0x0] pci_bus 0000:84: resource 2 mem: [0x0-0x0] pci_bus 0000:84: resource 3 mem: [0x0-0x0] pci_bus 0000:83: resource 0 mem: [0x0-0x0] pci_bus 0000:83: resource 1 mem: [0x0-0x0] pci_bus 0000:83: resource 2 mem: [0x0-0x0] pci_bus 0000:83: resource 3 mem: [0x0-0x0] pci_bus 0000:82: resource 0 io: [0xd000-0xdfff] pci_bus 0000:82: resource 1 mem: [0xfe200000-0xfeafffff] pci_bus 0000:82: resource 2 mem: [0x0-0x0] pci_bus 0000:82: resource 3 mem: [0x0-0x0] pci_bus 0000:81: resource 0 mem: [0x0-0x0] pci_bus 0000:81: resource 1 mem: [0x0-0x0] pci_bus 0000:81: resource 2 mem: [0x0-0x0] pci_bus 0000:81: resource 3 mem: [0x0-0x0] NET: Registered protocol family 2 IP route cache hash table entries: 1048576 (order: 11, 8388608 bytes) TCP established hash table entries: 524288 (order: 11, 8388608 bytes) TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) TCP: Hash tables configured (established 524288 bind 65536) TCP reno registered NET: Registered protocol family 1 NTFS driver 2.1.29 [Flags: R/W]. SGI XFS with security attributes, large block/inode numbers, no debug enabled msgmni has been set to 32768 alg: No test for cipher_null (cipher_null-generic) alg: No test for digest_null (digest_null-generic) alg: No test for compress_null (compress_null-generic) alg: No test for stdrng (krng) async_tx: api initialized (sync-only) io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered (default) io scheduler cfq registered pci 0000:00:00.0: Enabling HT MSI Mapping pci 0000:00:0b.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0b.0: Enabling HT MSI Mapping pci 0000:00:0c.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0c.0: Enabling HT MSI Mapping pci 0000:00:0d.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0d.0: Enabling HT MSI Mapping pci 0000:00:0e.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0e.0: Enabling HT MSI Mapping pci 0000:80:00.0: Enabling HT MSI Mapping pci 0000:80:0d.0: Found disabled HT MSI Mapping pci 0000:80:00.0: Found enabled HT MSI Mapping pci 0000:80:0d.0: Enabling HT MSI Mapping pci 0000:80:0e.0: Found disabled HT MSI Mapping pci 0000:80:00.0: Found enabled HT MSI Mapping pci 0000:80:0e.0: Enabling HT MSI Mapping pci 0000:80:10.0: Found disabled HT MSI Mapping pci 0000:80:10.0: MSI quirk detected; subordinate MSI disabled pci 0000:80:11.0: Found disabled HT MSI Mapping pci 0000:80:11.0: MSI quirk detected; subordinate MSI disabled pcieport-driver 0000:00:0b.0: setting latency timer to 64 pcieport-driver 0000:00:0b.0: irq 86 for MSI/MSI-X pcieport-driver 0000:00:0c.0: setting latency timer to 64 pcieport-driver 0000:00:0c.0: irq 87 for MSI/MSI-X pcieport-driver 0000:00:0d.0: setting latency timer to 64 pcieport-driver 0000:00:0d.0: irq 88 for MSI/MSI-X pcieport-driver 0000:00:0e.0: setting latency timer to 64 pcieport-driver 0000:00:0e.0: irq 89 for MSI/MSI-X pcieport-driver 0000:80:0d.0: setting latency timer to 64 pcieport-driver 0000:80:0d.0: irq 90 for MSI/MSI-X pcieport-driver 0000:80:0e.0: setting latency timer to 64 pcieport-driver 0000:80:0e.0: irq 91 for MSI/MSI-X lp: driver loaded but no devices found Real Time Clock Driver v1.12b Linux agpgart interface v0.103 Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A 00:05: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A 00:06: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A floppy0: no floppy controllers found brd: module loaded loop: module loaded nbd: registered device at major 43 Intel(R) PRO/1000 Network Driver - version 7.3.21-k3-NAPI Copyright (c) 1999-2006 Intel Corporation. Ethernet Channel Bonding Driver: v3.5.0 (November 4, 2008) bonding: Warning: either miimon or arp_interval and arp_ip_target module parameters must be specified, otherwise bonding will not detect link failures! see bonding.txt for details. e100: Intel(R) PRO/100 Network Driver, 3.5.23-k6-NAPI e100: Copyright(c) 1999-2006 Intel Corporation tg3.c:v3.97 (December 10, 2008) ACPI: PCI Interrupt Link [LNKA] enabled at IRQ 19 tg3 0000:03:00.0: PCI INT A -> Link[LNKA] -> GSI 19 (level, low) -> IRQ 19 tg3 0000:03:00.0: setting latency timer to 64 tg3 0000:03:00.0: PME# disabled eth0: Tigon3 [partno(BCM95721) rev 4101] (PCI Express) MAC address 00:d0:68:12:f6:fd eth0: attached PHY is 5750 (10/100/1000Base-T Ethernet) (WireSpeed[1]) eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[1] TSOcap[1] eth0: dma_rwctrl[76180000] dma_mask[64-bit] ACPI: PCI Interrupt Link [LNKD] enabled at IRQ 18 tg3 0000:02:00.0: PCI INT A -> Link[LNKD] -> GSI 18 (level, low) -> IRQ 18 tg3 0000:02:00.0: setting latency timer to 64 tg3 0000:02:00.0: PME# disabled eth1: Tigon3 [partno(BCM95721) rev 4101] (PCI Express) MAC address 00:d0:68:12:f6:fc eth1: attached PHY is 5750 (10/100/1000Base-T Ethernet) (WireSpeed[1]) eth1: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] TSOcap[1] eth1: dma_rwctrl[76180000] dma_mask[64-bit] tun: Universal TUN/TAP device driver, 1.6 tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> Adaptec aacraid driver 1.1-5[2456]-ms QLogic Fibre Channel HBA Driver: 8.03.00-k2 megaraid cmm: 2.20.2.7 (Release Date: Sun Jul 16 00:01:03 EST 2006) megaraid: 2.20.5.1 (Release Date: Thu Nov 16 15:32:35 EST 2006) megasas: 00.00.04.01 Thu July 24 11:41:51 PST 2008 3ware 9000 Storage Controller device driver for Linux v2.26.02.011. st: Version 20081215, fixed bufsize 32768, s/g segs 256 Driver 'st' needs updating - please use bus_type methods Driver 'sd' needs updating - please use bus_type methods Driver 'sr' needs updating - please use bus_type methods SCSI Media Changer driver v0.25 Driver 'ch' needs updating - please use bus_type methods sata_nv 0000:00:07.0: version 3.5 ACPI: PCI Interrupt Link [LTID] enabled at IRQ 22 sata_nv 0000:00:07.0: PCI INT A -> Link[LTID] -> GSI 22 (level, low) -> IRQ 22 sata_nv 0000:00:07.0: setting latency timer to 64 scsi0 : sata_nv scsi1 : sata_nv ata1: SATA max UDMA/133 cmd 0xb800 ctl 0xb400 bmdma 0xa800 irq 22 ata2: SATA max UDMA/133 cmd 0xb000 ctl 0xac00 bmdma 0xa808 irq 22 ata1: SATA link down (SStatus 0 SControl 300) ata2: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LTIE] enabled at IRQ 21 sata_nv 0000:00:08.0: PCI INT A -> Link[LTIE] -> GSI 21 (level, low) -> IRQ 21 sata_nv 0000:00:08.0: setting latency timer to 64 scsi2 : sata_nv scsi3 : sata_nv ata3: SATA max UDMA/133 cmd 0xcc00 ctl 0xc800 bmdma 0xbc00 irq 21 ata4: SATA max UDMA/133 cmd 0xc400 ctl 0xc000 bmdma 0xbc08 irq 21 ata3: SATA link down (SStatus 0 SControl 300) ata4: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LT2E] enabled at IRQ 47 sata_nv 0000:80:08.0: PCI INT A -> Link[LT2E] -> GSI 47 (level, low) -> IRQ 47 sata_nv 0000:80:08.0: setting latency timer to 64 scsi4 : sata_nv scsi5 : sata_nv ata5: SATA max UDMA/133 cmd 0xfc00 ctl 0xf800 bmdma 0xec00 irq 47 ata6: SATA max UDMA/133 cmd 0xf400 ctl 0xf000 bmdma 0xec08 irq 47 ata5: SATA link down (SStatus 0 SControl 300) ata6: SATA link down (SStatus 0 SControl 300) pata_amd 0000:00:06.0: version 0.3.11 pata_amd 0000:00:06.0: setting latency timer to 64 scsi6 : pata_amd scsi7 : pata_amd ata7: PATA max UDMA/133 cmd 0x1f0 ctl 0x3f6 bmdma 0xd00 irq 14 ata8: PATA max UDMA/133 cmd 0x170 ctl 0x376 bmdma 0xd08 irq 15 ata7.01: ATAPI: TSSTcorpCD-ROM TS-L162C, MO00, max UDMA/33 ata7: nv_mode_filter: 0x739f&0x701f->0x701f, BIOS=0x7000 (0xc00000) ACPI=0x701f (900:54:0x14) ata7.01: configured for UDMA/33 scsi 6:0:1:0: CD-ROM TSSTcorp CD-ROM TS-L162C MO00 PQ: 0 ANSI: 5 sr0: scsi3-mmc drive: 24x/24x cd/rw xa/form2 cdda tray Uniform CD-ROM driver Revision: 3.20 sr 6:0:1:0: Attached scsi CD-ROM sr0 sr 6:0:1:0: Attached scsi generic sg0 type 5 I2O subsystem v1.325 i2o: max drivers = 8 I2O Configuration OSM v1.323 I2O Bus Adapter OSM v1.317 I2O Block Device OSM v1.325 I2O SCSI Peripheral OSM v1.316 I2O ProcFS OSM v1.316 Fusion MPT base driver 3.04.07 Copyright (c) 1999-2008 LSI Corporation Fusion MPT SPI Host driver 3.04.07 Fusion MPT FC Host driver 3.04.07 Fusion MPT SAS Host driver 3.04.07 mptsas 0000:82:03.0: PCI INT A -> GSI 75 (level, low) -> IRQ 75 mptbase: ioc0: Initiating bringup ioc0: LSISAS1068 B1: Capabilities={Initiator} scsi8 : ioc0: LSISAS1068 B1, FwRev=01120000h, Ports=1, MaxQ=511, IRQ=75 scsi 8:0:0:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:0:0: Attached scsi generic sg1 type 0 scsi 8:0:1:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:1:0: Attached scsi generic sg2 type 0 scsi 8:1:0:0: Direct-Access LSILOGIC Logical Volume 3000 PQ: 0 ANSI: 2 sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda3 sda4 sd 8:1:0:0: [sda] Attached SCSI disk sd 8:1:0:0: Attached scsi generic sg3 type 0 Fusion MPT misc device (ioctl) driver 3.04.07 mptctl: Registered with Fusion MPT base driver mptctl: /dev/mptctl @ (major,minor=10,220) PNP: PS/2 Controller [PNP0303:PS2K,PNP0f12:PS2M] at 0x60,0x64 irq 1,12 serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice input: PC Speaker as /class/input/input0 input: AT Translated Set 2 keyboard as /class/input/input1 ACPI: I/O resource nForce2_smbus [0x2300-0x233f] conflicts with ACPI region SMRG [0x2300-0x2304] ACPI: Device needs an ACPI driver i2c-adapter i2c-0: nForce2 SMBus adapter at 0x2300 i2c-adapter i2c-1: nForce2 SMBus adapter at 0x2340 hdaps: supported laptop not found! hdaps: driver init failed (ret=-19)! k8temp 0000:00:18.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:19.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:1a.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:1b.3: Temperature readouts might be wrong - check erratum #141 md: raid1 personality registered for level 1 raid6: int64x1 2540 MB/s raid6: int64x2 3386 MB/s raid6: int64x4 3191 MB/s raid6: int64x8 2263 MB/s raid6: sse2x1 3888 MB/s raid6: sse2x2 5188 MB/s raid6: sse2x4 5257 MB/s raid6: using algorithm sse2x4 (5257 MB/s) md: raid6 personality registered for level 6 md: raid5 personality registered for level 5 md: raid4 personality registered for level 4 cpuidle: using governor ladder cpuidle: using governor menu oprofile: using NMI interrupt. Netfilter messages via NETLINK v0.30. nf_conntrack version 0.5.0 (16384 buckets, 65536 max) CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Please use nf_conntrack.acct=1 kernel paramater, acct=1 nf_conntrack module option or sysctl net.netfilter.nf_conntrack_acct=1 to enable it. ctnetlink v0.93: registering with nfnetlink. NF_TPROXY: Transparent proxy support initialized, version 4.1.0 NF_TPROXY: Copyright (c) 2006-2007 BalaBit IT Ltd. ip_tables: (C) 2000-2006 Netfilter Core Team ClusterIP Version 0.8 loaded successfully TCP cubic registered Initializing XFRM netlink socket NET: Registered protocol family 17 NET: Registered protocol family 15 Bridge firewalling registered Ebtables v2.0 registered 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com> All bugs added by David S. Miller <davem@redhat.com> md: Waiting for all devices to be available before autodetect md: If you don't use raid, use raid=noautodetect md: Autodetecting RAID arrays. md: Scanned 0 and added 0 devices. md: autorun ... md: ... autorun DONE. UDF-fs: No VRS found XFS mounting filesystem sda3 Ending clean XFS mount for filesystem: sda3 VFS: Mounted root (xfs filesystem) readonly on device 8:3. Freeing unused kernel memory: 372k freed Adding 2048276k swap on /dev/sda1. Priority:-1 extents:1 across:2048276k XFS mounting filesystem sda4 Ending clean XFS mount for filesystem: sda4 warning: `ntpd' uses 32-bit capabilities (legacy support in use) tg3 0000:03:00.0: PME# disabled tg3: eth0: Link is up at 1000 Mbps, full duplex. tg3: eth0: Flow control is off for TX and off for RX. ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 3:35 ` david @ 2009-02-18 3:45 ` david 2009-02-18 3:47 ` Yinghai Lu 1 sibling, 0 replies; 103+ messages in thread From: david @ 2009-02-18 3:45 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux [-- Attachment #1: Type: TEXT/PLAIN, Size: 1223 bytes --] On Tue, 17 Feb 2009, david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> Date: Tue, 17 Feb 2009 19:28:59 -0800 >> From: Yinghai Lu <yinghai@kernel.org> >> To: david@lang.hm >> Cc: Matthew Wilcox <matthew@wil.cx>, >> linux-kernel <linux-kernel@vger.kernel.org>, >> linux-scsi@vger.kernel.org, >> DL-MPTFusionLinux@lsi.com >> Subject: Re: mpt fusion broken sometime since 2.6.24 >> >> david@lang.hm wrote: >>> On Tue, 17 Feb 2009, Yinghai Lu wrote: >>> >>>> david@lang.hm wrote: >>>>> On Tue, 17 Feb 2009, david@lang.hm wrote: >>>>> >>>>>>> do you have chance to try current tip/master >>>>>>> http://people.redhat.com/mingo/tip.git/readme.txt >>>>>>> or 2.6.29-rcX >>>>>>> plus following patch? >>>>>> >>>>>> I will see about trying this. >>>>> >>>>> does the fact that I am compiling a monolithic kernel (no modules) make >>>>> any difference related to the patch below? >>>> >>>> please try this patch too. wonder if your BIOS does enable the HT MSI ... >>> >>> this does solve the problem. >> >> can you send out boot log? > > attached firmware on the card is showing 6.12.0 what is the harm on other systems if I put the mptbase.mpt_msi_enable=0 into my base config image? David Lang [-- Attachment #2: Type: TEXT/PLAIN, Size: 39863 bytes --] Linux version 2.6.29-rc5.SMP.K8-64-00122-g5955c7a-dirty (root@secdev) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #21 SMP Tue Feb 17 18:41:12 PST 2009 Command line: auto BOOT_IMAGE=test2 ro root=803 console=ttyS1,9600n8 console=tty1 KERNEL supported cpus: Intel GenuineIntel AMD AuthenticAMD Centaur CentaurHauls BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 0000000000093800 (usable) BIOS-e820: 0000000000093800 - 0000000000094c00 (reserved) BIOS-e820: 00000000000eadc0 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 00000000dfff0000 (usable) BIOS-e820: 00000000dfff0000 - 00000000dfffe000 (ACPI data) BIOS-e820: 00000000dfffe000 - 00000000e0000000 (ACPI NVS) BIOS-e820: 00000000fec00000 - 00000000fec01000 (reserved) BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) BIOS-e820: 00000000ff700000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000000820000000 (usable) DMI present. AMI BIOS detected: BIOS may corrupt low RAM, working around it. last_pfn = 0x820000 max_arch_pfn = 0x100000000 x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 last_pfn = 0xdfff0 max_arch_pfn = 0x100000000 init_memory_mapping: 0000000000000000-00000000dfff0000 0000000000 - 00dfe00000 page 2M 00dfe00000 - 00dfff0000 page 4k kernel direct mapping tables up to dfff0000 @ 10000-16000 last_map_addr: dfff0000 end: dfff0000 init_memory_mapping: 0000000100000000-0000000820000000 0100000000 - 0820000000 page 2M kernel direct mapping tables up to 820000000 @ 14000-36000 last_map_addr: 820000000 end: 820000000 ACPI: RSDP 000F9440, 0014 (r0 ACPIAM) ACPI: RSDT DFFF0000, 0034 (r1 A M I OEMRSDT 6000714 MSFT 97) ACPI: FACP DFFF0200, 0084 (r2 A M I OEMFACP 6000714 MSFT 97) FADT: X_PM1a_EVT_BLK.bit_width (16) does not match PM1_EVT_LEN (4) ACPI: DSDT DFFF0440, 5218 (r1 WTF4V WTF4V034 34 INTL 2002026) ACPI: FACS DFFFE000, 0040 ACPI: APIC DFFF0390, 00B0 (r1 A M I OEMAPIC 6000714 MSFT 97) ACPI: OEMB DFFFE040, 0063 (r1 A M I AMI_OEM 6000714 MSFT 97) ACPI: SRAT DFFF5660, 01A0 (r1 AMD HAMMER 1 AMD 1) ACPI: Local APIC address 0xfee00000 SRAT: PXM 0 -> APIC 0 -> Node 0 SRAT: PXM 0 -> APIC 1 -> Node 0 SRAT: PXM 1 -> APIC 2 -> Node 1 SRAT: PXM 1 -> APIC 3 -> Node 1 SRAT: PXM 2 -> APIC 4 -> Node 2 SRAT: PXM 2 -> APIC 5 -> Node 2 SRAT: PXM 3 -> APIC 6 -> Node 3 SRAT: PXM 3 -> APIC 7 -> Node 3 SRAT: Node 0 PXM 0 0-a0000 SRAT: Node 0 PXM 0 100000-e0000000 SRAT: Node 0 PXM 0 100000000-220000000 SRAT: Node 1 PXM 1 220000000-420000000 SRAT: Node 2 PXM 2 420000000-620000000 SRAT: Node 3 PXM 3 620000000-820000000 NUMA: Allocated memnodemap from 31000 - 41440 NUMA: Using 20 for the hash shift. Bootmem setup node 0 0000000000000000-0000000220000000 NODE_DATA [0000000000041440 - 000000000004343f] bootmap [0000000000044000 - 0000000000087fff] pages 44 (7 early reservations) ==> bootmem [0000000000 - 0220000000] #0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000] #1 [0000006000 - 0000008000] TRAMPOLINE ==> [0000006000 - 0000008000] #2 [0000200000 - 0000975dc4] TEXT DATA BSS ==> [0000200000 - 0000975dc4] #3 [0000093c00 - 0000100000] BIOS reserved ==> [0000093c00 - 0000100000] #4 [0000010000 - 0000014000] PGTABLE ==> [0000010000 - 0000014000] #5 [0000014000 - 0000031000] PGTABLE ==> [0000014000 - 0000031000] #6 [0000031000 - 0000041440] MEMNODEMAP ==> [0000031000 - 0000041440] Bootmem setup node 1 0000000220000000-0000000420000000 NODE_DATA [0000000220000000 - 0000000220001fff] bootmap [0000000220002000 - 0000000220041fff] pages 40 (7 early reservations) ==> bootmem [0220000000 - 0420000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP Bootmem setup node 2 0000000420000000-0000000620000000 NODE_DATA [0000000420000000 - 0000000420001fff] bootmap [0000000420002000 - 0000000420041fff] pages 40 (7 early reservations) ==> bootmem [0420000000 - 0620000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP Bootmem setup node 3 0000000620000000-0000000820000000 NODE_DATA [0000000620000000 - 0000000620001fff] bootmap [0000000620002000 - 0000000620041fff] pages 40 (7 early reservations) ==> bootmem [0620000000 - 0820000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP found SMP MP-table at [ffff8800000ff780] 000ff780 [ffffe20007700000-ffffe200077fffff] potential offnode page_structs [ffffe20000000000-ffffe200077fffff] PMD -> [ffff880028200000-ffff88002f3fffff] on node 0 [ffffe2000e700000-ffffe2000e7fffff] potential offnode page_structs [ffffe20007800000-ffffe2000e7fffff] PMD -> [ffff880220200000-ffff8802271fffff] on node 1 [ffffe20015700000-ffffe200157fffff] potential offnode page_structs [ffffe2000e800000-ffffe200157fffff] PMD -> [ffff880420200000-ffff8804271fffff] on node 2 [ffffe20015800000-ffffe2001c7fffff] PMD -> [ffff880620200000-ffff8806271fffff] on node 3 Zone PFN ranges: DMA 0x00000010 -> 0x00001000 DMA32 0x00001000 -> 0x00100000 Normal 0x00100000 -> 0x00820000 Movable zone start PFN for each node early_node_map[6] active PFN ranges 0: 0x00000010 -> 0x00000093 0: 0x00000100 -> 0x000dfff0 0: 0x00100000 -> 0x00220000 1: 0x00220000 -> 0x00420000 2: 0x00420000 -> 0x00620000 3: 0x00620000 -> 0x00820000 On node 0 totalpages: 2097011 DMA zone: 56 pages used for memmap DMA zone: 2071 pages reserved DMA zone: 1844 pages, LIFO batch:0 DMA32 zone: 14280 pages used for memmap DMA32 zone: 899112 pages, LIFO batch:31 Normal zone: 16128 pages used for memmap Normal zone: 1163520 pages, LIFO batch:31 On node 1 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 On node 2 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 On node 3 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 Nvidia board detected. Ignoring ACPI timer override. If you got timer trouble try acpi_use_timer_override Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus ACPI: PM-Timer IO Port: 0x2008 ACPI: Local APIC address 0xfee00000 ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x04] enabled) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x05] enabled) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x06] enabled) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x07] enabled) ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0]) IOAPIC[0]: apic_id 8, version 0, address 0xfec00000, GSI 0-23 ACPI: IOAPIC (id[0x09] address[0xfebfc000] gsi_base[24]) IOAPIC[1]: apic_id 9, version 0, address 0xfebfc000, GSI 24-47 ACPI: IOAPIC (id[0x0a] address[0xfebfe000] gsi_base[72]) IOAPIC[2]: apic_id 10, version 0, address 0xfebfe000, GSI 72-78 ACPI: IOAPIC (id[0x0b] address[0xfebff000] gsi_base[79]) IOAPIC[3]: apic_id 11, version 0, address 0xfebff000, GSI 79-85 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: BIOS IRQ0 pin2 override ignored. ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) ACPI: IRQ9 used by override. Using ACPI (MADT) for SMP configuration information SMP: Allowing 8 CPUs, 0 hotplug CPUs nr_irqs_gsi: 86 Allocating PCI resources starting at e2000000 (gap: e0000000:1ec00000) NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:8 nr_node_ids:4 PERCPU: Allocating 40960 bytes of per cpu data Built 4 zonelists in Zone order, mobility grouping on. Total pages: 8269916 Policy zone: Normal Kernel command line: auto BOOT_IMAGE=test2 ro root=803 console=ttyS1,9600n8 console=tty1 Initializing CPU#0 PID hash table entries: 4096 (order: 12, 32768 bytes) Fast TSC calibration using PIT Detected 2814.492 MHz processor. spurious 8259A interrupt: IRQ7. Console: colour VGA+ 80x25 console [tty1] enabled console [ttyS1] enabled Checking aperture... No AGP bridge found Node 0: aperture @ f4000000 size 64 MB Node 1: aperture @ f4000000 size 64 MB Node 2: aperture @ f4000000 size 64 MB Node 3: aperture @ f4000000 size 64 MB Memory: 33084308k/34078720k available (3910k kernel code, 524852k absent, 469560k reserved, 1814k data, 372k init) Calibrating delay loop (skipped), value calculated using timer frequency.. 5628.98 BogoMIPS (lpj=11257968) Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes) Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes) Mount-cache hash table entries: 256 CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 0/0x0 -> Node 0 tseg: 0000000000 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 0 using C1E aware idle routine ACPI: Core revision 20081204 Setting APIC routing to flat ..TIMER: vector=0x30 apic1=0 pin1=0 apic2=-1 pin2=-1 CPU0: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 1 APIC 0x1 ip 0x6000 Initializing CPU#1 Calibrating delay using timer specific routine.. 5629.23 BogoMIPS (lpj=11258478) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 1/0x1 -> Node 0 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 1, old 0x7040600070406, new 0x7010600070106 CPU1: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 2 APIC 0x2 ip 0x6000 Initializing CPU#2 Calibrating delay using timer specific routine.. 5629.24 BogoMIPS (lpj=11258499) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 2/0x2 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 2, old 0x7040600070406, new 0x7010600070106 CPU2: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 3 APIC 0x3 ip 0x6000 Initializing CPU#3 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258500) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 3/0x3 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 3, old 0x7040600070406, new 0x7010600070106 CPU3: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 4 APIC 0x4 ip 0x6000 Initializing CPU#4 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258500) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 4/0x4 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 4, old 0x7040600070406, new 0x7010600070106 CPU4: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 5 APIC 0x5 ip 0x6000 Initializing CPU#5 Calibrating delay using timer specific routine.. 5629.26 BogoMIPS (lpj=11258522) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 5/0x5 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 5, old 0x7040600070406, new 0x7010600070106 CPU5: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 6 APIC 0x6 ip 0x6000 Initializing CPU#6 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258505) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 6/0x6 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 6, old 0x7040600070406, new 0x7010600070106 CPU6: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 7 APIC 0x7 ip 0x6000 Initializing CPU#7 Calibrating delay using timer specific routine.. 5629.24 BogoMIPS (lpj=11258486) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 7/0x7 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 7, old 0x7040600070406, new 0x7010600070106 CPU7: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Brought up 8 CPUs Total of 8 processors activated (45033.72 BogoMIPS). net_namespace: 1352 bytes xor: automatically using best checksumming function: generic_sse generic_sse: 8671.000 MB/sec xor: using function: generic_sse (8671.000 MB/sec) NET: Registered protocol family 16 node 0 link 2: io port [9000, cfff] node 1 link 1: io port [d000, ffff] node 1 link 1: io port [1000, 1fff] TOM: 00000000e0000000 aka 3584M node 1 link 1: mmio [fe200000, febfffff] node 1 link 1: mmio [fd500000, fd5fffff] node 0 link 2: mmio [fd600000, fd7fffff] node 0 link 2: mmio [e0000000, e3ffffff] node 1 link 1: mmio [e8000000, ebffffff] node 0 link 2: mmio [a0000, bffff] TOM2: 0000000820000000 aka 33280M bus: [00,05] on node 0 link 2 bus: 00 index 0 io port: [2000, cfff] bus: 00 index 1 io port: [0, fff] bus: 00 index 2 mmio: [fd600000, fe1fffff] bus: 00 index 3 mmio: [e0000000, e7ffffff] bus: 00 index 4 mmio: [a0000, bffff] bus: 00 index 5 mmio: [fec00000, ffffffff] bus: 00 index 6 mmio: [ec000000, fd4fffff] bus: 00 index 7 mmio: [820000000, fcffffffff] bus: [80,84] on node 1 link 1 bus: 80 index 0 io port: [d000, ffff] bus: 80 index 1 io port: [1000, 1fff] bus: 80 index 2 mmio: [fe200000, febfffff] bus: 80 index 3 mmio: [fd500000, fd5fffff] bus: 80 index 4 mmio: [e8000000, ebffffff] ACPI: bus type pci registered PCI: Using configuration type 1 for base access bio: create slab <bio-0> at 0 ACPI: EC: Look up EC in DSDT ACPI: Denied BIOS AML access to invalid port 0x21+0x1 (PIC0) ACPI Exception (dsopcode-0419): AE_AML_ILLEGAL_ADDRESS, During address validation of OpRegion [IRQM] [20081204] ACPI: Interpreter enabled ACPI: (supports S0 S5) ACPI: Using IOAPIC for interrupt routing ACPI: No dock devices found. ACPI: PCI Root Bridge [PCI0] (0000:00) HPET not enabled in BIOS. You might try hpet=force boot option pci 0000:00:01.1: reg 10 io port: [0xa400-0xa41f] pci 0000:00:01.1: reg 20 io port: [0x2300-0x233f] pci 0000:00:01.1: reg 24 io port: [0x2340-0x237f] pci 0000:00:01.1: PME# supported from D3hot D3cold pci 0000:00:01.1: PME# disabled pci 0000:00:02.0: reg 10 32bit mmio: [0xfe1fc000-0xfe1fcfff] pci 0000:00:02.0: supports D1 D2 pci 0000:00:02.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:02.0: PME# disabled pci 0000:00:02.1: reg 10 32bit mmio: [0xfe1fdc00-0xfe1fdcff] pci 0000:00:02.1: supports D1 D2 pci 0000:00:02.1: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:02.1: PME# disabled pci 0000:00:06.0: reg 20 io port: [0xd00-0xd0f] pci 0000:00:07.0: reg 10 io port: [0xb800-0xb807] pci 0000:00:07.0: reg 14 io port: [0xb400-0xb403] pci 0000:00:07.0: reg 18 io port: [0xb000-0xb007] pci 0000:00:07.0: reg 1c io port: [0xac00-0xac03] pci 0000:00:07.0: reg 20 io port: [0xa800-0xa80f] pci 0000:00:07.0: reg 24 32bit mmio: [0xfe1fe000-0xfe1fefff] pci 0000:00:08.0: reg 10 io port: [0xcc00-0xcc07] pci 0000:00:08.0: reg 14 io port: [0xc800-0xc803] pci 0000:00:08.0: reg 18 io port: [0xc400-0xc407] pci 0000:00:08.0: reg 1c io port: [0xc000-0xc003] pci 0000:00:08.0: reg 20 io port: [0xbc00-0xbc0f] pci 0000:00:08.0: reg 24 32bit mmio: [0xfe1ff000-0xfe1fffff] pci 0000:00:0b.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0b.0: PME# disabled pci 0000:00:0c.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0c.0: PME# disabled pci 0000:00:0d.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0d.0: PME# disabled pci 0000:00:0e.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0e.0: PME# disabled pci 0000:05:06.0: reg 10 32bit mmio: [0xfc000000-0xfcffffff] pci 0000:05:06.0: reg 14 32bit mmio: [0xfdc00000-0xfdc3ffff] pci 0000:05:06.0: reg 18 io port: [0x9000-0x907f] pci 0000:05:06.0: supports D1 D2 pci 0000:05:07.0: reg 10 32bit mmio: [0xfe0ff800-0xfe0fffff] pci 0000:05:07.0: reg 14 32bit mmio: [0xfe0f8000-0xfe0fbfff] pci 0000:05:07.0: supports D1 D2 pci 0000:05:07.0: PME# supported from D0 D1 D2 D3hot pci 0000:05:07.0: PME# disabled pci 0000:00:09.0: transparent bridge pci 0000:00:09.0: bridge io port: [0x9000-0x9fff] pci 0000:00:09.0: bridge 32bit mmio: [0xfd800000-0xfe0fffff] pci 0000:00:09.0: bridge 32bit mmio pref: [0xfb400000-0xfd3fffff] pci 0000:03:00.0: reg 10 64bit mmio: [0xfd7f0000-0xfd7fffff] pci 0000:03:00.0: PME# supported from D3hot D3cold pci 0000:03:00.0: PME# disabled pci 0000:00:0c.0: bridge 32bit mmio: [0xfd700000-0xfd7fffff] pci 0000:02:00.0: reg 10 64bit mmio: [0xfd6f0000-0xfd6fffff] pci 0000:02:00.0: PME# supported from D3hot D3cold pci 0000:02:00.0: PME# disabled pci 0000:00:0d.0: bridge 32bit mmio: [0xfd600000-0xfd6fffff] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT] ACPI: PCI Root Bridge [PCIB] (0000:80) pci 0000:80:01.0: reg 14 32bit mmio: [0xfebfc000-0xfebfcfff] pci 0000:80:08.0: reg 10 io port: [0xfc00-0xfc07] pci 0000:80:08.0: reg 14 io port: [0xf800-0xf803] pci 0000:80:08.0: reg 18 io port: [0xf400-0xf407] pci 0000:80:08.0: reg 1c io port: [0xf000-0xf003] pci 0000:80:08.0: reg 20 io port: [0xec00-0xec0f] pci 0000:80:08.0: reg 24 32bit mmio: [0xfebfd000-0xfebfdfff] pci 0000:80:0d.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:80:0d.0: PME# disabled pci 0000:80:0e.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:80:0e.0: PME# disabled pci 0000:80:10.1: reg 10 64bit mmio: [0xfebfe000-0xfebfefff] pci 0000:80:11.1: reg 10 64bit mmio: [0xfebff000-0xfebfffff] pci 0000:82:03.0: reg 10 io port: [0xd800-0xd8ff] pci 0000:82:03.0: reg 14 64bit mmio: [0xfeafc000-0xfeafffff] pci 0000:82:03.0: reg 1c 64bit mmio: [0xfeae0000-0xfeaeffff] pci 0000:82:03.0: reg 30 32bit mmio: [0xfe400000-0xfe7fffff] pci 0000:82:03.0: supports D1 D2 pci 0000:80:10.0: bridge io port: [0xd000-0xdfff] pci 0000:80:10.0: bridge 32bit mmio: [0xfe200000-0xfeafffff] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGA._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGB._PRT] ACPI: PCI Interrupt Link [LNKA] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKB] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LNKC] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKD] (IRQs 16 17 18 19) *7 ACPI: PCI Interrupt Link [LNKE] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LUS0] (IRQs 20 21 22) *9 ACPI: PCI Interrupt Link [LUS1] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LUS2] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LKLN] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LAUI] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKMO] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKSM] (IRQs 20 21 22) *5 ACPI: PCI Interrupt Link [LTID] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LTIE] (IRQs 20 21 22) *10 ACPI: PCI Interrupt Link [LN2A] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2B] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2C] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2D] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LK2N] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT3D] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT2E] (IRQs 44 45 46 47) *0, disabled. ACPI Warning (tbutils-0242): Incorrect checksum in table [OEMB] - EE, should be EB [20081204] SCSI subsystem initialized libata version 3.00 loaded. PCI: Using ACPI for IRQ routing PCI-DMA: Disabling AGP. PCI-DMA: aperture base @ f4000000 size 65536 KB init_memory_mapping: 00000000f4000000-00000000f8000000 00f4000000 - 00f8000000 page 2M last_map_addr: f8000000 end: f8000000 PCI-DMA: using GART IOMMU. PCI-DMA: Reserving 64MB of IOMMU area in the AGP aperture pnp: PnP ACPI init ACPI: bus type pnp registered pnp: PnP ACPI: found 15 devices ACPI: ACPI bus type pnp unregistered system 00:07: ioport range 0x190-0x193 has been reserved system 00:07: ioport range 0x4d0-0x4d1 has been reserved system 00:07: iomem range 0xffb80000-0xfffffffe has been reserved system 00:07: iomem range 0xdfefc000-0xdfefcfff could not be reserved system 00:07: iomem range 0xdfefd000-0xdfefd3ff could not be reserved system 00:07: iomem range 0xdfefe000-0xdfefe3ff could not be reserved system 00:07: iomem range 0xdfeff000-0xdfefffff could not be reserved system 00:07: iomem range 0xfefff000-0xfeffffff has been reserved system 00:08: ioport range 0xca2-0xca3 has been reserved system 00:08: iomem range 0xfec00000-0xfec00fff has been reserved system 00:08: iomem range 0xfee00000-0xfeefffff could not be reserved system 00:08: iomem range 0xfe200000-0xfebfffff could not be reserved system 00:08: iomem range 0xfd500000-0xfd5fffff has been reserved system 00:0b: ioport range 0xa00-0xa0f has been reserved system 00:0c: iomem range 0xe0000000-0xefffffff could not be reserved system 00:0d: iomem range 0x0-0x9ffff could not be reserved system 00:0d: iomem range 0xc0000-0xdffff has been reserved system 00:0d: iomem range 0xe0000-0xfffff could not be reserved system 00:0d: iomem range 0x100000-0xdfffffff could not be reserved pci 0000:00:09.0: PCI bridge, secondary bus 0000:05 Switched to high resolution mode on CPU 0 pci 0000:00:09.0: IO window: 0x9000-0x9fff Switched to high resolution mode on CPU 1 Switched to high resolution mode on CPU 5 Switched to high resolution mode on CPU 4 Switched to high resolution mode on CPU 3 Switched to high resolution mode on CPU 2 Switched to high resolution mode on CPU 7 Switched to high resolution mode on CPU 6 pci 0000:00:09.0: MEM window: 0xfd800000-0xfe0fffff pci 0000:00:09.0: PREFETCH window: 0x000000fb400000-0x000000fd3fffff pci 0000:00:0b.0: PCI bridge, secondary bus 0000:04 pci 0000:00:0b.0: IO window: disabled pci 0000:00:0b.0: MEM window: disabled pci 0000:00:0b.0: PREFETCH window: disabled pci 0000:00:0c.0: PCI bridge, secondary bus 0000:03 pci 0000:00:0c.0: IO window: disabled pci 0000:00:0c.0: MEM window: 0xfd700000-0xfd7fffff pci 0000:00:0c.0: PREFETCH window: disabled pci 0000:00:0d.0: PCI bridge, secondary bus 0000:02 pci 0000:00:0d.0: IO window: disabled pci 0000:00:0d.0: MEM window: 0xfd600000-0xfd6fffff pci 0000:00:0d.0: PREFETCH window: disabled pci 0000:00:0e.0: PCI bridge, secondary bus 0000:01 pci 0000:00:0e.0: IO window: disabled pci 0000:00:0e.0: MEM window: disabled pci 0000:00:0e.0: PREFETCH window: disabled pci 0000:00:09.0: setting latency timer to 64 pci 0000:00:0b.0: setting latency timer to 64 pci 0000:00:0c.0: setting latency timer to 64 pci 0000:00:0d.0: setting latency timer to 64 pci 0000:00:0e.0: setting latency timer to 64 pci 0000:80:0d.0: PCI bridge, secondary bus 0000:84 pci 0000:80:0d.0: IO window: disabled pci 0000:80:0d.0: MEM window: disabled pci 0000:80:0d.0: PREFETCH window: disabled pci 0000:80:0e.0: PCI bridge, secondary bus 0000:83 pci 0000:80:0e.0: IO window: disabled pci 0000:80:0e.0: MEM window: disabled pci 0000:80:0e.0: PREFETCH window: disabled pci 0000:80:10.0: PCI bridge, secondary bus 0000:82 pci 0000:80:10.0: IO window: 0xd000-0xdfff pci 0000:80:10.0: MEM window: 0xfe200000-0xfeafffff pci 0000:80:10.0: PREFETCH window: disabled pci 0000:80:11.0: PCI bridge, secondary bus 0000:81 pci 0000:80:11.0: IO window: disabled pci 0000:80:11.0: MEM window: disabled pci 0000:80:11.0: PREFETCH window: disabled pci 0000:80:0d.0: setting latency timer to 64 pci 0000:80:0e.0: setting latency timer to 64 pci_bus 0000:00: resource 0 io: [0x2000-0xcfff] pci_bus 0000:00: resource 1 io: [0x00-0xfff] pci_bus 0000:00: resource 2 mem: [0xfd600000-0xfe1fffff] pci_bus 0000:00: resource 3 mem: [0xe0000000-0xe7ffffff] pci_bus 0000:00: resource 4 mem: [0x0a0000-0x0bffff] pci_bus 0000:00: resource 5 mem: [0xfec00000-0xffffffff] pci_bus 0000:00: resource 6 mem: [0xec000000-0xfd4fffff] pci_bus 0000:00: resource 7 mem: [0x820000000-0xfcffffffff] pci_bus 0000:05: resource 0 io: [0x9000-0x9fff] pci_bus 0000:05: resource 1 mem: [0xfd800000-0xfe0fffff] pci_bus 0000:05: resource 2 mem: [0xfb400000-0xfd3fffff] pci_bus 0000:05: resource 3 io: [0x2000-0xcfff] pci_bus 0000:05: resource 4 io: [0x00-0xfff] pci_bus 0000:05: resource 5 mem: [0xfd600000-0xfe1fffff] pci_bus 0000:05: resource 6 mem: [0xe0000000-0xe7ffffff] pci_bus 0000:05: resource 7 mem: [0x0a0000-0x0bffff] pci_bus 0000:05: resource 8 mem: [0xfec00000-0xffffffff] pci_bus 0000:05: resource 9 mem: [0xec000000-0xfd4fffff] pci_bus 0000:05: resource 10 mem: [0x820000000-0xfcffffffff] pci_bus 0000:04: resource 0 mem: [0x0-0x0] pci_bus 0000:04: resource 1 mem: [0x0-0x0] pci_bus 0000:04: resource 2 mem: [0x0-0x0] pci_bus 0000:04: resource 3 mem: [0x0-0x0] pci_bus 0000:03: resource 0 mem: [0x0-0x0] pci_bus 0000:03: resource 1 mem: [0xfd700000-0xfd7fffff] pci_bus 0000:03: resource 2 mem: [0x0-0x0] pci_bus 0000:03: resource 3 mem: [0x0-0x0] pci_bus 0000:02: resource 0 mem: [0x0-0x0] pci_bus 0000:02: resource 1 mem: [0xfd600000-0xfd6fffff] pci_bus 0000:02: resource 2 mem: [0x0-0x0] pci_bus 0000:02: resource 3 mem: [0x0-0x0] pci_bus 0000:01: resource 0 mem: [0x0-0x0] pci_bus 0000:01: resource 1 mem: [0x0-0x0] pci_bus 0000:01: resource 2 mem: [0x0-0x0] pci_bus 0000:01: resource 3 mem: [0x0-0x0] pci_bus 0000:80: resource 0 io: [0xd000-0xffff] pci_bus 0000:80: resource 1 io: [0x1000-0x1fff] pci_bus 0000:80: resource 2 mem: [0xfe200000-0xfebfffff] pci_bus 0000:80: resource 3 mem: [0xfd500000-0xfd5fffff] pci_bus 0000:80: resource 4 mem: [0xe8000000-0xebffffff] pci_bus 0000:84: resource 0 mem: [0x0-0x0] pci_bus 0000:84: resource 1 mem: [0x0-0x0] pci_bus 0000:84: resource 2 mem: [0x0-0x0] pci_bus 0000:84: resource 3 mem: [0x0-0x0] pci_bus 0000:83: resource 0 mem: [0x0-0x0] pci_bus 0000:83: resource 1 mem: [0x0-0x0] pci_bus 0000:83: resource 2 mem: [0x0-0x0] pci_bus 0000:83: resource 3 mem: [0x0-0x0] pci_bus 0000:82: resource 0 io: [0xd000-0xdfff] pci_bus 0000:82: resource 1 mem: [0xfe200000-0xfeafffff] pci_bus 0000:82: resource 2 mem: [0x0-0x0] pci_bus 0000:82: resource 3 mem: [0x0-0x0] pci_bus 0000:81: resource 0 mem: [0x0-0x0] pci_bus 0000:81: resource 1 mem: [0x0-0x0] pci_bus 0000:81: resource 2 mem: [0x0-0x0] pci_bus 0000:81: resource 3 mem: [0x0-0x0] NET: Registered protocol family 2 IP route cache hash table entries: 1048576 (order: 11, 8388608 bytes) TCP established hash table entries: 524288 (order: 11, 8388608 bytes) TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) TCP: Hash tables configured (established 524288 bind 65536) TCP reno registered NET: Registered protocol family 1 NTFS driver 2.1.29 [Flags: R/W]. SGI XFS with security attributes, large block/inode numbers, no debug enabled msgmni has been set to 32768 alg: No test for cipher_null (cipher_null-generic) alg: No test for digest_null (digest_null-generic) alg: No test for compress_null (compress_null-generic) alg: No test for stdrng (krng) async_tx: api initialized (sync-only) io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered (default) io scheduler cfq registered pci 0000:00:00.0: Enabling HT MSI Mapping pci 0000:00:0b.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0b.0: Enabling HT MSI Mapping pci 0000:00:0c.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0c.0: Enabling HT MSI Mapping pci 0000:00:0d.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0d.0: Enabling HT MSI Mapping pci 0000:00:0e.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0e.0: Enabling HT MSI Mapping pci 0000:80:00.0: Enabling HT MSI Mapping pci 0000:80:0d.0: Found disabled HT MSI Mapping pci 0000:80:00.0: Found enabled HT MSI Mapping pci 0000:80:0d.0: Enabling HT MSI Mapping pci 0000:80:0e.0: Found disabled HT MSI Mapping pci 0000:80:00.0: Found enabled HT MSI Mapping pci 0000:80:0e.0: Enabling HT MSI Mapping pci 0000:80:10.0: Found disabled HT MSI Mapping pci 0000:80:10.0: MSI quirk detected; subordinate MSI disabled pci 0000:80:11.0: Found disabled HT MSI Mapping pci 0000:80:11.0: MSI quirk detected; subordinate MSI disabled pcieport-driver 0000:00:0b.0: setting latency timer to 64 pcieport-driver 0000:00:0b.0: irq 86 for MSI/MSI-X pcieport-driver 0000:00:0c.0: setting latency timer to 64 pcieport-driver 0000:00:0c.0: irq 87 for MSI/MSI-X pcieport-driver 0000:00:0d.0: setting latency timer to 64 pcieport-driver 0000:00:0d.0: irq 88 for MSI/MSI-X pcieport-driver 0000:00:0e.0: setting latency timer to 64 pcieport-driver 0000:00:0e.0: irq 89 for MSI/MSI-X pcieport-driver 0000:80:0d.0: setting latency timer to 64 pcieport-driver 0000:80:0d.0: irq 90 for MSI/MSI-X pcieport-driver 0000:80:0e.0: setting latency timer to 64 pcieport-driver 0000:80:0e.0: irq 91 for MSI/MSI-X lp: driver loaded but no devices found Real Time Clock Driver v1.12b Linux agpgart interface v0.103 Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A 00:05: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A 00:06: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A floppy0: no floppy controllers found brd: module loaded loop: module loaded nbd: registered device at major 43 Intel(R) PRO/1000 Network Driver - version 7.3.21-k3-NAPI Copyright (c) 1999-2006 Intel Corporation. Ethernet Channel Bonding Driver: v3.5.0 (November 4, 2008) bonding: Warning: either miimon or arp_interval and arp_ip_target module parameters must be specified, otherwise bonding will not detect link failures! see bonding.txt for details. e100: Intel(R) PRO/100 Network Driver, 3.5.23-k6-NAPI e100: Copyright(c) 1999-2006 Intel Corporation tg3.c:v3.97 (December 10, 2008) ACPI: PCI Interrupt Link [LNKA] enabled at IRQ 19 tg3 0000:03:00.0: PCI INT A -> Link[LNKA] -> GSI 19 (level, low) -> IRQ 19 tg3 0000:03:00.0: setting latency timer to 64 tg3 0000:03:00.0: PME# disabled eth0: Tigon3 [partno(BCM95721) rev 4101] (PCI Express) MAC address 00:d0:68:12:f6:fd eth0: attached PHY is 5750 (10/100/1000Base-T Ethernet) (WireSpeed[1]) eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[1] TSOcap[1] eth0: dma_rwctrl[76180000] dma_mask[64-bit] ACPI: PCI Interrupt Link [LNKD] enabled at IRQ 18 tg3 0000:02:00.0: PCI INT A -> Link[LNKD] -> GSI 18 (level, low) -> IRQ 18 tg3 0000:02:00.0: setting latency timer to 64 tg3 0000:02:00.0: PME# disabled eth1: Tigon3 [partno(BCM95721) rev 4101] (PCI Express) MAC address 00:d0:68:12:f6:fc eth1: attached PHY is 5750 (10/100/1000Base-T Ethernet) (WireSpeed[1]) eth1: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] TSOcap[1] eth1: dma_rwctrl[76180000] dma_mask[64-bit] tun: Universal TUN/TAP device driver, 1.6 tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> Adaptec aacraid driver 1.1-5[2456]-ms QLogic Fibre Channel HBA Driver: 8.03.00-k2 megaraid cmm: 2.20.2.7 (Release Date: Sun Jul 16 00:01:03 EST 2006) megaraid: 2.20.5.1 (Release Date: Thu Nov 16 15:32:35 EST 2006) megasas: 00.00.04.01 Thu July 24 11:41:51 PST 2008 3ware 9000 Storage Controller device driver for Linux v2.26.02.011. st: Version 20081215, fixed bufsize 32768, s/g segs 256 Driver 'st' needs updating - please use bus_type methods Driver 'sd' needs updating - please use bus_type methods Driver 'sr' needs updating - please use bus_type methods SCSI Media Changer driver v0.25 Driver 'ch' needs updating - please use bus_type methods sata_nv 0000:00:07.0: version 3.5 ACPI: PCI Interrupt Link [LTID] enabled at IRQ 22 sata_nv 0000:00:07.0: PCI INT A -> Link[LTID] -> GSI 22 (level, low) -> IRQ 22 sata_nv 0000:00:07.0: setting latency timer to 64 scsi0 : sata_nv scsi1 : sata_nv ata1: SATA max UDMA/133 cmd 0xb800 ctl 0xb400 bmdma 0xa800 irq 22 ata2: SATA max UDMA/133 cmd 0xb000 ctl 0xac00 bmdma 0xa808 irq 22 ata1: SATA link down (SStatus 0 SControl 300) ata2: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LTIE] enabled at IRQ 21 sata_nv 0000:00:08.0: PCI INT A -> Link[LTIE] -> GSI 21 (level, low) -> IRQ 21 sata_nv 0000:00:08.0: setting latency timer to 64 scsi2 : sata_nv scsi3 : sata_nv ata3: SATA max UDMA/133 cmd 0xcc00 ctl 0xc800 bmdma 0xbc00 irq 21 ata4: SATA max UDMA/133 cmd 0xc400 ctl 0xc000 bmdma 0xbc08 irq 21 ata3: SATA link down (SStatus 0 SControl 300) ata4: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LT2E] enabled at IRQ 47 sata_nv 0000:80:08.0: PCI INT A -> Link[LT2E] -> GSI 47 (level, low) -> IRQ 47 sata_nv 0000:80:08.0: setting latency timer to 64 scsi4 : sata_nv scsi5 : sata_nv ata5: SATA max UDMA/133 cmd 0xfc00 ctl 0xf800 bmdma 0xec00 irq 47 ata6: SATA max UDMA/133 cmd 0xf400 ctl 0xf000 bmdma 0xec08 irq 47 ata5: SATA link down (SStatus 0 SControl 300) ata6: SATA link down (SStatus 0 SControl 300) pata_amd 0000:00:06.0: version 0.3.11 pata_amd 0000:00:06.0: setting latency timer to 64 scsi6 : pata_amd scsi7 : pata_amd ata7: PATA max UDMA/133 cmd 0x1f0 ctl 0x3f6 bmdma 0xd00 irq 14 ata8: PATA max UDMA/133 cmd 0x170 ctl 0x376 bmdma 0xd08 irq 15 ata7.01: ATAPI: TSSTcorpCD-ROM TS-L162C, MO00, max UDMA/33 ata7: nv_mode_filter: 0x739f&0x701f->0x701f, BIOS=0x7000 (0xc00000) ACPI=0x701f (900:54:0x14) ata7.01: configured for UDMA/33 scsi 6:0:1:0: CD-ROM TSSTcorp CD-ROM TS-L162C MO00 PQ: 0 ANSI: 5 sr0: scsi3-mmc drive: 24x/24x cd/rw xa/form2 cdda tray Uniform CD-ROM driver Revision: 3.20 sr 6:0:1:0: Attached scsi CD-ROM sr0 sr 6:0:1:0: Attached scsi generic sg0 type 5 I2O subsystem v1.325 i2o: max drivers = 8 I2O Configuration OSM v1.323 I2O Bus Adapter OSM v1.317 I2O Block Device OSM v1.325 I2O SCSI Peripheral OSM v1.316 I2O ProcFS OSM v1.316 Fusion MPT base driver 3.04.07 Copyright (c) 1999-2008 LSI Corporation Fusion MPT SPI Host driver 3.04.07 Fusion MPT FC Host driver 3.04.07 Fusion MPT SAS Host driver 3.04.07 mptsas 0000:82:03.0: PCI INT A -> GSI 75 (level, low) -> IRQ 75 mptbase: ioc0: Initiating bringup ioc0: LSISAS1068 B1: Capabilities={Initiator} scsi8 : ioc0: LSISAS1068 B1, FwRev=01120000h, Ports=1, MaxQ=511, IRQ=75 scsi 8:0:0:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:0:0: Attached scsi generic sg1 type 0 scsi 8:0:1:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:1:0: Attached scsi generic sg2 type 0 scsi 8:1:0:0: Direct-Access LSILOGIC Logical Volume 3000 PQ: 0 ANSI: 2 sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda3 sda4 sd 8:1:0:0: [sda] Attached SCSI disk sd 8:1:0:0: Attached scsi generic sg3 type 0 Fusion MPT misc device (ioctl) driver 3.04.07 mptctl: Registered with Fusion MPT base driver mptctl: /dev/mptctl @ (major,minor=10,220) PNP: PS/2 Controller [PNP0303:PS2K,PNP0f12:PS2M] at 0x60,0x64 irq 1,12 serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice input: PC Speaker as /class/input/input0 input: AT Translated Set 2 keyboard as /class/input/input1 ACPI: I/O resource nForce2_smbus [0x2300-0x233f] conflicts with ACPI region SMRG [0x2300-0x2304] ACPI: Device needs an ACPI driver i2c-adapter i2c-0: nForce2 SMBus adapter at 0x2300 i2c-adapter i2c-1: nForce2 SMBus adapter at 0x2340 hdaps: supported laptop not found! hdaps: driver init failed (ret=-19)! k8temp 0000:00:18.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:19.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:1a.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:1b.3: Temperature readouts might be wrong - check erratum #141 md: raid1 personality registered for level 1 raid6: int64x1 2540 MB/s raid6: int64x2 3386 MB/s raid6: int64x4 3191 MB/s raid6: int64x8 2263 MB/s raid6: sse2x1 3888 MB/s raid6: sse2x2 5188 MB/s raid6: sse2x4 5257 MB/s raid6: using algorithm sse2x4 (5257 MB/s) md: raid6 personality registered for level 6 md: raid5 personality registered for level 5 md: raid4 personality registered for level 4 cpuidle: using governor ladder cpuidle: using governor menu oprofile: using NMI interrupt. Netfilter messages via NETLINK v0.30. nf_conntrack version 0.5.0 (16384 buckets, 65536 max) CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Please use nf_conntrack.acct=1 kernel paramater, acct=1 nf_conntrack module option or sysctl net.netfilter.nf_conntrack_acct=1 to enable it. ctnetlink v0.93: registering with nfnetlink. NF_TPROXY: Transparent proxy support initialized, version 4.1.0 NF_TPROXY: Copyright (c) 2006-2007 BalaBit IT Ltd. ip_tables: (C) 2000-2006 Netfilter Core Team ClusterIP Version 0.8 loaded successfully TCP cubic registered Initializing XFRM netlink socket NET: Registered protocol family 17 NET: Registered protocol family 15 Bridge firewalling registered Ebtables v2.0 registered 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com> All bugs added by David S. Miller <davem@redhat.com> md: Waiting for all devices to be available before autodetect md: If you don't use raid, use raid=noautodetect md: Autodetecting RAID arrays. md: Scanned 0 and added 0 devices. md: autorun ... md: ... autorun DONE. UDF-fs: No VRS found XFS mounting filesystem sda3 Ending clean XFS mount for filesystem: sda3 VFS: Mounted root (xfs filesystem) readonly on device 8:3. Freeing unused kernel memory: 372k freed Adding 2048276k swap on /dev/sda1. Priority:-1 extents:1 across:2048276k XFS mounting filesystem sda4 Ending clean XFS mount for filesystem: sda4 warning: `ntpd' uses 32-bit capabilities (legacy support in use) tg3 0000:03:00.0: PME# disabled tg3: eth0: Link is up at 1000 Mbps, full duplex. tg3: eth0: Flow control is off for TX and off for RX. ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 3:35 ` david 2009-02-18 3:45 ` david @ 2009-02-18 3:47 ` Yinghai Lu 2009-02-18 4:14 ` david 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 3:47 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux [-- Attachment #1: Type: text/plain, Size: 84 bytes --] please try two patches at the same time on 2.6.29-rc5. don't apply other patch. YH [-- Attachment #2: enable_8132_msi.patch --] [-- Type: text/x-patch, Size: 1367 bytes --] [PATCH] pci: enable MSI on 8132 Impact: workaround BIOS that doesn't enable that bit David reported that LSI sas doesn't work with MSI. it turns out that BIOS doesn't enable HT MSI 8132 does support HT MSI. add quirk to enable it Reported-by: David Lang <david@lang.hm> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -1981,7 +1981,6 @@ static void __devinit quirk_msi_ht_cap(s DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, quirk_msi_ht_cap); - /* The nVidia CK804 chipset may have 2 HT MSI mappings. * MSI are supported if the MSI capability set in any of these mappings. */ @@ -2032,6 +2031,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB, ht_enable_msi_mapping); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, + ht_enable_msi_mapping); + /* The P5N32-SLI Premium motherboard from Asus has a problem with msi * for the MCP55 NIC. It is not yet determined whether the msi problem * also affects other devices. As for now, turn off msi for this device. [-- Attachment #3: enable_lsi_sas_msi.patch --] [-- Type: text/x-patch, Size: 963 bytes --] [PATCH] mpt: fix enable lsi sas to use msi as default Impact: fix bug the third param in module_param(,,) is perm instead of default value. we still need to assign default at first. Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/message/fusion/mptbase.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Index: linux-2.6/drivers/message/fusion/mptbase.c =================================================================== --- linux-2.6.orig/drivers/message/fusion/mptbase.c +++ linux-2.6/drivers/message/fusion/mptbase.c @@ -90,8 +90,8 @@ module_param(mpt_msi_enable_fc, int, 0); MODULE_PARM_DESC(mpt_msi_enable_fc, " Enable MSI Support for FC \ controllers (default=0)"); -static int mpt_msi_enable_sas; -module_param(mpt_msi_enable_sas, int, 1); +static int mpt_msi_enable_sas = 1; +module_param(mpt_msi_enable_sas, int, 0); MODULE_PARM_DESC(mpt_msi_enable_sas, " Enable MSI Support for SAS \ controllers (default=1)"); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 3:47 ` Yinghai Lu @ 2009-02-18 4:14 ` david 2009-02-18 4:36 ` Yinghai Lu 2009-02-18 5:06 ` Yinghai Lu 0 siblings, 2 replies; 103+ messages in thread From: david @ 2009-02-18 4:14 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux [-- Attachment #1: Type: TEXT/PLAIN, Size: 219 bytes --] On Tue, 17 Feb 2009, Yinghai Lu wrote: > please try two patches at the same time on 2.6.29-rc5. > don't apply other patch. I did a git checkout -f HEAD then applied these two patches and the result works. David Lang [-- Attachment #2: Type: TEXT/PLAIN, Size: 39666 bytes --] Linux version 2.6.29-rc5.SMP.K8-64-test3-00122-g5955c7a-dirty (root@secdev) (gcc version 4.1.2 20061115 (prerelease) (Debian 4.1.1-21)) #23 SMP Tue Feb 17 19:30:23 PST 2009 Command line: auto BOOT_IMAGE=test3 ro root=803 console=ttyS1,9600n8 console=tty1 KERNEL supported cpus: Intel GenuineIntel AMD AuthenticAMD Centaur CentaurHauls BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 0000000000093800 (usable) BIOS-e820: 0000000000093800 - 0000000000094c00 (reserved) BIOS-e820: 00000000000eadc0 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 00000000dfff0000 (usable) BIOS-e820: 00000000dfff0000 - 00000000dfffe000 (ACPI data) BIOS-e820: 00000000dfffe000 - 00000000e0000000 (ACPI NVS) BIOS-e820: 00000000fec00000 - 00000000fec01000 (reserved) BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) BIOS-e820: 00000000ff700000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000000820000000 (usable) DMI present. AMI BIOS detected: BIOS may corrupt low RAM, working around it. last_pfn = 0x820000 max_arch_pfn = 0x100000000 x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 last_pfn = 0xdfff0 max_arch_pfn = 0x100000000 init_memory_mapping: 0000000000000000-00000000dfff0000 0000000000 - 00dfe00000 page 2M 00dfe00000 - 00dfff0000 page 4k kernel direct mapping tables up to dfff0000 @ 10000-16000 last_map_addr: dfff0000 end: dfff0000 init_memory_mapping: 0000000100000000-0000000820000000 0100000000 - 0820000000 page 2M kernel direct mapping tables up to 820000000 @ 14000-36000 last_map_addr: 820000000 end: 820000000 ACPI: RSDP 000F9440, 0014 (r0 ACPIAM) ACPI: RSDT DFFF0000, 0034 (r1 A M I OEMRSDT 6000714 MSFT 97) ACPI: FACP DFFF0200, 0084 (r2 A M I OEMFACP 6000714 MSFT 97) FADT: X_PM1a_EVT_BLK.bit_width (16) does not match PM1_EVT_LEN (4) ACPI: DSDT DFFF0440, 5218 (r1 WTF4V WTF4V034 34 INTL 2002026) ACPI: FACS DFFFE000, 0040 ACPI: APIC DFFF0390, 00B0 (r1 A M I OEMAPIC 6000714 MSFT 97) ACPI: OEMB DFFFE040, 0063 (r1 A M I AMI_OEM 6000714 MSFT 97) ACPI: SRAT DFFF5660, 01A0 (r1 AMD HAMMER 1 AMD 1) ACPI: Local APIC address 0xfee00000 SRAT: PXM 0 -> APIC 0 -> Node 0 SRAT: PXM 0 -> APIC 1 -> Node 0 SRAT: PXM 1 -> APIC 2 -> Node 1 SRAT: PXM 1 -> APIC 3 -> Node 1 SRAT: PXM 2 -> APIC 4 -> Node 2 SRAT: PXM 2 -> APIC 5 -> Node 2 SRAT: PXM 3 -> APIC 6 -> Node 3 SRAT: PXM 3 -> APIC 7 -> Node 3 SRAT: Node 0 PXM 0 0-a0000 SRAT: Node 0 PXM 0 100000-e0000000 SRAT: Node 0 PXM 0 100000000-220000000 SRAT: Node 1 PXM 1 220000000-420000000 SRAT: Node 2 PXM 2 420000000-620000000 SRAT: Node 3 PXM 3 620000000-820000000 NUMA: Allocated memnodemap from 31000 - 41440 NUMA: Using 20 for the hash shift. Bootmem setup node 0 0000000000000000-0000000220000000 NODE_DATA [0000000000041440 - 000000000004343f] bootmap [0000000000044000 - 0000000000087fff] pages 44 (7 early reservations) ==> bootmem [0000000000 - 0220000000] #0 [0000000000 - 0000001000] BIOS data page ==> [0000000000 - 0000001000] #1 [0000006000 - 0000008000] TRAMPOLINE ==> [0000006000 - 0000008000] #2 [0000200000 - 0000975dc4] TEXT DATA BSS ==> [0000200000 - 0000975dc4] #3 [0000093c00 - 0000100000] BIOS reserved ==> [0000093c00 - 0000100000] #4 [0000010000 - 0000014000] PGTABLE ==> [0000010000 - 0000014000] #5 [0000014000 - 0000031000] PGTABLE ==> [0000014000 - 0000031000] #6 [0000031000 - 0000041440] MEMNODEMAP ==> [0000031000 - 0000041440] Bootmem setup node 1 0000000220000000-0000000420000000 NODE_DATA [0000000220000000 - 0000000220001fff] bootmap [0000000220002000 - 0000000220041fff] pages 40 (7 early reservations) ==> bootmem [0220000000 - 0420000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP Bootmem setup node 2 0000000420000000-0000000620000000 NODE_DATA [0000000420000000 - 0000000420001fff] bootmap [0000000420002000 - 0000000420041fff] pages 40 (7 early reservations) ==> bootmem [0420000000 - 0620000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP Bootmem setup node 3 0000000620000000-0000000820000000 NODE_DATA [0000000620000000 - 0000000620001fff] bootmap [0000000620002000 - 0000000620041fff] pages 40 (7 early reservations) ==> bootmem [0620000000 - 0820000000] #0 [0000000000 - 0000001000] BIOS data page #1 [0000006000 - 0000008000] TRAMPOLINE #2 [0000200000 - 0000975dc4] TEXT DATA BSS #3 [0000093c00 - 0000100000] BIOS reserved #4 [0000010000 - 0000014000] PGTABLE #5 [0000014000 - 0000031000] PGTABLE #6 [0000031000 - 0000041440] MEMNODEMAP found SMP MP-table at [ffff8800000ff780] 000ff780 [ffffe20007700000-ffffe200077fffff] potential offnode page_structs [ffffe20000000000-ffffe200077fffff] PMD -> [ffff880028200000-ffff88002f3fffff] on node 0 [ffffe2000e700000-ffffe2000e7fffff] potential offnode page_structs [ffffe20007800000-ffffe2000e7fffff] PMD -> [ffff880220200000-ffff8802271fffff] on node 1 [ffffe20015700000-ffffe200157fffff] potential offnode page_structs [ffffe2000e800000-ffffe200157fffff] PMD -> [ffff880420200000-ffff8804271fffff] on node 2 [ffffe20015800000-ffffe2001c7fffff] PMD -> [ffff880620200000-ffff8806271fffff] on node 3 Zone PFN ranges: DMA 0x00000010 -> 0x00001000 DMA32 0x00001000 -> 0x00100000 Normal 0x00100000 -> 0x00820000 Movable zone start PFN for each node early_node_map[6] active PFN ranges 0: 0x00000010 -> 0x00000093 0: 0x00000100 -> 0x000dfff0 0: 0x00100000 -> 0x00220000 1: 0x00220000 -> 0x00420000 2: 0x00420000 -> 0x00620000 3: 0x00620000 -> 0x00820000 On node 0 totalpages: 2097011 DMA zone: 56 pages used for memmap DMA zone: 2071 pages reserved DMA zone: 1844 pages, LIFO batch:0 DMA32 zone: 14280 pages used for memmap DMA32 zone: 899112 pages, LIFO batch:31 Normal zone: 16128 pages used for memmap Normal zone: 1163520 pages, LIFO batch:31 On node 1 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 On node 2 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 On node 3 totalpages: 2097152 Normal zone: 28672 pages used for memmap Normal zone: 2068480 pages, LIFO batch:31 Nvidia board detected. Ignoring ACPI timer override. If you got timer trouble try acpi_use_timer_override Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus Detected use of extended apic ids on hypertransport bus ACPI: PM-Timer IO Port: 0x2008 ACPI: Local APIC address 0xfee00000 ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x02] enabled) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled) ACPI: LAPIC (acpi_id[0x05] lapic_id[0x04] enabled) ACPI: LAPIC (acpi_id[0x06] lapic_id[0x05] enabled) ACPI: LAPIC (acpi_id[0x07] lapic_id[0x06] enabled) ACPI: LAPIC (acpi_id[0x08] lapic_id[0x07] enabled) ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0]) IOAPIC[0]: apic_id 8, version 0, address 0xfec00000, GSI 0-23 ACPI: IOAPIC (id[0x09] address[0xfebfc000] gsi_base[24]) IOAPIC[1]: apic_id 9, version 0, address 0xfebfc000, GSI 24-47 ACPI: IOAPIC (id[0x0a] address[0xfebfe000] gsi_base[72]) IOAPIC[2]: apic_id 10, version 0, address 0xfebfe000, GSI 72-78 ACPI: IOAPIC (id[0x0b] address[0xfebff000] gsi_base[79]) IOAPIC[3]: apic_id 11, version 0, address 0xfebff000, GSI 79-85 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: BIOS IRQ0 pin2 override ignored. ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) ACPI: IRQ9 used by override. Using ACPI (MADT) for SMP configuration information SMP: Allowing 8 CPUs, 0 hotplug CPUs nr_irqs_gsi: 86 Allocating PCI resources starting at e2000000 (gap: e0000000:1ec00000) NR_CPUS:8 nr_cpumask_bits:8 nr_cpu_ids:8 nr_node_ids:4 PERCPU: Allocating 40960 bytes of per cpu data Built 4 zonelists in Zone order, mobility grouping on. Total pages: 8269916 Policy zone: Normal Kernel command line: auto BOOT_IMAGE=test3 ro root=803 console=ttyS1,9600n8 console=tty1 Initializing CPU#0 PID hash table entries: 4096 (order: 12, 32768 bytes) Fast TSC calibration using PIT Detected 2814.193 MHz processor. spurious 8259A interrupt: IRQ7. Console: colour VGA+ 80x25 console [tty1] enabled console [ttyS1] enabled Checking aperture... No AGP bridge found Node 0: aperture @ f4000000 size 64 MB Node 1: aperture @ f4000000 size 64 MB Node 2: aperture @ f4000000 size 64 MB Node 3: aperture @ f4000000 size 64 MB Memory: 33084308k/34078720k available (3910k kernel code, 524852k absent, 469560k reserved, 1814k data, 372k init) Calibrating delay loop (skipped), value calculated using timer frequency.. 5628.38 BogoMIPS (lpj=11256772) Dentry cache hash table entries: 4194304 (order: 13, 33554432 bytes) Inode-cache hash table entries: 2097152 (order: 12, 16777216 bytes) Mount-cache hash table entries: 256 CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 0/0x0 -> Node 0 tseg: 0000000000 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 0 using C1E aware idle routine ACPI: Core revision 20081204 Setting APIC routing to flat ..TIMER: vector=0x30 apic1=0 pin1=0 apic2=-1 pin2=-1 CPU0: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 1 APIC 0x1 ip 0x6000 Initializing CPU#1 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258509) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 1/0x1 -> Node 0 CPU: Physical Processor ID: 0 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 1, old 0x7040600070406, new 0x7010600070106 CPU1: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 2 APIC 0x2 ip 0x6000 Initializing CPU#2 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258500) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 2/0x2 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 2, old 0x7040600070406, new 0x7010600070106 CPU2: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 3 APIC 0x3 ip 0x6000 Initializing CPU#3 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258501) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 3/0x3 -> Node 1 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 3, old 0x7040600070406, new 0x7010600070106 CPU3: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 4 APIC 0x4 ip 0x6000 Initializing CPU#4 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258515) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 4/0x4 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 4, old 0x7040600070406, new 0x7010600070106 CPU4: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 5 APIC 0x5 ip 0x6000 Initializing CPU#5 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258500) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 5/0x5 -> Node 2 CPU: Physical Processor ID: 2 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 5, old 0x7040600070406, new 0x7010600070106 CPU5: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 6 APIC 0x6 ip 0x6000 Initializing CPU#6 Calibrating delay using timer specific routine.. 5629.26 BogoMIPS (lpj=11258520) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 6/0x6 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 0 x86 PAT enabled: cpu 6, old 0x7040600070406, new 0x7010600070106 CPU6: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Booting processor 7 APIC 0x7 ip 0x6000 Initializing CPU#7 Calibrating delay using timer specific routine.. 5629.25 BogoMIPS (lpj=11258515) CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) CPU 7/0x7 -> Node 3 CPU: Physical Processor ID: 3 CPU: Processor Core ID: 1 x86 PAT enabled: cpu 7, old 0x7040600070406, new 0x7010600070106 CPU7: Dual-Core AMD Opteron(tm) Processor 8220 stepping 03 Brought up 8 CPUs Total of 8 processors activated (45033.16 BogoMIPS). net_namespace: 1352 bytes xor: automatically using best checksumming function: generic_sse generic_sse: 8671.000 MB/sec xor: using function: generic_sse (8671.000 MB/sec) NET: Registered protocol family 16 node 0 link 2: io port [9000, cfff] node 1 link 1: io port [d000, ffff] node 1 link 1: io port [1000, 1fff] TOM: 00000000e0000000 aka 3584M node 1 link 1: mmio [fe200000, febfffff] node 1 link 1: mmio [fd500000, fd5fffff] node 0 link 2: mmio [fd600000, fd7fffff] node 0 link 2: mmio [e0000000, e3ffffff] node 1 link 1: mmio [e8000000, ebffffff] node 0 link 2: mmio [a0000, bffff] TOM2: 0000000820000000 aka 33280M bus: [00,05] on node 0 link 2 bus: 00 index 0 io port: [2000, cfff] bus: 00 index 1 io port: [0, fff] bus: 00 index 2 mmio: [fd600000, fe1fffff] bus: 00 index 3 mmio: [e0000000, e7ffffff] bus: 00 index 4 mmio: [a0000, bffff] bus: 00 index 5 mmio: [fec00000, ffffffff] bus: 00 index 6 mmio: [ec000000, fd4fffff] bus: 00 index 7 mmio: [820000000, fcffffffff] bus: [80,84] on node 1 link 1 bus: 80 index 0 io port: [d000, ffff] bus: 80 index 1 io port: [1000, 1fff] bus: 80 index 2 mmio: [fe200000, febfffff] bus: 80 index 3 mmio: [fd500000, fd5fffff] bus: 80 index 4 mmio: [e8000000, ebffffff] ACPI: bus type pci registered PCI: Using configuration type 1 for base access bio: create slab <bio-0> at 0 ACPI: EC: Look up EC in DSDT ACPI: Denied BIOS AML access to invalid port 0x21+0x1 (PIC0) ACPI Exception (dsopcode-0419): AE_AML_ILLEGAL_ADDRESS, During address validation of OpRegion [IRQM] [20081204] ACPI: Interpreter enabled ACPI: (supports S0 S5) ACPI: Using IOAPIC for interrupt routing ACPI: No dock devices found. ACPI: PCI Root Bridge [PCI0] (0000:00) HPET not enabled in BIOS. You might try hpet=force boot option pci 0000:00:01.1: reg 10 io port: [0xa400-0xa41f] pci 0000:00:01.1: reg 20 io port: [0x2300-0x233f] pci 0000:00:01.1: reg 24 io port: [0x2340-0x237f] pci 0000:00:01.1: PME# supported from D3hot D3cold pci 0000:00:01.1: PME# disabled pci 0000:00:02.0: reg 10 32bit mmio: [0xfe1fc000-0xfe1fcfff] pci 0000:00:02.0: supports D1 D2 pci 0000:00:02.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:02.0: PME# disabled pci 0000:00:02.1: reg 10 32bit mmio: [0xfe1fdc00-0xfe1fdcff] pci 0000:00:02.1: supports D1 D2 pci 0000:00:02.1: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:02.1: PME# disabled pci 0000:00:06.0: reg 20 io port: [0xd00-0xd0f] pci 0000:00:07.0: reg 10 io port: [0xb800-0xb807] pci 0000:00:07.0: reg 14 io port: [0xb400-0xb403] pci 0000:00:07.0: reg 18 io port: [0xb000-0xb007] pci 0000:00:07.0: reg 1c io port: [0xac00-0xac03] pci 0000:00:07.0: reg 20 io port: [0xa800-0xa80f] pci 0000:00:07.0: reg 24 32bit mmio: [0xfe1fe000-0xfe1fefff] pci 0000:00:08.0: reg 10 io port: [0xcc00-0xcc07] pci 0000:00:08.0: reg 14 io port: [0xc800-0xc803] pci 0000:00:08.0: reg 18 io port: [0xc400-0xc407] pci 0000:00:08.0: reg 1c io port: [0xc000-0xc003] pci 0000:00:08.0: reg 20 io port: [0xbc00-0xbc0f] pci 0000:00:08.0: reg 24 32bit mmio: [0xfe1ff000-0xfe1fffff] pci 0000:00:0b.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0b.0: PME# disabled pci 0000:00:0c.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0c.0: PME# disabled pci 0000:00:0d.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0d.0: PME# disabled pci 0000:00:0e.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0e.0: PME# disabled pci 0000:05:06.0: reg 10 32bit mmio: [0xfc000000-0xfcffffff] pci 0000:05:06.0: reg 14 32bit mmio: [0xfdc00000-0xfdc3ffff] pci 0000:05:06.0: reg 18 io port: [0x9000-0x907f] pci 0000:05:06.0: supports D1 D2 pci 0000:05:07.0: reg 10 32bit mmio: [0xfe0ff800-0xfe0fffff] pci 0000:05:07.0: reg 14 32bit mmio: [0xfe0f8000-0xfe0fbfff] pci 0000:05:07.0: supports D1 D2 pci 0000:05:07.0: PME# supported from D0 D1 D2 D3hot pci 0000:05:07.0: PME# disabled pci 0000:00:09.0: transparent bridge pci 0000:00:09.0: bridge io port: [0x9000-0x9fff] pci 0000:00:09.0: bridge 32bit mmio: [0xfd800000-0xfe0fffff] pci 0000:00:09.0: bridge 32bit mmio pref: [0xfb400000-0xfd3fffff] pci 0000:03:00.0: reg 10 64bit mmio: [0xfd7f0000-0xfd7fffff] pci 0000:03:00.0: PME# supported from D3hot D3cold pci 0000:03:00.0: PME# disabled pci 0000:00:0c.0: bridge 32bit mmio: [0xfd700000-0xfd7fffff] pci 0000:02:00.0: reg 10 64bit mmio: [0xfd6f0000-0xfd6fffff] pci 0000:02:00.0: PME# supported from D3hot D3cold pci 0000:02:00.0: PME# disabled pci 0000:00:0d.0: bridge 32bit mmio: [0xfd600000-0xfd6fffff] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P0P1._PRT] ACPI: PCI Root Bridge [PCIB] (0000:80) pci 0000:80:01.0: reg 14 32bit mmio: [0xfebfc000-0xfebfcfff] pci 0000:80:08.0: reg 10 io port: [0xfc00-0xfc07] pci 0000:80:08.0: reg 14 io port: [0xf800-0xf803] pci 0000:80:08.0: reg 18 io port: [0xf400-0xf407] pci 0000:80:08.0: reg 1c io port: [0xf000-0xf003] pci 0000:80:08.0: reg 20 io port: [0xec00-0xec0f] pci 0000:80:08.0: reg 24 32bit mmio: [0xfebfd000-0xfebfdfff] pci 0000:80:0d.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:80:0d.0: PME# disabled pci 0000:80:0e.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:80:0e.0: PME# disabled pci 0000:80:10.0: Enabling HT MSI Mapping pci 0000:80:10.1: reg 10 64bit mmio: [0xfebfe000-0xfebfefff] pci 0000:80:11.0: Enabling HT MSI Mapping pci 0000:80:11.1: reg 10 64bit mmio: [0xfebff000-0xfebfffff] pci 0000:82:03.0: reg 10 io port: [0xd800-0xd8ff] pci 0000:82:03.0: reg 14 64bit mmio: [0xfeafc000-0xfeafffff] pci 0000:82:03.0: reg 1c 64bit mmio: [0xfeae0000-0xfeaeffff] pci 0000:82:03.0: reg 30 32bit mmio: [0xfe400000-0xfe7fffff] pci 0000:82:03.0: supports D1 D2 pci 0000:80:10.0: bridge io port: [0xd000-0xdfff] pci 0000:80:10.0: bridge 32bit mmio: [0xfe200000-0xfeafffff] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGA._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCIB.POGB._PRT] ACPI: PCI Interrupt Link [LNKA] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKB] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LNKC] (IRQs 16 17 18 19) *5 ACPI: PCI Interrupt Link [LNKD] (IRQs 16 17 18 19) *7 ACPI: PCI Interrupt Link [LNKE] (IRQs 16 17 18 19) *0, disabled. ACPI: PCI Interrupt Link [LUS0] (IRQs 20 21 22) *9 ACPI: PCI Interrupt Link [LUS1] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LUS2] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LKLN] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LAUI] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKMO] (IRQs 20 21 22) *0, disabled. ACPI: PCI Interrupt Link [LKSM] (IRQs 20 21 22) *5 ACPI: PCI Interrupt Link [LTID] (IRQs 20 21 22) *11 ACPI: PCI Interrupt Link [LTIE] (IRQs 20 21 22) *10 ACPI: PCI Interrupt Link [LN2A] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2B] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2C] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LN2D] (IRQs 40 41 42 43) *0, disabled. ACPI: PCI Interrupt Link [LK2N] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT3D] (IRQs 44 45 46 47) *0, disabled. ACPI: PCI Interrupt Link [LT2E] (IRQs 44 45 46 47) *0, disabled. ACPI Warning (tbutils-0242): Incorrect checksum in table [OEMB] - EE, should be EB [20081204] SCSI subsystem initialized libata version 3.00 loaded. PCI: Using ACPI for IRQ routing PCI-DMA: Disabling AGP. PCI-DMA: aperture base @ f4000000 size 65536 KB init_memory_mapping: 00000000f4000000-00000000f8000000 00f4000000 - 00f8000000 page 2M last_map_addr: f8000000 end: f8000000 PCI-DMA: using GART IOMMU. PCI-DMA: Reserving 64MB of IOMMU area in the AGP aperture pnp: PnP ACPI init ACPI: bus type pnp registered pnp: PnP ACPI: found 15 devices ACPI: ACPI bus type pnp unregistered system 00:07: ioport range 0x190-0x193 has been reserved system 00:07: ioport range 0x4d0-0x4d1 has been reserved system 00:07: iomem range 0xffb80000-0xfffffffe has been reserved system 00:07: iomem range 0xdfefc000-0xdfefcfff could not be reserved system 00:07: iomem range 0xdfefd000-0xdfefd3ff could not be reserved system 00:07: iomem range 0xdfefe000-0xdfefe3ff could not be reserved system 00:07: iomem range 0xdfeff000-0xdfefffff could not be reserved system 00:07: iomem range 0xfefff000-0xfeffffff has been reserved system 00:08: ioport range 0xca2-0xca3 has been reserved system 00:08: iomem range 0xfec00000-0xfec00fff has been reserved system 00:08: iomem range 0xfee00000-0xfeefffff could not be reserved system 00:08: iomem range 0xfe200000-0xfebfffff could not be reserved system 00:08: iomem range 0xfd500000-0xfd5fffff has been reserved system 00:0b: ioport range 0xa00-0xa0f has been reserved system 00:0c: iomem range 0xe0000000-0xefffffff could not be reserved system 00:0d: iomem range 0x0-0x9ffff could not be reserved system 00:0d: iomem range 0xc0000-0xdffff has been reserved system 00:0d: iomem range 0xe0000-0xfffff could not be reserved system 00:0d: iomem range 0x100000-0xdfffffff could not be reserved pci 0000:00:09.0: PCI bridge, secondary bus 0000:05 Switched to high resolution mode on CPU 0 pci 0000:00:09.0: IO window: 0x9000-0x9fff Switched to high resolution mode on CPU 1 Switched to high resolution mode on CPU 5 Switched to high resolution mode on CPU 4 Switched to high resolution mode on CPU 3 Switched to high resolution mode on CPU 2 Switched to high resolution mode on CPU 7 Switched to high resolution mode on CPU 6 pci 0000:00:09.0: MEM window: 0xfd800000-0xfe0fffff pci 0000:00:09.0: PREFETCH window: 0x000000fb400000-0x000000fd3fffff pci 0000:00:0b.0: PCI bridge, secondary bus 0000:04 pci 0000:00:0b.0: IO window: disabled pci 0000:00:0b.0: MEM window: disabled pci 0000:00:0b.0: PREFETCH window: disabled pci 0000:00:0c.0: PCI bridge, secondary bus 0000:03 pci 0000:00:0c.0: IO window: disabled pci 0000:00:0c.0: MEM window: 0xfd700000-0xfd7fffff pci 0000:00:0c.0: PREFETCH window: disabled pci 0000:00:0d.0: PCI bridge, secondary bus 0000:02 pci 0000:00:0d.0: IO window: disabled pci 0000:00:0d.0: MEM window: 0xfd600000-0xfd6fffff pci 0000:00:0d.0: PREFETCH window: disabled pci 0000:00:0e.0: PCI bridge, secondary bus 0000:01 pci 0000:00:0e.0: IO window: disabled pci 0000:00:0e.0: MEM window: disabled pci 0000:00:0e.0: PREFETCH window: disabled pci 0000:00:09.0: setting latency timer to 64 pci 0000:00:0b.0: setting latency timer to 64 pci 0000:00:0c.0: setting latency timer to 64 pci 0000:00:0d.0: setting latency timer to 64 pci 0000:00:0e.0: setting latency timer to 64 pci 0000:80:0d.0: PCI bridge, secondary bus 0000:84 pci 0000:80:0d.0: IO window: disabled pci 0000:80:0d.0: MEM window: disabled pci 0000:80:0d.0: PREFETCH window: disabled pci 0000:80:0e.0: PCI bridge, secondary bus 0000:83 pci 0000:80:0e.0: IO window: disabled pci 0000:80:0e.0: MEM window: disabled pci 0000:80:0e.0: PREFETCH window: disabled pci 0000:80:10.0: PCI bridge, secondary bus 0000:82 pci 0000:80:10.0: IO window: 0xd000-0xdfff pci 0000:80:10.0: MEM window: 0xfe200000-0xfeafffff pci 0000:80:10.0: PREFETCH window: disabled pci 0000:80:11.0: PCI bridge, secondary bus 0000:81 pci 0000:80:11.0: IO window: disabled pci 0000:80:11.0: MEM window: disabled pci 0000:80:11.0: PREFETCH window: disabled pci 0000:80:0d.0: setting latency timer to 64 pci 0000:80:0e.0: setting latency timer to 64 pci_bus 0000:00: resource 0 io: [0x2000-0xcfff] pci_bus 0000:00: resource 1 io: [0x00-0xfff] pci_bus 0000:00: resource 2 mem: [0xfd600000-0xfe1fffff] pci_bus 0000:00: resource 3 mem: [0xe0000000-0xe7ffffff] pci_bus 0000:00: resource 4 mem: [0x0a0000-0x0bffff] pci_bus 0000:00: resource 5 mem: [0xfec00000-0xffffffff] pci_bus 0000:00: resource 6 mem: [0xec000000-0xfd4fffff] pci_bus 0000:00: resource 7 mem: [0x820000000-0xfcffffffff] pci_bus 0000:05: resource 0 io: [0x9000-0x9fff] pci_bus 0000:05: resource 1 mem: [0xfd800000-0xfe0fffff] pci_bus 0000:05: resource 2 mem: [0xfb400000-0xfd3fffff] pci_bus 0000:05: resource 3 io: [0x2000-0xcfff] pci_bus 0000:05: resource 4 io: [0x00-0xfff] pci_bus 0000:05: resource 5 mem: [0xfd600000-0xfe1fffff] pci_bus 0000:05: resource 6 mem: [0xe0000000-0xe7ffffff] pci_bus 0000:05: resource 7 mem: [0x0a0000-0x0bffff] pci_bus 0000:05: resource 8 mem: [0xfec00000-0xffffffff] pci_bus 0000:05: resource 9 mem: [0xec000000-0xfd4fffff] pci_bus 0000:05: resource 10 mem: [0x820000000-0xfcffffffff] pci_bus 0000:04: resource 0 mem: [0x0-0x0] pci_bus 0000:04: resource 1 mem: [0x0-0x0] pci_bus 0000:04: resource 2 mem: [0x0-0x0] pci_bus 0000:04: resource 3 mem: [0x0-0x0] pci_bus 0000:03: resource 0 mem: [0x0-0x0] pci_bus 0000:03: resource 1 mem: [0xfd700000-0xfd7fffff] pci_bus 0000:03: resource 2 mem: [0x0-0x0] pci_bus 0000:03: resource 3 mem: [0x0-0x0] pci_bus 0000:02: resource 0 mem: [0x0-0x0] pci_bus 0000:02: resource 1 mem: [0xfd600000-0xfd6fffff] pci_bus 0000:02: resource 2 mem: [0x0-0x0] pci_bus 0000:02: resource 3 mem: [0x0-0x0] pci_bus 0000:01: resource 0 mem: [0x0-0x0] pci_bus 0000:01: resource 1 mem: [0x0-0x0] pci_bus 0000:01: resource 2 mem: [0x0-0x0] pci_bus 0000:01: resource 3 mem: [0x0-0x0] pci_bus 0000:80: resource 0 io: [0xd000-0xffff] pci_bus 0000:80: resource 1 io: [0x1000-0x1fff] pci_bus 0000:80: resource 2 mem: [0xfe200000-0xfebfffff] pci_bus 0000:80: resource 3 mem: [0xfd500000-0xfd5fffff] pci_bus 0000:80: resource 4 mem: [0xe8000000-0xebffffff] pci_bus 0000:84: resource 0 mem: [0x0-0x0] pci_bus 0000:84: resource 1 mem: [0x0-0x0] pci_bus 0000:84: resource 2 mem: [0x0-0x0] pci_bus 0000:84: resource 3 mem: [0x0-0x0] pci_bus 0000:83: resource 0 mem: [0x0-0x0] pci_bus 0000:83: resource 1 mem: [0x0-0x0] pci_bus 0000:83: resource 2 mem: [0x0-0x0] pci_bus 0000:83: resource 3 mem: [0x0-0x0] pci_bus 0000:82: resource 0 io: [0xd000-0xdfff] pci_bus 0000:82: resource 1 mem: [0xfe200000-0xfeafffff] pci_bus 0000:82: resource 2 mem: [0x0-0x0] pci_bus 0000:82: resource 3 mem: [0x0-0x0] pci_bus 0000:81: resource 0 mem: [0x0-0x0] pci_bus 0000:81: resource 1 mem: [0x0-0x0] pci_bus 0000:81: resource 2 mem: [0x0-0x0] pci_bus 0000:81: resource 3 mem: [0x0-0x0] NET: Registered protocol family 2 IP route cache hash table entries: 1048576 (order: 11, 8388608 bytes) TCP established hash table entries: 524288 (order: 11, 8388608 bytes) TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) TCP: Hash tables configured (established 524288 bind 65536) TCP reno registered NET: Registered protocol family 1 NTFS driver 2.1.29 [Flags: R/W]. SGI XFS with security attributes, large block/inode numbers, no debug enabled msgmni has been set to 32768 alg: No test for cipher_null (cipher_null-generic) alg: No test for digest_null (digest_null-generic) alg: No test for compress_null (compress_null-generic) alg: No test for stdrng (krng) async_tx: api initialized (sync-only) io scheduler noop registered io scheduler anticipatory registered io scheduler deadline registered (default) io scheduler cfq registered pci 0000:00:00.0: Enabling HT MSI Mapping pci 0000:00:0b.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0b.0: Enabling HT MSI Mapping pci 0000:00:0c.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0c.0: Enabling HT MSI Mapping pci 0000:00:0d.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0d.0: Enabling HT MSI Mapping pci 0000:00:0e.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:0e.0: Enabling HT MSI Mapping pci 0000:80:00.0: Enabling HT MSI Mapping pci 0000:80:0d.0: Found disabled HT MSI Mapping pci 0000:80:00.0: Found enabled HT MSI Mapping pci 0000:80:0d.0: Enabling HT MSI Mapping pci 0000:80:0e.0: Found disabled HT MSI Mapping pci 0000:80:00.0: Found enabled HT MSI Mapping pci 0000:80:0e.0: Enabling HT MSI Mapping pcieport-driver 0000:00:0b.0: setting latency timer to 64 pcieport-driver 0000:00:0b.0: irq 86 for MSI/MSI-X pcieport-driver 0000:00:0c.0: setting latency timer to 64 pcieport-driver 0000:00:0c.0: irq 87 for MSI/MSI-X pcieport-driver 0000:00:0d.0: setting latency timer to 64 pcieport-driver 0000:00:0d.0: irq 88 for MSI/MSI-X pcieport-driver 0000:00:0e.0: setting latency timer to 64 pcieport-driver 0000:00:0e.0: irq 89 for MSI/MSI-X pcieport-driver 0000:80:0d.0: setting latency timer to 64 pcieport-driver 0000:80:0d.0: irq 90 for MSI/MSI-X pcieport-driver 0000:80:0e.0: setting latency timer to 64 pcieport-driver 0000:80:0e.0: irq 91 for MSI/MSI-X lp: driver loaded but no devices found Real Time Clock Driver v1.12b Linux agpgart interface v0.103 Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A serial8250: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A 00:05: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A 00:06: ttyS1 at I/O 0x2f8 (irq = 3) is a 16550A floppy0: no floppy controllers found brd: module loaded loop: module loaded nbd: registered device at major 43 Intel(R) PRO/1000 Network Driver - version 7.3.21-k3-NAPI Copyright (c) 1999-2006 Intel Corporation. Ethernet Channel Bonding Driver: v3.5.0 (November 4, 2008) bonding: Warning: either miimon or arp_interval and arp_ip_target module parameters must be specified, otherwise bonding will not detect link failures! see bonding.txt for details. e100: Intel(R) PRO/100 Network Driver, 3.5.23-k6-NAPI e100: Copyright(c) 1999-2006 Intel Corporation tg3.c:v3.97 (December 10, 2008) ACPI: PCI Interrupt Link [LNKA] enabled at IRQ 19 tg3 0000:03:00.0: PCI INT A -> Link[LNKA] -> GSI 19 (level, low) -> IRQ 19 tg3 0000:03:00.0: setting latency timer to 64 tg3 0000:03:00.0: PME# disabled eth0: Tigon3 [partno(BCM95721) rev 4101] (PCI Express) MAC address 00:d0:68:12:f6:fd eth0: attached PHY is 5750 (10/100/1000Base-T Ethernet) (WireSpeed[1]) eth0: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[1] TSOcap[1] eth0: dma_rwctrl[76180000] dma_mask[64-bit] ACPI: PCI Interrupt Link [LNKD] enabled at IRQ 18 tg3 0000:02:00.0: PCI INT A -> Link[LNKD] -> GSI 18 (level, low) -> IRQ 18 tg3 0000:02:00.0: setting latency timer to 64 tg3 0000:02:00.0: PME# disabled eth1: Tigon3 [partno(BCM95721) rev 4101] (PCI Express) MAC address 00:d0:68:12:f6:fc eth1: attached PHY is 5750 (10/100/1000Base-T Ethernet) (WireSpeed[1]) eth1: RXcsums[1] LinkChgREG[0] MIirq[0] ASF[0] TSOcap[1] eth1: dma_rwctrl[76180000] dma_mask[64-bit] tun: Universal TUN/TAP device driver, 1.6 tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> Adaptec aacraid driver 1.1-5[2456]-ms QLogic Fibre Channel HBA Driver: 8.03.00-k2 megaraid cmm: 2.20.2.7 (Release Date: Sun Jul 16 00:01:03 EST 2006) megaraid: 2.20.5.1 (Release Date: Thu Nov 16 15:32:35 EST 2006) megasas: 00.00.04.01 Thu July 24 11:41:51 PST 2008 3ware 9000 Storage Controller device driver for Linux v2.26.02.011. st: Version 20081215, fixed bufsize 32768, s/g segs 256 Driver 'st' needs updating - please use bus_type methods Driver 'sd' needs updating - please use bus_type methods Driver 'sr' needs updating - please use bus_type methods SCSI Media Changer driver v0.25 Driver 'ch' needs updating - please use bus_type methods sata_nv 0000:00:07.0: version 3.5 ACPI: PCI Interrupt Link [LTID] enabled at IRQ 22 sata_nv 0000:00:07.0: PCI INT A -> Link[LTID] -> GSI 22 (level, low) -> IRQ 22 sata_nv 0000:00:07.0: setting latency timer to 64 scsi0 : sata_nv scsi1 : sata_nv ata1: SATA max UDMA/133 cmd 0xb800 ctl 0xb400 bmdma 0xa800 irq 22 ata2: SATA max UDMA/133 cmd 0xb000 ctl 0xac00 bmdma 0xa808 irq 22 ata1: SATA link down (SStatus 0 SControl 300) ata2: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LTIE] enabled at IRQ 21 sata_nv 0000:00:08.0: PCI INT A -> Link[LTIE] -> GSI 21 (level, low) -> IRQ 21 sata_nv 0000:00:08.0: setting latency timer to 64 scsi2 : sata_nv scsi3 : sata_nv ata3: SATA max UDMA/133 cmd 0xcc00 ctl 0xc800 bmdma 0xbc00 irq 21 ata4: SATA max UDMA/133 cmd 0xc400 ctl 0xc000 bmdma 0xbc08 irq 21 ata3: SATA link down (SStatus 0 SControl 300) ata4: SATA link down (SStatus 0 SControl 300) ACPI: PCI Interrupt Link [LT2E] enabled at IRQ 47 sata_nv 0000:80:08.0: PCI INT A -> Link[LT2E] -> GSI 47 (level, low) -> IRQ 47 sata_nv 0000:80:08.0: setting latency timer to 64 scsi4 : sata_nv scsi5 : sata_nv ata5: SATA max UDMA/133 cmd 0xfc00 ctl 0xf800 bmdma 0xec00 irq 47 ata6: SATA max UDMA/133 cmd 0xf400 ctl 0xf000 bmdma 0xec08 irq 47 ata5: SATA link down (SStatus 0 SControl 300) ata6: SATA link down (SStatus 0 SControl 300) pata_amd 0000:00:06.0: version 0.3.11 pata_amd 0000:00:06.0: setting latency timer to 64 scsi6 : pata_amd scsi7 : pata_amd ata7: PATA max UDMA/133 cmd 0x1f0 ctl 0x3f6 bmdma 0xd00 irq 14 ata8: PATA max UDMA/133 cmd 0x170 ctl 0x376 bmdma 0xd08 irq 15 ata7.01: ATAPI: TSSTcorpCD-ROM TS-L162C, MO00, max UDMA/33 ata7: nv_mode_filter: 0x739f&0x701f->0x701f, BIOS=0x7000 (0xc00000) ACPI=0x701f (900:54:0x14) ata7.01: configured for UDMA/33 scsi 6:0:1:0: CD-ROM TSSTcorp CD-ROM TS-L162C MO00 PQ: 0 ANSI: 5 sr0: scsi3-mmc drive: 24x/24x cd/rw xa/form2 cdda tray Uniform CD-ROM driver Revision: 3.20 sr 6:0:1:0: Attached scsi CD-ROM sr0 sr 6:0:1:0: Attached scsi generic sg0 type 5 I2O subsystem v1.325 i2o: max drivers = 8 I2O Configuration OSM v1.323 I2O Bus Adapter OSM v1.317 I2O Block Device OSM v1.325 I2O SCSI Peripheral OSM v1.316 I2O ProcFS OSM v1.316 Fusion MPT base driver 3.04.07 Copyright (c) 1999-2008 LSI Corporation Fusion MPT SPI Host driver 3.04.07 Fusion MPT FC Host driver 3.04.07 Fusion MPT SAS Host driver 3.04.07 mptsas 0000:82:03.0: PCI INT A -> GSI 75 (level, low) -> IRQ 75 mptbase: ioc0: Initiating bringup ioc0: LSISAS1068 B1: Capabilities={Initiator} mptsas 0000:82:03.0: irq 92 for MSI/MSI-X mptbase: ioc0: PCI-MSI enabled scsi8 : ioc0: LSISAS1068 B1, FwRev=01120000h, Ports=1, MaxQ=511, IRQ=92 scsi 8:0:0:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:0:0: Attached scsi generic sg1 type 0 scsi 8:0:1:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:1:0: Attached scsi generic sg2 type 0 scsi 8:1:0:0: Direct-Access LSILOGIC Logical Volume 3000 PQ: 0 ANSI: 2 sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda3 sda4 sd 8:1:0:0: [sda] Attached SCSI disk sd 8:1:0:0: Attached scsi generic sg3 type 0 Fusion MPT misc device (ioctl) driver 3.04.07 mptctl: Registered with Fusion MPT base driver mptctl: /dev/mptctl @ (major,minor=10,220) PNP: PS/2 Controller [PNP0303:PS2K,PNP0f12:PS2M] at 0x60,0x64 irq 1,12 serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice input: PC Speaker as /class/input/input0 input: AT Translated Set 2 keyboard as /class/input/input1 ACPI: I/O resource nForce2_smbus [0x2300-0x233f] conflicts with ACPI region SMRG [0x2300-0x2304] ACPI: Device needs an ACPI driver i2c-adapter i2c-0: nForce2 SMBus adapter at 0x2300 i2c-adapter i2c-1: nForce2 SMBus adapter at 0x2340 hdaps: supported laptop not found! hdaps: driver init failed (ret=-19)! k8temp 0000:00:18.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:19.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:1a.3: Temperature readouts might be wrong - check erratum #141 k8temp 0000:00:1b.3: Temperature readouts might be wrong - check erratum #141 md: raid1 personality registered for level 1 raid6: int64x1 2541 MB/s raid6: int64x2 3388 MB/s raid6: int64x4 3276 MB/s raid6: int64x8 2263 MB/s raid6: sse2x1 3888 MB/s raid6: sse2x2 5188 MB/s raid6: sse2x4 5261 MB/s raid6: using algorithm sse2x4 (5261 MB/s) md: raid6 personality registered for level 6 md: raid5 personality registered for level 5 md: raid4 personality registered for level 4 cpuidle: using governor ladder cpuidle: using governor menu oprofile: using NMI interrupt. Netfilter messages via NETLINK v0.30. nf_conntrack version 0.5.0 (16384 buckets, 65536 max) CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Please use nf_conntrack.acct=1 kernel paramater, acct=1 nf_conntrack module option or sysctl net.netfilter.nf_conntrack_acct=1 to enable it. ctnetlink v0.93: registering with nfnetlink. NF_TPROXY: Transparent proxy support initialized, version 4.1.0 NF_TPROXY: Copyright (c) 2006-2007 BalaBit IT Ltd. ip_tables: (C) 2000-2006 Netfilter Core Team ClusterIP Version 0.8 loaded successfully TCP cubic registered Initializing XFRM netlink socket NET: Registered protocol family 17 NET: Registered protocol family 15 Bridge firewalling registered Ebtables v2.0 registered 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com> All bugs added by David S. Miller <davem@redhat.com> md: Waiting for all devices to be available before autodetect md: If you don't use raid, use raid=noautodetect md: Autodetecting RAID arrays. md: Scanned 0 and added 0 devices. md: autorun ... md: ... autorun DONE. UDF-fs: No VRS found XFS mounting filesystem sda3 Ending clean XFS mount for filesystem: sda3 VFS: Mounted root (xfs filesystem) readonly on device 8:3. Freeing unused kernel memory: 372k freed Adding 2048276k swap on /dev/sda1. Priority:-1 extents:1 across:2048276k XFS mounting filesystem sda4 Ending clean XFS mount for filesystem: sda4 warning: `ntpd' uses 32-bit capabilities (legacy support in use) ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 4:14 ` david @ 2009-02-18 4:36 ` Yinghai Lu 2009-02-18 5:06 ` Yinghai Lu 1 sibling, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 4:36 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> please try two patches at the same time on 2.6.29-rc5. >> don't apply other patch. > > I did a git checkout -f HEAD then applied these two patches and the > result works. > good. MSI does work on your system now. mptsas 0000:82:03.0: PCI INT A -> GSI 75 (level, low) -> IRQ 75 mptbase: ioc0: Initiating bringup ioc0: LSISAS1068 B1: Capabilities={Initiator} mptsas 0000:82:03.0: irq 92 for MSI/MSI-X mptbase: ioc0: PCI-MSI enabled scsi8 : ioc0: LSISAS1068 B1, FwRev=01120000h, Ports=1, MaxQ=511, IRQ=92 scsi 8:0:0:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:0:0: Attached scsi generic sg1 type 0 scsi 8:0:1:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:1:0: Attached scsi generic sg2 type 0 scsi 8:1:0:0: Direct-Access LSILOGIC Logical Volume 3000 PQ: 0 ANSI: 2 sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda3 sda4 sd 8:1:0:0: [sda] Attached SCSI disk sd 8:1:0:0: Attached scsi generic sg3 type 0 YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 @ 2009-02-18 4:36 ` Yinghai Lu 0 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 4:36 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> please try two patches at the same time on 2.6.29-rc5. >> don't apply other patch. > > I did a git checkout -f HEAD then applied these two patches and the > result works. > good. MSI does work on your system now. mptsas 0000:82:03.0: PCI INT A -> GSI 75 (level, low) -> IRQ 75 mptbase: ioc0: Initiating bringup ioc0: LSISAS1068 B1: Capabilities={Initiator} mptsas 0000:82:03.0: irq 92 for MSI/MSI-X mptbase: ioc0: PCI-MSI enabled scsi8 : ioc0: LSISAS1068 B1, FwRev=01120000h, Ports=1, MaxQ=511, IRQ=92 scsi 8:0:0:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:0:0: Attached scsi generic sg1 type 0 scsi 8:0:1:0: Direct-Access SEAGATE ST3146855SS RS02 PQ: 0 ANSI: 5 scsi 8:0:1:0: Attached scsi generic sg2 type 0 scsi 8:1:0:0: Direct-Access LSILOGIC Logical Volume 3000 PQ: 0 ANSI: 2 sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sd 8:1:0:0: [sda] 285155328 512-byte hardware sectors: (145 GB/135 GiB) sd 8:1:0:0: [sda] Write Protect is off sd 8:1:0:0: [sda] Mode Sense: 03 00 00 08 sd 8:1:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda3 sda4 sd 8:1:0:0: [sda] Attached SCSI disk sd 8:1:0:0: Attached scsi generic sg3 type 0 YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 4:14 ` david @ 2009-02-18 5:06 ` Yinghai Lu 2009-02-18 5:06 ` Yinghai Lu 1 sibling, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 5:06 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> please try two patches at the same time on 2.6.29-rc5. >> don't apply other patch. > > I did a git checkout -f HEAD then applied these two patches and the > result works. > but should have pci 0000:80:10.0: Enabling HT MSI Mapping pci 0000:80:11.0: Enabling HT MSI Mapping because previous patch have pci 0000:80:10.0: Found disabled HT MSI Mapping pci 0000:80:10.0: MSI quirk detected; subordinate MSI disabled pci 0000:80:11.0: Found disabled HT MSI Mapping pci 0000:80:11.0: MSI quirk detected; subordinate MSI disabled YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 @ 2009-02-18 5:06 ` Yinghai Lu 0 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 5:06 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux david@lang.hm wrote: > On Tue, 17 Feb 2009, Yinghai Lu wrote: > >> please try two patches at the same time on 2.6.29-rc5. >> don't apply other patch. > > I did a git checkout -f HEAD then applied these two patches and the > result works. > but should have pci 0000:80:10.0: Enabling HT MSI Mapping pci 0000:80:11.0: Enabling HT MSI Mapping because previous patch have pci 0000:80:10.0: Found disabled HT MSI Mapping pci 0000:80:10.0: MSI quirk detected; subordinate MSI disabled pci 0000:80:11.0: Found disabled HT MSI Mapping pci 0000:80:11.0: MSI quirk detected; subordinate MSI disabled YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 5:06 ` Yinghai Lu @ 2009-02-18 5:10 ` Yinghai Lu -1 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 5:10 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux Yinghai Lu wrote: > david@lang.hm wrote: >> On Tue, 17 Feb 2009, Yinghai Lu wrote: >> >>> please try two patches at the same time on 2.6.29-rc5. >>> don't apply other patch. >> I did a git checkout -f HEAD then applied these two patches and the >> result works. >> > but should have > > pci 0000:80:10.0: Enabling HT MSI Mapping > pci 0000:80:11.0: Enabling HT MSI Mapping > > because previous patch have > pci 0000:80:10.0: Found disabled HT MSI Mapping > pci 0000:80:10.0: MSI quirk detected; subordinate MSI disabled > pci 0000:80:11.0: Found disabled HT MSI Mapping > pci 0000:80:11.0: MSI quirk detected; subordinate MSI disabled > ok i saw that... pci 0000:80:10.0: Enabling HT MSI Mapping pci 0000:80:10.1: reg 10 64bit mmio: [0xfebfe000-0xfebfefff] pci 0000:80:11.0: Enabling HT MSI Mapping pci 0000:80:11.1: reg 10 64bit mmio: [0xfebff000-0xfebfffff] it appears early. that patch enabling MSI does work... YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 @ 2009-02-18 5:10 ` Yinghai Lu 0 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 5:10 UTC (permalink / raw) To: david; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux Yinghai Lu wrote: > david@lang.hm wrote: >> On Tue, 17 Feb 2009, Yinghai Lu wrote: >> >>> please try two patches at the same time on 2.6.29-rc5. >>> don't apply other patch. >> I did a git checkout -f HEAD then applied these two patches and the >> result works. >> > but should have > > pci 0000:80:10.0: Enabling HT MSI Mapping > pci 0000:80:11.0: Enabling HT MSI Mapping > > because previous patch have > pci 0000:80:10.0: Found disabled HT MSI Mapping > pci 0000:80:10.0: MSI quirk detected; subordinate MSI disabled > pci 0000:80:11.0: Found disabled HT MSI Mapping > pci 0000:80:11.0: MSI quirk detected; subordinate MSI disabled > ok i saw that... pci 0000:80:10.0: Enabling HT MSI Mapping pci 0000:80:10.1: reg 10 64bit mmio: [0xfebfe000-0xfebfefff] pci 0000:80:11.0: Enabling HT MSI Mapping pci 0000:80:11.1: reg 10 64bit mmio: [0xfebff000-0xfebfffff] it appears early. that patch enabling MSI does work... YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* [PATCH] pci: enable MSI on 8132 2009-02-18 3:26 ` david 2009-02-18 3:28 ` Yinghai Lu @ 2009-02-18 4:40 ` Yinghai Lu 2009-02-18 12:21 ` Matthew Wilcox ` (2 more replies) 1 sibling, 3 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 4:40 UTC (permalink / raw) To: Jesse Barnes, Andrew Morton Cc: david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Impact: workaround BIOS that doesn't enable that bit David reported that LSI sas doesn't work with MSI. it turns out that BIOS doesn't enable HT MSI 8132 does support HT MSI. add quirk to enable it Reported-by: David Lang <david@lang.hm> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -1981,7 +1981,6 @@ static void __devinit quirk_msi_ht_cap(s DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, quirk_msi_ht_cap); - /* The nVidia CK804 chipset may have 2 HT MSI mappings. * MSI are supported if the MSI capability set in any of these mappings. */ @@ -2032,6 +2031,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB, ht_enable_msi_mapping); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, + ht_enable_msi_mapping); + /* The P5N32-SLI Premium motherboard from Asus has a problem with msi * for the MCP55 NIC. It is not yet determined whether the msi problem * also affects other devices. As for now, turn off msi for this device. ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 4:40 ` [PATCH] pci: enable MSI on 8132 Yinghai Lu @ 2009-02-18 12:21 ` Matthew Wilcox 2009-02-18 12:27 ` david 2009-02-18 19:00 ` Jesse Barnes 2009-02-19 3:39 ` Robert Hancock 2 siblings, 1 reply; 103+ messages in thread From: Matthew Wilcox @ 2009-02-18 12:21 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Andrew Morton, david, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: > > Impact: workaround BIOS that doesn't enable that bit > > David reported that LSI sas doesn't work with MSI. > it turns out that BIOS doesn't enable HT MSI > 8132 does support HT MSI. > add quirk to enable it > > Reported-by: David Lang <david@lang.hm> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Jesse, I think this should go into Linus' tree sooner rather than later. -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 12:21 ` Matthew Wilcox @ 2009-02-18 12:27 ` david 2009-02-18 18:04 ` Andrew Morton 0 siblings, 1 reply; 103+ messages in thread From: david @ 2009-02-18 12:27 UTC (permalink / raw) To: Matthew Wilcox Cc: Yinghai Lu, Jesse Barnes, Andrew Morton, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 18 Feb 2009, Matthew Wilcox wrote: > On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: >> >> Impact: workaround BIOS that doesn't enable that bit >> >> David reported that LSI sas doesn't work with MSI. >> it turns out that BIOS doesn't enable HT MSI >> 8132 does support HT MSI. >> add quirk to enable it >> >> Reported-by: David Lang <david@lang.hm> >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > Reviewed-by: Matthew Wilcox <willy@linux.intel.com> > > Jesse, I think this should go into Linus' tree sooner rather than later. please forward to -stable as well. this is a regression since the card works with older kernels. David Lang ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 12:27 ` david @ 2009-02-18 18:04 ` Andrew Morton 2009-02-18 18:18 ` david 2009-02-18 18:38 ` James Bottomley 0 siblings, 2 replies; 103+ messages in thread From: Andrew Morton @ 2009-02-18 18:04 UTC (permalink / raw) To: david Cc: Matthew Wilcox, Yinghai Lu, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: > On Wed, 18 Feb 2009, Matthew Wilcox wrote: > > > On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: > >> > >> Impact: workaround BIOS that doesn't enable that bit > >> > >> David reported that LSI sas doesn't work with MSI. > >> it turns out that BIOS doesn't enable HT MSI > >> 8132 does support HT MSI. > >> add quirk to enable it > >> > >> Reported-by: David Lang <david@lang.hm> > >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > > > Reviewed-by: Matthew Wilcox <willy@linux.intel.com> > > > > Jesse, I think this should go into Linus' tree sooner rather than later. > > please forward to -stable as well. this is a regression since the card > works with older kernels. > Which kernel version introduced the regression? Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as well, to fix this regression? I sent mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch to the maintainers a week ago and it was ignored, along with everything else. If this happens again I shall merge it under my own cognisance, along with everything else. ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 18:04 ` Andrew Morton @ 2009-02-18 18:18 ` david 2009-02-18 18:32 ` Greg KH 2009-02-18 18:38 ` James Bottomley 1 sibling, 1 reply; 103+ messages in thread From: david @ 2009-02-18 18:18 UTC (permalink / raw) To: Andrew Morton Cc: Matthew Wilcox, Yinghai Lu, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 18 Feb 2009, Andrew Morton wrote: > Subject: Re: [PATCH] pci: enable MSI on 8132 > > On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: > >> On Wed, 18 Feb 2009, Matthew Wilcox wrote: >> >>> On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: >>>> >>>> Impact: workaround BIOS that doesn't enable that bit >>>> >>>> David reported that LSI sas doesn't work with MSI. >>>> it turns out that BIOS doesn't enable HT MSI >>>> 8132 does support HT MSI. >>>> add quirk to enable it >>>> >>>> Reported-by: David Lang <david@lang.hm> >>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >>> >>> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> >>> >>> Jesse, I think this should go into Linus' tree sooner rather than later. >> >> please forward to -stable as well. this is a regression since the card >> works with older kernels. >> > > Which kernel version introduced the regression? I'm not sure. I know that 2.6.24 Debian EThch-and-a-half worked, 2.6.27+ failed. how critical is it to narrow down exactly where the problem crept in? Yinghai Lu, Matthew Wilcox, can either of you identify where the problem would have appeared? > Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as > well, to fix this regression? I don't know. the current -git kernel fails, but with these two patches works. I haven't tried backporting these patches (if there are any changes at all needed I probably won't be able to do it) David Lang > I sent mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch to the > maintainers a week ago and it was ignored, along with everything else. > If this happens again I shall merge it under my own cognisance, along > with everything else. > > ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 18:18 ` david @ 2009-02-18 18:32 ` Greg KH 0 siblings, 0 replies; 103+ messages in thread From: Greg KH @ 2009-02-18 18:32 UTC (permalink / raw) To: david Cc: Andrew Morton, Matthew Wilcox, Yinghai Lu, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, Feb 18, 2009 at 10:18:20AM -0800, david@lang.hm wrote: > On Wed, 18 Feb 2009, Andrew Morton wrote: > >> Subject: Re: [PATCH] pci: enable MSI on 8132 >> On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: >> >>> On Wed, 18 Feb 2009, Matthew Wilcox wrote: >>> >>>> On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: >>>>> >>>>> Impact: workaround BIOS that doesn't enable that bit >>>>> >>>>> David reported that LSI sas doesn't work with MSI. >>>>> it turns out that BIOS doesn't enable HT MSI >>>>> 8132 does support HT MSI. >>>>> add quirk to enable it >>>>> >>>>> Reported-by: David Lang <david@lang.hm> >>>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >>>> >>>> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> >>>> >>>> Jesse, I think this should go into Linus' tree sooner rather than later. >>> >>> please forward to -stable as well. this is a regression since the card >>> works with older kernels. >>> >> >> Which kernel version introduced the regression? > > I'm not sure. I know that 2.6.24 Debian EThch-and-a-half worked, 2.6.27+ > failed. how critical is it to narrow down exactly where the problem crept > in? If .27 fails, that's all we need to know, as only .27 and .28 are being maintained by the -stable person :) thanks, greg k-h ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 18:04 ` Andrew Morton 2009-02-18 18:18 ` david @ 2009-02-18 18:38 ` James Bottomley 2009-02-18 18:40 ` david ` (3 more replies) 1 sibling, 4 replies; 103+ messages in thread From: James Bottomley @ 2009-02-18 18:38 UTC (permalink / raw) To: Andrew Morton Cc: david, Matthew Wilcox, Yinghai Lu, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: > On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: > > > On Wed, 18 Feb 2009, Matthew Wilcox wrote: > > > > > On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: > > >> > > >> Impact: workaround BIOS that doesn't enable that bit > > >> > > >> David reported that LSI sas doesn't work with MSI. > > >> it turns out that BIOS doesn't enable HT MSI > > >> 8132 does support HT MSI. > > >> add quirk to enable it > > >> > > >> Reported-by: David Lang <david@lang.hm> > > >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > > > > > Reviewed-by: Matthew Wilcox <willy@linux.intel.com> > > > > > > Jesse, I think this should go into Linus' tree sooner rather than later. > > > > please forward to -stable as well. this is a regression since the card > > works with older kernels. > > > > Which kernel version introduced the regression? Technically, it's not a regression. The MSI problem has always been there, it was just exposed when the SAS card switched to using MSI by default. It's fixed by the bridge quirk ... of course it's unclear how many more bridges with problems there are. > Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as > well, to fix this regression? No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; the problem msi patch which the above corrects actually has the effect of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a kernel that's been tested here. > I sent mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch to the > maintainers a week ago and it was ignored, along with everything else. > If this happens again I shall merge it under my own cognisance, along > with everything else. Yes, they've been a bit unresponsive. I'm not unhappy with the current situation, since MSI is globally disabled for fusion at the moment (so we shouldn't get any more MSI problem reports), so I'm happy to wait and see what they want to do. James ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 18:38 ` James Bottomley @ 2009-02-18 18:40 ` david 2009-02-18 19:08 ` Yinghai Lu ` (2 subsequent siblings) 3 siblings, 0 replies; 103+ messages in thread From: david @ 2009-02-18 18:40 UTC (permalink / raw) To: James Bottomley Cc: Andrew Morton, Matthew Wilcox, Yinghai Lu, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 18 Feb 2009, James Bottomley wrote: > On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: >> On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: >> >>> On Wed, 18 Feb 2009, Matthew Wilcox wrote: >>> >>>> On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: >>>>> >>>>> Impact: workaround BIOS that doesn't enable that bit >>>>> >>>>> David reported that LSI sas doesn't work with MSI. >>>>> it turns out that BIOS doesn't enable HT MSI >>>>> 8132 does support HT MSI. >>>>> add quirk to enable it >>>>> >>>>> Reported-by: David Lang <david@lang.hm> >>>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >>>> >>>> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> >>>> >>>> Jesse, I think this should go into Linus' tree sooner rather than later. >>> >>> please forward to -stable as well. this is a regression since the card >>> works with older kernels. >>> >> >> Which kernel version introduced the regression? > > Technically, it's not a regression. The MSI problem has always been > there, it was just exposed when the SAS card switched to using MSI by > default. It's fixed by the bridge quirk ... of course it's unclear how > many more bridges with problems there are. > >> Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as >> well, to fix this regression? > > No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; > the problem msi patch which the above corrects actually has the effect > of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a > kernel that's been tested here. actually, some of the failed tests were using the 2.6.29-rc5+ git tree pulled last evening. so that should have included any fixes that went into -rc2 David Lang >> I sent mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch to the >> maintainers a week ago and it was ignored, along with everything else. >> If this happens again I shall merge it under my own cognisance, along >> with everything else. > > Yes, they've been a bit unresponsive. I'm not unhappy with the current > situation, since MSI is globally disabled for fusion at the moment (so > we shouldn't get any more MSI problem reports), so I'm happy to wait and > see what they want to do. > > James > > > ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 18:38 ` James Bottomley 2009-02-18 18:40 ` david @ 2009-02-18 19:08 ` Yinghai Lu 2009-02-18 19:14 ` James Bottomley 2009-02-18 19:15 ` Andrew Morton 2009-02-19 4:21 ` Prakash, Sathya 3 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 19:08 UTC (permalink / raw) To: James Bottomley Cc: Andrew Morton, david, Matthew Wilcox, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci James Bottomley wrote: > On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: > >> Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as >> well, to fix this regression? > > No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; > the problem msi patch which the above corrects actually has the effect > of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a > kernel that's been tested here. > so for 2.6.26, 27, 28 need pci-enable-msi-on-8132.patch 2.6.29 need pci-enable-msi-on-8132.patch and mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 19:08 ` Yinghai Lu @ 2009-02-18 19:14 ` James Bottomley 2009-02-18 19:25 ` Yinghai Lu 2009-02-18 20:12 ` Jeff Garzik 0 siblings, 2 replies; 103+ messages in thread From: James Bottomley @ 2009-02-18 19:14 UTC (permalink / raw) To: Yinghai Lu Cc: Andrew Morton, david, Matthew Wilcox, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 2009-02-18 at 11:08 -0800, Yinghai Lu wrote: > James Bottomley wrote: > > On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: > > > >> Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as > >> well, to fix this regression? > > > > No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; > > the problem msi patch which the above corrects actually has the effect > > of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a > > kernel that's been tested here. > > > > so for 2.6.26, 27, 28 need pci-enable-msi-on-8132.patch I'm a bit lost with the names, but if that's the PCI quirk fix, then yes > 2.6.29 need pci-enable-msi-on-8132.patch and mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch Like I said, I'm happy to have MSI completely disabled until LSI wants to comment, so no ... only the PCI quirk fix. The true fix is to have the drivers participate in dynamic testing of MSI IRQ routing, but I've somewhat lost sight of that. James ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 19:14 ` James Bottomley @ 2009-02-18 19:25 ` Yinghai Lu 2009-02-18 20:12 ` Jeff Garzik 1 sibling, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 19:25 UTC (permalink / raw) To: James Bottomley Cc: Andrew Morton, david, Matthew Wilcox, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci James Bottomley wrote: > On Wed, 2009-02-18 at 11:08 -0800, Yinghai Lu wrote: >> James Bottomley wrote: >>> On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: >>> >>>> Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as >>>> well, to fix this regression? >>> No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; >>> the problem msi patch which the above corrects actually has the effect >>> of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a >>> kernel that's been tested here. >>> >> so for 2.6.26, 27, 28 need pci-enable-msi-on-8132.patch > > I'm a bit lost with the names, but if that's the PCI quirk fix, then yes yes > >> 2.6.29 need pci-enable-msi-on-8132.patch and mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch > > Like I said, I'm happy to have MSI completely disabled until LSI wants > to comment, so no ... only the PCI quirk fix. The true fix is to have > the drivers participate in dynamic testing of MSI IRQ routing, but I've > somewhat lost sight of that. [PATCH] mpt: fix enable lsi sas to use msi as default Impact: fix bug the third param in module_param(,,) is perm instead of default value. we still need to assign default at first. Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/message/fusion/mptbase.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Index: linux-2.6/drivers/message/fusion/mptbase.c =================================================================== --- linux-2.6.orig/drivers/message/fusion/mptbase.c +++ linux-2.6/drivers/message/fusion/mptbase.c @@ -90,8 +90,8 @@ module_param(mpt_msi_enable_fc, int, 0); MODULE_PARM_DESC(mpt_msi_enable_fc, " Enable MSI Support for FC \ controllers (default=0)"); -static int mpt_msi_enable_sas; -module_param(mpt_msi_enable_sas, int, 1); +static int mpt_msi_enable_sas = 1; +module_param(mpt_msi_enable_sas, int, 0); MODULE_PARM_DESC(mpt_msi_enable_sas, " Enable MSI Support for SAS \ controllers (default=1)"); or you want [PATCH] mpt: fix disable lsi sas to use msi as default Impact: fix bug the third param in module_param(,,) is perm instead of default value. we still need to assign default at first. Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/message/fusion/mptbase.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Index: linux-2.6/drivers/message/fusion/mptbase.c =================================================================== --- linux-2.6.orig/drivers/message/fusion/mptbase.c +++ linux-2.6/drivers/message/fusion/mptbase.c @@ -91,9 +91,9 @@ MODULE_PARM_DESC(mpt_msi_enable_fc, " En controllers (default=0)"); static int mpt_msi_enable_sas; -module_param(mpt_msi_enable_sas, int, 1); +module_param(mpt_msi_enable_sas, int, 0); MODULE_PARM_DESC(mpt_msi_enable_sas, " Enable MSI Support for SAS \ - controllers (default=1)"); + controllers (default=0)"); static int mpt_channel_mapping; anyway we need to fix the typo. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 19:14 ` James Bottomley 2009-02-18 19:25 ` Yinghai Lu @ 2009-02-18 20:12 ` Jeff Garzik 2009-02-18 20:18 ` James Bottomley 1 sibling, 1 reply; 103+ messages in thread From: Jeff Garzik @ 2009-02-18 20:12 UTC (permalink / raw) To: James Bottomley Cc: Yinghai Lu, Andrew Morton, david, Matthew Wilcox, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci James Bottomley wrote: > Like I said, I'm happy to have MSI completely disabled until LSI wants > to comment, so no ... only the PCI quirk fix. The true fix is to have > the drivers participate in dynamic testing of MSI IRQ routing, but I've > somewhat lost sight of that. That's not really a fix at all, just additional, unneeded overhead for 99% of users. We don't need our drivers bloated with self-check code for all the components in our various computer chips... Jeff ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 20:12 ` Jeff Garzik @ 2009-02-18 20:18 ` James Bottomley 0 siblings, 0 replies; 103+ messages in thread From: James Bottomley @ 2009-02-18 20:18 UTC (permalink / raw) To: Jeff Garzik Cc: Yinghai Lu, Andrew Morton, david, Matthew Wilcox, Jesse Barnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 2009-02-18 at 15:12 -0500, Jeff Garzik wrote: > James Bottomley wrote: > > Like I said, I'm happy to have MSI completely disabled until LSI wants > > to comment, so no ... only the PCI quirk fix. The true fix is to have > > the drivers participate in dynamic testing of MSI IRQ routing, but I've > > somewhat lost sight of that. > > That's not really a fix at all, just additional, unneeded overhead for > 99% of users. We don't need our drivers bloated with self-check code > for all the components in our various computer chips... So you think the current per driver variably named parameter to turn off MSI is better? Especially as most of the users who trip across a platform having MSI problems don't even know that the storage failure is caused by MSI, let alone how to find the parameter to fix the problem. James ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 18:38 ` James Bottomley 2009-02-18 18:40 ` david 2009-02-18 19:08 ` Yinghai Lu @ 2009-02-18 19:15 ` Andrew Morton 2009-02-18 19:29 ` Yinghai Lu 2009-02-18 19:33 ` James Bottomley 2009-02-19 4:21 ` Prakash, Sathya 3 siblings, 2 replies; 103+ messages in thread From: Andrew Morton @ 2009-02-18 19:15 UTC (permalink / raw) To: James Bottomley Cc: david, matthew, yinghai, jbarnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 18 Feb 2009 18:38:04 +0000 James Bottomley <James.Bottomley@HansenPartnership.com> wrote: > On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: > > On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: > > > > > On Wed, 18 Feb 2009, Matthew Wilcox wrote: > > > > > > > On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: > > > >> > > > >> Impact: workaround BIOS that doesn't enable that bit > > > >> > > > >> David reported that LSI sas doesn't work with MSI. > > > >> it turns out that BIOS doesn't enable HT MSI > > > >> 8132 does support HT MSI. > > > >> add quirk to enable it > > > >> > > > >> Reported-by: David Lang <david@lang.hm> > > > >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > > > > > > > Reviewed-by: Matthew Wilcox <willy@linux.intel.com> > > > > > > > > Jesse, I think this should go into Linus' tree sooner rather than later. > > > > > > please forward to -stable as well. this is a regression since the card > > > works with older kernels. > > > > > > > Which kernel version introduced the regression? > > Technically, it's not a regression. The MSI problem has always been > there, it was just exposed when the SAS card switched to using MSI by > default. It's fixed by the bridge quirk ... of course it's unclear how > many more bridges with problems there are. > > > Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as > > well, to fix this regression? > > No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; > the problem msi patch which the above corrects actually has the effect > of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a > kernel that's been tested here. <scratches head> So it should be the case that _either_ of mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch and pci-enable-msi-on-8132.patch would fix David's machine? ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 19:15 ` Andrew Morton @ 2009-02-18 19:29 ` Yinghai Lu 2009-02-18 19:33 ` James Bottomley 1 sibling, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-18 19:29 UTC (permalink / raw) To: Andrew Morton Cc: James Bottomley, david, matthew, jbarnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Andrew Morton wrote: > On Wed, 18 Feb 2009 18:38:04 +0000 > James Bottomley <James.Bottomley@HansenPartnership.com> wrote: > >> On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: >>> On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: >>> >>>> On Wed, 18 Feb 2009, Matthew Wilcox wrote: >>>> >>>>> On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: >>>>>> Impact: workaround BIOS that doesn't enable that bit >>>>>> >>>>>> David reported that LSI sas doesn't work with MSI. >>>>>> it turns out that BIOS doesn't enable HT MSI >>>>>> 8132 does support HT MSI. >>>>>> add quirk to enable it >>>>>> >>>>>> Reported-by: David Lang <david@lang.hm> >>>>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >>>>> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> >>>>> >>>>> Jesse, I think this should go into Linus' tree sooner rather than later. >>>> please forward to -stable as well. this is a regression since the card >>>> works with older kernels. >>>> >>> Which kernel version introduced the regression? >> Technically, it's not a regression. The MSI problem has always been >> there, it was just exposed when the SAS card switched to using MSI by >> default. It's fixed by the bridge quirk ... of course it's unclear how >> many more bridges with problems there are. >> >>> Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as >>> well, to fix this regression? >> No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; >> the problem msi patch which the above corrects actually has the effect >> of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a >> kernel that's been tested here. > > <scratches head> > > So it should be the case that _either_ of > mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch and > pci-enable-msi-on-8132.patch would fix David's machine? On David's machine: for kernel after 2.6.29-rc2, it should work, because that typo actually disable the MSI for kernel from 2.6.26 to 2.6.28, MSI is enabled for MPT sas, so it need pci-enable-msi-on-8132.patch. for 2.6.29, we need to fix that typo anyway. LIS guys seems to like to enable MSI in that case... YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 19:15 ` Andrew Morton 2009-02-18 19:29 ` Yinghai Lu @ 2009-02-18 19:33 ` James Bottomley 1 sibling, 0 replies; 103+ messages in thread From: James Bottomley @ 2009-02-18 19:33 UTC (permalink / raw) To: Andrew Morton Cc: david, matthew, yinghai, jbarnes, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Wed, 2009-02-18 at 11:15 -0800, Andrew Morton wrote: > On Wed, 18 Feb 2009 18:38:04 +0000 > James Bottomley <James.Bottomley@HansenPartnership.com> wrote: > > > On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: > > > On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: > > > > > > > On Wed, 18 Feb 2009, Matthew Wilcox wrote: > > > > > > > > > On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: > > > > >> > > > > >> Impact: workaround BIOS that doesn't enable that bit > > > > >> > > > > >> David reported that LSI sas doesn't work with MSI. > > > > >> it turns out that BIOS doesn't enable HT MSI > > > > >> 8132 does support HT MSI. > > > > >> add quirk to enable it > > > > >> > > > > >> Reported-by: David Lang <david@lang.hm> > > > > >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > > > > > > > > > Reviewed-by: Matthew Wilcox <willy@linux.intel.com> > > > > > > > > > > Jesse, I think this should go into Linus' tree sooner rather than later. > > > > > > > > please forward to -stable as well. this is a regression since the card > > > > works with older kernels. > > > > > > > > > > Which kernel version introduced the regression? > > > > Technically, it's not a regression. The MSI problem has always been > > there, it was just exposed when the SAS card switched to using MSI by > > default. It's fixed by the bridge quirk ... of course it's unclear how > > many more bridges with problems there are. > > > > > Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as > > > well, to fix this regression? > > > > No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; > > the problem msi patch which the above corrects actually has the effect > > of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a > > kernel that's been tested here. > > <scratches head> OK, back on the ball; the names of the patches you're referring to are in master:/home/akpm/public_html/mmotm/broken-out > So it should be the case that _either_ of > mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch and > pci-enable-msi-on-8132.patch would fix David's machine? No. pci-enable-msi-on-8132.patch alone should fix the box. Without it, the MSI routing isn't working properly. The fact that MSI is affecting fusion is caused by this patch: commit 23a274c8a5adafc74a66f16988776fc7dd6f6e51 Author: Prakash, Sathya <sathya.prakash@lsi.com> Date: Fri Mar 7 15:53:21 2008 +0530 [SCSI] mpt fusion: Enable MSI by default for SAS controllers However that wasn't correctly implemented and had to be fixed, but the bottom line is that with this patch as fixes, fusion now tries to enable MSI for the SAS card (and has since 2.6.26) A recent patch that went in to 2.6.29-rc2 was commit e382968ba618e016ff7922dff9a6140c2f9108c8 Author: Kashyap, Desai <kashyap.desai@lsi.com> Date: Thu Jan 8 14:27:16 2009 +0530 [SCSI] mpt fusion: Add separate msi enable disable for FC,SPI,SAS This was misimplemented and actually disables MSI globally in the driver (contrary to what LSI wanted to do). What mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch is fix this and re-enable MSI by default on SAS cards (going back to the position we were in after 23a274c8a5adafc74a66f16988776fc7dd6f6e51). What I'm saying is I'm happy to wait for LSI to sort out the current mess ... hopefully dynamically, and in the meantime, MSI being globally disabled for fusion isn't really a problem. James ^ permalink raw reply [flat|nested] 103+ messages in thread
* RE: [PATCH] pci: enable MSI on 8132 2009-02-18 18:38 ` James Bottomley ` (2 preceding siblings ...) 2009-02-18 19:15 ` Andrew Morton @ 2009-02-19 4:21 ` Prakash, Sathya 3 siblings, 0 replies; 103+ messages in thread From: Prakash, Sathya @ 2009-02-19 4:21 UTC (permalink / raw) To: James Bottomley, Andrew Morton Cc: david, Matthew Wilcox, Yinghai Lu, Jesse Barnes, linux-kernel, linux-scsi, DL-MPT Fusion Linux, linux-pci Apologies for late response on this thread. Considering the fact that the enabling MSI has issues with some unknown boards we will turn off the MSI for all the type of controllers (including the SAS) and will send the corrected patch soon (with proper module description). Till we find out a way to dynamically decide whether we can enable MSI without any issues, we don't want to set the module parameter to enable MSI by default for SAS controllers. Thanks Sathya -----Original Message----- From: James Bottomley [mailto:James.Bottomley@HansenPartnership.com] Sent: Thursday, February 19, 2009 12:08 AM To: Andrew Morton Cc: david@lang.hm; Matthew Wilcox; Yinghai Lu; Jesse Barnes; linux-kernel; linux-scsi@vger.kernel.org; DL-MPT Fusion Linux; linux-pci@vger.kernel.org Subject: Re: [PATCH] pci: enable MSI on 8132 On Wed, 2009-02-18 at 10:04 -0800, Andrew Morton wrote: > On Wed, 18 Feb 2009 04:27:28 -0800 (PST) david@lang.hm wrote: > > > On Wed, 18 Feb 2009, Matthew Wilcox wrote: > > > > > On Tue, Feb 17, 2009 at 08:40:09PM -0800, Yinghai Lu wrote: > > >> > > >> Impact: workaround BIOS that doesn't enable that bit > > >> > > >> David reported that LSI sas doesn't work with MSI. > > >> it turns out that BIOS doesn't enable HT MSI > > >> 8132 does support HT MSI. > > >> add quirk to enable it > > >> > > >> Reported-by: David Lang <david@lang.hm> > > >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > > > > > Reviewed-by: Matthew Wilcox <willy@linux.intel.com> > > > > > > Jesse, I think this should go into Linus' tree sooner rather than later. > > > > please forward to -stable as well. this is a regression since the > > card works with older kernels. > > > > Which kernel version introduced the regression? Technically, it's not a regression. The MSI problem has always been there, it was just exposed when the SAS card switched to using MSI by default. It's fixed by the bridge quirk ... of course it's unclear how many more bridges with problems there are. > Do we not need mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch as > well, to fix this regression? No ... it's a separate issue. MSI was enabled for fusion SAS in 2.6.26; the problem msi patch which the above corrects actually has the effect of disabling MSI for fusion and went into 2.6.29-rc2, which isn't a kernel that's been tested here. > I sent mpt-fix-enable-lsi-sas-to-use-msi-as-default.patch to the > maintainers a week ago and it was ignored, along with everything else. > If this happens again I shall merge it under my own cognisance, along > with everything else. Yes, they've been a bit unresponsive. I'm not unhappy with the current situation, since MSI is globally disabled for fusion at the moment (so we shouldn't get any more MSI problem reports), so I'm happy to wait and see what they want to do. James ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 4:40 ` [PATCH] pci: enable MSI on 8132 Yinghai Lu 2009-02-18 12:21 ` Matthew Wilcox @ 2009-02-18 19:00 ` Jesse Barnes 2009-02-19 3:39 ` Robert Hancock 2 siblings, 0 replies; 103+ messages in thread From: Jesse Barnes @ 2009-02-18 19:00 UTC (permalink / raw) To: Yinghai Lu Cc: Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Tuesday, February 17, 2009 8:40 pm Yinghai Lu wrote: > Impact: workaround BIOS that doesn't enable that bit > > David reported that LSI sas doesn't work with MSI. > it turns out that BIOS doesn't enable HT MSI > 8132 does support HT MSI. > add quirk to enable it > > Reported-by: David Lang <david@lang.hm> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> Applied to my for-linus branch, thanks. -- Jesse Barnes, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-18 4:40 ` [PATCH] pci: enable MSI on 8132 Yinghai Lu 2009-02-18 12:21 ` Matthew Wilcox 2009-02-18 19:00 ` Jesse Barnes @ 2009-02-19 3:39 ` Robert Hancock 2009-02-21 7:50 ` Eric W. Biederman 2 siblings, 1 reply; 103+ messages in thread From: Robert Hancock @ 2009-02-19 3:39 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Yinghai Lu wrote: > Impact: workaround BIOS that doesn't enable that bit > > David reported that LSI sas doesn't work with MSI. > it turns out that BIOS doesn't enable HT MSI > 8132 does support HT MSI. > add quirk to enable it > > Reported-by: David Lang <david@lang.hm> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > --- > drivers/pci/quirks.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > Index: linux-2.6/drivers/pci/quirks.c > =================================================================== > --- linux-2.6.orig/drivers/pci/quirks.c > +++ linux-2.6/drivers/pci/quirks.c > @@ -1981,7 +1981,6 @@ static void __devinit quirk_msi_ht_cap(s > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE, > quirk_msi_ht_cap); > > - > /* The nVidia CK804 chipset may have 2 HT MSI mappings. > * MSI are supported if the MSI capability set in any of these mappings. > */ > @@ -2032,6 +2031,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_S > PCI_DEVICE_ID_SERVERWORKS_HT1000_PXB, > ht_enable_msi_mapping); > > +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, > + ht_enable_msi_mapping); > + Is there a reason why we can't just enable the HT MSI mapping for any bridge device that has that PCI capability and is underneath an HT bridge? Essentially the code for nv_msi_ht_cap_quirk could potentially be applied to all bridges as it is currently for NVIDIA and ALi bridges.. ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-19 3:39 ` Robert Hancock @ 2009-02-21 7:50 ` Eric W. Biederman 2009-02-21 8:31 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Eric W. Biederman @ 2009-02-21 7:50 UTC (permalink / raw) To: Robert Hancock Cc: Yinghai Lu, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Robert Hancock <hancockrwd@gmail.com> writes: > > Is there a reason why we can't just enable the HT MSI mapping for any bridge > device that has that PCI capability and is underneath an HT bridge? The code should be under CONFIG_X86 because the rules for enabling HT MSI mappings are different for other architectures. But otherwise I can't think of a reason. > Essentially > the code for nv_msi_ht_cap_quirk could potentially be applied to all bridges as > it is currently for NVIDIA and ALi bridges.. Sounds like it would save a fair amount of grief. Eric ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-21 7:50 ` Eric W. Biederman @ 2009-02-21 8:31 ` Yinghai Lu 2009-02-21 8:58 ` Eric W. Biederman 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-21 8:31 UTC (permalink / raw) To: Eric W. Biederman Cc: Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Fri, Feb 20, 2009 at 11:50 PM, Eric W. Biederman <ebiederm@xmission.com> wrote: > Robert Hancock <hancockrwd@gmail.com> writes: >> >> Is there a reason why we can't just enable the HT MSI mapping for any bridge >> device that has that PCI capability and is underneath an HT bridge? > > The code should be under CONFIG_X86 because the rules for enabling HT MSI mappings > are different for other architectures. But otherwise I can't think of a reason. move to arch/x86/pci/fixup.c? it seems some other arch do support HT ... powerpc, mips? > >> Essentially >> the code for nv_msi_ht_cap_quirk could potentially be applied to all bridges as >> it is currently for NVIDIA and ALi bridges.. > > Sounds like it would save a fair amount of grief. it seems there is some difference. 8132 is some kind of HT tunnel, and the bridge is acctually pci-x bridge. mcp55 and ck804: is HT end device with several pcie bridges. also 8131 has problem with HT MSI? YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-21 8:31 ` Yinghai Lu @ 2009-02-21 8:58 ` Eric W. Biederman 2009-02-21 10:23 ` Yinghai Lu 2009-02-22 3:42 ` Grant Grundler 0 siblings, 2 replies; 103+ messages in thread From: Eric W. Biederman @ 2009-02-21 8:58 UTC (permalink / raw) To: Yinghai Lu Cc: Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Yinghai Lu <yinghai@kernel.org> writes: > On Fri, Feb 20, 2009 at 11:50 PM, Eric W. Biederman > <ebiederm@xmission.com> wrote: >> Robert Hancock <hancockrwd@gmail.com> writes: >>> >>> Is there a reason why we can't just enable the HT MSI mapping for any bridge >>> device that has that PCI capability and is underneath an HT bridge? >> >> The code should be under CONFIG_X86 because the rules for enabling HT MSI > mappings >> are different for other architectures. But otherwise I can't think of a > reason. > > move to arch/x86/pci/fixup.c? > > it seems some other arch do support HT ... powerpc, mips? The difference is that there is a magic address on x86 that all MSI cycles are sent to. I think it is 0xfffe0000. In an msi to HT mapping capability it is necessary to program in the address to listen for msi packets. That is very much an arch dependent thing. >>> Essentially >>> the code for nv_msi_ht_cap_quirk could potentially be applied to all bridges > as >>> it is currently for NVIDIA and ALi bridges.. >> >> Sounds like it would save a fair amount of grief. > > it seems there is some difference. > 8132 is some kind of HT tunnel, and the bridge is acctually pci-x bridge. > > mcp55 and ck804: is HT end device with several pcie bridges. Not really they are all hypertransport to pci bridges (of some flavor). But any hypertransport device is allowed to have a mapping capability. In which case they can implement normal MSI interrupts instead of the weird hypertransport ones. > also 8131 has problem with HT MSI? The 8131 does not implement the msi to hypertransport mapping capability so it can not support MSI interrupts. In general on x86, if a device has a MSI to hypertransport mapping capability then we can enable it and mark that devices and all downstream devices as supporting MSI. Eric ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-21 8:58 ` Eric W. Biederman @ 2009-02-21 10:23 ` Yinghai Lu 2009-02-21 18:59 ` Robert Hancock 2009-02-22 3:42 ` Grant Grundler 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-21 10:23 UTC (permalink / raw) To: Eric W. Biederman Cc: Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Eric W. Biederman wrote: > Yinghai Lu <yinghai@kernel.org> writes: > >> On Fri, Feb 20, 2009 at 11:50 PM, Eric W. Biederman >> <ebiederm@xmission.com> wrote: >>> Robert Hancock <hancockrwd@gmail.com> writes: >>>> Is there a reason why we can't just enable the HT MSI mapping for any bridge >>>> device that has that PCI capability and is underneath an HT bridge? >>> The code should be under CONFIG_X86 because the rules for enabling HT MSI >> mappings >>> are different for other architectures. But otherwise I can't think of a >> reason. >> >> move to arch/x86/pci/fixup.c? >> >> it seems some other arch do support HT ... powerpc, mips? > > The difference is that there is a magic address on x86 that all MSI > cycles are sent to. I think it is 0xfffe0000. In an msi to HT > mapping capability it is necessary to program in the address to listen > for msi packets. That is very much an arch dependent thing. > >>>> Essentially >>>> the code for nv_msi_ht_cap_quirk could potentially be applied to all bridges >> as >>>> it is currently for NVIDIA and ALi bridges.. >>> Sounds like it would save a fair amount of grief. >> it seems there is some difference. >> 8132 is some kind of HT tunnel, and the bridge is acctually pci-x bridge. >> >> mcp55 and ck804: is HT end device with several pcie bridges. > > Not really they are all hypertransport to pci bridges (of some flavor). > But any hypertransport device is allowed to have a mapping capability. > In which case they can implement normal MSI interrupts instead of the > weird hypertransport ones. for mcp55 00:00.0 is HT device 00:0b.0 00:0c.0, 00:0d.0, 00:0e.0, 00:0f.0 are pcie bridge. current quirks will check 00:00.0 HT MSI is set, it will not set that in those bridges any more. > >> also 8131 has problem with HT MSI? > > The 8131 does not implement the msi to hypertransport mapping > capability so it can not support MSI interrupts. it seems there is one quirks to disable MSI for 8131. /* Disable MSI on chipsets that are known to not support it */ static void __devinit quirk_disable_msi(struct pci_dev *dev) { if (dev->subordinate) { dev_warn(&dev->dev, "MSI quirk detected; " "subordinate MSI disabled\n"); dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; } } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi); > > > In general on x86, if a device has a MSI to hypertransport mapping > capability then we can enable it and mark that devices and all > downstream devices as supporting MSI. looks some aggressive. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-21 10:23 ` Yinghai Lu @ 2009-02-21 18:59 ` Robert Hancock 2009-02-22 12:08 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Robert Hancock @ 2009-02-21 18:59 UTC (permalink / raw) To: Yinghai Lu Cc: Eric W. Biederman, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Yinghai Lu wrote: > Eric W. Biederman wrote: >> Yinghai Lu <yinghai@kernel.org> writes: >> >>> On Fri, Feb 20, 2009 at 11:50 PM, Eric W. Biederman >>> <ebiederm@xmission.com> wrote: >>>> Robert Hancock <hancockrwd@gmail.com> writes: >>>>> Is there a reason why we can't just enable the HT MSI mapping for any bridge >>>>> device that has that PCI capability and is underneath an HT bridge? >>>> The code should be under CONFIG_X86 because the rules for enabling HT MSI >>> mappings >>>> are different for other architectures. But otherwise I can't think of a >>> reason. >>> >>> move to arch/x86/pci/fixup.c? >>> >>> it seems some other arch do support HT ... powerpc, mips? >> The difference is that there is a magic address on x86 that all MSI >> cycles are sent to. I think it is 0xfffe0000. In an msi to HT >> mapping capability it is necessary to program in the address to listen >> for msi packets. That is very much an arch dependent thing. >> >>>>> Essentially >>>>> the code for nv_msi_ht_cap_quirk could potentially be applied to all bridges >>> as >>>>> it is currently for NVIDIA and ALi bridges.. >>>> Sounds like it would save a fair amount of grief. >>> it seems there is some difference. >>> 8132 is some kind of HT tunnel, and the bridge is acctually pci-x bridge. >>> >>> mcp55 and ck804: is HT end device with several pcie bridges. >> Not really they are all hypertransport to pci bridges (of some flavor). >> But any hypertransport device is allowed to have a mapping capability. >> In which case they can implement normal MSI interrupts instead of the >> weird hypertransport ones. > for mcp55 > 00:00.0 is HT device > 00:0b.0 00:0c.0, 00:0d.0, 00:0e.0, 00:0f.0 are pcie bridge. > current quirks will check 00:00.0 HT MSI is set, it will not set that in those bridges any more. > >>> also 8131 has problem with HT MSI? >> The 8131 does not implement the msi to hypertransport mapping >> capability so it can not support MSI interrupts. > it seems there is one quirks to disable MSI for 8131. > /* Disable MSI on chipsets that are known to not support it */ > static void __devinit quirk_disable_msi(struct pci_dev *dev) > { > if (dev->subordinate) { > dev_warn(&dev->dev, "MSI quirk detected; " > "subordinate MSI disabled\n"); > dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; > } > } > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi); > > >> >> In general on x86, if a device has a MSI to hypertransport mapping >> capability then we can enable it and mark that devices and all >> downstream devices as supporting MSI. > > looks some aggressive. Not really.. we don't really "mark devices as supporting MSI" right now, we generally mark them as not supporting it in certain cases and by default assume they do. So if a quirk doesn't hit on a particular chipset, then we go ahead and enable it. If there's some reason it doesn't work or we don't do something that's needed to make it work, and the driver requests it, we'll use it and it just won't work properly. So it's not really any more aggressive than what we have now.. It seems like we have kind of a random mix of MSI quirks related to MSI mappings: Serverworks HT2000: check if PCIE bridge has MSI mapping enabled, if not disable MSI on PCIE bridge subordinate bus NVIDIA CK804: check if HT MSI mapping enabled either on root bridge or on the PCIE bridge device, if not, disable MSI on PCIE bridge subordinate bus Serverworks HT1000 (and proposed AMD 8132): just switch on HT MSI mapping on bridge device All NVIDIA and ALi (which does appear to overlap with the CK804 one): If bus 0 device 0 function 0 is an HT slave, enable its MSI mapping, otherwise disable it It seems like these could be combined into something like: -For all buses, check if any device on the bus is an HT slave, if so, enable its HT MSI mapping. If not, disable it. (Should we also disable MSI on the bus if we disable it or there's no mapping capability? I would guess we likely should..) -For all PCI bridges other than device 0 function 0 that have HT MSI Mapping capability, check if our bus (or an upstream one?) has a device marked as an HT slave with enabled MSI mapping. If so, then enable the capability, if not then disable it and disable MSI on subordinate bus. Essentially it should make sure that the mappings are enabled all the way up the chain, and if they can't be then we disable MSI. This could be totally wrong though, I don't know HT that well, hopefully someone else does :-) There's the issue that Eric pointed out about the MSI mapping address possibly not being set up on some platforms. However, right now we'll just blindly try and use MSI on such setups anyway, so I don't see it's really worsening the situation. We would also still need the 8131 quirk, since presumably it doesn't have HT MSI Mapping capability so we wouldn't know to disable MSI on it from the above. ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-21 18:59 ` Robert Hancock @ 2009-02-22 12:08 ` Prakash Punnoor 2009-02-22 12:54 ` Eric W. Biederman 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-02-22 12:08 UTC (permalink / raw) To: Robert Hancock Cc: Yinghai Lu, Eric W. Biederman, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Samstag 21 Februar 2009 19:59:42 Robert Hancock wrote: > Yinghai Lu wrote: > > Eric W. Biederman wrote: > >> Yinghai Lu <yinghai@kernel.org> writes: > >>> On Fri, Feb 20, 2009 at 11:50 PM, Eric W. Biederman > >>> > >>> <ebiederm@xmission.com> wrote: > >>>> Robert Hancock <hancockrwd@gmail.com> writes: > >>>>> Is there a reason why we can't just enable the HT MSI mapping for any > >>>>> bridge device that has that PCI capability and is underneath an HT > >>>>> bridge? [try 2] Hi, I just could hunt down one MSI related problem on my nvidia MCP51 board. It seems the nvida msi quirk enables MSI cap for one device too much. Because afterwards the intel_snd_hda driver will hang the kernel when trying to enable msi (and even mess up my text console). I saw this behaviour on every kernel since this quirk was introduced. (At least the intel hda driver doesn't try to enable msi by default). This hack works for me (on 2.6.29-rc5): --- drivers/pci/quirks.c 2009-02-22 12:44:37.156617230 +0100 +++ /usr/src/linux/drivers/pci/quirks.c 2009-02-22 12:45:05.752616467 +0100 @@ -2018,7 +2018,7 @@ u8 flags; if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, - &flags) == 0) { + &flags) == 0 && dev->device != 0x270) { dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); pci_write_config_byte(dev, pos + HT_MSI_FLAGS, Then the intel hda driver works in MSI mode without problems. Would it be possible to include this as a proper quirk? The offending device is this: 00:09.0 RAM memory: nVidia Corporation MCP51 Host Bridge (rev a2) Cheers, Prakash A full lspci listing: 00:00.0 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=0 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Link Control 1: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b- Link Config 1: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 1.0GHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 800MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [e0] HyperTransport: MSI Mapping Enable+ Fixed- Mapping Address Base: 00000000fee00000 00: de 10 f0 02 06 00 b0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 08 e0 e0 01 22 00 11 11 22 20 11 00 50: 23 06 7f 80 03 05 7f 80 00 00 03 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 06 15 05 00 70: 44 44 41 00 d0 09 00 00 11 00 00 00 11 11 88 00 80: 23 99 88 00 1f 00 64 0c 03 00 00 00 7f 00 00 00 90: 70 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 01 01 01 01 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 61 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 08 00 01 a8 00 00 e0 fe 00 00 00 00 00 00 00 10 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.1 RAM memory: nVidia Corporation C51 Memory Controller 0 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- INTx- 00: de 10 fa 02 00 01 20 40 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 10 00 21 21 14 00 11 11 00 00 03 00 00 00 60: 21 88 13 02 de 8f e1 1f 08 72 4e 10 02 3f 00 20 70: 10 32 54 0a 10 00 00 00 a0 00 00 00 34 00 31 01 80: 00 00 00 00 00 00 00 00 00 00 50 3f 90 3f 00 00 90: 00 28 00 fe fd 00 00 00 fc ff ff ff ff 03 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 28 00 fe fd 01 01 a0 01 4f 00 00 80 f9 fd 00 e0: 00 00 c9 fe 00 00 00 00 00 fc ff ff 00 00 00 00 f0: 00 00 00 00 c7 02 32 00 00 00 00 00 00 00 00 00 00:00.2 RAM memory: nVidia Corporation C51 Memory Controller 1 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 fe 02 00 00 20 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 43 10 c0 81 1f 20 1c 20 1f 20 c0 21 00 00 00 00 50: 36 00 38 c9 01 00 00 00 3b 00 3d c9 02 1f 1c 80 60: 02 1f 1c 00 00 00 00 00 02 10 1c a0 02 0c 1c 90 70: 02 10 1c 90 02 14 1c 90 02 0c 1c 80 02 10 1c 80 80: 02 14 1c 80 02 18 1c 80 02 1c 1c 80 01 10 1c 80 90: 02 14 1c 80 11 00 11 00 32 01 00 00 00 00 00 00 a0: c2 00 40 01 10 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 41 23 05 08 c0: fd ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.3 RAM memory: nVidia Corporation C51 Memory Controller 5 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 f8 02 00 00 a0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 00 00 00 00 02 10 1c 80 02 10 1c a0 50: 02 0c 1c 90 02 10 1c 90 02 14 1c 90 02 0c 1c 80 60: 02 10 1c 80 02 14 1c 80 02 18 1c 80 02 1c 1c 80 70: 01 10 1c 80 1f 20 c0 81 00 00 00 00 3e 30 40 c9 80: 01 00 00 00 44 30 46 c9 02 1f 1c 80 70 20 00 40 90: 89 da 01 09 00 00 00 00 11 00 10 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 08 00 00 00 18 1a 00 00 10 00 02 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 0f 01 00 05 00 00 00 00 d0: 00 00 f0 03 00 04 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 60 ea 10 10 18 00 00 20 00 00 00 00 00 00 00 00 00:00.4 RAM memory: nVidia Corporation C51 Memory Controller 4 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 f9 02 06 00 a0 00 a2 00 00 05 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 40: ef dd 7b 2f f7 de 7b 2f f7 de 7b 2f f7 02 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 70: 0a 00 00 00 03 00 00 00 25 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 05 00 00 00 04 00 00 00 90: 03 04 00 00 01 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: ff 7f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.5 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [44] #00 [00fe] Capabilities: [fc] #00 [0000] 00: de 10 ff 02 06 00 b0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 00 00 40: 17 00 00 00 00 fe fe 00 00 fe fe 00 00 fe fe 00 50: 00 fe fe 00 00 fe fe 00 00 fe fe 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.6 RAM memory: nVidia Corporation C51 Memory Controller 3 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 7f 02 02 01 20 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 08 00 00 00 00 00 00 00 00 80 cb fe 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.7 RAM memory: nVidia Corporation C51 Memory Controller 2 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 7e 02 00 00 20 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 43 10 c0 81 11 00 00 00 75 07 00 00 11 00 00 00 50: 75 06 00 00 40 00 60 00 40 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 04 00 00 00 04 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 04 00 00 00 04 b0: ff ff 03 00 10 11 00 00 ac 10 20 00 30 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:05.0 VGA compatible controller: nVidia Corporation C51PV [GeForce 6150] (rev a2) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. A8N-VM CSM Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 0: Memory at fc000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at fb000000 (64-bit, non-prefetchable) [size=16M] [virtual] Expansion ROM at f0000000 [disabled] [size=128K] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Mask- 64bit+ Count=1/1 Enable- Address: 0000000000000000 Data: 0000 Kernel driver in use: nvidia Kernel modules: nvidia 00: de 10 40 02 07 00 b0 00 a2 00 00 03 00 00 00 00 10: 00 00 00 fc 0c 00 00 d0 00 00 00 00 04 00 00 fb 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 cd 81 30: 00 00 00 00 48 00 00 00 00 00 00 00 05 01 00 00 40: 43 10 cd 81 00 00 00 00 01 50 02 00 00 00 00 00 50: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 00 00 00 04 00 00 00 00 00 00 00 01 00 00 00 70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff a0: 00 00 90 01 00 00 00 08 00 00 00 00 ff ff ff ff b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 00:09.0 RAM memory: nVidia Corporation MCP51 Host Bridge (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=9 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b- Link Config 0: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 800MHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 200MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [e0] HyperTransport: MSI Mapping Enable- Fixed- Mapping Address Base: 00000000fee00000 00: de 10 70 02 06 00 b0 00 a2 00 00 05 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 08 e0 e9 01 22 20 00 00 d0 00 00 00 50: 23 05 7f 80 03 00 00 00 00 00 03 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 06 15 05 00 70: 44 44 44 00 d0 09 00 00 11 00 00 00 11 11 55 00 80: 23 55 55 00 fa 00 64 0c 03 00 00 00 7f 00 00 00 90: 70 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 01 01 01 01 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 08 00 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0a.0 ISA bridge: nVidia Corporation MCP51 LPC Bridge (rev a3) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 60 02 0f 00 a0 00 a3 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 00 f0 ff fe fa 3e ff 00 fa 3e ff 00 50: fa 3e ff 00 00 5a 62 02 00 00 00 01 00 00 ff ff 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f9 ff 70: 10 00 ff ff c5 00 00 00 00 00 05 19 00 00 00 03 80: 09 80 00 2d 01 21 00 00 c0 00 00 01 00 00 00 00 90: 00 00 00 00 00 00 00 00 21 47 65 b7 ef cd 00 00 a0: 03 00 10 c1 00 00 00 00 00 00 00 00 00 00 00 00 b0: 90 02 ef 02 00 08 5f 08 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:0a.1 SMBus: nVidia Corporation MCP51 SMBus (rev a3) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 255 Region 4: I/O ports at 4c00 [size=64] Region 5: I/O ports at 4c40 [size=64] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: de 10 64 02 01 00 b0 00 a3 00 05 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 4c 00 00 41 4c 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 01 00 00 40: 43 10 c0 81 01 00 02 c0 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 40 00 00 01 44 00 00 01 48 00 00 00 00 00 00 70: 01 00 00 00 00 00 c8 fe 00 00 fe fe 01 20 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: d4 30 80 01 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 10 10 04 00 00 a0 00 00 80 30 00 00 41 44 44 11 f0: 5a ff 5f bf 00 00 00 c0 10 00 00 00 00 00 00 00 00:0a.2 RAM memory: nVidia Corporation MCP51 Memory Controller 0 (rev a3) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 72 02 00 04 a0 00 a3 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 10 00 00 10 00 00 10 10 50: 10 10 10 10 00 00 00 00 00 00 00 00 00 00 00 00 60: 02 03 00 00 12 00 00 00 02 00 00 00 10 01 12 00 70: 32 33 00 00 03 00 00 00 00 00 00 00 12 01 00 00 80: 10 00 00 00 00 00 00 00 00 00 00 00 30 02 00 00 90: 00 00 00 00 01 20 00 00 01 00 00 00 00 09 00 00 a0: 01 02 00 00 00 10 00 00 05 00 00 00 01 00 00 00 b0: 00 10 00 80 01 00 00 80 00 00 00 00 02 00 00 00 c0: 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0b.0 USB Controller: nVidia Corporation MCP51 USB Controller (rev a3) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 23 Region 0: Memory at fe02f000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ohci_hcd 00: de 10 6d 02 07 00 b0 00 a3 10 03 0c 00 00 80 00 10: 00 f0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 01 03 01 40: 43 10 c0 81 01 00 02 fe 00 00 00 00 00 00 00 00 50: 00 00 00 00 1d 47 40 00 10 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0b.1 USB Controller: nVidia Corporation MCP51 USB Controller (rev a3) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 20 Region 0: Memory at fe02e000 (32-bit, non-prefetchable) [size=256] Capabilities: [44] Debug port: BAR=1 offset=0098 Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ehci_hcd 00: de 10 6e 02 06 00 b0 00 a3 20 03 0c 00 00 80 00 10: 00 e0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 02 03 01 40: 43 10 c0 81 0a 80 98 20 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 20 20 01 00 00 60 18 85 03 3c 0a 01 00 00 00 00 70: 00 00 08 05 00 10 20 80 89 3d b6 22 77 25 64 00 80: 01 00 02 fe 00 00 00 00 00 00 00 00 15 16 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 00 00 00 00 00 08 c0 00 00 00 00 00 00 00 00 b0: 00 11 22 33 00 00 00 00 ff 00 00 00 00 00 00 00 c0: 10 10 2d 0d 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:0d.0 IDE interface: nVidia Corporation MCP51 IDE (rev a1) (prog-if 8a [Master SecP PriP]) Subsystem: Device f043:81c0 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1] Region 4: I/O ports at f400 [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pata_amd 00: de 10 65 02 05 00 b0 00 a1 8a 01 01 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 f4 00 00 00 00 00 00 00 00 00 00 43 f0 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 03 01 40: 43 f0 c0 81 01 00 02 00 00 00 00 00 00 00 00 00 50: 03 f0 01 00 00 00 00 00 99 99 99 20 2a 00 a8 20 60: 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 90 20 21 00 00 02 10 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:0e.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller (rev a1) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 22 Region 0: I/O ports at 09f0 [size=8] Region 1: I/O ports at 0bf0 [size=4] Region 2: I/O ports at 0970 [size=8] Region 3: I/O ports at 0b70 [size=4] Region 4: I/O ports at e000 [size=16] Region 5: Memory at fe02d000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] MSI: Mask- 64bit+ Count=1/4 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [cc] HyperTransport: MSI Mapping Enable+ Fixed+ Kernel driver in use: sata_nv 00: de 10 66 02 07 00 b0 00 a1 85 01 01 00 00 00 00 10: f1 09 00 00 f1 0b 00 00 71 09 00 00 71 0b 00 00 20: 01 e0 00 00 00 d0 02 fe 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01 40: 43 10 c0 81 01 b0 02 00 00 00 00 00 00 00 00 00 50: 07 00 00 00 00 00 00 00 a8 a8 a8 20 6a 00 99 20 60: 00 00 00 c0 51 0c 00 00 00 0f 06 42 00 00 00 00 70: 2c 78 c4 40 01 10 00 00 01 10 00 00 20 00 20 00 80: 00 00 00 c0 00 50 36 22 00 00 08 80 9e f7 2d 3b 90: 00 00 58 1b 00 00 00 00 06 00 06 10 00 00 01 01 a0: 14 10 00 2a 00 00 00 00 00 00 00 00 33 33 00 02 b0: 05 cc 84 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 0a 00 0a 00 08 00 03 a8 d0: 01 00 02 6b 42 00 00 00 00 00 00 00 00 00 00 e0 e0: 01 00 02 6b 42 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00:0f.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller (rev a1) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 21 Region 0: I/O ports at 09e0 [size=8] Region 1: I/O ports at 0be0 [size=4] Region 2: I/O ports at 0960 [size=8] Region 3: I/O ports at 0b60 [size=4] Region 4: I/O ports at cc00 [size=16] Region 5: Memory at fe02c000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] MSI: Mask- 64bit+ Count=1/4 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [cc] HyperTransport: MSI Mapping Enable+ Fixed+ Kernel driver in use: sata_nv 00: de 10 67 02 07 00 b0 00 a1 85 01 01 00 00 00 00 10: e1 09 00 00 e1 0b 00 00 61 09 00 00 61 0b 00 00 20: 01 cc 00 00 00 c0 02 fe 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01 40: 43 10 c0 81 01 b0 02 00 00 00 00 00 00 00 00 00 50: 07 00 00 00 00 00 00 00 a8 a8 a8 20 6a 00 99 20 60: 00 00 00 c0 51 0c 00 00 00 0f 06 42 00 00 00 00 70: 2c 78 c4 40 01 10 00 00 01 10 00 00 20 00 20 00 80: 00 00 00 c0 db 46 60 f0 00 00 c6 2c ad 4c f4 fa 90: 00 00 15 20 00 00 00 00 06 00 06 10 00 00 01 01 a0: 14 10 00 00 00 00 00 00 00 00 00 00 33 33 00 02 b0: 05 cc 84 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 0a 00 0a 00 08 00 03 a8 d0: 01 00 02 6b 42 00 00 00 00 00 00 00 90 00 00 00 e0: 01 00 02 6b 42 00 00 00 00 00 00 00 0e 00 f0 07 f0: 00 00 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00:10.0 PCI bridge: nVidia Corporation MCP51 PCI Bridge (rev a2) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=128 I/O behind bridge: 0000b000-0000bfff Memory behind bridge: fdd00000-fddfffff Prefetchable memory behind bridge: fde00000-fdefffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr+ DiscTmrStat- DiscTmrSERREn- Capabilities: [b8] Subsystem: Gammagraphx, Inc. (or missing ID) Device 0000 Capabilities: [8c] HyperTransport: MSI Mapping Enable+ Fixed- Mapping Address Base: 00000000fee00000 00: de 10 6f 02 07 00 b0 00 a2 01 04 06 00 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 80 b0 b0 80 02 20: d0 fd d0 fd e0 fd e0 fd 00 00 00 00 00 00 00 00 30: 00 00 00 00 b8 00 00 00 00 00 00 00 ff 00 04 02 40: 00 00 03 00 01 00 02 00 07 00 00 00 00 00 44 00 50: 00 00 fe cf 00 00 00 00 ff 1f ff 1f 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 01 a8 90: 00 00 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00 a0: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 ff ff 00 00 0d 8c 00 00 00 00 00 00 c0: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:10.1 Audio device: nVidia Corporation MCP51 High Definition Audio (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81cb Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (500ns min, 1250ns max) Interrupt: pin B routed to IRQ 24 Region 0: Memory at fe024000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Mask+ 64bit+ Count=1/1 Enable+ Address: 00000000fee0300c Data: 4169 Masking: 00000000 Pending: 00000000 Capabilities: [6c] HyperTransport: MSI Mapping Enable+ Fixed+ Kernel driver in use: HDA Intel 00: de 10 6c 02 06 04 b0 00 a2 00 03 04 00 00 80 00 10: 00 40 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 cb 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 02 02 05 40: 43 10 cb 81 01 50 02 c0 00 00 00 00 01 01 0f 00 50: 05 6c 81 01 0c 30 e0 fe 00 00 00 00 69 41 00 00 60: 00 00 00 00 00 00 00 00 0f 00 00 00 08 00 03 a8 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 46 00 29 00 00 00 00 00 00 00:14.0 Bridge: nVidia Corporation MCP51 Ethernet Controller (rev a3) Subsystem: ASUSTeK Computer Inc. Device 816a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (250ns min, 5000ns max) Interrupt: pin A routed to IRQ 23 Region 0: Memory at fe02b000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at c800 [size=8] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable+ DSel=0 DScale=0 PME- Kernel driver in use: forcedeth 00: de 10 69 02 07 00 b0 00 a3 00 80 06 00 00 00 00 10: 00 b0 02 fe 01 c8 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 6a 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 01 14 40: 43 10 6a 81 01 00 02 fe 00 01 00 00 0b 00 00 10 50: 05 6c 84 01 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 0f 00 00 00 08 00 02 a8 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 11 00 00 00 42 01 00 00 00 00 00 00 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Capabilities: [80] HyperTransport: Host or Secondary Interface Command: WarmRst+ DblEnd- DevNum=0 ChainSide- HostHide+ Slave- <EOCErr- DUL- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Revision ID: 1.02 Link Frequency: 1.0GHz Link Error: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC- LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- ExtRS- UCnfE- 00: 22 10 00 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 50: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 60: 00 00 01 00 e4 00 00 00 20 c8 20 0f 0c 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 08 00 01 21 20 00 11 11 22 06 75 80 02 00 00 00 90: 69 01 61 01 00 00 01 00 07 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: 22 10 01 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 03 00 00 00 00 00 2f 01 00 00 00 00 01 00 00 00 50: 00 00 00 00 02 00 00 00 00 00 00 00 03 00 00 00 60: 00 00 00 00 04 00 00 00 00 00 00 00 05 00 00 00 70: 00 00 00 00 06 00 00 00 00 00 00 00 07 00 00 00 80: 03 0a 00 00 00 0b 00 00 00 00 00 00 00 00 00 00 90: 03 00 d0 00 00 ff df 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 03 00 f0 00 00 02 fe 00 b0: 03 00 e0 00 80 1f e0 00 00 00 00 00 00 00 00 00 c0: 13 b0 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 03 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 f0: 01 30 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 01 00 00 00 01 02 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: e0 3d f8 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00 80: 05 00 00 00 00 00 00 00 24 f2 7d 0c 20 13 22 00 90: 10 0c 01 00 5b 80 10 77 24 00 00 80 20 25 2b 00 a0: ef 02 00 0c 00 00 00 00 00 00 00 00 00 00 00 00 b0: a4 1e 87 29 88 00 00 00 b4 35 61 00 ea bf 0f 1f c0: 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 61 90 8c 27 00 14 48 00 48 ac 1a 0b 94 fe 81 99 e0: 7d 99 f5 b3 d9 3e 80 04 03 f2 93 16 fa b7 fb a5 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Capabilities: [f0] Secure device <?> 00: 22 10 03 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 40: 00 01 00 00 40 00 10 0a 00 00 00 00 00 00 00 00 50: 80 e4 a8 85 19 00 00 00 00 00 00 00 00 00 26 08 60: 4a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 11 01 32 51 21 40 70 50 00 2a 00 08 17 21 00 00 80: 00 00 07 23 13 21 13 21 00 00 00 00 00 00 00 00 90: 03 00 00 00 10 00 00 00 00 ac 2f 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 30 35 22 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 01 a7 0d 00 00 00 c0 08 26 26 26 00 e0: 00 00 00 00 20 1a 52 00 19 17 00 00 00 00 00 00 f0: 0f 00 10 00 00 00 00 00 00 00 00 00 b2 0f 04 00 01:05.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. K8N4-E Mainboard Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (500ns min, 1000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 255 Region 0: Memory at fddff000 (32-bit, non-prefetchable) [size=2K] Region 1: Memory at fddf8000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: 4c 10 23 80 06 00 10 02 00 10 00 0c 08 20 00 00 10: 00 f0 df fd 00 80 df fd 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 8b 80 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 01 02 04 40: 00 00 00 00 01 00 02 7e 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 88 00 00 00 f0: 10 00 00 00 82 10 00 00 43 10 8b 80 00 00 01 01 ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-22 12:08 ` Prakash Punnoor @ 2009-02-22 12:54 ` Eric W. Biederman 2009-02-22 15:17 ` Prakash Punnoor 2009-02-22 23:42 ` [PATCH] pci: enable MSI on 8132 Matthew Wilcox 0 siblings, 2 replies; 103+ messages in thread From: Eric W. Biederman @ 2009-02-22 12:54 UTC (permalink / raw) To: Prakash Punnoor Cc: Robert Hancock, Yinghai Lu, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Prakesh could you try this patch instead? I think the problem is simply that the MCP55 ht mapping capability requires an address to be programed into it and it wasn't in your case. It should not hurt to enable one msi ht mapping capability too many. diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index baad093..f7a0370 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2017,10 +2017,19 @@ static void __devinit ht_enable_msi_mapping(struct pci_dev *dev) while (pos && ttl--) { u8 flags; - if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, - &flags) == 0) { + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, &flags)) + return; + + if (!(flags & HT_MSI_FLAGS_ENABLE)) { dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); + if (!(flags & HT_MSI_FLAGS_FIXED)) { + pci_write_config_dword(dev, pos + HT_MSI_ADDR_LO, + (HT_MSI_FIXED_ADDR & HT_MSI_FIXED_ADDR)); + pci_write_config_dword(dev, pos + HT_MSI_ADDR_HI, + (HT_MSI_FIXED_ADDR >> 32)); + } + pci_write_config_byte(dev, pos + HT_MSI_FLAGS, flags | HT_MSI_FLAGS_ENABLE); } ^ permalink raw reply related [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-22 12:54 ` Eric W. Biederman @ 2009-02-22 15:17 ` Prakash Punnoor 2009-02-22 21:45 ` Yinghai Lu 2009-02-23 6:18 ` Yinghai Lu 2009-02-22 23:42 ` [PATCH] pci: enable MSI on 8132 Matthew Wilcox 1 sibling, 2 replies; 103+ messages in thread From: Prakash Punnoor @ 2009-02-22 15:17 UTC (permalink / raw) To: Eric W. Biederman Cc: Robert Hancock, Yinghai Lu, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Sonntag 22 Februar 2009 13:54:54 Eric W. Biederman wrote: > Prakesh could you try this patch instead? > > I think the problem is simply that the MCP55 ht mapping capability > requires an address to be programed into it and it wasn't in your > case. > > It should not hurt to enable one msi ht mapping capability too many. I tried it, but unfortunately doesn't help. I run into the same issue. > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index baad093..f7a0370 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -2017,10 +2017,19 @@ static void __devinit ht_enable_msi_mapping(struct > pci_dev *dev) while (pos && ttl--) { > u8 flags; > > - if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, > - &flags) == 0) { > + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, &flags)) > + return; > + > + if (!(flags & HT_MSI_FLAGS_ENABLE)) { > dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); > > + if (!(flags & HT_MSI_FLAGS_FIXED)) { > + pci_write_config_dword(dev, pos + HT_MSI_ADDR_LO, > + (HT_MSI_FIXED_ADDR & HT_MSI_FIXED_ADDR)); > + pci_write_config_dword(dev, pos + HT_MSI_ADDR_HI, > + (HT_MSI_FIXED_ADDR >> 32)); > + } > + > pci_write_config_byte(dev, pos + HT_MSI_FLAGS, > flags | HT_MSI_FLAGS_ENABLE); > } > -- > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-22 15:17 ` Prakash Punnoor @ 2009-02-22 21:45 ` Yinghai Lu 2009-02-22 22:07 ` Yinghai Lu 2009-02-23 6:18 ` Yinghai Lu 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-22 21:45 UTC (permalink / raw) To: Prakash Punnoor Cc: Eric W. Biederman, Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci your system have one HT chain c51->mcp51 BIOS enabled HT-MSI on c51, and hda ... it seems pci quirks should not be used enable HT MSI on mcp51 again... YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-22 21:45 ` Yinghai Lu @ 2009-02-22 22:07 ` Yinghai Lu 0 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-22 22:07 UTC (permalink / raw) To: Prakash Punnoor Cc: Eric W. Biederman, Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Yinghai Lu wrote: > your system have one HT chain c51->mcp51 > > BIOS enabled HT-MSI on c51, and hda ... > it seems pci quirks should not be used enable HT MSI on mcp51 again... > another explanation: 00:09.0 RAM memory: nVidia Corporation MCP51 Host Bridge (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=9 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b- Link Config 0: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 800MHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 200MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [e0] HyperTransport: MSI Mapping Enable- Fixed- Mapping Address Base: 00000000fee00000 00:10.1 Audio device: nVidia Corporation MCP51 High Definition Audio (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81cb Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (500ns min, 1250ns max) Interrupt: pin B routed to IRQ 24 Region 0: Memory at fe024000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Mask+ 64bit+ Count=1/1 Enable+ Address: 00000000fee0300c Data: 4169 Masking: 00000000 Pending: 00000000 Capabilities: [6c] HyperTransport: MSI Mapping Enable+ Fixed+ Kernel driver in use: HDA Intel nv_msi_ht_cap_quirk need some rework static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) { struct pci_dev *host_bridge; int pos, ttl = 48; /* * HT MSI mapping should be disabled on devices that are below * a non-Hypertransport host bridge. Locate the host bridge... */ host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); if (host_bridge == NULL) { dev_warn(&dev->dev, "nv_msi_ht_cap_quirk didn't locate host bridge\n"); return; } pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); if (pos != 0) { /* Host bridge is to HT */ ht_enable_msi_mapping(dev); return; } in c51-mcp51 case, for 00:10.1, host bridge should be 00:09.0 (mcp51) instead of 00:00.0 (c51) and ht msi for 00:10.1 is already enabled, dev 00:09.0 should not be enabled HT msi again. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-22 15:17 ` Prakash Punnoor 2009-02-22 21:45 ` Yinghai Lu @ 2009-02-23 6:18 ` Yinghai Lu 2009-02-23 18:21 ` Prakash Punnoor 2009-02-23 19:51 ` [PATCH] pci: don't enable too many HT MSI mapping Yinghai Lu 1 sibling, 2 replies; 103+ messages in thread From: Yinghai Lu @ 2009-02-23 6:18 UTC (permalink / raw) To: Prakash Punnoor Cc: Eric W. Biederman, Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci please try, you may need Eric's patch too. [PATCH] pci: don't enable too much HT MSI mapping Impact: fix bug Prakesh reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only enable ht_msi and try to avoid to enable ht_msi both. Reported-by: Prakesh Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 115 ++++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 100 insertions(+), 15 deletions(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -2050,11 +2050,101 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NV PCI_DEVICE_ID_NVIDIA_NVENET_15, nvenet_msi_disable); -static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) { struct pci_dev *host_bridge; + int pos; + int i, dev_no; + int found = 0; + + dev_no = dev->devfn >> 3; + for (i = dev_no; i >= 0; i--) { + host_bridge = pci_get_slot(dev->bus, PCI_DEVFN(i, 0)); + if (!host_bridge) + continue; + + pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); + if (pos != 0) { + found = 1; + break; + } + pci_dev_put(host_bridge); + } + + if (!found) + return; + + /* root did that ! */ + if (msi_ht_cap_enabled(host_bridge)) + goto out; + + ht_enable_msi_mapping(dev); + +out: + pci_dev_put(host_bridge); +} + +static void __devinit ht_disable_msi_mapping(struct pci_dev *dev) +{ int pos, ttl = 48; + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); + + pci_write_config_byte(dev, pos + HT_MSI_FLAGS, + flags & ~HT_MSI_FLAGS_ENABLE); + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } +} + +static int __devinit ht_check_msi_mapping(struct pci_dev *dev) +{ + int pos, ttl = 48; + int found = 0; + + /* check if there is HT MSI cap or enabled on this device */ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (found < 1) + found = 1; + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + if (flags & HT_MSI_FLAGS_ENABLE) { + if (found < 2) { + found = 2; + break; + } + } + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } + + return found; +} + +static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +{ + struct pci_dev *host_bridge; + int pos; + int found; + + /* check if there is HT MSI cap or enabled on this device */ + found = ht_check_msi_mapping(dev); + + /* no HT MSI CAP */ + if (found == 0) + return; + /* * HT MSI mapping should be disabled on devices that are below * a non-Hypertransport host bridge. Locate the host bridge... @@ -2069,24 +2159,19 @@ static void __devinit nv_msi_ht_cap_quir pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); if (pos != 0) { /* Host bridge is to HT */ - ht_enable_msi_mapping(dev); + if (found == 1) { + /* it is not enabled, try to enable it */ + nv_ht_enable_msi_mapping(dev); + } return; } - /* Host bridge is not to HT, disable HT MSI mapping on this device */ - pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); - while (pos && ttl--) { - u8 flags; + /* HT MSI is not enabled */ + if (found == 1) + return; - if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, - &flags) == 0) { - dev_info(&dev->dev, "Disabling HT MSI mapping"); - pci_write_config_byte(dev, pos + HT_MSI_FLAGS, - flags & ~HT_MSI_FLAGS_ENABLE); - } - pos = pci_find_next_ht_capability(dev, pos, - HT_CAPTYPE_MSI_MAPPING); - } + /* Host bridge is not to HT, disable HT MSI mapping on this device */ + ht_disable_msi_mapping(dev); } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-23 6:18 ` Yinghai Lu @ 2009-02-23 18:21 ` Prakash Punnoor 2009-02-23 18:50 ` Yinghai Lu 2009-02-23 19:51 ` [PATCH] pci: don't enable too many HT MSI mapping Yinghai Lu 1 sibling, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-02-23 18:21 UTC (permalink / raw) To: Yinghai Lu Cc: Eric W. Biederman, Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Montag 23 Februar 2009 07:18:34 Yinghai Lu wrote: > please try, you may need Eric's patch too. > > [PATCH] pci: don't enable too much HT MSI mapping > > Impact: fix bug > > Prakesh reported that his c51-mcp51 system ondie sound card doesn't work > MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with > sound card. > > this patch rework the nv_msi_ht_cap_quirk() > and will only enable ht_msi and try to avoid to enable ht_msi both. > > Reported-by: Prakesh Punnoor <prakash@punnoor.de> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> Hi, I can confirm that the patch works nicely with 2.6.29-rc6. (BTW, my name is written with two 'a's...) Cheers, Prakash [snipped patch] ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-23 18:21 ` Prakash Punnoor @ 2009-02-23 18:50 ` Yinghai Lu 2009-02-23 19:01 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-23 18:50 UTC (permalink / raw) To: Prakash Punnoor Cc: Eric W. Biederman, Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci Prakash Punnoor wrote: > On Montag 23 Februar 2009 07:18:34 Yinghai Lu wrote: >> please try, you may need Eric's patch too. >> >> [PATCH] pci: don't enable too much HT MSI mapping >> >> Impact: fix bug >> >> Prakesh reported that his c51-mcp51 system ondie sound card doesn't work >> MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with >> sound card. >> >> this patch rework the nv_msi_ht_cap_quirk() >> and will only enable ht_msi and try to avoid to enable ht_msi both. >> >> Reported-by: Prakesh Punnoor <prakash@punnoor.de> >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > Hi, I can confirm that the patch works nicely with 2.6.29-rc6. (BTW, my name > is written with two 'a's...) good, will resend to Jesse. what are your correct name with two 'a's? YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-23 18:50 ` Yinghai Lu @ 2009-02-23 19:01 ` Prakash Punnoor 0 siblings, 0 replies; 103+ messages in thread From: Prakash Punnoor @ 2009-02-23 19:01 UTC (permalink / raw) To: Yinghai Lu; +Cc: Eric W. Biederman, linux-kernel On Montag 23 Februar 2009 19:50:33 Yinghai Lu wrote: > Prakash Punnoor wrote: > > On Montag 23 Februar 2009 07:18:34 Yinghai Lu wrote: > >> please try, you may need Eric's patch too. > >> > >> [PATCH] pci: don't enable too much HT MSI mapping > >> > >> Impact: fix bug > >> > >> Prakesh reported that his c51-mcp51 system ondie sound card doesn't work > >> MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with > >> sound card. > >> > >> this patch rework the nv_msi_ht_cap_quirk() > >> and will only enable ht_msi and try to avoid to enable ht_msi both. > >> > >> Reported-by: Prakesh Punnoor <prakash@punnoor.de> > >> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > > > Hi, I can confirm that the patch works nicely with 2.6.29-rc6. (BTW, my > > name is written with two 'a's...) > > good, will resend to Jesse. > > > what are your correct name with two 'a's? Well, as in my sender field/email: Prakash (not Prakesh) ^ permalink raw reply [flat|nested] 103+ messages in thread
* [PATCH] pci: don't enable too many HT MSI mapping 2009-02-23 6:18 ` Yinghai Lu 2009-02-23 18:21 ` Prakash Punnoor @ 2009-02-23 19:51 ` Yinghai Lu 2009-02-24 17:37 ` Jesse Barnes 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-23 19:51 UTC (permalink / raw) To: Jesse Barnes, Andrew Morton, Ingo Molnar Cc: Prakash Punnoor, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci Impact: fix bug Prakash reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only enable ht_msi on own root device and try to avoid to enable ht_msi on device following that root dev Reported-by: Prakash Punnoor <prakash@punnoor.de> Tested-by: Prakash Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 115 ++++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 100 insertions(+), 15 deletions(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -2050,11 +2050,101 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NV PCI_DEVICE_ID_NVIDIA_NVENET_15, nvenet_msi_disable); -static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) { struct pci_dev *host_bridge; + int pos; + int i, dev_no; + int found = 0; + + dev_no = dev->devfn >> 3; + for (i = dev_no; i >= 0; i--) { + host_bridge = pci_get_slot(dev->bus, PCI_DEVFN(i, 0)); + if (!host_bridge) + continue; + + pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); + if (pos != 0) { + found = 1; + break; + } + pci_dev_put(host_bridge); + } + + if (!found) + return; + + /* root did that ! */ + if (msi_ht_cap_enabled(host_bridge)) + goto out; + + ht_enable_msi_mapping(dev); + +out: + pci_dev_put(host_bridge); +} + +static void __devinit ht_disable_msi_mapping(struct pci_dev *dev) +{ int pos, ttl = 48; + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); + + pci_write_config_byte(dev, pos + HT_MSI_FLAGS, + flags & ~HT_MSI_FLAGS_ENABLE); + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } +} + +static int __devinit ht_check_msi_mapping(struct pci_dev *dev) +{ + int pos, ttl = 48; + int found = 0; + + /* check if there is HT MSI cap or enabled on this device */ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (found < 1) + found = 1; + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + if (flags & HT_MSI_FLAGS_ENABLE) { + if (found < 2) { + found = 2; + break; + } + } + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } + + return found; +} + +static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +{ + struct pci_dev *host_bridge; + int pos; + int found; + + /* check if there is HT MSI cap or enabled on this device */ + found = ht_check_msi_mapping(dev); + + /* no HT MSI CAP */ + if (found == 0) + return; + /* * HT MSI mapping should be disabled on devices that are below * a non-Hypertransport host bridge. Locate the host bridge... @@ -2069,24 +2159,19 @@ static void __devinit nv_msi_ht_cap_quir pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); if (pos != 0) { /* Host bridge is to HT */ - ht_enable_msi_mapping(dev); + if (found == 1) { + /* it is not enabled, try to enable it */ + nv_ht_enable_msi_mapping(dev); + } return; } - /* Host bridge is not to HT, disable HT MSI mapping on this device */ - pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); - while (pos && ttl--) { - u8 flags; + /* HT MSI is not enabled */ + if (found == 1) + return; - if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, - &flags) == 0) { - dev_info(&dev->dev, "Disabling HT MSI mapping"); - pci_write_config_byte(dev, pos + HT_MSI_FLAGS, - flags & ~HT_MSI_FLAGS_ENABLE); - } - pos = pci_find_next_ht_capability(dev, pos, - HT_CAPTYPE_MSI_MAPPING); - } + /* Host bridge is not to HT, disable HT MSI mapping on this device */ + ht_disable_msi_mapping(dev); } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-02-23 19:51 ` [PATCH] pci: don't enable too many HT MSI mapping Yinghai Lu @ 2009-02-24 17:37 ` Jesse Barnes 2009-02-27 6:52 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Jesse Barnes @ 2009-02-24 17:37 UTC (permalink / raw) To: Yinghai Lu Cc: Andrew Morton, Ingo Molnar, Prakash Punnoor, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci On Monday, February 23, 2009 11:51:59 am Yinghai Lu wrote: > Impact: fix bug > > Prakash reported that his c51-mcp51 system ondie sound card doesn't work > MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with > sound card. > > this patch rework the nv_msi_ht_cap_quirk() > and will only enable ht_msi on own root device and try to avoid to enable > ht_msi on device following that root dev > > Reported-by: Prakash Punnoor <prakash@punnoor.de> > Tested-by: Prakash Punnoor <prakash@punnoor.de> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> Thanks Yinghai & Prakash, applied this fix to my for-linus branch. -- Jesse Barnes, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-02-24 17:37 ` Jesse Barnes @ 2009-02-27 6:52 ` Prakash Punnoor 2009-02-27 20:59 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-02-27 6:52 UTC (permalink / raw) To: Jesse Barnes Cc: Yinghai Lu, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci On Dienstag 24 Februar 2009 18:37:35 Jesse Barnes wrote: > On Monday, February 23, 2009 11:51:59 am Yinghai Lu wrote: > > Impact: fix bug > > > > Prakash reported that his c51-mcp51 system ondie sound card doesn't work > > MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with > > sound card. > > > > this patch rework the nv_msi_ht_cap_quirk() > > and will only enable ht_msi on own root device and try to avoid to enable > > ht_msi on device following that root dev > > > > Reported-by: Prakash Punnoor <prakash@punnoor.de> > > Tested-by: Prakash Punnoor <prakash@punnoor.de> > > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > Thanks Yinghai & Prakash, applied this fix to my for-linus branch. I am very sorry, but I made a mistake testing this patch. I messed up my kernels and got a false positive and only noticed this now. The patch does NOT work and even makes things worse: dmesg|grep HT pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:09.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found enabled HT MSI Mapping pci 0000:00:09.0: Found enabled HT MSI Mapping pci 0000:00:09.0: Found enabled HT MSI Mapping pci 0000:00:09.0: Found enabled HT MSI Mapping This is exactly the device which shouldn't be MSI enabled for me. On the other hand, it doesn't enable the needed devices anymore. So please drop this patch. Regards, Prakash ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-02-27 6:52 ` Prakash Punnoor @ 2009-02-27 20:59 ` Yinghai Lu 2009-02-28 8:25 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-27 20:59 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci Prakash Punnoor wrote: > On Dienstag 24 Februar 2009 18:37:35 Jesse Barnes wrote: >> On Monday, February 23, 2009 11:51:59 am Yinghai Lu wrote: >>> Impact: fix bug >>> >>> Prakash reported that his c51-mcp51 system ondie sound card doesn't work >>> MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with >>> sound card. >>> >>> this patch rework the nv_msi_ht_cap_quirk() >>> and will only enable ht_msi on own root device and try to avoid to enable >>> ht_msi on device following that root dev >>> >>> Reported-by: Prakash Punnoor <prakash@punnoor.de> >>> Tested-by: Prakash Punnoor <prakash@punnoor.de> >>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >> Thanks Yinghai & Prakash, applied this fix to my for-linus branch. > > I am very sorry, but I made a mistake testing this patch. I messed up my > kernels and got a false positive and only noticed this now. The patch does NOT > work and even makes things worse: > > dmesg|grep HT > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:09.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found enabled HT MSI Mapping > pci 0000:00:09.0: Found enabled HT MSI Mapping > pci 0000:00:09.0: Found enabled HT MSI Mapping > pci 0000:00:09.0: Found enabled HT MSI Mapping > > This is exactly the device which shouldn't be MSI enabled for me. On the other > hand, it doesn't enable the needed devices anymore. > please check this one, please power off the system before load the kernel with new patch. [PATCH] pci: don't enable too much HT MSI mapping -v2 Impact: fix bug Prakash reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only try to avoid to enable ht_msi on device following that root dev, and don't touch that root dev Reported-by: Prakash Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 119 ++++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 104 insertions(+), 15 deletions(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -2050,10 +2050,104 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NV PCI_DEVICE_ID_NVIDIA_NVENET_15, nvenet_msi_disable); -static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) { struct pci_dev *host_bridge; + int pos; + int i, dev_no; + int found = 0; + + dev_no = dev->devfn >> 3; + for (i = dev_no; i >= 0; i--) { + host_bridge = pci_get_slot(dev->bus, PCI_DEVFN(i, 0)); + if (!host_bridge) + continue; + + pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); + if (pos != 0) { + found = 1; + break; + } + pci_dev_put(host_bridge); + } + + if (!found) + return; + + /* don't enable host_bridge directly here */ + if (host_bridge == dev) + goto out; + + /* root did that ! */ + if (msi_ht_cap_enabled(host_bridge)) + goto out; + + ht_enable_msi_mapping(dev); + +out: + pci_dev_put(host_bridge); +} + +static void __devinit ht_disable_msi_mapping(struct pci_dev *dev) +{ + int pos, ttl = 48; + + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); + + pci_write_config_byte(dev, pos + HT_MSI_FLAGS, + flags & ~HT_MSI_FLAGS_ENABLE); + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } +} + +static int __devinit ht_check_msi_mapping(struct pci_dev *dev) +{ int pos, ttl = 48; + int found = 0; + + /* check if there is HT MSI cap or enabled on this device */ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (found < 1) + found = 1; + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + if (flags & HT_MSI_FLAGS_ENABLE) { + if (found < 2) { + found = 2; + break; + } + } + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } + + return found; +} + +static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +{ + struct pci_dev *host_bridge; + int pos; + int found; + + /* check if there is HT MSI cap or enabled on this device */ + found = ht_check_msi_mapping(dev); + + /* no HT MSI CAP */ + if (found == 0) + return; /* * HT MSI mapping should be disabled on devices that are below @@ -2069,24 +2163,19 @@ static void __devinit nv_msi_ht_cap_quir pos = pci_find_ht_capability(host_bridge, HT_CAPTYPE_SLAVE); if (pos != 0) { /* Host bridge is to HT */ - ht_enable_msi_mapping(dev); + if (found == 1) { + /* it is not enabled, try to enable it */ + nv_ht_enable_msi_mapping(dev); + } return; } - /* Host bridge is not to HT, disable HT MSI mapping on this device */ - pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); - while (pos && ttl--) { - u8 flags; + /* HT MSI is not enabled */ + if (found == 1) + return; - if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, - &flags) == 0) { - dev_info(&dev->dev, "Disabling HT MSI mapping"); - pci_write_config_byte(dev, pos + HT_MSI_FLAGS, - flags & ~HT_MSI_FLAGS_ENABLE); - } - pos = pci_find_next_ht_capability(dev, pos, - HT_CAPTYPE_MSI_MAPPING); - } + /* Host bridge is not to HT, disable HT MSI mapping on this device */ + ht_disable_msi_mapping(dev); } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-02-27 20:59 ` Yinghai Lu @ 2009-02-28 8:25 ` Prakash Punnoor 2009-02-28 20:57 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-02-28 8:25 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci On Freitag 27 Februar 2009 21:59:08 Yinghai Lu wrote: > Prakash Punnoor wrote: > > On Dienstag 24 Februar 2009 18:37:35 Jesse Barnes wrote: > >> On Monday, February 23, 2009 11:51:59 am Yinghai Lu wrote: > >>> Impact: fix bug > >>> > >>> Prakash reported that his c51-mcp51 system ondie sound card doesn't > >>> work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well > >>> with sound card. > >>> > >>> this patch rework the nv_msi_ht_cap_quirk() > >>> and will only enable ht_msi on own root device and try to avoid to > >>> enable ht_msi on device following that root dev > >>> > >>> Reported-by: Prakash Punnoor <prakash@punnoor.de> > >>> Tested-by: Prakash Punnoor <prakash@punnoor.de> > >>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > >> > >> Thanks Yinghai & Prakash, applied this fix to my for-linus branch. > > > > I am very sorry, but I made a mistake testing this patch. I messed up my > > kernels and got a false positive and only noticed this now. The patch > > does NOT work and even makes things worse: > > > > dmesg|grep HT > > pci 0000:00:09.0: Found disabled HT MSI Mapping > > pci 0000:00:09.0: Enabling HT MSI Mapping > > pci 0000:00:09.0: Found enabled HT MSI Mapping > > pci 0000:00:09.0: Found enabled HT MSI Mapping > > pci 0000:00:09.0: Found enabled HT MSI Mapping > > pci 0000:00:09.0: Found enabled HT MSI Mapping > > > > This is exactly the device which shouldn't be MSI enabled for me. On the > > other hand, it doesn't enable the needed devices anymore. > > please check this one, please power off the system before load the kernel > with new patch. Well, the problem now is that MSI doesn't get enabled on the needed host bridge 00.0 (device 10de:02f0), so MSI doesn't work at all on my system (but also doesn't hang my system.) I have no idea how to differentiate the 00.0 device from the "forbidden" 09.0 (device 10de:0270) on my system. Perhaps a blacklist is really the best? The original patch by NVidia had a white list, btw, see also here: http://kerneltrap.org/mailarchive/linux-kernel/2007/11/25/443612/thread The output of your current patch: pci 0000:00:05.0: Boot video device pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0e.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0f.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.1: Enabling HT MSI Mapping So, ok, MSI gets enabled on the devices as such (good), not enabled on 09.0 (good), but also not on the needed host bridge 00.0 (bad). BTW, I noticed a typo in the patch. In ht_disable_msi_mapping you want the text to be "Disabling"... instead of + dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); And a minor simplification in ht_check_msi_mapping would be instead of + if (flags & HT_MSI_FLAGS_ENABLE) { + if (found < 2) { + found = 2; + break; + } + } just + if (flags & HT_MSI_FLAGS_ENABLE) { + found = 2; + break; + } as it is the only place where found is set to something higher than 1 and then the function is exited anyway. Or make the return paths clearer by this change from + int pos, ttl = 48; + int found = 0; + + /* check if there is HT MSI cap or enabled on this device */ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (found < 1) + found = 1; + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + if (flags & HT_MSI_FLAGS_ENABLE) { + if (found < 2) { + found = 2; + break; + } + } + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } + + return found; to + int pos, ttl = 48; + + /* check if there is HT MSI cap or enabled on this device */ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + if (!pos) + return 0; + + do { + u8 flags; + + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + if (flags & HT_MSI_FLAGS_ENABLE) + return 2; + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } while (pos && --ttl); + + return 1; +} Then at least I would have to think less, under which conditions found takes the values 0, 1 or 2. Regards, Prakash ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-02-28 8:25 ` Prakash Punnoor @ 2009-02-28 20:57 ` Yinghai Lu 2009-02-28 22:43 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-28 20:57 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci On Sat, Feb 28, 2009 at 12:25 AM, Prakash Punnoor <prakash@punnoor.de> wrote: > On Freitag 27 Februar 2009 21:59:08 Yinghai Lu wrote: >> Prakash Punnoor wrote: >> > On Dienstag 24 Februar 2009 18:37:35 Jesse Barnes wrote: >> >> On Monday, February 23, 2009 11:51:59 am Yinghai Lu wrote: >> >>> Impact: fix bug >> >>> >> >>> Prakash reported that his c51-mcp51 system ondie sound card doesn't >> >>> work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well >> >>> with sound card. >> >>> >> >>> this patch rework the nv_msi_ht_cap_quirk() >> >>> and will only enable ht_msi on own root device and try to avoid to >> >>> enable ht_msi on device following that root dev >> >>> >> >>> Reported-by: Prakash Punnoor <prakash@punnoor.de> >> >>> Tested-by: Prakash Punnoor <prakash@punnoor.de> >> >>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >> >> >> >> Thanks Yinghai & Prakash, applied this fix to my for-linus branch. >> > >> > I am very sorry, but I made a mistake testing this patch. I messed up my >> > kernels and got a false positive and only noticed this now. The patch >> > does NOT work and even makes things worse: >> > >> > dmesg|grep HT >> > pci 0000:00:09.0: Found disabled HT MSI Mapping >> > pci 0000:00:09.0: Enabling HT MSI Mapping >> > pci 0000:00:09.0: Found enabled HT MSI Mapping >> > pci 0000:00:09.0: Found enabled HT MSI Mapping >> > pci 0000:00:09.0: Found enabled HT MSI Mapping >> > pci 0000:00:09.0: Found enabled HT MSI Mapping >> > >> > This is exactly the device which shouldn't be MSI enabled for me. On the >> > other hand, it doesn't enable the needed devices anymore. >> >> please check this one, please power off the system before load the kernel >> with new patch. > > Well, the problem now is that MSI doesn't get enabled on the needed host > bridge 00.0 (device 10de:02f0), so MSI doesn't work at all on my system (but > also doesn't hang my system.) I have no idea how to differentiate the 00.0 > device from the "forbidden" 09.0 (device 10de:0270) on my system. Perhaps a > blacklist is really the best? The original patch by NVidia had a white list, > btw, see also here: > http://kerneltrap.org/mailarchive/linux-kernel/2007/11/25/443612/thread > > The output of your current patch: > pci 0000:00:05.0: Boot video device > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0e.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0f.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.1: Enabling HT MSI Mapping > > So, ok, MSI gets enabled on the devices as such (good), not enabled on 09.0 > (good), but also not on the needed host bridge 00.0 (bad). can you post whole bootlog and lspci -vvxxx and lspci -tv and cat /proc/interrupts? YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-02-28 20:57 ` Yinghai Lu @ 2009-02-28 22:43 ` Yinghai Lu 2009-03-01 7:50 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-02-28 22:43 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci [-- Attachment #1: Type: text/plain, Size: 123 bytes --] please check this one v1 is pulled by Linus from Jesse's pci tree already, and v3 is needed to be applied on top of v1 YH [-- Attachment #2: nv_ht_msi_2.patch --] [-- Type: text/x-diff, Size: 2951 bytes --] [PATCH] pci: don't enable too much HT MSI mapping -v3 Impact: fix bug Prakash reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only try to avoid to enable ht_msi on device following that root dev, and don't touch that root dev v3: will enable c51... Reported-by: Prakash Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -2077,6 +2077,10 @@ static void __devinit nv_ht_enable_msi_m if (!found) return; + /* don't enable host_bridge directly here */ + if (host_bridge == dev) + goto out; + /* root did that ! */ if (msi_ht_cap_enabled(host_bridge)) goto out; @@ -2097,7 +2101,7 @@ static void __devinit ht_disable_msi_map if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, &flags) == 0) { - dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); + dev_info(&dev->dev, "Disabling HT MSI Mapping\n"); pci_write_config_byte(dev, pos + HT_MSI_FLAGS, flags & ~HT_MSI_FLAGS_ENABLE); @@ -2135,7 +2139,7 @@ static int __devinit ht_check_msi_mappin return found; } -static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +static void __devinit __nv_msi_ht_cap_quirk(struct pci_dev *dev, int all) { struct pci_dev *host_bridge; int pos; @@ -2164,7 +2168,10 @@ static void __devinit nv_msi_ht_cap_quir /* Host bridge is to HT */ if (found == 1) { /* it is not enabled, try to enable it */ - nv_ht_enable_msi_mapping(dev); + if (all) + ht_enable_msi_mapping(dev); + else + nv_ht_enable_msi_mapping(dev); } return; } @@ -2176,8 +2183,22 @@ static void __devinit nv_msi_ht_cap_quir /* Host bridge is not to HT, disable HT MSI mapping on this device */ ht_disable_msi_mapping(dev); } -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); + +static void __devinit nv_msi_ht_cap_quirk_all(struct pci_dev *dev) +{ + return __nv_msi_ht_cap_quirk(dev, 1); +} + +static void __devinit nv_msi_ht_cap_quirk_leaf(struct pci_dev *dev) +{ + return __nv_msi_ht_cap_quirk(dev, 0); +} + +/* werid?, c51/mcp51 need c51 ht msi to be enable to make mcp51 ht msi working */ +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f0, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); + +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); static void __devinit quirk_msi_intx_disable_bug(struct pci_dev *dev) { ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-02-28 22:43 ` Yinghai Lu @ 2009-03-01 7:50 ` Prakash Punnoor 2009-03-01 7:58 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-03-01 7:50 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci On Samstag 28 Februar 2009 23:43:51 Yinghai Lu wrote: > please check this one > v1 is pulled by Linus from Jesse's pci tree already, and v3 is needed > to be applied on top of v1 > > YH Hi, yes, this works nicely now. Thanks. (Are you still interested in all the infos you requested in your last email?) But have you looked at the original patch? It might be that your current one is not enough to cover all models. In the original NVidia one following bridges were enabled: +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC0 0x02F0 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC1 0x02F1 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC2 0x02F2 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC3 0x02F3 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC4 0x02F4 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC5 0x02F5 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC6 0x02F6 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_C51_MEMC7 0x02F7 +#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_MEMC 0x0369 As you can see, the one on my board is the MEMC0. I don't know which revisions have the other ones. The MEMC case had a special bahaviour in the original patch also: + bridge_dev = NULL; + while ((bridge_dev = pci_get_device(PCI_VENDOR_ID_NVIDIA, + PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_MEMC, bridge_dev)) + != NULL) { + pci_enable_msi_ht_cap(bridge_dev); + } Cheers, Prakash ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-01 7:50 ` Prakash Punnoor @ 2009-03-01 7:58 ` Prakash Punnoor 2009-03-01 8:12 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-03-01 7:58 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci [PATCH] Enable HT MSI mapping on all known needed NVidia host bridges v3 of Yinghai Lu's work only enables HT MSI mapping for one specific host bridge. Do this also for all known needed ones as specified by NVidia's original patch. Signed-off-by: Prakash Punnoor <prakash@punnoor.de> --- drivers/pci/quirks.c.current 2009-03-01 08:42:31.321660493 +0100 +++ drivers/pci/quirks.c 2009-03-01 08:47:47.267657376 +0100 @@ -2189,8 +2189,20 @@ return __nv_msi_ht_cap_quirk(dev, 0); } -/* werid?, c51/mcp51 need c51 ht msi to be enable to make mcp51 ht msi working */ +/* Enable HT MSI mapping on following host brigdes */ +/* C51 host bridges */ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f0, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f1, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f2, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f3, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f4, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f5, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f6, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f7, nv_msi_ht_cap_quirk_all); +/* MCP55 host bridge */ +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0369, nv_msi_ht_cap_quirk_all); + +/* Enable MSI mapping on all regular devices */ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-01 7:58 ` Prakash Punnoor @ 2009-03-01 8:12 ` Yinghai Lu 2009-03-01 8:29 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-03-01 8:12 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci Prakash Punnoor wrote: > [PATCH] Enable HT MSI mapping on all known needed NVidia host bridges > > v3 of Yinghai Lu's work only enables HT MSI mapping for one specific host bridge. > Do this also for all known needed ones as specified by NVidia's original patch. > > Signed-off-by: Prakash Punnoor <prakash@punnoor.de> > > --- drivers/pci/quirks.c.current 2009-03-01 08:42:31.321660493 +0100 > +++ drivers/pci/quirks.c 2009-03-01 08:47:47.267657376 +0100 > @@ -2189,8 +2189,20 @@ > return __nv_msi_ht_cap_quirk(dev, 0); > } > > -/* werid?, c51/mcp51 need c51 ht msi to be enable to make mcp51 ht msi working */ > +/* Enable HT MSI mapping on following host brigdes */ > +/* C51 host bridges */ > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f0, nv_msi_ht_cap_quirk_all); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f1, nv_msi_ht_cap_quirk_all); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f2, nv_msi_ht_cap_quirk_all); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f3, nv_msi_ht_cap_quirk_all); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f4, nv_msi_ht_cap_quirk_all); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f5, nv_msi_ht_cap_quirk_all); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f6, nv_msi_ht_cap_quirk_all); > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f7, nv_msi_ht_cap_quirk_all); > +/* MCP55 host bridge */ > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0369, nv_msi_ht_cap_quirk_all); we may not need this one. mcp55 is some kind of mcp51 equivent, so we dont't HT MSI for 0x0369 YH > + > +/* Enable MSI mapping on all regular devices */ > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); > > DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-01 8:12 ` Yinghai Lu @ 2009-03-01 8:29 ` Prakash Punnoor 2009-03-04 7:15 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-03-01 8:29 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci [PATCH] Enable HT MSI mapping on all known needed NVidia host bridges, V2 v3 of Yinghai Lu's work only enables HT MSI mapping for one specific host bridge. Do this also for all C51 ones as specified by NVidia's original patch. Signed-off-by: Prakash Punnoor <prakash@punnoor.de> --- drivers/pci/quirks.c.current 2009-03-01 08:42:31.321660493 +0100 +++ drivers/pci/quirks.c 2009-03-01 09:27:13.061407474 +0100 @@ -2189,8 +2189,17 @@ return __nv_msi_ht_cap_quirk(dev, 0); } -/* werid?, c51/mcp51 need c51 ht msi to be enable to make mcp51 ht msi working */ +/* Enable HT MSI mapping on C51 host brigdes */ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f0, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f1, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f2, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f3, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f4, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f5, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f6, nv_msi_ht_cap_quirk_all); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x02f7, nv_msi_ht_cap_quirk_all); + +/* Enable HT MSI mapping on all regular devices */ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-01 8:29 ` Prakash Punnoor @ 2009-03-04 7:15 ` Prakash Punnoor 2009-03-04 8:21 ` Yinghai Lu ` (2 more replies) 0 siblings, 3 replies; 103+ messages in thread From: Prakash Punnoor @ 2009-03-04 7:15 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci Hmmm, 2.6.29-rc7 is released, but the last two patches here in the thread have not been picked up. Why? Regards, Prakash ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-04 7:15 ` Prakash Punnoor @ 2009-03-04 8:21 ` Yinghai Lu 2009-03-05 17:01 ` Matthew Wilcox 2009-03-05 17:15 ` Matthew Wilcox 2 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-03-04 8:21 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, Matthew Wilcox, linux-kernel, linux-pci Prakash Punnoor wrote: > Hmmm, > > 2.6.29-rc7 is released, but the last two patches here in the thread have not > been picked up. Why? > Jesse is on vacation... YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-04 7:15 ` Prakash Punnoor 2009-03-04 8:21 ` Yinghai Lu @ 2009-03-05 17:01 ` Matthew Wilcox 2009-03-05 17:15 ` Matthew Wilcox 2 siblings, 0 replies; 103+ messages in thread From: Matthew Wilcox @ 2009-03-05 17:01 UTC (permalink / raw) To: Prakash Punnoor Cc: Yinghai Lu, Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Wed, Mar 04, 2009 at 08:15:37AM +0100, Prakash Punnoor wrote: > Hmmm, > > 2.6.29-rc7 is released, but the last two patches here in the thread have not > been picked up. Why? I'm watching the PCI tree while Jesse is away and I didn't realise these patches were urgent to include. I'll put them in a git tree and send Linus a pull request. I just saw him wandering around with his suitcase, so I think he'll be back home and processing pull requests this evening. -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-04 7:15 ` Prakash Punnoor 2009-03-04 8:21 ` Yinghai Lu 2009-03-05 17:01 ` Matthew Wilcox @ 2009-03-05 17:15 ` Matthew Wilcox 2009-03-05 23:26 ` Yinghai Lu 2009-03-05 23:45 ` Prakash Punnoor 2 siblings, 2 replies; 103+ messages in thread From: Matthew Wilcox @ 2009-03-05 17:15 UTC (permalink / raw) To: Prakash Punnoor Cc: Yinghai Lu, Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Wed, Mar 04, 2009 at 08:15:37AM +0100, Prakash Punnoor wrote: > 2.6.29-rc7 is released, but the last two patches here in the thread have not > been picked up. Why? Oh, I meant to say ... we're at -rc7. What is the danger here of this fixing your machine but breaking somebody else's? Is there something we can minimally do that fixes your machine today and then put in a patch for 30-rc1 that is likely to fix other machines? -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-05 17:15 ` Matthew Wilcox @ 2009-03-05 23:26 ` Yinghai Lu 2009-03-05 23:45 ` Prakash Punnoor 1 sibling, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-03-05 23:26 UTC (permalink / raw) To: Matthew Wilcox Cc: Prakash Punnoor, Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci Matthew Wilcox wrote: > On Wed, Mar 04, 2009 at 08:15:37AM +0100, Prakash Punnoor wrote: >> 2.6.29-rc7 is released, but the last two patches here in the thread have not >> been picked up. Why? > > Oh, I meant to say ... we're at -rc7. What is the danger here of this > fixing your machine but breaking somebody else's? Is there something we > can minimally do that fixes your machine today and then put in a patch > for 30-rc1 that is likely to fix other machines? > please don't apply v3 and prakash patch at this point. will have one better v4 this weekend. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-05 17:15 ` Matthew Wilcox 2009-03-05 23:26 ` Yinghai Lu @ 2009-03-05 23:45 ` Prakash Punnoor 2009-03-06 1:10 ` Matthew Wilcox 1 sibling, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-03-05 23:45 UTC (permalink / raw) To: Matthew Wilcox Cc: Yinghai Lu, Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Donnerstag 05 März 2009 18:15:14 Matthew Wilcox wrote: > On Wed, Mar 04, 2009 at 08:15:37AM +0100, Prakash Punnoor wrote: > > 2.6.29-rc7 is released, but the last two patches here in the thread have > > not been picked up. Why? > > Oh, I meant to say ... we're at -rc7. What is the danger here of this > fixing your machine but breaking somebody else's? There is a danger that less host bridges get HT MSI enabled by the quirk - which might need it after all. > Is there something we > can minimally do that fixes your machine today and then put in a patch > for 30-rc1 that is likely to fix other machines? Something like this would be minimal and works for me: --- drivers/pci/quirks.c.old 2009-03-06 00:34:40.996532222 +0100 +++ drivers/pci/quirks.c 2009-03-06 00:37:06.915532269 +0100 @@ -2141,6 +2141,10 @@ int pos; int found; + /* Enabling HT MSI mapping on this device breaks MCP51 */ + if (dev->device == 0x270) + return; + /* check if there is HT MSI cap or enabled on this device */ found = ht_check_msi_mapping(dev); ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-05 23:45 ` Prakash Punnoor @ 2009-03-06 1:10 ` Matthew Wilcox 2009-03-06 4:15 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Matthew Wilcox @ 2009-03-06 1:10 UTC (permalink / raw) To: Prakash Punnoor Cc: Yinghai Lu, Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Fri, Mar 06, 2009 at 12:45:12AM +0100, Prakash Punnoor wrote: > Something like this would be minimal and works for me: Looks appropriate for a -rc7 fix. Unless anyone argues, I'll put this in the pci-fixes tree that I'll push out tomorrow. -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-06 1:10 ` Matthew Wilcox @ 2009-03-06 4:15 ` Yinghai Lu 2009-03-06 9:10 ` Prakash Punnoor 2009-03-21 2:29 ` [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend Yinghai Lu 0 siblings, 2 replies; 103+ messages in thread From: Yinghai Lu @ 2009-03-06 4:15 UTC (permalink / raw) To: Matthew Wilcox, Prakash Punnoor Cc: Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci please check v4: [PATCH] pci: don't enable too much HT MSI mapping -v4 Impact: fix bug Prakash reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only try to avoid to enable ht_msi on device following that root dev, and don't touch that root dev v3: will enable c51... v4: will enable c51 kind of without leaf too. Reported-by: Prakash Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 116 ++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 83 insertions(+), 33 deletions(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -2053,6 +2053,65 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NV PCI_DEVICE_ID_NVIDIA_NVENET_15, nvenet_msi_disable); +static int __devinit ht_check_msi_mapping(struct pci_dev *dev) +{ + int pos, ttl = 48; + int found = 0; + + /* check if there is HT MSI cap or enabled on this device */ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (found < 1) + found = 1; + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + if (flags & HT_MSI_FLAGS_ENABLE) { + if (found < 2) { + found = 2; + break; + } + } + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } + + return found; +} + +static int __devinit host_bridge_with_leaf(struct pci_dev *host_bridge) +{ + struct pci_dev *dev; + int pos; + int i, dev_no; + int found = 0; + + dev_no = host_bridge->devfn >> 3; + for (i = dev_no + 1; i < 0x20; i++) { + dev = pci_get_slot(host_bridge->bus, PCI_DEVFN(i, 0)); + if (!dev) + continue; + + /* found next host bridge ?*/ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_SLAVE); + if (pos != 0) { + pci_dev_put(dev); + break; + } + + if (ht_check_msi_mapping(dev)) { + found = 1; + pci_dev_put(dev); + break; + } + pci_dev_put(dev); + } + + return found; +} + static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) { struct pci_dev *host_bridge; @@ -2077,6 +2136,10 @@ static void __devinit nv_ht_enable_msi_m if (!found) return; + /* don't enable host_bridge with leaf directly here */ + if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) + goto out; + /* root did that ! */ if (msi_ht_cap_enabled(host_bridge)) goto out; @@ -2097,7 +2160,7 @@ static void __devinit ht_disable_msi_map if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, &flags) == 0) { - dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); + dev_info(&dev->dev, "Disabling HT MSI Mapping\n"); pci_write_config_byte(dev, pos + HT_MSI_FLAGS, flags & ~HT_MSI_FLAGS_ENABLE); @@ -2107,35 +2170,7 @@ static void __devinit ht_disable_msi_map } } -static int __devinit ht_check_msi_mapping(struct pci_dev *dev) -{ - int pos, ttl = 48; - int found = 0; - - /* check if there is HT MSI cap or enabled on this device */ - pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); - while (pos && ttl--) { - u8 flags; - - if (found < 1) - found = 1; - if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, - &flags) == 0) { - if (flags & HT_MSI_FLAGS_ENABLE) { - if (found < 2) { - found = 2; - break; - } - } - } - pos = pci_find_next_ht_capability(dev, pos, - HT_CAPTYPE_MSI_MAPPING); - } - - return found; -} - -static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +static void __devinit __nv_msi_ht_cap_quirk(struct pci_dev *dev, int all) { struct pci_dev *host_bridge; int pos; @@ -2164,7 +2199,10 @@ static void __devinit nv_msi_ht_cap_quir /* Host bridge is to HT */ if (found == 1) { /* it is not enabled, try to enable it */ - nv_ht_enable_msi_mapping(dev); + if (all) + ht_enable_msi_mapping(dev); + else + nv_ht_enable_msi_mapping(dev); } return; } @@ -2176,8 +2214,20 @@ static void __devinit nv_msi_ht_cap_quir /* Host bridge is not to HT, disable HT MSI mapping on this device */ ht_disable_msi_mapping(dev); } -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); + +static void __devinit nv_msi_ht_cap_quirk_all(struct pci_dev *dev) +{ + return __nv_msi_ht_cap_quirk(dev, 1); +} + +static void __devinit nv_msi_ht_cap_quirk_leaf(struct pci_dev *dev) +{ + return __nv_msi_ht_cap_quirk(dev, 0); +} + +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); + +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); static void __devinit quirk_msi_intx_disable_bug(struct pci_dev *dev) { ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too many HT MSI mapping 2009-03-06 4:15 ` Yinghai Lu @ 2009-03-06 9:10 ` Prakash Punnoor 2009-03-21 2:29 ` [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend Yinghai Lu 1 sibling, 0 replies; 103+ messages in thread From: Prakash Punnoor @ 2009-03-06 9:10 UTC (permalink / raw) To: Yinghai Lu Cc: Matthew Wilcox, Jesse Barnes, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Freitag 06 März 2009 05:15:45 Yinghai Lu wrote: > please check v4: v4 also works for me - nice. In case v4 doesn't get merged but instead the minimal version, this should be added also: [patch, trivial] Fix typo in message while disabling HT MSI mapping Signed-off-by: Prakash Punnoor <prakash@punnoor.de> --- drivers/pci/quirks.c.old 2009-03-06 00:34:40.996532222 +0100 +++ drivers/pci/quirks.c 2009-03-06 10:06:19.251037862 +0100 @@ -2097,7 +2097,7 @@ if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, &flags) == 0) { - dev_info(&dev->dev, "Enabling HT MSI Mapping\n"); + dev_info(&dev->dev, "Disabling HT MSI Mapping\n"); pci_write_config_byte(dev, pos + HT_MSI_FLAGS, flags & ~HT_MSI_FLAGS_ENABLE); ^ permalink raw reply [flat|nested] 103+ messages in thread
* [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-06 4:15 ` Yinghai Lu 2009-03-06 9:10 ` Prakash Punnoor @ 2009-03-21 2:29 ` Yinghai Lu 2009-03-26 23:10 ` Jesse Barnes 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-03-21 2:29 UTC (permalink / raw) To: Jesse Barnes Cc: Matthew Wilcox, Prakash Punnoor, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci Impact: fix bug Prakash reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only try to avoid to enable ht_msi on device following that root dev, and don't touch that root dev v3: will enable c51... v4: will enable c51 kind of without leaf too. v5: update to mainline Reported-by: Prakash Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> --- drivers/pci/quirks.c | 118 +++++++++++++++++++++++++++++++++++---------------- 1 file changed, 82 insertions(+), 36 deletions(-) Index: linux-2.6/drivers/pci/quirks.c =================================================================== --- linux-2.6.orig/drivers/pci/quirks.c +++ linux-2.6/drivers/pci/quirks.c @@ -2078,6 +2078,65 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NV PCI_DEVICE_ID_NVIDIA_NVENET_15, nvenet_msi_disable); +static int __devinit ht_check_msi_mapping(struct pci_dev *dev) +{ + int pos, ttl = 48; + int found = 0; + + /* check if there is HT MSI cap or enabled on this device */ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); + while (pos && ttl--) { + u8 flags; + + if (found < 1) + found = 1; + if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, + &flags) == 0) { + if (flags & HT_MSI_FLAGS_ENABLE) { + if (found < 2) { + found = 2; + break; + } + } + } + pos = pci_find_next_ht_capability(dev, pos, + HT_CAPTYPE_MSI_MAPPING); + } + + return found; +} + +static int __devinit host_bridge_with_leaf(struct pci_dev *host_bridge) +{ + struct pci_dev *dev; + int pos; + int i, dev_no; + int found = 0; + + dev_no = host_bridge->devfn >> 3; + for (i = dev_no + 1; i < 0x20; i++) { + dev = pci_get_slot(host_bridge->bus, PCI_DEVFN(i, 0)); + if (!dev) + continue; + + /* found next host bridge ?*/ + pos = pci_find_ht_capability(dev, HT_CAPTYPE_SLAVE); + if (pos != 0) { + pci_dev_put(dev); + break; + } + + if (ht_check_msi_mapping(dev)) { + found = 1; + pci_dev_put(dev); + break; + } + pci_dev_put(dev); + } + + return found; +} + static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) { struct pci_dev *host_bridge; @@ -2102,6 +2161,10 @@ static void __devinit nv_ht_enable_msi_m if (!found) return; + /* don't enable host_bridge with leaf directly here */ + if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) + goto out; + /* root did that ! */ if (msi_ht_cap_enabled(host_bridge)) goto out; @@ -2132,44 +2195,12 @@ static void __devinit ht_disable_msi_map } } -static int __devinit ht_check_msi_mapping(struct pci_dev *dev) -{ - int pos, ttl = 48; - int found = 0; - - /* check if there is HT MSI cap or enabled on this device */ - pos = pci_find_ht_capability(dev, HT_CAPTYPE_MSI_MAPPING); - while (pos && ttl--) { - u8 flags; - - if (found < 1) - found = 1; - if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, - &flags) == 0) { - if (flags & HT_MSI_FLAGS_ENABLE) { - if (found < 2) { - found = 2; - break; - } - } - } - pos = pci_find_next_ht_capability(dev, pos, - HT_CAPTYPE_MSI_MAPPING); - } - - return found; -} - -static void __devinit nv_msi_ht_cap_quirk(struct pci_dev *dev) +static void __devinit __nv_msi_ht_cap_quirk(struct pci_dev *dev, int all) { struct pci_dev *host_bridge; int pos; int found; - /* Enabling HT MSI mapping on this device breaks MCP51 */ - if (dev->device == 0x270) - return; - /* check if there is HT MSI cap or enabled on this device */ found = ht_check_msi_mapping(dev); @@ -2193,7 +2224,10 @@ static void __devinit nv_msi_ht_cap_quir /* Host bridge is to HT */ if (found == 1) { /* it is not enabled, try to enable it */ - nv_ht_enable_msi_mapping(dev); + if (all) + ht_enable_msi_mapping(dev); + else + nv_ht_enable_msi_mapping(dev); } return; } @@ -2205,8 +2239,20 @@ static void __devinit nv_msi_ht_cap_quir /* Host bridge is not to HT, disable HT MSI mapping on this device */ ht_disable_msi_mapping(dev); } -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk); + +static void __devinit nv_msi_ht_cap_quirk_all(struct pci_dev *dev) +{ + return __nv_msi_ht_cap_quirk(dev, 1); +} + +static void __devinit nv_msi_ht_cap_quirk_leaf(struct pci_dev *dev) +{ + return __nv_msi_ht_cap_quirk(dev, 0); +} + +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, nv_msi_ht_cap_quirk_leaf); + +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_ANY_ID, nv_msi_ht_cap_quirk_all); static void __devinit quirk_msi_intx_disable_bug(struct pci_dev *dev) { ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-21 2:29 ` [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend Yinghai Lu @ 2009-03-26 23:10 ` Jesse Barnes 2009-03-28 12:34 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Jesse Barnes @ 2009-03-26 23:10 UTC (permalink / raw) To: Yinghai Lu Cc: Matthew Wilcox, Prakash Punnoor, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Fri, 20 Mar 2009 19:29:41 -0700 Yinghai Lu <yinghai@kernel.org> wrote: > > Impact: fix bug > > Prakash reported that his c51-mcp51 system ondie sound card doesn't > work MSI but if he hack out the HT-MSI on mcp51, the MSI will work > well with sound card. > > this patch rework the nv_msi_ht_cap_quirk() > and will only try to avoid to enable ht_msi on device following that > root dev, and don't touch that root dev > > v3: will enable c51... > v4: will enable c51 kind of without leaf too. > v5: update to mainline > > Reported-by: Prakash Punnoor <prakash@punnoor.de> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > Applied, thanks. Prakash if you get a chance can you try testing my linux-next branch (or just linux-next in general tomorrow) to make sure this is still ok for you? Thanks, -- Jesse Barnes, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-26 23:10 ` Jesse Barnes @ 2009-03-28 12:34 ` Prakash Punnoor 2009-03-28 13:31 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-03-28 12:34 UTC (permalink / raw) To: Jesse Barnes Cc: Yinghai Lu, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci [-- Attachment #1: Type: text/plain, Size: 1902 bytes --] On Freitag 27 März 2009 00:10:01 Jesse Barnes wrote: > On Fri, 20 Mar 2009 19:29:41 -0700 > > Yinghai Lu <yinghai@kernel.org> wrote: > > Impact: fix bug > > > > Prakash reported that his c51-mcp51 system ondie sound card doesn't > > work MSI but if he hack out the HT-MSI on mcp51, the MSI will work > > well with sound card. > > > > this patch rework the nv_msi_ht_cap_quirk() > > and will only try to avoid to enable ht_msi on device following that > > root dev, and don't touch that root dev > > > > v3: will enable c51... > > v4: will enable c51 kind of without leaf too. > > v5: update to mainline > > > > Reported-by: Prakash Punnoor <prakash@punnoor.de> > > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > Applied, thanks. Prakash if you get a chance can you try testing my > linux-next branch (or just linux-next in general tomorrow) to make sure > this is still ok for you? > > Thanks, Finally I am able to test the linux-next branch of pci tree after Jesse gave some help with git.(Is it correct that the kernel calls itself 2.6.28-rc8? I looked into quirks.c and it seems to be correctly patched.) Unfortunately it doesn't seem to work for me (and I am wondering why as the old v4 version seemed to work ontop of one of the 2.6.29-rc versions): dmesg|grep HT pci 0000:00:00.0: Found disabled HT MSI Mapping pci 0000:00:03.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0e.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0f.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.1: Enabling HT MSI Mapping Device 09.0 doesn't get enabled (good) but 00.0 also not (bad). Then my Intel HDA cannot use MSI. Regards, Prakash [-- Attachment #2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 198 bytes --] ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-28 12:34 ` Prakash Punnoor @ 2009-03-28 13:31 ` Prakash Punnoor 2009-03-28 20:18 ` Yinghai Lu 2009-03-28 20:52 ` Yinghai Lu 0 siblings, 2 replies; 103+ messages in thread From: Prakash Punnoor @ 2009-03-28 13:31 UTC (permalink / raw) To: Jesse Barnes Cc: Yinghai Lu, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci [-- Attachment #1: Type: text/plain, Size: 3831 bytes --] On Samstag 28 März 2009 13:34:44 Prakash Punnoor wrote: > On Freitag 27 März 2009 00:10:01 Jesse Barnes wrote: > > On Fri, 20 Mar 2009 19:29:41 -0700 > > > > Yinghai Lu <yinghai@kernel.org> wrote: > > > Impact: fix bug > > > > > > Prakash reported that his c51-mcp51 system ondie sound card doesn't > > > work MSI but if he hack out the HT-MSI on mcp51, the MSI will work > > > well with sound card. > > > > > > this patch rework the nv_msi_ht_cap_quirk() > > > and will only try to avoid to enable ht_msi on device following that > > > root dev, and don't touch that root dev > > > > > > v3: will enable c51... > > > v4: will enable c51 kind of without leaf too. > > > v5: update to mainline > > > > > > Reported-by: Prakash Punnoor <prakash@punnoor.de> > > > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > > > > Applied, thanks. Prakash if you get a chance can you try testing my > > linux-next branch (or just linux-next in general tomorrow) to make sure > > this is still ok for you? > > > > Thanks, > > Finally I am able to test the linux-next branch of pci tree after Jesse > gave some help with git.(Is it correct that the kernel calls itself > 2.6.28-rc8? I looked into quirks.c and it seems to be correctly patched.) > Unfortunately it doesn't seem to work for me (and I am wondering why as the > old v4 version seemed to work ontop of one of the 2.6.29-rc versions): > > dmesg|grep HT > pci 0000:00:00.0: Found disabled HT MSI Mapping > pci 0000:00:03.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0e.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0f.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.1: Enabling HT MSI Mapping > > Device 09.0 doesn't get enabled (good) but 00.0 also not (bad). Then my > Intel HDA cannot use MSI. I sprinkeld a few debugging messages around in the code and looking at that I don't see how the code can enable NMSI for device 00.0, but not for 09.0: Both will exit here: if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) in nv_ht_enable_msi_mapping, so it seems host_bridge_with_leaf returns true for both. I think because my hw configuration changed a bit (inserted one PCIe card) comparing to last time I tested old v4 version, this doesn't work anymore - so the leaf check alone is not realiable, I guess. For me adding something like this, makes it work: (I hope the description makes sense, as I am just refering to the function names and trying to guess its meanings.) Patch is against linux-next branch of pci tree. [patch] pci: enable MSI on host bridge without checking for leaves On C51 the host bridge needs to be enabled, but the MCP51 host bridge not. So don't check for leaves on the main host bridge. Signed-off-by: Prakash Punnoor <prakash@punnoor.de> --- drivers/pci/quirks.c.old 2009-03-28 14:06:07.249250095 +0100 +++ drivers/pci/quirks.c 2009-03-28 14:22:35.027510230 +0100 @@ -2292,8 +2292,10 @@ static void __devinit __nv_msi_ht_cap_qu if (pos != 0) { /* Host bridge is to HT */ if (found == 1) { - /* it is not enabled, try to enable it */ - if (all) + /* it is not enabled, try to enable it; + * don't check for leaves on host bridge + */ + if (all || host_bridge->devfn == dev->devfn) ht_enable_msi_mapping(dev); else nv_ht_enable_msi_mapping(dev); [-- Attachment #2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 198 bytes --] ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-28 13:31 ` Prakash Punnoor @ 2009-03-28 20:18 ` Yinghai Lu 2009-03-28 22:11 ` Prakash Punnoor 2009-03-28 20:52 ` Yinghai Lu 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-03-28 20:18 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci Prakash Punnoor wrote: > On Samstag 28 März 2009 13:34:44 Prakash Punnoor wrote: >> On Freitag 27 März 2009 00:10:01 Jesse Barnes wrote: >>> On Fri, 20 Mar 2009 19:29:41 -0700 >>> >>> Yinghai Lu <yinghai@kernel.org> wrote: >>>> Impact: fix bug >>>> >>>> Prakash reported that his c51-mcp51 system ondie sound card doesn't >>>> work MSI but if he hack out the HT-MSI on mcp51, the MSI will work >>>> well with sound card. >>>> >>>> this patch rework the nv_msi_ht_cap_quirk() >>>> and will only try to avoid to enable ht_msi on device following that >>>> root dev, and don't touch that root dev >>>> >>>> v3: will enable c51... >>>> v4: will enable c51 kind of without leaf too. >>>> v5: update to mainline >>>> >>>> Reported-by: Prakash Punnoor <prakash@punnoor.de> >>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >>> Applied, thanks. Prakash if you get a chance can you try testing my >>> linux-next branch (or just linux-next in general tomorrow) to make sure >>> this is still ok for you? >>> >>> Thanks, >> Finally I am able to test the linux-next branch of pci tree after Jesse >> gave some help with git.(Is it correct that the kernel calls itself >> 2.6.28-rc8? I looked into quirks.c and it seems to be correctly patched.) >> Unfortunately it doesn't seem to work for me (and I am wondering why as the >> old v4 version seemed to work ontop of one of the 2.6.29-rc versions): >> >> dmesg|grep HT >> pci 0000:00:00.0: Found disabled HT MSI Mapping >> pci 0000:00:03.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:0e.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:0f.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:10.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:10.1: Enabling HT MSI Mapping >> >> Device 09.0 doesn't get enabled (good) but 00.0 also not (bad). Then my >> Intel HDA cannot use MSI. > > I sprinkeld a few debugging messages around in the code and looking at that > I don't see how the code can enable NMSI for device 00.0, but not for 09.0: > > Both will exit here: > > if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) > > in nv_ht_enable_msi_mapping, so it seems host_bridge_with_leaf returns true > for both. I think because my hw configuration changed a bit (inserted one > PCIe card) comparing to last time I tested old v4 version, this doesn't work > anymore - so the leaf check alone is not realiable, I guess. For me adding > something like this, makes it work: (I hope the description makes sense, as > I am just refering to the function names and trying to guess its meanings.) > > Patch is against linux-next branch of pci tree. > > [patch] pci: enable MSI on host bridge without checking for leaves > > On C51 the host bridge needs to be enabled, but the MCP51 host bridge not. > So don't check for leaves on the main host bridge. > > Signed-off-by: Prakash Punnoor <prakash@punnoor.de> > > --- drivers/pci/quirks.c.old 2009-03-28 14:06:07.249250095 +0100 > +++ drivers/pci/quirks.c 2009-03-28 14:22:35.027510230 +0100 > @@ -2292,8 +2292,10 @@ static void __devinit __nv_msi_ht_cap_qu > if (pos != 0) { > /* Host bridge is to HT */ > if (found == 1) { > - /* it is not enabled, try to enable it */ > - if (all) > + /* it is not enabled, try to enable it; > + * don't check for leaves on host bridge > + */ > + if (all || host_bridge->devfn == dev->devfn) > ht_enable_msi_mapping(dev); > else > nv_ht_enable_msi_mapping(dev); > seems it is not right, it may enable your 09.0 again. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-28 20:18 ` Yinghai Lu @ 2009-03-28 22:11 ` Prakash Punnoor 0 siblings, 0 replies; 103+ messages in thread From: Prakash Punnoor @ 2009-03-28 22:11 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci [-- Attachment #1: Type: text/plain, Size: 4386 bytes --] On Samstag 28 März 2009 21:18:19 Yinghai Lu wrote: > Prakash Punnoor wrote: > > On Samstag 28 März 2009 13:34:44 Prakash Punnoor wrote: > >> On Freitag 27 März 2009 00:10:01 Jesse Barnes wrote: > >>> On Fri, 20 Mar 2009 19:29:41 -0700 > >>> > >>> Yinghai Lu <yinghai@kernel.org> wrote: > >>>> Impact: fix bug > >>>> > >>>> Prakash reported that his c51-mcp51 system ondie sound card doesn't > >>>> work MSI but if he hack out the HT-MSI on mcp51, the MSI will work > >>>> well with sound card. > >>>> > >>>> this patch rework the nv_msi_ht_cap_quirk() > >>>> and will only try to avoid to enable ht_msi on device following that > >>>> root dev, and don't touch that root dev > >>>> > >>>> v3: will enable c51... > >>>> v4: will enable c51 kind of without leaf too. > >>>> v5: update to mainline > >>>> > >>>> Reported-by: Prakash Punnoor <prakash@punnoor.de> > >>>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> > >>> > >>> Applied, thanks. Prakash if you get a chance can you try testing my > >>> linux-next branch (or just linux-next in general tomorrow) to make sure > >>> this is still ok for you? > >>> > >>> Thanks, > >> > >> Finally I am able to test the linux-next branch of pci tree after Jesse > >> gave some help with git.(Is it correct that the kernel calls itself > >> 2.6.28-rc8? I looked into quirks.c and it seems to be correctly > >> patched.) Unfortunately it doesn't seem to work for me (and I am > >> wondering why as the old v4 version seemed to work ontop of one of the > >> 2.6.29-rc versions): > >> > >> dmesg|grep HT > >> pci 0000:00:00.0: Found disabled HT MSI Mapping > >> pci 0000:00:03.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:0e.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:0f.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:10.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:10.1: Enabling HT MSI Mapping > >> > >> Device 09.0 doesn't get enabled (good) but 00.0 also not (bad). Then my > >> Intel HDA cannot use MSI. > > > > I sprinkeld a few debugging messages around in the code and looking at > > that I don't see how the code can enable NMSI for device 00.0, but not > > for 09.0: > > > > Both will exit here: > > > > if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) > > > > in nv_ht_enable_msi_mapping, so it seems host_bridge_with_leaf returns > > true for both. I think because my hw configuration changed a bit > > (inserted one PCIe card) comparing to last time I tested old v4 version, > > this doesn't work anymore - so the leaf check alone is not realiable, I > > guess. For me adding something like this, makes it work: (I hope the > > description makes sense, as I am just refering to the function names and > > trying to guess its meanings.) > > > > Patch is against linux-next branch of pci tree. > > > > [patch] pci: enable MSI on host bridge without checking for leaves > > > > On C51 the host bridge needs to be enabled, but the MCP51 host bridge > > not. So don't check for leaves on the main host bridge. > > > > Signed-off-by: Prakash Punnoor <prakash@punnoor.de> > > > > --- drivers/pci/quirks.c.old 2009-03-28 14:06:07.249250095 +0100 > > +++ drivers/pci/quirks.c 2009-03-28 14:22:35.027510230 +0100 > > @@ -2292,8 +2292,10 @@ static void __devinit __nv_msi_ht_cap_qu > > if (pos != 0) { > > /* Host bridge is to HT */ > > if (found == 1) { > > - /* it is not enabled, try to enable it */ > > - if (all) > > + /* it is not enabled, try to enable it; > > + * don't check for leaves on host bridge > > + */ > > + if (all || host_bridge->devfn == dev->devfn) > > ht_enable_msi_mapping(dev); > > else > > nv_ht_enable_msi_mapping(dev); > > seems it is not right, it may enable your 09.0 again. No if you look into the whole function, you'll see that host_bridge is device 0:0. ( host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); ) [-- Attachment #2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 198 bytes --] ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-28 13:31 ` Prakash Punnoor 2009-03-28 20:18 ` Yinghai Lu @ 2009-03-28 20:52 ` Yinghai Lu 2009-03-28 22:16 ` Prakash Punnoor 1 sibling, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-03-28 20:52 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Sat, Mar 28, 2009 at 6:31 AM, Prakash Punnoor <prakash@punnoor.de> wrote: > On Samstag 28 März 2009 13:34:44 Prakash Punnoor wrote: >> On Freitag 27 März 2009 00:10:01 Jesse Barnes wrote: >> > On Fri, 20 Mar 2009 19:29:41 -0700 >> > >> > Yinghai Lu <yinghai@kernel.org> wrote: >> > > Impact: fix bug >> > > >> > > Prakash reported that his c51-mcp51 system ondie sound card doesn't >> > > work MSI but if he hack out the HT-MSI on mcp51, the MSI will work >> > > well with sound card. >> > > >> > > this patch rework the nv_msi_ht_cap_quirk() >> > > and will only try to avoid to enable ht_msi on device following that >> > > root dev, and don't touch that root dev >> > > >> > > v3: will enable c51... >> > > v4: will enable c51 kind of without leaf too. >> > > v5: update to mainline >> > > >> > > Reported-by: Prakash Punnoor <prakash@punnoor.de> >> > > Signed-off-by: Yinghai Lu <yinghai@kernel.org> >> > >> > Applied, thanks. Prakash if you get a chance can you try testing my >> > linux-next branch (or just linux-next in general tomorrow) to make sure >> > this is still ok for you? >> > >> > Thanks, >> >> Finally I am able to test the linux-next branch of pci tree after Jesse >> gave some help with git.(Is it correct that the kernel calls itself >> 2.6.28-rc8? I looked into quirks.c and it seems to be correctly patched.) >> Unfortunately it doesn't seem to work for me (and I am wondering why as the >> old v4 version seemed to work ontop of one of the 2.6.29-rc versions): >> >> dmesg|grep HT >> pci 0000:00:00.0: Found disabled HT MSI Mapping >> pci 0000:00:03.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:0e.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:0f.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:10.0: Enabling HT MSI Mapping >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> pci 0000:00:10.1: Enabling HT MSI Mapping >> >> Device 09.0 doesn't get enabled (good) but 00.0 also not (bad). Then my >> Intel HDA cannot use MSI. > > I sprinkeld a few debugging messages around in the code and looking at that > I don't see how the code can enable NMSI for device 00.0, but not for 09.0: > > Both will exit here: > > if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) > where is 0000:00:03.0: Enabling HT MSI Mapping from? last time you report: A full lspci listing: 00:00.0 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=0 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Link Control 1: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b- Link Config 1: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 1.0GHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 800MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [e0] HyperTransport: MSI Mapping Enable+ Fixed- Mapping Address Base: 00000000fee00000 00: de 10 f0 02 06 00 b0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 08 e0 e0 01 22 00 11 11 22 20 11 00 50: 23 06 7f 80 03 05 7f 80 00 00 03 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 06 15 05 00 70: 44 44 41 00 d0 09 00 00 11 00 00 00 11 11 88 00 80: 23 99 88 00 1f 00 64 0c 03 00 00 00 7f 00 00 00 90: 70 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 01 01 01 01 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 61 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 08 00 01 a8 00 00 e0 fe 00 00 00 00 00 00 00 10 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.1 RAM memory: nVidia Corporation C51 Memory Controller 0 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- INTx- 00: de 10 fa 02 00 01 20 40 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 10 00 21 21 14 00 11 11 00 00 03 00 00 00 60: 21 88 13 02 de 8f e1 1f 08 72 4e 10 02 3f 00 20 70: 10 32 54 0a 10 00 00 00 a0 00 00 00 34 00 31 01 80: 00 00 00 00 00 00 00 00 00 00 50 3f 90 3f 00 00 90: 00 28 00 fe fd 00 00 00 fc ff ff ff ff 03 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 28 00 fe fd 01 01 a0 01 4f 00 00 80 f9 fd 00 e0: 00 00 c9 fe 00 00 00 00 00 fc ff ff 00 00 00 00 f0: 00 00 00 00 c7 02 32 00 00 00 00 00 00 00 00 00 00:00.2 RAM memory: nVidia Corporation C51 Memory Controller 1 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 fe 02 00 00 20 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 43 10 c0 81 1f 20 1c 20 1f 20 c0 21 00 00 00 00 50: 36 00 38 c9 01 00 00 00 3b 00 3d c9 02 1f 1c 80 60: 02 1f 1c 00 00 00 00 00 02 10 1c a0 02 0c 1c 90 70: 02 10 1c 90 02 14 1c 90 02 0c 1c 80 02 10 1c 80 80: 02 14 1c 80 02 18 1c 80 02 1c 1c 80 01 10 1c 80 90: 02 14 1c 80 11 00 11 00 32 01 00 00 00 00 00 00 a0: c2 00 40 01 10 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 41 23 05 08 c0: fd ff ff ff ff ff ff ff 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.3 RAM memory: nVidia Corporation C51 Memory Controller 5 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 f8 02 00 00 a0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 00 00 00 00 02 10 1c 80 02 10 1c a0 50: 02 0c 1c 90 02 10 1c 90 02 14 1c 90 02 0c 1c 80 60: 02 10 1c 80 02 14 1c 80 02 18 1c 80 02 1c 1c 80 70: 01 10 1c 80 1f 20 c0 81 00 00 00 00 3e 30 40 c9 80: 01 00 00 00 44 30 46 c9 02 1f 1c 80 70 20 00 40 90: 89 da 01 09 00 00 00 00 11 00 10 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 08 00 00 00 18 1a 00 00 10 00 02 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 0f 01 00 05 00 00 00 00 d0: 00 00 f0 03 00 04 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 60 ea 10 10 18 00 00 20 00 00 00 00 00 00 00 00 00:00.4 RAM memory: nVidia Corporation C51 Memory Controller 4 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 f9 02 06 00 a0 00 a2 00 00 05 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 40: ef dd 7b 2f f7 de 7b 2f f7 de 7b 2f f7 02 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 70: 0a 00 00 00 03 00 00 00 25 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 05 00 00 00 04 00 00 00 90: 03 04 00 00 01 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: ff 7f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.5 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [44] #00 [00fe] Capabilities: [fc] #00 [0000] 00: de 10 ff 02 06 00 b0 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 00 00 40: 17 00 00 00 00 fe fe 00 00 fe fe 00 00 fe fe 00 50: 00 fe fe 00 00 fe fe 00 00 fe fe 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.6 RAM memory: nVidia Corporation C51 Memory Controller 3 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 7f 02 02 01 20 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 08 00 00 00 00 00 00 00 00 80 cb fe 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:00.7 RAM memory: nVidia Corporation C51 Memory Controller 2 (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 7e 02 00 00 20 00 a2 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 43 10 c0 81 11 00 00 00 75 07 00 00 11 00 00 00 50: 75 06 00 00 40 00 60 00 40 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 04 00 00 00 04 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 04 00 00 00 04 b0: ff ff 03 00 10 11 00 00 ac 10 20 00 30 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:05.0 VGA compatible controller: nVidia Corporation C51PV [GeForce 6150] (rev a2) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. A8N-VM CSM Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 16 Region 0: Memory at fc000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 3: Memory at fb000000 (64-bit, non-prefetchable) [size=16M] [virtual] Expansion ROM at f0000000 [disabled] [size=128K] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Mask- 64bit+ Count=1/1 Enable- Address: 0000000000000000 Data: 0000 Kernel driver in use: nvidia Kernel modules: nvidia 00: de 10 40 02 07 00 b0 00 a2 00 00 03 00 00 00 00 10: 00 00 00 fc 0c 00 00 d0 00 00 00 00 04 00 00 fb 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 cd 81 30: 00 00 00 00 48 00 00 00 00 00 00 00 05 01 00 00 40: 43 10 cd 81 00 00 00 00 01 50 02 00 00 00 00 00 50: 05 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 00 00 00 04 00 00 00 00 00 00 00 01 00 00 00 70: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 80: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff a0: 00 00 90 01 00 00 00 08 00 00 00 00 ff ff ff ff b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 00:09.0 RAM memory: nVidia Corporation MCP51 Host Bridge (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: [44] HyperTransport: Slave or Primary Interface Command: BaseUnitID=9 UnitCnt=15 MastHost- DefDir- DUL- Link Control 0: CFlE+ CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b- Link Config 0: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn- Revision ID: 1.03 Link Frequency 0: 800MHz Link Error 0: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 0: 200MHz+ 300MHz+ 400MHz+ 500MHz+ 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- Link Frequency 1: 200MHz Link Error 1: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend- Error Handling: PFlE+ OFlE+ PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE- Prefetchable memory behind bridge Upper: 00-00 Bus Number: 00 Capabilities: [e0] HyperTransport: MSI Mapping Enable- Fixed- Mapping Address Base: 00000000fee00000 00: de 10 70 02 06 00 b0 00 a2 00 00 05 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 08 e0 e9 01 22 20 00 00 d0 00 00 00 50: 23 05 7f 80 03 00 00 00 00 00 03 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 06 15 05 00 70: 44 44 44 00 d0 09 00 00 11 00 00 00 11 11 55 00 80: 23 55 55 00 fa 00 64 0c 03 00 00 00 7f 00 00 00 90: 70 00 00 80 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 01 01 01 01 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 08 00 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0a.0 ISA bridge: nVidia Corporation MCP51 LPC Bridge (rev a3) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 00: de 10 60 02 0f 00 a0 00 a3 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 00 00 00 40: 43 10 c0 81 00 f0 ff fe fa 3e ff 00 fa 3e ff 00 50: fa 3e ff 00 00 5a 62 02 00 00 00 01 00 00 ff ff 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f9 ff 70: 10 00 ff ff c5 00 00 00 00 00 05 19 00 00 00 03 80: 09 80 00 2d 01 21 00 00 c0 00 00 01 00 00 00 00 90: 00 00 00 00 00 00 00 00 21 47 65 b7 ef cd 00 00 a0: 03 00 10 c1 00 00 00 00 00 00 00 00 00 00 00 00 b0: 90 02 ef 02 00 08 5f 08 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:0a.1 SMBus: nVidia Corporation MCP51 SMBus (rev a3) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin A routed to IRQ 255 Region 4: I/O ports at 4c00 [size=64] Region 5: I/O ports at 4c40 [size=64] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: de 10 64 02 01 00 b0 00 a3 00 05 0c 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 4c 00 00 41 4c 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 01 00 00 40: 43 10 c0 81 01 00 02 c0 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 01 40 00 00 01 44 00 00 01 48 00 00 00 00 00 00 70: 01 00 00 00 00 00 c8 fe 00 00 fe fe 01 20 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: d4 30 80 01 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 10 10 04 00 00 a0 00 00 80 30 00 00 41 44 44 11 f0: 5a ff 5f bf 00 00 00 c0 10 00 00 00 00 00 00 00 00:0a.2 RAM memory: nVidia Corporation MCP51 Memory Controller 0 (rev a3) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap- 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: de 10 72 02 00 04 a0 00 a3 00 00 05 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 10 00 00 10 00 00 10 10 50: 10 10 10 10 00 00 00 00 00 00 00 00 00 00 00 00 60: 02 03 00 00 12 00 00 00 02 00 00 00 10 01 12 00 70: 32 33 00 00 03 00 00 00 00 00 00 00 12 01 00 00 80: 10 00 00 00 00 00 00 00 00 00 00 00 30 02 00 00 90: 00 00 00 00 01 20 00 00 01 00 00 00 00 09 00 00 a0: 01 02 00 00 00 10 00 00 05 00 00 00 01 00 00 00 b0: 00 10 00 80 01 00 00 80 00 00 00 00 02 00 00 00 c0: 07 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0b.0 USB Controller: nVidia Corporation MCP51 USB Controller (rev a3) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 23 Region 0: Memory at fe02f000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ohci_hcd 00: de 10 6d 02 07 00 b0 00 a3 10 03 0c 00 00 80 00 10: 00 f0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 01 03 01 40: 43 10 c0 81 01 00 02 fe 00 00 00 00 00 00 00 00 50: 00 00 00 00 1d 47 40 00 10 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:0b.1 USB Controller: nVidia Corporation MCP51 USB Controller (rev a3) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 20 Region 0: Memory at fe02e000 (32-bit, non-prefetchable) [size=256] Capabilities: [44] Debug port: BAR=1 offset=0098 Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: ehci_hcd 00: de 10 6e 02 06 00 b0 00 a3 20 03 0c 00 00 80 00 10: 00 e0 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 02 03 01 40: 43 10 c0 81 0a 80 98 20 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 20 20 01 00 00 60 18 85 03 3c 0a 01 00 00 00 00 70: 00 00 08 05 00 10 20 80 89 3d b6 22 77 25 64 00 80: 01 00 02 fe 00 00 00 00 00 00 00 00 15 16 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 01 00 00 00 00 00 08 c0 00 00 00 00 00 00 00 00 b0: 00 11 22 33 00 00 00 00 ff 00 00 00 00 00 00 00 c0: 10 10 2d 0d 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:0d.0 IDE interface: nVidia Corporation MCP51 IDE (rev a1) (prog-if 8a [Master SecP PriP]) Subsystem: Device f043:81c0 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Region 0: [virtual] Memory at 000001f0 (32-bit, non-prefetchable) [size=8] Region 1: [virtual] Memory at 000003f0 (type 3, non-prefetchable) [size=1] Region 2: [virtual] Memory at 00000170 (32-bit, non-prefetchable) [size=8] Region 3: [virtual] Memory at 00000370 (type 3, non-prefetchable) [size=1] Region 4: I/O ports at f400 [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Kernel driver in use: pata_amd 00: de 10 65 02 05 00 b0 00 a1 8a 01 01 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 01 f4 00 00 00 00 00 00 00 00 00 00 43 f0 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 03 01 40: 43 f0 c0 81 01 00 02 00 00 00 00 00 00 00 00 00 50: 03 f0 01 00 00 00 00 00 99 99 99 20 2a 00 a8 20 60: 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 90 20 21 00 00 02 10 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 10 00 00 00 00 00 00 00 00:0e.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller (rev a1) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 22 Region 0: I/O ports at 09f0 [size=8] Region 1: I/O ports at 0bf0 [size=4] Region 2: I/O ports at 0970 [size=8] Region 3: I/O ports at 0b70 [size=4] Region 4: I/O ports at e000 [size=16] Region 5: Memory at fe02d000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] MSI: Mask- 64bit+ Count=1/4 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [cc] HyperTransport: MSI Mapping Enable+ Fixed+ Kernel driver in use: sata_nv 00: de 10 66 02 07 00 b0 00 a1 85 01 01 00 00 00 00 10: f1 09 00 00 f1 0b 00 00 71 09 00 00 71 0b 00 00 20: 01 e0 00 00 00 d0 02 fe 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01 40: 43 10 c0 81 01 b0 02 00 00 00 00 00 00 00 00 00 50: 07 00 00 00 00 00 00 00 a8 a8 a8 20 6a 00 99 20 60: 00 00 00 c0 51 0c 00 00 00 0f 06 42 00 00 00 00 70: 2c 78 c4 40 01 10 00 00 01 10 00 00 20 00 20 00 80: 00 00 00 c0 00 50 36 22 00 00 08 80 9e f7 2d 3b 90: 00 00 58 1b 00 00 00 00 06 00 06 10 00 00 01 01 a0: 14 10 00 2a 00 00 00 00 00 00 00 00 33 33 00 02 b0: 05 cc 84 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 0a 00 0a 00 08 00 03 a8 d0: 01 00 02 6b 42 00 00 00 00 00 00 00 00 00 00 e0 e0: 01 00 02 6b 42 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00:0f.0 IDE interface: nVidia Corporation MCP51 Serial ATA Controller (rev a1) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc. Device 81c0 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 21 Region 0: I/O ports at 09e0 [size=8] Region 1: I/O ports at 0be0 [size=4] Region 2: I/O ports at 0960 [size=8] Region 3: I/O ports at 0b60 [size=4] Region 4: I/O ports at cc00 [size=16] Region 5: Memory at fe02c000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [b0] MSI: Mask- 64bit+ Count=1/4 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [cc] HyperTransport: MSI Mapping Enable+ Fixed+ Kernel driver in use: sata_nv 00: de 10 67 02 07 00 b0 00 a1 85 01 01 00 00 00 00 10: e1 09 00 00 e1 0b 00 00 61 09 00 00 61 0b 00 00 20: 01 cc 00 00 00 c0 02 fe 00 00 00 00 43 10 c0 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 05 01 03 01 40: 43 10 c0 81 01 b0 02 00 00 00 00 00 00 00 00 00 50: 07 00 00 00 00 00 00 00 a8 a8 a8 20 6a 00 99 20 60: 00 00 00 c0 51 0c 00 00 00 0f 06 42 00 00 00 00 70: 2c 78 c4 40 01 10 00 00 01 10 00 00 20 00 20 00 80: 00 00 00 c0 db 46 60 f0 00 00 c6 2c ad 4c f4 fa 90: 00 00 15 20 00 00 00 00 06 00 06 10 00 00 01 01 a0: 14 10 00 00 00 00 00 00 00 00 00 00 33 33 00 02 b0: 05 cc 84 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 0a 00 0a 00 08 00 03 a8 d0: 01 00 02 6b 42 00 00 00 00 00 00 00 90 00 00 00 e0: 01 00 02 6b 42 00 00 00 00 00 00 00 0e 00 f0 07 f0: 00 00 00 00 00 00 00 00 00 00 0c 00 00 00 00 00 00:10.0 PCI bridge: nVidia Corporation MCP51 PCI Bridge (rev a2) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=128 I/O behind bridge: 0000b000-0000bfff Memory behind bridge: fdd00000-fddfffff Prefetchable memory behind bridge: fde00000-fdefffff Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr+ DiscTmrStat- DiscTmrSERREn- Capabilities: [b8] Subsystem: Gammagraphx, Inc. (or missing ID) Device 0000 Capabilities: [8c] HyperTransport: MSI Mapping Enable+ Fixed- Mapping Address Base: 00000000fee00000 00: de 10 6f 02 07 00 b0 00 a2 01 04 06 00 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 80 b0 b0 80 02 20: d0 fd d0 fd e0 fd e0 fd 00 00 00 00 00 00 00 00 30: 00 00 00 00 b8 00 00 00 00 00 00 00 ff 00 04 02 40: 00 00 03 00 01 00 02 00 07 00 00 00 00 00 44 00 50: 00 00 fe cf 00 00 00 00 ff 1f ff 1f 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 01 a8 90: 00 00 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00 a0: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 ff ff 00 00 0d 8c 00 00 00 00 00 00 c0: 00 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:10.1 Audio device: nVidia Corporation MCP51 High Definition Audio (rev a2) Subsystem: ASUSTeK Computer Inc. Device 81cb Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (500ns min, 1250ns max) Interrupt: pin B routed to IRQ 24 Region 0: Memory at fe024000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Mask+ 64bit+ Count=1/1 Enable+ Address: 00000000fee0300c Data: 4169 Masking: 00000000 Pending: 00000000 Capabilities: [6c] HyperTransport: MSI Mapping Enable+ Fixed+ Kernel driver in use: HDA Intel 00: de 10 6c 02 06 04 b0 00 a2 00 03 04 00 00 80 00 10: 00 40 02 fe 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 cb 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 02 02 05 40: 43 10 cb 81 01 50 02 c0 00 00 00 00 01 01 0f 00 50: 05 6c 81 01 0c 30 e0 fe 00 00 00 00 69 41 00 00 60: 00 00 00 00 00 00 00 00 0f 00 00 00 08 00 03 a8 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 46 00 29 00 00 00 00 00 00 00:14.0 Bridge: nVidia Corporation MCP51 Ethernet Controller (rev a3) Subsystem: ASUSTeK Computer Inc. Device 816a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 (250ns min, 5000ns max) Interrupt: pin A routed to IRQ 23 Region 0: Memory at fe02b000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at c800 [size=8] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable+ DSel=0 DScale=0 PME- Kernel driver in use: forcedeth 00: de 10 69 02 07 00 b0 00 a3 00 80 06 00 00 00 00 10: 00 b0 02 fe 01 c8 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 6a 81 30: 00 00 00 00 44 00 00 00 00 00 00 00 0b 01 01 14 40: 43 10 6a 81 01 00 02 fe 00 01 00 00 0b 00 00 10 50: 05 6c 84 01 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 0f 00 00 00 08 00 02 a8 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 11 00 00 00 42 01 00 00 00 00 00 00 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Capabilities: [80] HyperTransport: Host or Secondary Interface Command: WarmRst+ DblEnd- DevNum=0 ChainSide- HostHide+ Slave- <EOCErr- DUL- Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b- Link Config: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn- Revision ID: 1.02 Link Frequency: 1.0GHz Link Error: <Prot- <Ovfl- <EOC- CTLTm- Link Frequency Capability: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz- 1.4GHz- 1.6GHz- Vend- Feature Capability: IsocFC- LDTSTOP+ CRCTM- ECTLT- 64bA- UIDRD- ExtRS- UCnfE- 00: 22 10 00 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00 40: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 50: 01 01 01 00 01 01 01 00 01 01 01 00 01 01 01 00 60: 00 00 01 00 e4 00 00 00 20 c8 20 0f 0c 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 08 00 01 21 20 00 11 11 22 06 75 80 02 00 00 00 90: 69 01 61 01 00 00 01 00 07 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: 22 10 01 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 03 00 00 00 00 00 2f 01 00 00 00 00 01 00 00 00 50: 00 00 00 00 02 00 00 00 00 00 00 00 03 00 00 00 60: 00 00 00 00 04 00 00 00 00 00 00 00 05 00 00 00 70: 00 00 00 00 06 00 00 00 00 00 00 00 07 00 00 00 80: 03 0a 00 00 00 0b 00 00 00 00 00 00 00 00 00 00 90: 03 00 d0 00 00 ff df 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 03 00 f0 00 00 02 fe 00 b0: 03 00 e0 00 80 1f e0 00 00 00 00 00 00 00 00 00 c0: 13 b0 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 03 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 f0: 01 30 00 d0 00 00 00 00 00 00 00 00 00 00 00 00 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- 00: 22 10 02 11 00 00 00 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 01 00 00 00 01 02 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: e0 3d f8 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 46 00 00 00 00 00 00 00 80: 05 00 00 00 00 00 00 00 24 f2 7d 0c 20 13 22 00 90: 10 0c 01 00 5b 80 10 77 24 00 00 80 20 25 2b 00 a0: ef 02 00 0c 00 00 00 00 00 00 00 00 00 00 00 00 b0: a4 1e 87 29 88 00 00 00 b4 35 61 00 ea bf 0f 1f c0: 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 61 90 8c 27 00 14 48 00 48 ac 1a 0b 94 fe 81 99 e0: 7d 99 f5 b3 d9 3e 80 04 03 f2 93 16 fa b7 fb a5 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Capabilities: [f0] Secure device <?> 00: 22 10 03 11 00 00 10 00 00 00 00 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 00 40: 00 01 00 00 40 00 10 0a 00 00 00 00 00 00 00 00 50: 80 e4 a8 85 19 00 00 00 00 00 00 00 00 00 26 08 60: 4a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 11 01 32 51 21 40 70 50 00 2a 00 08 17 21 00 00 80: 00 00 07 23 13 21 13 21 00 00 00 00 00 00 00 00 90: 03 00 00 00 10 00 00 00 00 ac 2f 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 30 35 22 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 01 a7 0d 00 00 00 c0 08 26 26 26 00 e0: 00 00 00 00 20 1a 52 00 19 17 00 00 00 00 00 00 f0: 0f 00 10 00 00 00 00 00 00 00 00 00 b2 0f 04 00 01:05.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. K8N4-E Mainboard Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 32 (500ns min, 1000ns max), Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 255 Region 0: Memory at fddff000 (32-bit, non-prefetchable) [size=2K] Region 1: Memory at fddf8000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 00: 4c 10 23 80 06 00 10 02 00 10 00 0c 08 20 00 00 10: 00 f0 df fd 00 80 df fd 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 8b 80 30: 00 00 00 00 44 00 00 00 00 00 00 00 ff 01 02 04 40: 00 00 00 00 01 00 02 7e 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 88 00 00 00 f0: 10 00 00 00 82 10 00 00 43 10 8b 80 00 00 01 01 ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-28 20:52 ` Yinghai Lu @ 2009-03-28 22:16 ` Prakash Punnoor 2009-03-28 23:15 ` Yinghai Lu ` (2 more replies) 0 siblings, 3 replies; 103+ messages in thread From: Prakash Punnoor @ 2009-03-28 22:16 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci [-- Attachment #1: Type: text/plain, Size: 16439 bytes --] On Samstag 28 März 2009 21:52:45 Yinghai Lu wrote: > On Sat, Mar 28, 2009 at 6:31 AM, Prakash Punnoor <prakash@punnoor.de> wrote: > > On Samstag 28 März 2009 13:34:44 Prakash Punnoor wrote: > >> On Freitag 27 März 2009 00:10:01 Jesse Barnes wrote: > >> > On Fri, 20 Mar 2009 19:29:41 -0700 > >> > > >> > Yinghai Lu <yinghai@kernel.org> wrote: > >> > > Impact: fix bug > >> > > > >> > > Prakash reported that his c51-mcp51 system ondie sound card doesn't > >> > > work MSI but if he hack out the HT-MSI on mcp51, the MSI will work > >> > > well with sound card. > >> > > > >> > > this patch rework the nv_msi_ht_cap_quirk() > >> > > and will only try to avoid to enable ht_msi on device following that > >> > > root dev, and don't touch that root dev > >> > > > >> > > v3: will enable c51... > >> > > v4: will enable c51 kind of without leaf too. > >> > > v5: update to mainline > >> > > > >> > > Reported-by: Prakash Punnoor <prakash@punnoor.de> > >> > > Signed-off-by: Yinghai Lu <yinghai@kernel.org> > >> > > >> > Applied, thanks. Prakash if you get a chance can you try testing my > >> > linux-next branch (or just linux-next in general tomorrow) to make > >> > sure this is still ok for you? > >> > > >> > Thanks, > >> > >> Finally I am able to test the linux-next branch of pci tree after Jesse > >> gave some help with git.(Is it correct that the kernel calls itself > >> 2.6.28-rc8? I looked into quirks.c and it seems to be correctly > >> patched.) Unfortunately it doesn't seem to work for me (and I am > >> wondering why as the old v4 version seemed to work ontop of one of the > >> 2.6.29-rc versions): > >> > >> dmesg|grep HT > >> pci 0000:00:00.0: Found disabled HT MSI Mapping > >> pci 0000:00:03.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:0e.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:0f.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:10.0: Enabling HT MSI Mapping > >> pci 0000:00:09.0: Found disabled HT MSI Mapping > >> pci 0000:00:10.1: Enabling HT MSI Mapping > >> > >> Device 09.0 doesn't get enabled (good) but 00.0 also not (bad). Then my > >> Intel HDA cannot use MSI. > > > > I sprinkeld a few debugging messages around in the code and looking at > > that I don't see how the code can enable NMSI for device 00.0, but not > > for 09.0: > > > > Both will exit here: > > > > if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) > > where is > 0000:00:03.0: Enabling HT MSI Mapping > from? As I said this time there is a PCIe device more in my system (a realtek NIC): I guess because of that this one appeared - or I have some different drivers loaded? 00:03.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000a000-0000afff Memory behind bridge: fdc00000-fdcfffff Prefetchable memory behind bridge: 00000000fdd00000-00000000fddfffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Subsystem: nVidia Corporation Device 0000 Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Mask- 64bit+ Count=1/2 Enable+ Address: 00000000fee0300c Data: 4149 Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed- Mapping Address Base: 00000000fee00000 Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- Slot # 0, PowerLimit 0.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100] Virtual Channel <?> Kernel driver in use: pcieport-driver 00: de 10 fd 02 07 04 10 00 a1 00 04 06 08 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 a1 a1 00 20 20: c0 fd c0 fd d1 fd d1 fd 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 04 00 40: 0d 48 00 00 de 10 00 00 01 50 02 f8 00 00 00 00 50: 05 60 83 00 0c 30 e0 fe 00 00 00 00 49 41 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 c0 04 00 00 10 28 00 00 11 3c 11 01 90: 40 00 11 30 00 00 00 00 c0 01 48 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 The realtek nic: 01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 01) Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 25 Region 0: I/O ports at ac00 [size=256] Region 2: Memory at fdcff000 (64-bit, non-prefetchable) [size=4K] Expansion ROM at fdcc0000 [disabled] [size=128K] Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Vital Product Data Unknown small resource type 05 Unknown large resource type 6c No end tag found Capabilities: [50] MSI: Mask- 64bit+ Count=1/2 Enable+ Address: 00000000fee0300c Data: 4161 Capabilities: [60] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s <1us, L1 unlimited ExtTag+ AttnBtn+ AttnInd+ PwrInd+ RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 4096 bytes DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s, Latency L0 unlimited, L1 unlimited ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [84] Vendor Specific Information <?> Capabilities: [100] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- Capabilities: [12c] Virtual Channel <?> Capabilities: [148] Device Serial Number 68-81-ec-10-00-00-12-45 Capabilities: [154] Power Budgeting <?> Kernel driver in use: r8169 00: ec 10 68 81 07 04 10 00 01 00 00 02 10 00 00 00 10: 01 ac 00 00 00 00 00 00 04 f0 cf fd 00 00 00 00 20: 00 00 00 00 00 00 00 00 02 01 00 00 ec 10 68 81 30: 00 00 cc fd 40 00 00 00 00 00 00 00 05 01 00 00 40: 01 48 c2 f7 00 00 00 00 03 50 00 00 05 df c2 f7 50: 05 60 83 00 0c 30 e0 fe 00 00 00 00 61 41 00 00 60: 10 84 01 00 23 7f 00 00 10 58 1a 00 41 f4 03 00 70: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 09 00 4c 01 01 1c 02 00 fb ff ff 11 90: 08 30 00 00 a2 10 0a 00 67 50 08 00 c3 01 00 00 a0: 02 28 ff 01 00 00 00 00 00 08 00 00 03 00 03 00 b0: 00 00 00 00 ff 3f ff 3f ff ff 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [-- Attachment #2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 198 bytes --] ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-28 22:16 ` Prakash Punnoor @ 2009-03-28 23:15 ` Yinghai Lu 2009-03-29 1:33 ` Yinghai Lu 2009-03-29 19:30 ` [PATCH] pci: don't enable too much HT MSI mapping -v6 Yinghai Lu 2 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-03-28 23:15 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Sat, Mar 28, 2009 at 3:16 PM, Prakash Punnoor <prakash@punnoor.de> wrote: > On Samstag 28 März 2009 21:52:45 Yinghai Lu wrote: >> On Sat, Mar 28, 2009 at 6:31 AM, Prakash Punnoor <prakash@punnoor.de> wrote: >> > On Samstag 28 März 2009 13:34:44 Prakash Punnoor wrote: >> >> On Freitag 27 März 2009 00:10:01 Jesse Barnes wrote: >> >> > On Fri, 20 Mar 2009 19:29:41 -0700 >> >> > >> >> > Yinghai Lu <yinghai@kernel.org> wrote: >> >> > > Impact: fix bug >> >> > > >> >> > > Prakash reported that his c51-mcp51 system ondie sound card doesn't >> >> > > work MSI but if he hack out the HT-MSI on mcp51, the MSI will work >> >> > > well with sound card. >> >> > > >> >> > > this patch rework the nv_msi_ht_cap_quirk() >> >> > > and will only try to avoid to enable ht_msi on device following that >> >> > > root dev, and don't touch that root dev >> >> > > >> >> > > v3: will enable c51... >> >> > > v4: will enable c51 kind of without leaf too. >> >> > > v5: update to mainline >> >> > > >> >> > > Reported-by: Prakash Punnoor <prakash@punnoor.de> >> >> > > Signed-off-by: Yinghai Lu <yinghai@kernel.org> >> >> > >> >> > Applied, thanks. Prakash if you get a chance can you try testing my >> >> > linux-next branch (or just linux-next in general tomorrow) to make >> >> > sure this is still ok for you? >> >> > >> >> > Thanks, >> >> >> >> Finally I am able to test the linux-next branch of pci tree after Jesse >> >> gave some help with git.(Is it correct that the kernel calls itself >> >> 2.6.28-rc8? I looked into quirks.c and it seems to be correctly >> >> patched.) Unfortunately it doesn't seem to work for me (and I am >> >> wondering why as the old v4 version seemed to work ontop of one of the >> >> 2.6.29-rc versions): >> >> >> >> dmesg|grep HT >> >> pci 0000:00:00.0: Found disabled HT MSI Mapping >> >> pci 0000:00:03.0: Enabling HT MSI Mapping >> >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> >> pci 0000:00:0e.0: Enabling HT MSI Mapping >> >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> >> pci 0000:00:0f.0: Enabling HT MSI Mapping >> >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> >> pci 0000:00:10.0: Enabling HT MSI Mapping >> >> pci 0000:00:09.0: Found disabled HT MSI Mapping >> >> pci 0000:00:10.1: Enabling HT MSI Mapping >> >> >> >> Device 09.0 doesn't get enabled (good) but 00.0 also not (bad). Then my >> >> Intel HDA cannot use MSI. >> > >> > I sprinkeld a few debugging messages around in the code and looking at >> > that I don't see how the code can enable NMSI for device 00.0, but not >> > for 09.0: >> > >> > Both will exit here: >> > >> > if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) >> >> where is >> 0000:00:03.0: Enabling HT MSI Mapping >> from? > > As I said this time there is a PCIe device more in my system (a realtek NIC): > I guess because of that this one appeared - or I have some different drivers > loaded? > > 00:03.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) (prog-if 00 [Normal decode]) > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0, Cache Line Size: 32 bytes > Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 > I/O behind bridge: 0000a000-0000afff > Memory behind bridge: fdc00000-fdcfffff > Prefetchable memory behind bridge: 00000000fdd00000-00000000fddfffff > Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- > BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- > PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- > Capabilities: [40] Subsystem: nVidia Corporation Device 0000 > Capabilities: [48] Power Management version 2 > Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) > Status: D0 PME-Enable- DSel=0 DScale=0 PME- > Capabilities: [50] MSI: Mask- 64bit+ Count=1/2 Enable+ > Address: 00000000fee0300c Data: 4149 > Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed- > Mapping Address Base: 00000000fee00000 > Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00 > DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us > ExtTag- RBE- FLReset- > DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- > RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ > MaxPayload 128 bytes, MaxReadReq 512 bytes > DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- > LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <512ns, L1 <4us > ClockPM- Surprise- LLActRep+ BwNot- > LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ > ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- > LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- > SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- > Slot # 0, PowerLimit 0.000000; Interlock- NoCompl- > SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- > Control: AttnInd Off, PwrInd On, Power- Interlock- > SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- > Changed: MRL- PresDet+ LinkState+ > RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- > RootCap: CRSVisible- > RootSta: PME ReqID 0000, PMEStatus- PMEPending- > Capabilities: [100] Virtual Channel <?> > Kernel driver in use: pcieport-driver > 00: de 10 fd 02 07 04 10 00 a1 00 04 06 08 00 01 00 > 10: 00 00 00 00 00 00 00 00 00 01 01 00 a1 a1 00 20 > 20: c0 fd c0 fd d1 fd d1 fd 00 00 00 00 00 00 00 00 > 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 04 00 > 40: 0d 48 00 00 de 10 00 00 01 50 02 f8 00 00 00 00 > 50: 05 60 83 00 0c 30 e0 fe 00 00 00 00 49 41 00 00 > 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 > 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 80: 10 00 41 01 c0 04 00 00 10 28 00 00 11 3c 11 01 > 90: 40 00 11 30 00 00 00 00 c0 01 48 01 00 00 00 00 > a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > > The realtek nic: > 01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller (rev 01) > Subsystem: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin A routed to IRQ 25 > Region 0: I/O ports at ac00 [size=256] > Region 2: Memory at fdcff000 (64-bit, non-prefetchable) [size=4K] > Expansion ROM at fdcc0000 [disabled] [size=128K] > Capabilities: [40] Power Management version 2 > Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0-,D1+,D2+,D3hot+,D3cold+) > Status: D0 PME-Enable- DSel=0 DScale=0 PME- > Capabilities: [48] Vital Product Data > Unknown small resource type 05 > Unknown large resource type 6c > No end tag found > Capabilities: [50] MSI: Mask- 64bit+ Count=1/2 Enable+ > Address: 00000000fee0300c Data: 4161 > Capabilities: [60] Express (v1) Endpoint, MSI 00 > DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s <1us, L1 unlimited > ExtTag+ AttnBtn+ AttnInd+ PwrInd+ RBE- FLReset- > DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- > RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ > MaxPayload 128 bytes, MaxReadReq 4096 bytes > DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend- > LnkCap: Port #0, Speed 2.5GT/s, Width x4, ASPM L0s, Latency L0 unlimited, L1 unlimited > ClockPM- Surprise- LLActRep- BwNot- > LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ > ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- > LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- > Capabilities: [84] Vendor Specific Information <?> > Capabilities: [100] Advanced Error Reporting > UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- > UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- > UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- > CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- > CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- > AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- > Capabilities: [12c] Virtual Channel <?> > Capabilities: [148] Device Serial Number 68-81-ec-10-00-00-12-45 > Capabilities: [154] Power Budgeting <?> > Kernel driver in use: r8169 > 00: ec 10 68 81 07 04 10 00 01 00 00 02 10 00 00 00 > 10: 01 ac 00 00 00 00 00 00 04 f0 cf fd 00 00 00 00 > 20: 00 00 00 00 00 00 00 00 02 01 00 00 ec 10 68 81 > 30: 00 00 cc fd 40 00 00 00 00 00 00 00 05 01 00 00 > 40: 01 48 c2 f7 00 00 00 00 03 50 00 00 05 df c2 f7 > 50: 05 60 83 00 0c 30 e0 fe 00 00 00 00 61 41 00 00 > 60: 10 84 01 00 23 7f 00 00 10 58 1a 00 41 f4 03 00 > 70: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 > 80: 00 00 00 00 09 00 4c 01 01 1c 02 00 fb ff ff 11 > 90: 08 30 00 00 a2 10 0a 00 67 50 08 00 c3 01 00 00 > a0: 02 28 ff 01 00 00 00 00 00 08 00 00 03 00 03 00 > b0: 00 00 00 00 ff 3f ff 3f ff ff 00 00 00 00 00 00 > c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > ok, when you plug in the card, BIOS will enable the pcie bridge... need other way to figure out it is HT tunnel or HT end devices. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-28 22:16 ` Prakash Punnoor 2009-03-28 23:15 ` Yinghai Lu @ 2009-03-29 1:33 ` Yinghai Lu 2009-03-29 9:15 ` Prakash Punnoor 2009-03-29 19:30 ` [PATCH] pci: don't enable too much HT MSI mapping -v6 Yinghai Lu 2 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-03-29 1:33 UTC (permalink / raw) To: Prakash Punnoor, Jesse Barnes Cc: Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci please try follwing patch over pci/linux-next Thanks YH [PATCH] pci: don't enable too much HT MSI mapping -v6 Impact: fix bug Prakash reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only try to avoid to enable ht_msi on device following that root dev, and don't touch that root dev v6: only do that trick with end_device on the chain. Reported-by: Prakash Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index faf02dd..52714f2 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2206,6 +2206,33 @@ static int __devinit host_bridge_with_leaf(struct pci_dev *host_bridge) return found; } +#define PCI_HT_CAP_SLAVE_CTRL0 4 /* link control */ +#define PCI_HT_CAP_SLAVE_CTRL1 8 /* link control to */ + +static int __devinit is_end_of_ht_chain(struct pci_dev *dev) +{ + int pos, ctrl_off; + int end = 0; + u16 flags, ctrl; + + pos = pci_find_ht_capability(dev, HT_CAPTYPE_SLAVE); + + if (!pos) + goto out; + + pci_read_config_word(dev, pos + PCI_CAP_FLAGS, &flags); + + ctrl_off = ((flags >> 10) & 1) ? + PCI_HT_CAP_SLAVE_CTRL0 : PCI_HT_CAP_SLAVE_CTRL1; + pci_read_config_word(dev, pos + ctrl_off, &ctrl); + + if (ctrl & (1 << 6)) + end = 1; + +out: + return end; +} + static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) { struct pci_dev *host_bridge; @@ -2230,8 +2257,9 @@ static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) if (!found) return; - /* don't enable host_bridge with leaf directly here */ - if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) + /* don't enable end_device/host_bridge with leaf directly here */ + if (host_bridge == dev && is_end_of_ht_chain(host_bridge) && + host_bridge_with_leaf(host_bridge)) goto out; /* root did that ! */ ^ permalink raw reply related [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-29 1:33 ` Yinghai Lu @ 2009-03-29 9:15 ` Prakash Punnoor 2009-03-29 9:32 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-03-29 9:15 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci [-- Attachment #1: Type: text/plain, Size: 1829 bytes --] On Sonntag 29 März 2009 03:33:03 Yinghai Lu wrote: > please try follwing patch over pci/linux-next > > Thanks > > YH > > [PATCH] pci: don't enable too much HT MSI mapping -v6 Works fine now, thanks! pci 0000:00:00.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Enabling HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:05.0: Boot video device pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0e.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0f.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.1: Enabling HT MSI Mapping So drop my patch and merge v6 of Yinghai Lu's one. Cheers, Prakash [-- Attachment #2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 198 bytes --] ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-29 9:15 ` Prakash Punnoor @ 2009-03-29 9:32 ` Yinghai Lu 2009-03-29 12:50 ` Prakash Punnoor 0 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-03-29 9:32 UTC (permalink / raw) To: Prakash Punnoor Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Sun, Mar 29, 2009 at 2:15 AM, Prakash Punnoor <prakash@punnoor.de> wrote: > On Sonntag 29 März 2009 03:33:03 Yinghai Lu wrote: >> please try follwing patch over pci/linux-next >> >> Thanks >> >> YH >> >> [PATCH] pci: don't enable too much HT MSI mapping -v6 > > Works fine now, thanks! > > pci 0000:00:00.0: Found disabled HT MSI Mapping > pci 0000:00:00.0: Enabling HT MSI Mapping > pci 0000:00:00.0: Found enabled HT MSI Mapping > pci 0000:00:05.0: Boot video device > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0e.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0f.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.1: Enabling HT MSI Mapping > can you put you pcie network card in the pcie slot belong to c51? we should find 00:03.0 the pcie bridge... Thanks YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-29 9:32 ` Yinghai Lu @ 2009-03-29 12:50 ` Prakash Punnoor 2009-03-29 19:27 ` Yinghai Lu 0 siblings, 1 reply; 103+ messages in thread From: Prakash Punnoor @ 2009-03-29 12:50 UTC (permalink / raw) To: Yinghai Lu Cc: Jesse Barnes, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci [-- Attachment #1: Type: text/plain, Size: 8177 bytes --] On Sonntag 29 März 2009 11:32:56 Yinghai Lu wrote: > On Sun, Mar 29, 2009 at 2:15 AM, Prakash Punnoor <prakash@punnoor.de> wrote: > > On Sonntag 29 März 2009 03:33:03 Yinghai Lu wrote: > >> please try follwing patch over pci/linux-next > >> > >> Thanks > >> > >> YH > >> > >> [PATCH] pci: don't enable too much HT MSI mapping -v6 > > > > Works fine now, thanks! > > > > pci 0000:00:00.0: Found disabled HT MSI Mapping > > pci 0000:00:00.0: Enabling HT MSI Mapping > > pci 0000:00:00.0: Found enabled HT MSI Mapping > > pci 0000:00:05.0: Boot video device > > pci 0000:00:09.0: Found disabled HT MSI Mapping > > pci 0000:00:0e.0: Enabling HT MSI Mapping > > pci 0000:00:09.0: Found disabled HT MSI Mapping > > pci 0000:00:0f.0: Enabling HT MSI Mapping > > pci 0000:00:09.0: Found disabled HT MSI Mapping > > pci 0000:00:10.0: Enabling HT MSI Mapping > > pci 0000:00:09.0: Found disabled HT MSI Mapping > > pci 0000:00:10.1: Enabling HT MSI Mapping > > can you put you pcie network card in the pcie slot belong to c51? > we should find 00:03.0 the pcie bridge... > Above is when inserted in PCIe 1x slot, now in my PCIe 16x slot (I don't have other options): pci 0000:00:00.0: Found disabled HT MSI Mapping pci 0000:00:00.0: Enabling HT MSI Mapping pci 0000:00:00.0: Found enabled HT MSI Mapping pci 0000:00:05.0: Boot video device pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0e.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:0f.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.0: Enabling HT MSI Mapping pci 0000:00:09.0: Found disabled HT MSI Mapping pci 0000:00:10.1: Enabling HT MSI Mapping 00:04.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000a000-0000afff Memory behind bridge: fdc00000-fdcfffff Prefetchable memory behind bridge: 00000000fdd00000-00000000fddfffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Subsystem: nVidia Corporation Device 0000 Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [50] MSI: Mask- 64bit+ Count=1/2 Enable+ Address: 00000000fee0300c Data: 4149 Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed- Mapping Address Base: 00000000fee00000 Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us ClockPM- Surprise- LLActRep+ BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- Slot # 0, PowerLimit 0.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet+ LinkState+ RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID 0000, PMEStatus- PMEPending- Capabilities: [100] Virtual Channel <?> Kernel driver in use: pcieport-driver 00: de 10 fb 02 07 04 10 00 a1 00 04 06 08 00 01 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 a1 a1 00 20 20: c0 fd c0 fd d1 fd d1 fd 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 04 00 40: 0d 48 00 00 de 10 00 00 01 50 02 f8 00 00 00 00 50: 05 60 83 00 0c 30 e0 fe 00 00 00 00 49 41 00 00 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 10 00 41 01 c0 04 00 00 10 28 00 00 01 3d 11 00 90: 40 00 11 30 00 00 00 00 c0 01 48 01 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [-- Attachment #2: This is a digitally signed message part. --] [-- Type: application/pgp-signature, Size: 198 bytes --] ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend 2009-03-29 12:50 ` Prakash Punnoor @ 2009-03-29 19:27 ` Yinghai Lu 0 siblings, 0 replies; 103+ messages in thread From: Yinghai Lu @ 2009-03-29 19:27 UTC (permalink / raw) To: Prakash Punnoor, Jesse Barnes Cc: Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci Prakash Punnoor wrote: > On Sonntag 29 März 2009 11:32:56 Yinghai Lu wrote: >> On Sun, Mar 29, 2009 at 2:15 AM, Prakash Punnoor <prakash@punnoor.de> wrote: >>> On Sonntag 29 März 2009 03:33:03 Yinghai Lu wrote: >>>> please try follwing patch over pci/linux-next >>>> >>>> Thanks >>>> >>>> YH >>>> >>>> [PATCH] pci: don't enable too much HT MSI mapping -v6 >>> Works fine now, thanks! >>> >>> pci 0000:00:00.0: Found disabled HT MSI Mapping >>> pci 0000:00:00.0: Enabling HT MSI Mapping >>> pci 0000:00:00.0: Found enabled HT MSI Mapping >>> pci 0000:00:05.0: Boot video device >>> pci 0000:00:09.0: Found disabled HT MSI Mapping >>> pci 0000:00:0e.0: Enabling HT MSI Mapping >>> pci 0000:00:09.0: Found disabled HT MSI Mapping >>> pci 0000:00:0f.0: Enabling HT MSI Mapping >>> pci 0000:00:09.0: Found disabled HT MSI Mapping >>> pci 0000:00:10.0: Enabling HT MSI Mapping >>> pci 0000:00:09.0: Found disabled HT MSI Mapping >>> pci 0000:00:10.1: Enabling HT MSI Mapping >> can you put you pcie network card in the pcie slot belong to c51? >> we should find 00:03.0 the pcie bridge... >> > > > Above is when inserted in PCIe 1x slot, now in my PCIe 16x slot > (I don't have other options): > > pci 0000:00:00.0: Found disabled HT MSI Mapping > pci 0000:00:00.0: Enabling HT MSI Mapping > pci 0000:00:00.0: Found enabled HT MSI Mapping > pci 0000:00:05.0: Boot video device > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0e.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:0f.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.0: Enabling HT MSI Mapping > pci 0000:00:09.0: Found disabled HT MSI Mapping > pci 0000:00:10.1: Enabling HT MSI Mapping > > > > 00:04.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) (prog-if 00 [Normal decode]) > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- > Latency: 0, Cache Line Size: 32 bytes > Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 > I/O behind bridge: 0000a000-0000afff > Memory behind bridge: fdc00000-fdcfffff > Prefetchable memory behind bridge: 00000000fdd00000-00000000fddfffff > Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ <SERR- <PERR- > BridgeCtl: Parity- SERR- NoISA+ VGA- MAbort- >Reset- FastB2B- > PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- > Capabilities: [40] Subsystem: nVidia Corporation Device 0000 > Capabilities: [48] Power Management version 2 > Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) > Status: D0 PME-Enable- DSel=0 DScale=0 PME- > Capabilities: [50] MSI: Mask- 64bit+ Count=1/2 Enable+ > Address: 00000000fee0300c Data: 4149 > Capabilities: [60] HyperTransport: MSI Mapping Enable- Fixed- > Mapping Address Base: 00000000fee00000 > Capabilities: [80] Express (v1) Root Port (Slot+), MSI 00 > DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <4us > ExtTag- RBE- FLReset- > DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- > RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ > MaxPayload 128 bytes, MaxReadReq 512 bytes > DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- > LnkCap: Port #0, Speed 2.5GT/s, Width x16, ASPM L0s L1, Latency L0 <512ns, L1 <4us > ClockPM- Surprise- LLActRep+ BwNot- > LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ > ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- > LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- > SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surpise- > Slot # 0, PowerLimit 0.000000; Interlock- NoCompl- > SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- > Control: AttnInd Off, PwrInd On, Power- Interlock- > SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- > Changed: MRL- PresDet+ LinkState+ > RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- > RootCap: CRSVisible- > RootSta: PME ReqID 0000, PMEStatus- PMEPending- > Capabilities: [100] Virtual Channel <?> > Kernel driver in use: pcieport-driver > 00: de 10 fb 02 07 04 10 00 a1 00 04 06 08 00 01 00 > 10: 00 00 00 00 00 00 00 00 00 01 01 00 a1 a1 00 20 > 20: c0 fd c0 fd d1 fd d1 fd 00 00 00 00 00 00 00 00 > 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 00 04 00 > 40: 0d 48 00 00 de 10 00 00 01 50 02 f8 00 00 00 00 > 50: 05 60 83 00 0c 30 e0 fe 00 00 00 00 49 41 00 00 > 60: 08 80 00 a8 00 00 e0 fe 00 00 00 00 00 00 00 00 > 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > 80: 10 00 41 01 c0 04 00 00 10 28 00 00 01 3d 11 00 > 90: 40 00 11 30 00 00 00 00 c0 01 48 01 00 00 00 00 > a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 > > ok, looks good. Jesse, please apply the -v6, in addition to -v5. YH ^ permalink raw reply [flat|nested] 103+ messages in thread
* [PATCH] pci: don't enable too much HT MSI mapping -v6 2009-03-28 22:16 ` Prakash Punnoor 2009-03-28 23:15 ` Yinghai Lu 2009-03-29 1:33 ` Yinghai Lu @ 2009-03-29 19:30 ` Yinghai Lu 2009-03-30 19:17 ` Jesse Barnes 2 siblings, 1 reply; 103+ messages in thread From: Yinghai Lu @ 2009-03-29 19:30 UTC (permalink / raw) To: Prakash Punnoor, Jesse Barnes Cc: Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci Impact: fix bug Prakash reported that his c51-mcp51 system ondie sound card doesn't work MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with sound card. this patch rework the nv_msi_ht_cap_quirk() and will only try to avoid to enable ht_msi on device following that root dev, and don't touch that root dev v6: only do that trick with end_device on the chain. Reported-by: Prakash Punnoor <prakash@punnoor.de> Tested-by: Prakash Punnoor <prakash@punnoor.de> Signed-off-by: Yinghai Lu <yinghai@kernel.org> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index faf02dd..52714f2 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -2206,6 +2206,33 @@ static int __devinit host_bridge_with_leaf(struct pci_dev *host_bridge) return found; } +#define PCI_HT_CAP_SLAVE_CTRL0 4 /* link control */ +#define PCI_HT_CAP_SLAVE_CTRL1 8 /* link control to */ + +static int __devinit is_end_of_ht_chain(struct pci_dev *dev) +{ + int pos, ctrl_off; + int end = 0; + u16 flags, ctrl; + + pos = pci_find_ht_capability(dev, HT_CAPTYPE_SLAVE); + + if (!pos) + goto out; + + pci_read_config_word(dev, pos + PCI_CAP_FLAGS, &flags); + + ctrl_off = ((flags >> 10) & 1) ? + PCI_HT_CAP_SLAVE_CTRL0 : PCI_HT_CAP_SLAVE_CTRL1; + pci_read_config_word(dev, pos + ctrl_off, &ctrl); + + if (ctrl & (1 << 6)) + end = 1; + +out: + return end; +} + static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) { struct pci_dev *host_bridge; @@ -2230,8 +2257,9 @@ static void __devinit nv_ht_enable_msi_mapping(struct pci_dev *dev) if (!found) return; - /* don't enable host_bridge with leaf directly here */ - if (host_bridge == dev && host_bridge_with_leaf(host_bridge)) + /* don't enable end_device/host_bridge with leaf directly here */ + if (host_bridge == dev && is_end_of_ht_chain(host_bridge) && + host_bridge_with_leaf(host_bridge)) goto out; /* root did that ! */ ^ permalink raw reply related [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: don't enable too much HT MSI mapping -v6 2009-03-29 19:30 ` [PATCH] pci: don't enable too much HT MSI mapping -v6 Yinghai Lu @ 2009-03-30 19:17 ` Jesse Barnes 0 siblings, 0 replies; 103+ messages in thread From: Jesse Barnes @ 2009-03-30 19:17 UTC (permalink / raw) To: Yinghai Lu Cc: Prakash Punnoor, Matthew Wilcox, Andrew Morton, Ingo Molnar, Eric W. Biederman, Robert Hancock, david, linux-kernel, linux-pci On Sun, 29 Mar 2009 12:30:05 -0700 Yinghai Lu <yinghai@kernel.org> wrote: > Impact: fix bug > > Prakash reported that his c51-mcp51 system ondie sound card doesn't > work MSI but if he hack out the HT-MSI on mcp51, the MSI will work > well with sound card. > > this patch rework the nv_msi_ht_cap_quirk() > and will only try to avoid to enable ht_msi on device following that > root dev, and don't touch that root dev > > v6: only do that trick with end_device on the chain. > > Reported-by: Prakash Punnoor <prakash@punnoor.de> > Tested-by: Prakash Punnoor <prakash@punnoor.de> > Signed-off-by: Yinghai Lu <yinghai@kernel.org> Applied, thanks for testing & fixing the fix! Thanks, -- Jesse Barnes, Intel Open Source Technology Center ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-22 12:54 ` Eric W. Biederman 2009-02-22 15:17 ` Prakash Punnoor @ 2009-02-22 23:42 ` Matthew Wilcox 1 sibling, 0 replies; 103+ messages in thread From: Matthew Wilcox @ 2009-02-22 23:42 UTC (permalink / raw) To: Eric W. Biederman Cc: Prakash Punnoor, Robert Hancock, Yinghai Lu, Jesse Barnes, Andrew Morton, david, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Sun, Feb 22, 2009 at 04:54:54AM -0800, Eric W. Biederman wrote: > + pci_write_config_dword(dev, pos + HT_MSI_ADDR_LO, > + (HT_MSI_FIXED_ADDR & HT_MSI_FIXED_ADDR)); Presumably you meant "(HT_MSI_FIXED_ADDR & 0xffffffff)" here? Not that it makes any difference, since it'll be implicitly truncated. > + pci_write_config_dword(dev, pos + HT_MSI_ADDR_HI, > + (HT_MSI_FIXED_ADDR >> 32)); > + } -- Matthew Wilcox Intel Open Source Technology Centre "Bill, look, we understand that you're interested in selling us this operating system, but compare it to ours. We can't possibly take such a retrograde step." ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: [PATCH] pci: enable MSI on 8132 2009-02-21 8:58 ` Eric W. Biederman 2009-02-21 10:23 ` Yinghai Lu @ 2009-02-22 3:42 ` Grant Grundler 1 sibling, 0 replies; 103+ messages in thread From: Grant Grundler @ 2009-02-22 3:42 UTC (permalink / raw) To: Eric W. Biederman Cc: Yinghai Lu, Robert Hancock, Jesse Barnes, Andrew Morton, david, Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux, linux-pci On Sat, Feb 21, 2009 at 12:58:31AM -0800, Eric W. Biederman wrote: ... > The difference is that there is a magic address on x86 that all MSI > cycles are sent to. I think it is 0xfffe0000. arch/x86/include/asm/msidef.h:#define MSI_ADDR_BASE_LO 0xfee00000 Intel spells out the details in: http://www.intel.com/products/processor/manuals/index.htm "Volume 3A: System Programming Guide, Part 1" See chapter "9.4 LOCAL APIC" > In an msi to HT > mapping capability it is necessary to program in the address to listen > for msi packets. That is very much an arch dependent thing. Indeed. parisc and (AFAIK) alpha have the same ability but use completely different address ranges depending on the chipset as well. thanks, grant ^ permalink raw reply [flat|nested] 103+ messages in thread
* Re: mpt fusion broken sometime since 2.6.24 2009-02-18 2:40 ` david 2009-02-18 2:49 ` Yinghai Lu @ 2009-02-18 3:12 ` david 1 sibling, 0 replies; 103+ messages in thread From: david @ 2009-02-18 3:12 UTC (permalink / raw) To: Yinghai Lu; +Cc: Matthew Wilcox, linux-kernel, linux-scsi, DL-MPTFusionLinux On Tue, 17 Feb 2009, david@lang.hm wrote: > On Tue, 17 Feb 2009, david@lang.hm wrote: > >>> do you have chance to try current tip/master >>> http://people.redhat.com/mingo/tip.git/readme.txt >>> or 2.6.29-rcX >>> plus following patch? >> >> I will see about trying this. > > does the fact that I am compiling a monolithic kernel (no modules) make any > difference related to the patch below? this patch on the (current as a few min ago) linus git tree doesn't work, trying adding the other patch now. David Lang > David Lang > >>> or can you check if there is update fw for your LSI card? >> >> this is more work, I'll look into that as well. >> >> David Lang >> >>> [PATCH] mpt: fix enable lsi sas to use msi as default >>> >>> Impact: fix bug >>> >>> the third param in module_param(,,) is perm instead of default value. >>> we still need to assign default at first. >>> >>> Signed-off-by: Yinghai Lu <yinghai@kernel.org> >>> >>> --- >>> drivers/message/fusion/mptbase.c | 4 ++-- >>> 1 file changed, 2 insertions(+), 2 deletions(-) >>> >>> Index: linux-2.6/drivers/message/fusion/mptbase.c >>> =================================================================== >>> --- linux-2.6.orig/drivers/message/fusion/mptbase.c >>> +++ linux-2.6/drivers/message/fusion/mptbase.c >>> @@ -90,8 +90,8 @@ module_param(mpt_msi_enable_fc, int, 0); >>> MODULE_PARM_DESC(mpt_msi_enable_fc, " Enable MSI Support for FC \ >>> controllers (default=0)"); >>> >>> -static int mpt_msi_enable_sas; >>> -module_param(mpt_msi_enable_sas, int, 1); >>> +static int mpt_msi_enable_sas = 1; >>> +module_param(mpt_msi_enable_sas, int, 0); >>> MODULE_PARM_DESC(mpt_msi_enable_sas, " Enable MSI Support for SAS \ >>> controllers (default=1)"); >>> >>> >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html >> Please read the FAQ at http://www.tux.org/lkml/ >> > -- > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ > ^ permalink raw reply [flat|nested] 103+ messages in thread
end of thread, other threads:[~2009-03-30 19:17 UTC | newest] Thread overview: 103+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2009-02-17 22:24 mpt fusion broken sometime since 2.6.24 david 2009-02-17 21:44 ` david 2009-02-17 23:00 ` Matthew Wilcox 2009-02-17 23:07 ` david 2009-02-17 23:11 ` Matthew Wilcox 2009-02-17 23:20 ` Yinghai Lu 2009-02-17 23:21 ` david 2009-02-17 23:11 ` Yinghai Lu 2009-02-17 23:20 ` david 2009-02-17 23:22 ` Yinghai Lu 2009-02-17 23:37 ` david 2009-02-18 2:01 ` Yinghai Lu 2009-02-18 2:03 ` david 2009-02-18 2:14 ` Yinghai Lu 2009-02-18 2:32 ` david 2009-02-18 2:28 ` Yinghai Lu 2009-02-18 2:34 ` david 2009-02-18 2:40 ` david 2009-02-18 2:49 ` Yinghai Lu 2009-02-18 3:26 ` david 2009-02-18 3:28 ` Yinghai Lu 2009-02-18 3:35 ` david 2009-02-18 3:45 ` david 2009-02-18 3:47 ` Yinghai Lu 2009-02-18 4:14 ` david 2009-02-18 4:36 ` Yinghai Lu 2009-02-18 4:36 ` Yinghai Lu 2009-02-18 5:06 ` Yinghai Lu 2009-02-18 5:06 ` Yinghai Lu 2009-02-18 5:10 ` Yinghai Lu 2009-02-18 5:10 ` Yinghai Lu 2009-02-18 4:40 ` [PATCH] pci: enable MSI on 8132 Yinghai Lu 2009-02-18 12:21 ` Matthew Wilcox 2009-02-18 12:27 ` david 2009-02-18 18:04 ` Andrew Morton 2009-02-18 18:18 ` david 2009-02-18 18:32 ` Greg KH 2009-02-18 18:38 ` James Bottomley 2009-02-18 18:40 ` david 2009-02-18 19:08 ` Yinghai Lu 2009-02-18 19:14 ` James Bottomley 2009-02-18 19:25 ` Yinghai Lu 2009-02-18 20:12 ` Jeff Garzik 2009-02-18 20:18 ` James Bottomley 2009-02-18 19:15 ` Andrew Morton 2009-02-18 19:29 ` Yinghai Lu 2009-02-18 19:33 ` James Bottomley 2009-02-19 4:21 ` Prakash, Sathya 2009-02-18 19:00 ` Jesse Barnes 2009-02-19 3:39 ` Robert Hancock 2009-02-21 7:50 ` Eric W. Biederman 2009-02-21 8:31 ` Yinghai Lu 2009-02-21 8:58 ` Eric W. Biederman 2009-02-21 10:23 ` Yinghai Lu 2009-02-21 18:59 ` Robert Hancock 2009-02-22 12:08 ` Prakash Punnoor 2009-02-22 12:54 ` Eric W. Biederman 2009-02-22 15:17 ` Prakash Punnoor 2009-02-22 21:45 ` Yinghai Lu 2009-02-22 22:07 ` Yinghai Lu 2009-02-23 6:18 ` Yinghai Lu 2009-02-23 18:21 ` Prakash Punnoor 2009-02-23 18:50 ` Yinghai Lu 2009-02-23 19:01 ` Prakash Punnoor 2009-02-23 19:51 ` [PATCH] pci: don't enable too many HT MSI mapping Yinghai Lu 2009-02-24 17:37 ` Jesse Barnes 2009-02-27 6:52 ` Prakash Punnoor 2009-02-27 20:59 ` Yinghai Lu 2009-02-28 8:25 ` Prakash Punnoor 2009-02-28 20:57 ` Yinghai Lu 2009-02-28 22:43 ` Yinghai Lu 2009-03-01 7:50 ` Prakash Punnoor 2009-03-01 7:58 ` Prakash Punnoor 2009-03-01 8:12 ` Yinghai Lu 2009-03-01 8:29 ` Prakash Punnoor 2009-03-04 7:15 ` Prakash Punnoor 2009-03-04 8:21 ` Yinghai Lu 2009-03-05 17:01 ` Matthew Wilcox 2009-03-05 17:15 ` Matthew Wilcox 2009-03-05 23:26 ` Yinghai Lu 2009-03-05 23:45 ` Prakash Punnoor 2009-03-06 1:10 ` Matthew Wilcox 2009-03-06 4:15 ` Yinghai Lu 2009-03-06 9:10 ` Prakash Punnoor 2009-03-21 2:29 ` [PATCH] pci: don't enable too much HT MSI mapping -v5 -resend Yinghai Lu 2009-03-26 23:10 ` Jesse Barnes 2009-03-28 12:34 ` Prakash Punnoor 2009-03-28 13:31 ` Prakash Punnoor 2009-03-28 20:18 ` Yinghai Lu 2009-03-28 22:11 ` Prakash Punnoor 2009-03-28 20:52 ` Yinghai Lu 2009-03-28 22:16 ` Prakash Punnoor 2009-03-28 23:15 ` Yinghai Lu 2009-03-29 1:33 ` Yinghai Lu 2009-03-29 9:15 ` Prakash Punnoor 2009-03-29 9:32 ` Yinghai Lu 2009-03-29 12:50 ` Prakash Punnoor 2009-03-29 19:27 ` Yinghai Lu 2009-03-29 19:30 ` [PATCH] pci: don't enable too much HT MSI mapping -v6 Yinghai Lu 2009-03-30 19:17 ` Jesse Barnes 2009-02-22 23:42 ` [PATCH] pci: enable MSI on 8132 Matthew Wilcox 2009-02-22 3:42 ` Grant Grundler 2009-02-18 3:12 ` mpt fusion broken sometime since 2.6.24 david
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