From: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> To: Marek Szyprowski <m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>, will.deacon-5wv7dgnIgG8@public.gmane.org, joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, punit.agrawal-5wv7dgnIgG8@public.gmane.org, Inki Dae <inki.dae-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>, thunder.leizhen-hv44wF8Li93QT0dZR+AlfA@public.gmane.org Subject: Re: [PATCH v7 22/22] iommu/dma: Avoid PCI host bridge windows Date: Wed, 14 Sep 2016 12:10:54 +0100 [thread overview] Message-ID: <49c51c4f-cb00-445d-b8f8-b632babf2b3e@arm.com> (raw) In-Reply-To: <ab8693f6-20d6-2a95-9f1f-0607e72bc012-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> Hi Marek, On 14/09/16 11:55, Marek Szyprowski wrote: > Hi Robin, > > > On 2016-09-12 18:14, Robin Murphy wrote: >> With our DMA ops enabled for PCI devices, we should avoid allocating >> IOVAs which a host bridge might misinterpret as peer-to-peer DMA and >> lead to faults, corruption or other badness. To be safe, punch out holes >> for all of the relevant host bridge's windows when initialising a DMA >> domain for a PCI device. >> >> CC: Marek Szyprowski <m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> >> CC: Inki Dae <inki.dae-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> >> Reported-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org> >> Signed-off-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> > > I don't know much about PCI and their IOMMU integration, but can't we use > the direct mapping region feature of iommu core for it? There are already > iommu_get_dm_regions(), iommu_put_dm_regions() and > iommu_request_dm_for_dev() > functions for handling them... It's rather the opposite problem - in the direct-mapping case, we're making sure the iommu_domain has translations installed for the given IOVAs (which are also the corresponding physical address) before it goes live, whereas what we need to do here is make sure the these addresses never get used as IOVAs at all, because any attempt to do so them will likely go wrong. Thus we carve them out of the iova_domain such that they will never get near an actual IOMMU API call. This is a slightly generalised equivalent of e.g. amd_iommu.c's init_reserved_iova_ranges(). Robin. > >> --- >> >> - Squash in the previous drm/exynos fixup >> - If need be, this one can probably wait >> --- >> arch/arm64/mm/dma-mapping.c | 2 +- >> drivers/gpu/drm/exynos/exynos_drm_iommu.h | 2 +- >> drivers/iommu/dma-iommu.c | 25 >> ++++++++++++++++++++++++- >> include/linux/dma-iommu.h | 3 ++- >> 4 files changed, 28 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c >> index c4284c432ae8..610d8e53011e 100644 >> --- a/arch/arm64/mm/dma-mapping.c >> +++ b/arch/arm64/mm/dma-mapping.c >> @@ -827,7 +827,7 @@ static bool do_iommu_attach(struct device *dev, >> const struct iommu_ops *ops, >> * then the IOMMU core will have already configured a group for >> this >> * device, and allocated the default domain for that group. >> */ >> - if (!domain || iommu_dma_init_domain(domain, dma_base, size)) { >> + if (!domain || iommu_dma_init_domain(domain, dma_base, size, dev)) { >> pr_warn("Failed to set up IOMMU for device %s; retaining >> platform DMA ops\n", >> dev_name(dev)); >> return false; >> diff --git a/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> b/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> index c8de4913fdbe..87f6b5672e11 100644 >> --- a/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> +++ b/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> @@ -66,7 +66,7 @@ static inline int >> __exynos_iommu_create_mapping(struct exynos_drm_private *priv, >> if (ret) >> goto free_domain; >> - ret = iommu_dma_init_domain(domain, start, size); >> + ret = iommu_dma_init_domain(domain, start, size, NULL); >> if (ret) >> goto put_cookie; >> diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c >> index 4329d18080cf..c5ab8667e6f2 100644 >> --- a/drivers/iommu/dma-iommu.c >> +++ b/drivers/iommu/dma-iommu.c >> @@ -27,6 +27,7 @@ >> #include <linux/iova.h> >> #include <linux/irq.h> >> #include <linux/mm.h> >> +#include <linux/pci.h> >> #include <linux/scatterlist.h> >> #include <linux/vmalloc.h> >> @@ -103,18 +104,38 @@ void iommu_put_dma_cookie(struct iommu_domain >> *domain) >> } >> EXPORT_SYMBOL(iommu_put_dma_cookie); >> +static void iova_reserve_pci_windows(struct pci_dev *dev, >> + struct iova_domain *iovad) >> +{ >> + struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); >> + struct resource_entry *window; >> + unsigned long lo, hi; >> + >> + resource_list_for_each_entry(window, &bridge->windows) { >> + if (resource_type(window->res) != IORESOURCE_MEM && >> + resource_type(window->res) != IORESOURCE_IO) >> + continue; >> + >> + lo = iova_pfn(iovad, window->res->start - window->offset); >> + hi = iova_pfn(iovad, window->res->end - window->offset); >> + reserve_iova(iovad, lo, hi); >> + } >> +} >> + >> /** >> * iommu_dma_init_domain - Initialise a DMA mapping domain >> * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() >> * @base: IOVA at which the mappable address space starts >> * @size: Size of IOVA space >> + * @dev: Device the domain is being initialised for >> * >> * @base and @size should be exact multiples of IOMMU page >> granularity to >> * avoid rounding surprises. If necessary, we reserve the page at >> address 0 >> * to ensure it is an invalid IOVA. It is safe to reinitialise a >> domain, but >> * any change which could make prior IOVAs invalid will fail. >> */ >> -int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t >> base, u64 size) >> +int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, >> + u64 size, struct device *dev) >> { >> struct iova_domain *iovad = cookie_iovad(domain); >> unsigned long order, base_pfn, end_pfn; >> @@ -152,6 +173,8 @@ int iommu_dma_init_domain(struct iommu_domain >> *domain, dma_addr_t base, u64 size >> iovad->dma_32bit_pfn = end_pfn; >> } else { >> init_iova_domain(iovad, 1UL << order, base_pfn, end_pfn); >> + if (dev && dev_is_pci(dev)) >> + iova_reserve_pci_windows(to_pci_dev(dev), iovad); >> } >> return 0; >> } >> diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h >> index 5ee806e41b5c..32c589062bd9 100644 >> --- a/include/linux/dma-iommu.h >> +++ b/include/linux/dma-iommu.h >> @@ -30,7 +30,8 @@ int iommu_get_dma_cookie(struct iommu_domain *domain); >> void iommu_put_dma_cookie(struct iommu_domain *domain); >> /* Setup call for arch DMA mapping code */ >> -int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t >> base, u64 size); >> +int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, >> + u64 size, struct device *dev); >> /* General helpers for DMA-API <-> IOMMU-API interaction */ >> int dma_direction_to_prot(enum dma_data_direction dir, bool coherent); > > Best regards
WARNING: multiple messages have this Message-ID (diff)
From: robin.murphy@arm.com (Robin Murphy) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 22/22] iommu/dma: Avoid PCI host bridge windows Date: Wed, 14 Sep 2016 12:10:54 +0100 [thread overview] Message-ID: <49c51c4f-cb00-445d-b8f8-b632babf2b3e@arm.com> (raw) In-Reply-To: <ab8693f6-20d6-2a95-9f1f-0607e72bc012@samsung.com> Hi Marek, On 14/09/16 11:55, Marek Szyprowski wrote: > Hi Robin, > > > On 2016-09-12 18:14, Robin Murphy wrote: >> With our DMA ops enabled for PCI devices, we should avoid allocating >> IOVAs which a host bridge might misinterpret as peer-to-peer DMA and >> lead to faults, corruption or other badness. To be safe, punch out holes >> for all of the relevant host bridge's windows when initialising a DMA >> domain for a PCI device. >> >> CC: Marek Szyprowski <m.szyprowski@samsung.com> >> CC: Inki Dae <inki.dae@samsung.com> >> Reported-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> >> Signed-off-by: Robin Murphy <robin.murphy@arm.com> > > I don't know much about PCI and their IOMMU integration, but can't we use > the direct mapping region feature of iommu core for it? There are already > iommu_get_dm_regions(), iommu_put_dm_regions() and > iommu_request_dm_for_dev() > functions for handling them... It's rather the opposite problem - in the direct-mapping case, we're making sure the iommu_domain has translations installed for the given IOVAs (which are also the corresponding physical address) before it goes live, whereas what we need to do here is make sure the these addresses never get used as IOVAs at all, because any attempt to do so them will likely go wrong. Thus we carve them out of the iova_domain such that they will never get near an actual IOMMU API call. This is a slightly generalised equivalent of e.g. amd_iommu.c's init_reserved_iova_ranges(). Robin. > >> --- >> >> - Squash in the previous drm/exynos fixup >> - If need be, this one can probably wait >> --- >> arch/arm64/mm/dma-mapping.c | 2 +- >> drivers/gpu/drm/exynos/exynos_drm_iommu.h | 2 +- >> drivers/iommu/dma-iommu.c | 25 >> ++++++++++++++++++++++++- >> include/linux/dma-iommu.h | 3 ++- >> 4 files changed, 28 insertions(+), 4 deletions(-) >> >> diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c >> index c4284c432ae8..610d8e53011e 100644 >> --- a/arch/arm64/mm/dma-mapping.c >> +++ b/arch/arm64/mm/dma-mapping.c >> @@ -827,7 +827,7 @@ static bool do_iommu_attach(struct device *dev, >> const struct iommu_ops *ops, >> * then the IOMMU core will have already configured a group for >> this >> * device, and allocated the default domain for that group. >> */ >> - if (!domain || iommu_dma_init_domain(domain, dma_base, size)) { >> + if (!domain || iommu_dma_init_domain(domain, dma_base, size, dev)) { >> pr_warn("Failed to set up IOMMU for device %s; retaining >> platform DMA ops\n", >> dev_name(dev)); >> return false; >> diff --git a/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> b/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> index c8de4913fdbe..87f6b5672e11 100644 >> --- a/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> +++ b/drivers/gpu/drm/exynos/exynos_drm_iommu.h >> @@ -66,7 +66,7 @@ static inline int >> __exynos_iommu_create_mapping(struct exynos_drm_private *priv, >> if (ret) >> goto free_domain; >> - ret = iommu_dma_init_domain(domain, start, size); >> + ret = iommu_dma_init_domain(domain, start, size, NULL); >> if (ret) >> goto put_cookie; >> diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c >> index 4329d18080cf..c5ab8667e6f2 100644 >> --- a/drivers/iommu/dma-iommu.c >> +++ b/drivers/iommu/dma-iommu.c >> @@ -27,6 +27,7 @@ >> #include <linux/iova.h> >> #include <linux/irq.h> >> #include <linux/mm.h> >> +#include <linux/pci.h> >> #include <linux/scatterlist.h> >> #include <linux/vmalloc.h> >> @@ -103,18 +104,38 @@ void iommu_put_dma_cookie(struct iommu_domain >> *domain) >> } >> EXPORT_SYMBOL(iommu_put_dma_cookie); >> +static void iova_reserve_pci_windows(struct pci_dev *dev, >> + struct iova_domain *iovad) >> +{ >> + struct pci_host_bridge *bridge = pci_find_host_bridge(dev->bus); >> + struct resource_entry *window; >> + unsigned long lo, hi; >> + >> + resource_list_for_each_entry(window, &bridge->windows) { >> + if (resource_type(window->res) != IORESOURCE_MEM && >> + resource_type(window->res) != IORESOURCE_IO) >> + continue; >> + >> + lo = iova_pfn(iovad, window->res->start - window->offset); >> + hi = iova_pfn(iovad, window->res->end - window->offset); >> + reserve_iova(iovad, lo, hi); >> + } >> +} >> + >> /** >> * iommu_dma_init_domain - Initialise a DMA mapping domain >> * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() >> * @base: IOVA at which the mappable address space starts >> * @size: Size of IOVA space >> + * @dev: Device the domain is being initialised for >> * >> * @base and @size should be exact multiples of IOMMU page >> granularity to >> * avoid rounding surprises. If necessary, we reserve the page at >> address 0 >> * to ensure it is an invalid IOVA. It is safe to reinitialise a >> domain, but >> * any change which could make prior IOVAs invalid will fail. >> */ >> -int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t >> base, u64 size) >> +int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, >> + u64 size, struct device *dev) >> { >> struct iova_domain *iovad = cookie_iovad(domain); >> unsigned long order, base_pfn, end_pfn; >> @@ -152,6 +173,8 @@ int iommu_dma_init_domain(struct iommu_domain >> *domain, dma_addr_t base, u64 size >> iovad->dma_32bit_pfn = end_pfn; >> } else { >> init_iova_domain(iovad, 1UL << order, base_pfn, end_pfn); >> + if (dev && dev_is_pci(dev)) >> + iova_reserve_pci_windows(to_pci_dev(dev), iovad); >> } >> return 0; >> } >> diff --git a/include/linux/dma-iommu.h b/include/linux/dma-iommu.h >> index 5ee806e41b5c..32c589062bd9 100644 >> --- a/include/linux/dma-iommu.h >> +++ b/include/linux/dma-iommu.h >> @@ -30,7 +30,8 @@ int iommu_get_dma_cookie(struct iommu_domain *domain); >> void iommu_put_dma_cookie(struct iommu_domain *domain); >> /* Setup call for arch DMA mapping code */ >> -int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t >> base, u64 size); >> +int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, >> + u64 size, struct device *dev); >> /* General helpers for DMA-API <-> IOMMU-API interaction */ >> int dma_direction_to_prot(enum dma_data_direction dir, bool coherent); > > Best regards
next prev parent reply other threads:[~2016-09-14 11:10 UTC|newest] Thread overview: 104+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-12 16:13 [PATCH v7 00/22] Generic DT bindings for PCI IOMMUs and ARM SMMU Robin Murphy 2016-09-12 16:13 ` Robin Murphy [not found] ` <cover.1473695704.git.robin.murphy-5wv7dgnIgG8@public.gmane.org> 2016-09-12 16:13 ` [PATCH v7 01/22] Docs: dt: add PCI IOMMU map bindings Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 02/22] of/irq: Break out msi-map lookup (again) Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 03/22] iommu/of: Handle iommu-map property for PCI Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 04/22] iommu: Introduce iommu_fwspec Robin Murphy 2016-09-12 16:13 ` Robin Murphy [not found] ` <742a71630de502ac5a7a8641c6ed368d8409324d.1473695704.git.robin.murphy-5wv7dgnIgG8@public.gmane.org> 2016-09-13 9:54 ` [PATCH v7.1 " Robin Murphy 2016-09-13 9:54 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 05/22] Docs: dt: document ARM SMMUv3 generic binding usage Robin Murphy 2016-09-12 16:13 ` Robin Murphy [not found] ` <2273645f1fa5c76b6b98b5fd03804ab8b55a7691.1473695704.git.robin.murphy-5wv7dgnIgG8@public.gmane.org> 2016-09-20 14:46 ` Rob Herring 2016-09-20 14:46 ` Rob Herring 2016-09-12 16:13 ` [PATCH v7 06/22] iommu/arm-smmu: Fall back to global bypass Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 07/22] iommu/arm-smmu: Implement of_xlate() for SMMUv3 Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 08/22] iommu/arm-smmu: Support non-PCI devices with SMMUv3 Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 09/22] iommu/arm-smmu: Set PRIVCFG in stage 1 STEs Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 10/22] iommu/arm-smmu: Handle stream IDs more dynamically Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 11/22] iommu/arm-smmu: Consolidate stream map entry state Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 12/22] iommu/arm-smmu: Keep track of S2CR state Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 13/22] iommu/arm-smmu: Refactor mmu-masters handling Robin Murphy 2016-09-12 16:13 ` Robin Murphy [not found] ` <046d2d21f988d6ece916fc45b0af0804a7f200f2.1473695704.git.robin.murphy-5wv7dgnIgG8@public.gmane.org> 2016-09-14 14:21 ` [PATCH v7.1 " Robin Murphy 2016-09-14 14:21 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 14/22] iommu/arm-smmu: Streamline SMMU data lookups Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 15/22] iommu/arm-smmu: Add a stream map entry iterator Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 16/22] iommu/arm-smmu: Intelligent SMR allocation Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 17/22] iommu/arm-smmu: Convert to iommu_fwspec Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 18/22] Docs: dt: document ARM SMMU generic binding usage Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 19/22] iommu/arm-smmu: Wire up generic configuration support Robin Murphy 2016-09-12 16:13 ` Robin Murphy [not found] ` <228dc6c675f10ae7481640d4ef2f4960c170621f.1473695704.git.robin.murphy-5wv7dgnIgG8@public.gmane.org> 2016-09-14 14:26 ` [PATCH v7.1 " Robin Murphy 2016-09-14 14:26 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 20/22] iommu/arm-smmu: Set domain geometry Robin Murphy 2016-09-12 16:13 ` Robin Murphy 2016-09-12 16:13 ` [PATCH v7 21/22] iommu/dma: Add support for mapping MSIs Robin Murphy 2016-09-12 16:13 ` Robin Murphy [not found] ` <2273af20d844bd618c6a90b57e639700328ebf7f.1473695704.git.robin.murphy-5wv7dgnIgG8@public.gmane.org> 2016-10-05 7:00 ` Nipun Gupta 2016-10-05 7:00 ` Nipun Gupta [not found] ` <DB6PR0402MB2694B2E5AE266F138784D2C2E6C40-2mNvjAGDOPn2WJ5A9zev/o3W/0Ik+aLCnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org> 2016-10-05 9:55 ` Robin Murphy 2016-10-05 9:55 ` Robin Murphy [not found] ` <6ec9519b-01df-3be8-2967-7556bd306909-5wv7dgnIgG8@public.gmane.org> 2016-10-05 11:31 ` Nipun Gupta 2016-10-05 11:31 ` Nipun Gupta 2016-09-12 16:14 ` [PATCH v7 22/22] iommu/dma: Avoid PCI host bridge windows Robin Murphy 2016-09-12 16:14 ` Robin Murphy [not found] ` <5f7bfee298f98d29a35933d3e0252d32b83d62b8.1473695704.git.robin.murphy-5wv7dgnIgG8@public.gmane.org> 2016-09-14 10:55 ` Marek Szyprowski 2016-09-14 10:55 ` Marek Szyprowski [not found] ` <ab8693f6-20d6-2a95-9f1f-0607e72bc012-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> 2016-09-14 11:10 ` Robin Murphy [this message] 2016-09-14 11:10 ` Robin Murphy [not found] ` <49c51c4f-cb00-445d-b8f8-b632babf2b3e-5wv7dgnIgG8@public.gmane.org> 2016-09-14 12:35 ` Marek Szyprowski 2016-09-14 12:35 ` Marek Szyprowski [not found] ` <dc9f945f-2756-ab70-d061-9fdc7c5afdee-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> 2016-09-14 13:25 ` Robin Murphy 2016-09-14 13:25 ` Robin Murphy [not found] ` <bbdc42fa-ea35-945f-3e2a-e0ab03fc997d-5wv7dgnIgG8@public.gmane.org> 2016-09-15 7:08 ` Marek Szyprowski 2016-09-15 7:08 ` Marek Szyprowski 2016-09-13 12:14 ` [PATCH v7 00/22] Generic DT bindings for PCI IOMMUs and ARM SMMU Auger Eric 2016-09-13 12:14 ` Auger Eric [not found] ` <92f27a6b-9752-516d-3924-c552fc6a5ace-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2016-09-13 12:40 ` Robin Murphy 2016-09-13 12:40 ` Robin Murphy [not found] ` <e24821be-5cc4-52b3-f961-1eb32cf58293-5wv7dgnIgG8@public.gmane.org> 2016-09-13 12:57 ` Auger Eric 2016-09-13 12:57 ` Auger Eric 2016-09-14 8:41 ` Auger Eric 2016-09-14 8:41 ` Auger Eric [not found] ` <11ebd81e-2ea5-5ff3-35b3-be95f03e05bd-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2016-09-14 9:20 ` Will Deacon 2016-09-14 9:20 ` Will Deacon [not found] ` <20160914092051.GB19622-5wv7dgnIgG8@public.gmane.org> 2016-09-14 9:35 ` Auger Eric 2016-09-14 9:35 ` Auger Eric 2016-09-14 10:35 ` Robin Murphy 2016-09-14 10:35 ` Robin Murphy [not found] ` <d03ea5e7-59f1-8b49-4ba2-d05fc2030ebc-5wv7dgnIgG8@public.gmane.org> 2016-09-14 12:32 ` Auger Eric 2016-09-14 12:32 ` Auger Eric [not found] ` <04a0a682-4fdc-8d62-57cd-efdf730582c6-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2016-09-14 12:53 ` Robin Murphy 2016-09-14 12:53 ` Robin Murphy [not found] ` <c2645c5e-edd3-2b31-4311-0ca621a915e2-5wv7dgnIgG8@public.gmane.org> 2016-09-15 9:29 ` Auger Eric 2016-09-15 9:29 ` Auger Eric [not found] ` <4d87d5f2-0350-b5f8-ffc3-4e9377cf1f87-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2016-09-15 10:15 ` Robin Murphy 2016-09-15 10:15 ` Robin Murphy [not found] ` <fc4ce398-4eeb-f2ca-b964-e9f466be79c4-5wv7dgnIgG8@public.gmane.org> 2016-09-15 16:46 ` Auger Eric 2016-09-15 16:46 ` Auger Eric [not found] ` <1838c65d-5944-8946-781c-b420bea1acab-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2016-09-16 16:18 ` Robin Murphy 2016-09-16 16:18 ` Robin Murphy [not found] ` <f16db032-1905-9804-0607-fe007af72b0e-5wv7dgnIgG8@public.gmane.org> 2016-09-19 12:13 ` Auger Eric 2016-09-19 12:13 ` Auger Eric [not found] ` <48f3bc10-3966-7d50-d070-7ec7f0946c92-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org> 2016-09-19 12:24 ` Will Deacon 2016-09-19 12:24 ` Will Deacon [not found] ` <20160919122435.GD9005-5wv7dgnIgG8@public.gmane.org> 2016-09-19 12:41 ` Robin Murphy 2016-09-19 12:41 ` Robin Murphy [not found] ` <99ee0946-c7ff-e6e4-08c1-ff686ea1a8a5-5wv7dgnIgG8@public.gmane.org> 2016-09-19 14:17 ` Will Deacon 2016-09-19 14:17 ` Will Deacon
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=49c51c4f-cb00-445d-b8f8-b632babf2b3e@arm.com \ --to=robin.murphy-5wv7dgnigg8@public.gmane.org \ --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \ --cc=inki.dae-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org \ --cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \ --cc=joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org \ --cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \ --cc=m.szyprowski-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org \ --cc=punit.agrawal-5wv7dgnIgG8@public.gmane.org \ --cc=thunder.leizhen-hv44wF8Li93QT0dZR+AlfA@public.gmane.org \ --cc=will.deacon-5wv7dgnIgG8@public.gmane.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.